CN116131596B

CN116131596B - Hybrid mode power factor correction converter and control method thereof

Info

Publication number: CN116131596B
Application number: CN202310339258.3A
Authority: CN
Inventors: 杨帅; 栾博悦; 盛琳
Original assignee: Meraki Integrated Shenzhen Technology Co ltd
Current assignee: Meraki Integrated Shenzhen Technology Co ltd
Priority date: 2023-04-03
Filing date: 2023-04-03
Publication date: 2023-07-14
Anticipated expiration: 2043-04-03
Also published as: CN116131596A

Abstract

A mixed mode power factor correction converter and a control method thereof, wherein in the on-state of a switching tube Q1, when the inductance current flowing through an inductance L1 is larger than or equal to the product of the output value of a voltage ring of the converter and the voltage of a single-phase alternating current signal, the switching tube Q1 is controlled to be switched from the on-state to the off-state, in the off-state of the switching tube Q1, if in the critical on-state, the inductance current flowing through the inductance L1 is monitored to be smaller than or equal to zero or the drain-source voltage Vds of the switching tube Q1 is captured to be the waveform valley, in the case of the critical on-state, the switching tube Q1 is controlled to be switched from the off-state to the on-state, and if in the continuous on-state, the grid voltage modulation signal is larger than or equal to the off-carrier signal, thereby realizing the natural transition of the converter in the CRM mode and the CCM mode.

Description

Hybrid mode power factor correction converter and control method thereof

Technical Field

The invention relates to the technical field of converters, in particular to a mixed mode power factor correction converter and a control method thereof.

Background

In the Power Factor Correction (PFC) control of the constant frequency current continuous mode, good harmonic current distortion (ithd) and power factor (PF value) can usually only be obtained under medium and high load conditions. However, under the condition of high voltage input or light load, the current of the inductor in the converter cannot be always kept in a continuous current state (CCM mode: continuous conduction mode), and more current discontinuous state (DCM mode: discontinuous conduction mode) is operated, so that the control effect of power factor correction under the condition of high voltage or light load can be obviously influenced, the harmonic wave of input current is increased and other electrical performance parameter indexes are deteriorated, meanwhile, the loss of a switching tube is also caused, and the conversion efficiency of a full load range cannot be optimized.

At the same time, when operating at high voltage inputs or light loads, operating in a fixed frequency mode, the efficiency is not as efficient as operating in CRM mode (critical conduction mode) which achieves near ZVS. Furthermore, the peak inductance current of CRM mode is large and is not substantially suitable for PFC applications above 500W.

Disclosure of Invention

The invention aims to provide a mixed mode power factor correction converter and a control method thereof, which can realize multi-mode natural transition work.

According to a first aspect, an embodiment provides a mixed mode power factor correction converter comprising:

the alternating current input end is used for acquiring a single-phase alternating current signal;

the rectification module is used for rectifying the single-phase alternating current signal into a direct current signal;

the boost conversion module comprises an inductor L1 and a switching tube Q1, one end of the inductor L1 is used for obtaining the direct current signal, the other end of the inductor L1 is connected with a first pole of the switching tube Q1, a second pole of the switching tube Q1 is connected with the ground, and the boost conversion module is used for carrying out boost conversion on the direct current signal through the on and off of the switching tube Q1 so as to obtain output voltage;

a control module configured to:

in the on-state of the switching tube Q1, obtaining an inductance current flowing through the inductance L1, an output value of a voltage ring of the converter, and a voltage of the single-phase alternating current signal, and outputting a PWM control signal for controlling the switching tube Q1 to switch from the on-state to the off-state when the inductance current flowing through the inductance L1 is equal to or greater than a product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal;

in the off phase of the switching tube Q1, if the converter is in the critical conduction mode, when the inductor current flowing through the inductor L1 is monitored to be less than or equal to zero or the drain-source voltage Vds of the switching tube Q1 is captured to be the waveform valley, outputting a PWM control signal for controlling the switching tube Q1 to switch from the off phase to the on phase;

in the turn-off stage of the switching tube Q1, if the converter is in a continuous conduction mode, acquiring a grid voltage modulation signal with the same variation trend as the voltage of the single-phase alternating current signal; and generating a turn-off carrier signal, and outputting a PWM control signal for controlling the switching tube Q1 to be switched from a turn-off stage to a turn-on stage when the grid voltage modulation signal is larger than or equal to the turn-off carrier signal.

According to a second aspect, in one embodiment, there is provided a control method of a mixed mode pfc converter, including:

in a conduction stage of a switching tube Q1 in the converter, acquiring an inductance current flowing through an inductance L1 in the converter, an output value of a voltage ring of the converter and a voltage of the single-phase alternating current signal, and outputting a PWM control signal for controlling the switching tube Q1 to be converted from the conduction stage to the disconnection stage when the inductance current flowing through the inductance L1 is more than or equal to a product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal;

in an off stage of a switching tube Q1 in the converter, if the converter is in a critical conduction mode, when the inductor current flowing through the inductor L1 is monitored to be less than or equal to zero or the drain-source voltage Vds of the switching tube Q1 is captured to be a waveform valley, a PWM control signal for controlling the switching tube Q1 to be switched from the off stage to the on stage is output;

in the turn-off stage of the switching tube Q1 in the converter, if the converter is in a continuous conduction mode, acquiring a grid voltage modulation signal with the same variation trend as the voltage of the single-phase alternating current signal; and generating a turn-off carrier signal, and outputting a PWM control signal for controlling the switching tube Q1 to be switched from a turn-off stage to a turn-on stage when the grid voltage modulation signal is larger than or equal to the turn-off carrier signal.

According to the mixed-mode power factor correction converter and the control method thereof of the embodiment, in the on-state of the switching tube Q1, when the inductance current flowing through the inductance L1 is equal to or greater than the product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal, the switching tube Q1 is controlled to switch from the on-state to the off-state, in the off-state of the switching tube Q1, if the inductance current flowing through the inductance L1 is monitored to be equal to or less than zero or the drain-source voltage Vds of the switching tube Q1 is captured to be the waveform valley in the critical on-state, in the continuous on-state, when the grid voltage modulation signal is equal to or greater than the off-carrier signal, the switching tube Q1 is controlled to switch from the off-state to the on-state, thereby realizing the natural transition of the converter in the CRM mode and the CCM mode.

Drawings

FIG. 1 is a schematic diagram of a mixed mode PFC converter according to an embodiment;

FIG. 2 is a schematic diagram of a switching transistor from an on phase to an off phase;

FIG. 3 is a schematic view of the waveform development of FIG. 2;

FIG. 4 is a schematic diagram of the switching frequency as a function of the voltage of the single-phase AC signal input from the power grid;

FIG. 5 is a diagram of the lowest switching frequency;

FIG. 6 is a control logic diagram of a control module;

FIG. 7 is a schematic diagram of waveform simulation of the natural transition operation of CRM and CCM;

fig. 8 is a flowchart of a control method of the mixed mode pfc converter according to an embodiment.

Detailed Description

The invention will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, some operations associated with the present application have not been shown or described in the specification to avoid obscuring the core portions of the present application, and may not be necessary for a person skilled in the art to describe in detail the relevant operations based on the description herein and the general knowledge of one skilled in the art.

Furthermore, the described features, operations, or characteristics of the description may be combined in any suitable manner in various embodiments. Also, various steps or acts in the method descriptions may be interchanged or modified in a manner apparent to those of ordinary skill in the art. Thus, the various orders in the description and drawings are for clarity of description of only certain embodiments, and are not meant to be required orders unless otherwise indicated.

The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The terms "coupled" and "connected," as used herein, are intended to encompass both direct and indirect coupling (coupling), unless otherwise indicated.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a mixed mode pfc converter according to an embodiment, and the converter includes: an ac input v_ac, a rectifying module 101, a boost converting module 102, a control module 103, and a load Rload; the ac input terminal v_ac is connected to the input terminal of the rectifying module 101, the output terminal of the rectifying module 101 is connected to the input terminal of the boost converting module 102, and the output terminal of the boost converting module 102 is connected to the load Rload, which will be specifically described below.

The ac input v_ac is used to obtain a single-phase ac signal. In this embodiment, the voltage sampler Vm2 measures the voltage instantaneous value of the single-phase ac signal, i.e., obtains the voltage value of the single-phase ac signal.

The rectifying module 101 is used for rectifying a single-phase alternating current signal into a direct current signal. As shown in fig. 1, the rectifier module 101 may be a rectifier bridge circuit formed by a diode D1, a diode D2, a diode D3, and a diode D4, and in other embodiments, the rectifier module 101 may be any existing rectifier circuit, which is not described herein.

Boost conversion module 102 includes inductance L1 and switch tube Q1, and switch tube Q1 includes first utmost point, second utmost point and control electrode, and inductance L1's one end is used for acquireing direct current signal, and switch tube Q1's first utmost point is connected to inductance L1's the other end, and switch tube Q1's second utmost point is connected ground, and switch tube Q1's control electrode connects the output of control module 103. The boost conversion module 102 is configured to boost-convert the dc signal by turning on and off the switching tube Q1 to obtain an output voltage. The BOOST conversion module 102 in this embodiment may be a BOOST converter circuit, where the inductor current iL on the inductor L1 may be sampled by the current sampler iac_sen1 to obtain the inductor current il_sen, and the output voltage output by the BOOST conversion module 102 may be sampled by the voltage sampler Vm1 to obtain the output voltage vo_sen.

The control module 103 may be configured to:

in the on-phase of the switching tube Q1, an inductor current flowing through the inductor L1, an output value of a voltage ring of the converter, and a voltage of the single-phase alternating current signal are obtained, and when the inductor current flowing through the inductor L1 is equal to or greater than a product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal, a PWM control signal for controlling the switching tube Q1 to switch from the on-phase to the off-phase is output.

In the off phase of the switching tube Q1, if the converter is in the critical conduction mode, when the inductor current flowing through the inductor L1 is monitored to be less than or equal to zero or the drain-source voltage Vds of the switching tube Q1 is captured to be the waveform valley, a PWM control signal for controlling the switching tube Q1 to switch from the off phase to the on phase is output.

In the turn-off stage of the switching tube Q1, if the converter is in a continuous conduction mode, acquiring a power grid voltage modulation signal with the same variation trend as the voltage of the single-phase alternating current signal; and generating a turn-off carrier signal, and outputting a PWM control signal for controlling the switching tube Q1 to switch from a turn-off stage to a turn-on stage when the grid voltage modulation signal is greater than or equal to the turn-off carrier signal.

In one embodiment, obtaining a grid voltage modulation signal having the same trend as the voltage of the single-phase ac signal includes: and acquiring the voltage of the single-phase alternating current signal and a preset turn-off coefficient, and taking the product of the voltage of the single-phase alternating current signal and the preset turn-off coefficient as a power grid voltage modulation signal. The power grid voltage modulation signal and the single-phase alternating current signal input by the power grid have the same variation trend, and can be sinusoidal waveforms.

In an embodiment, generating the off-carrier signal comprises: when the inductance current flowing through the inductance L1 is equal to or greater than the product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal, the generation of the ramp signal is started, and the off carrier signal is obtained. That is, when the switching tube Q1 is switched from the on phase to the off phase, the ramp signal starts to be generated and is reset when reaching a certain preset value, so as to form a triangular wave signal, that is, the off carrier signal is obtained.

In summary, the control module 103 controls the on-phase and the off-phase of the switching tube Q1 according to different control strategies, which will be described in detail below.

In the conducting stage of the switching tube Q1, the peak envelope of the inductor current obtained by multiplying the output value of the voltage loop and the voltage of the single-phase alternating current signal input by the power grid is compared with the peak of the inductor current to determine the moment when the conducting stage of the switching tube Q1 is finished. As shown in fig. 2, IAC is a current of a single-phase ac signal input by the power grid, VAC is a voltage of the single-phase ac signal input by the power grid, IPK1 is a peak envelope of the inductor current, iL is the inductor current, and CH3 is a PWM control signal. When the waveforms shown in fig. 2 are expanded, as shown in fig. 3, it can be seen that the PWM control signal is pulled down immediately after the inductor current hits the peak envelope of the inductor current, so that the switching transistor Q1 switches from the on phase to the off phase.

In this embodiment, after the peak envelope of the inductor current is limited to the voltage waveform of the single-phase ac signal input by the power grid, the average value of the inductor current can be ensured to follow the voltage waveform of the single-phase ac signal in both CRM and CCM modes, thereby achieving an excellent effect of power factor correction.

However, in order to achieve a better control effect under the CRM model, it is necessary to track the decrease of the inductance current below the zero point, so the switching frequency of the system is changed when the CRM mode is operated, and the switching frequency is fixed when the CRM mode is shifted to CCM, so the control strategy provided by the embodiment achieves the frequency conversion operation and the mode switching by changing the time length of the turn-off Time (TOFF), and the above-mentioned transient value of the voltage of the single-phase ac signal input by the voltage ring and the power grid of the turn-on Time (TON) is determined, so the key of the converter provided by the embodiment to achieve the control of the turn-off Time (TOFF).

The on-time TON can be calculated by the following expression:

，

，

wherein, the liquid crystal display device comprises a liquid crystal display device,

indicating the on-time of the switching tube Q1, +.>

Representing the peak envelope of the inductor current at time t, < >>

Represents the inductance of inductance L1, +.>

The voltage instantaneous value of the single-phase alternating current signal input by the power grid at time t is represented by Vloop, the output value of the voltage ring is represented by +.>

Representing the gain factor.

As can be seen from the above expression, the on-time TON can be calculated jointly from the voltage of the single-phase ac signal input from the power grid, the output voltage of the converter, the load, and the inductance of the inductor L1.

If the converter is fully operated in CRM mode, the switching frequency of the switching tube Q1 in the sinusoidal period changes in the opposite direction according to the voltage of the single-phase ac signal input by the power grid, as shown in fig. 4, iL is the inductor current, iLavg is the average value of the inductor current, VGS is the voltage between the gate and the source of the switching tube Q1, fSW is the switching frequency of the switching tube Q1, and when the load is heavier, the switching frequency is lower, therefore, the strategy for transition from CRM mode to CCM mode proposed in this embodiment is to limit the lowest switching frequency of the operation of the converter, and when the load continues to increase, the switching frequency is clamped to the lowest frequency, as shown in fig. 5. The converter will be clamped for the lowest switching frequency fmin, thereby transitioning from CRM mode to CCM mode operation, wherein:

in the conduction stage: when the inductance current is larger than or equal to the product of the voltage ring and the voltage of the single-phase alternating current signal input by the power grid, the switch Q1 is turned off, and the integrator for frequency control is reset at the same time, the SR trigger is reset, and the PWM control signal is pulled down.

In the off phase: in CRM mode, the comparator CC1 captures the moment when the inductor current is lower than zero, OR captures the moment when the drain-source voltage Vds of the switching tube Q1 is the waveform valley, then captures the rising edge of the signal, and sends the rising edge to the S terminal of the SR flip-flop through the OR gate OR1, and pulls up the PWM control signal again.

In the CCM mode, since the off-duty ratio Doff (t) =vin (t)/vout, vout is the output voltage of the converter, the embodiment stabilizes the CCM mode by controlling the off-duty ratio Doff of the CCM mode to follow the voltage amplitude variation of the single-phase ac signal input from the power grid, without slope compensation.

Referring to fig. 6, the control logic result of one embodiment of the control module 103 is described below.

First, a control logic diagram of the control module 103 in the on stage of the switching transistor Q1 will be described.

The control module 103 includes: the sampling keeper zoh, the subtractor Sub, the absolute value taking device Abs, the Gain, the multiplier Product1 relation operator Relational Operator, the rising edge detector ED1 and the SR Flip-flop.

Wherein:

the sample-and-hold unit zoh is configured to acquire the instantaneous value vo_sen of the output voltage and sample-and-hold the instantaneous value vo_sen of the output voltage.

The subtractor Sub is used for calculating the difference between the set value vo_set of the output voltage and the instantaneous value vo_sen of the output voltage output by the sample holder zoh, and obtaining the output value of the voltage ring.

The absolute value taking device Abs is used for taking an absolute value of the instantaneous value vac_sen of the voltage of the single-phase ac signal.

The Gain is used for multiplying the voltage of the single-phase alternating current signal output by the absolute value taking device Abs by the Gain K.

The multiplier Product1 multiplies the output value of the voltage ring and the voltage of the single-phase alternating current signal output by the Gain to obtain the Product of the output value of the voltage ring and the voltage of the single-phase alternating current signal;

the relational operator Relational Operator1 is configured to output a high-level signal when an instantaneous value il_sen of the inductor current flowing through the inductor L1 is equal to or greater than a product of an output value of the voltage loop of the inverter and a voltage of the single-phase ac signal.

The rising edge detector ED1 is configured to output a reset signal when detecting that the signal output from the relational operator Relational Operator1 transitions from a low level to a high level.

When the R end of the SR Flip-flop receives the reset signal, the Q end outputs a PWM control signal with low level.

Next, the control module 103 will be described with reference to a control logic diagram in a critical conduction mode (CRM) of the off phase of the switching transistor Q1.

The control module 103 further includes: a comparator CC1, a rising edge detector ED2 and an OR gate OR1.

The comparator CC1 is configured to output a high-level signal when an inductor current flowing through the inductor L1 is equal to or less than zero or when a drain-source voltage Vds of the switching tube Q1 is equal to or less than a waveform valley voltage value;

the rising edge detector ED2 is configured to output a set signal when detecting that the signal output by the comparator CC1 transitions from a low level to a high level;

the OR gate OR1 is used for outputting a set signal to an S terminal of the SR Flip-flop, and when the S terminal of the SR Flip-flop receives the set signal, a Q terminal outputs a high-level PWM control signal.

Finally, the control module 103 is described with respect to a control logic diagram in Continuous Conduction Mode (CCM) during the off phase of the switching transistor Q1.

The control module 103 further includes: OR gate OR2, integrator, comparator CC2, multiplier Product2, relational operator Relational Operator2 and rising edge detector ED3.

The OR gate OR2 is configured to output a reset signal to the Integrator when the reset signal output from the rising edge detector ED1 is acquired.

The Integrator is used for obtaining a preset frequency FMINI, integrating the preset frequency FMINI to output a turn-off carrier signal, and resetting the turn-off carrier signal when receiving a reset signal.

The comparator CC2 is configured to output a high-level signal to the OR gate OR2 when the value of the off carrier signal output by the Integrator is greater than OR equal to a preset value, so as to reset the Integrator.

The multiplier Product2 is used for multiplying the voltage of the single-phase alternating current signal by a preset turn-off coefficient doff_ kac to obtain a grid voltage modulation signal.

The relational operator Relational Operator is configured to output a high-level signal when the grid voltage modulation signal is equal to or greater than the off-carrier signal.

The rising edge detector ED3 is configured to output a set signal when detecting that the signal output from the relational operator Relational Operator2 transitions from a low level to a high level; the OR gate OR1 is used for outputting a set signal to an S terminal of the SR Flip-flop, and when the S terminal of the SR Flip-flop receives the set signal, a Q terminal outputs a high-level PWM control signal.

Since the off duty cycle (DOFF) of the CRM mode is implemented by the zero crossing of the inductor current or the waveform valley (ZCD) of the drain-source voltage Vds of the switching tube Q1, and the operating frequency of the CRM mode is higher than that of the CCM mode, the on Time (TON) is the same in both the CCM mode and the CRM mode under the same peak envelope setting of the inductor current, and since the switching frequency of the CRM mode is higher than that of the CCM mode, the switching period of the CRM mode is shorter, so that toff=tsw-TON, TSW of the CRM mode is the switching period, and thus the calculated TOFF of the CRM mode is smaller than that of the CCM mode, and thus the SR flip-flop is set by the comparator CC1 first in the CRM mode. In the CCM mode, since the inductor current does not return to zero, the comparator CC1 is always maintained in a low state, and the SR flip-flop is not affected.

In addition, when the light load enters the DCM mode (discontinuous conduction mode), the frequency is automatically increased in the CRM mode, so that the highest switching frequency is clamped for optimizing the light load efficiency, and the CRM mode is naturally transited to the DCM mode.

As shown in fig. 7, IAC in CH1 is the current of the single-phase ac signal input by the power grid, VAC is the voltage of the single-phase ac signal input by the power grid, IPK in CH2 is the peak envelope of the inductor current, iL is the inductor current, CH3 is the signals on the S (SET), R (RESET) and Q (Q) ends of the SR flip-flop, doff_ramp in CH4 is the off-carrier signal doff_ramp, doff_set is the power grid voltage modulation signal, and when the inductor current passes through the zero point (ZCD), the R end of the SR flip-flop is the high level signal, and when doff_set > doff_ramp, the R end of the SR flip-flop is also the high level signal, so as to realize the natural transition between CRM and CCM.

Referring to fig. 8, the embodiment of the present invention further provides a control method of the mixed mode pfc converter, which includes steps 201 to 203, and is described in detail below.

Step 201: in the on-phase of the switching tube Q1 in the converter, an inductance current flowing through an inductance L1 in the converter, an output value of a voltage ring of the converter, and a voltage of the single-phase alternating current signal are obtained, and when the inductance current flowing through the inductance L1 is equal to or greater than a product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal, a PWM control signal for controlling the switching tube Q1 to switch from the on-phase to the off-phase is output.

Step 202: in the off phase of the switching tube Q1 in the converter, if the converter is in the critical conduction mode, when the inductor current flowing through the inductor L1 is monitored to be less than or equal to zero or the drain-source voltage Vds of the switching tube Q1 is captured to be the waveform valley, a PWM control signal for controlling the switching tube Q1 to switch from the off phase to the on phase is output.

Step 203: in the turn-off stage of the switching tube Q1 in the converter, if the converter is in a continuous conduction mode, acquiring a grid voltage modulation signal with the same variation trend as the voltage of the single-phase alternating current signal; and generating a turn-off carrier signal, and outputting a PWM control signal for controlling the switching tube Q1 to switch from a turn-off stage to a turn-on stage when the grid voltage modulation signal is greater than or equal to the turn-off carrier signal.

It should be noted that, the method steps in the foregoing embodiments are applied to the control module of the converter, and specific implementations of the control module have been described in detail in the foregoing embodiments, which are not repeated herein.

The foregoing description of the invention has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the invention pertains, based on the idea of the invention.

Claims

1. A mixed mode pfc converter comprising:

a control module configured to:

2. The mixed-mode power factor correction converter of claim 1, wherein generating the off-carrier signal comprises:

and when the inductance current flowing through the inductance L1 is larger than or equal to the product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal, starting to generate a ramp signal to obtain a turn-off carrier signal.

3. The mixed-mode pfc converter of claim 1, wherein obtaining a grid voltage modulation signal having a same trend of variation as a voltage of the single-phase ac signal comprises:

and acquiring the voltage of the single-phase alternating current signal and a preset turn-off coefficient, and taking the product of the voltage of the single-phase alternating current signal and the preset turn-off coefficient as a power grid voltage modulation signal.

4. The mixed-mode pfc converter of claim 1, wherein the control module comprises: the sampling keeper zoh, the subtracter Sub, the absolute value taking device Abs, the Gain device Gain, the multiplier Product1, the relation arithmetic unit Relational Operator1, the rising edge detector ED1 and the SR Flip-flop;

the sample-and-hold unit zoh is configured to obtain an instantaneous value vo_sen of the output voltage, and sample-and-hold the instantaneous value vo_sen of the output voltage;

the subtracter Sub is used for calculating the difference value between the set value vo_set of the output voltage and the instantaneous value vo_sen of the output voltage output by the sample holder zoh to obtain the output value of the voltage loop;

the absolute value taking device Abs is used for carrying out absolute value taking processing on the voltage of the single-phase alternating current signal;

the Gain device Gain is used for multiplying the voltage of the single-phase alternating current signal output by the absolute value taking device Abs by Gain K;

the multiplier Product1 multiplies the output value of the voltage loop and the voltage of the single-phase alternating current signal output by the Gain to obtain the Product of the output value of the voltage loop and the voltage of the single-phase alternating current signal;

the relational operator Relational Operator1 is configured to output a high-level signal when an inductance current flowing through the inductance L1 is equal to or greater than a product of an output value of the voltage loop of the inverter and a voltage of the single-phase ac signal;

the rising edge detector ED1 is configured to output a reset signal when detecting that the signal output by the relational operator Relational Operator1 jumps from a low level to a high level;

and when the R end of the SR Flip-flop receives the reset signal, the Q end outputs a PWM control signal with a low level.

5. A mixed mode PFC converter according to claim 4, wherein the control module further includes: a comparator CC1, a rising edge detector ED2, and an OR gate OR1;

the comparator CC1 is configured to output a high-level signal when an inductance current flowing through the inductance L1 is less than or equal to zero or a drain-source voltage Vds of the switching tube Q1 is less than or equal to a waveform valley voltage value;

the rising edge detector ED2 is configured to output a set signal when detecting that the signal output by the comparator CC1 jumps from a low level to a high level;

the OR gate OR1 is configured to output the set signal to an S terminal of the SR Flip-flop, where when the S terminal of the SR Flip-flop receives the set signal, the Q terminal outputs a PWM control signal with a high level.

6. The mixed-mode power factor correction converter of claim 5, wherein said control module further comprises: OR gate OR2, integrator, comparator CC2, multiplier Product2, relational operator Relational Operator and rising edge detector ED3;

the OR gate OR2 is configured to output a reset signal output by the rising edge detector ED1 to the Integrator when the reset signal is acquired;

the Integrator is used for obtaining a preset frequency FMINI, integrating the preset frequency FMINI to output a turn-off carrier signal, and resetting the turn-off carrier signal when receiving the reset signal;

the comparator CC2 is configured to output a high-level signal to the OR gate OR2 when the value of the off carrier signal output by the Integrator is greater than OR equal to a preset value, so as to reset the Integrator;

the multiplier Product2 is used for multiplying the voltage of the single-phase alternating current signal by a preset turn-off coefficient doff_ kac to obtain a grid voltage modulation signal;

the relational operator Relational Operator2 is configured to output a high-level signal when the shutdown carrier signal is equal to or greater than the grid voltage modulation signal;

the rising edge detector ED3 is configured to output a set signal when detecting that the signal output by the relational operator Relational Operator transitions from a low level to a high level; the OR gate OR1 is configured to output the set signal to an S terminal of the SR Flip-flop, where when the S terminal of the SR Flip-flop receives the set signal, the Q terminal outputs a PWM control signal with a high level.

7. A control method applied to the mixed mode power factor correction converter of claim 1, comprising:

in a conduction stage of a switching tube Q1 in the converter, acquiring an inductance current flowing through an inductance L1 in the converter, an output value of a voltage ring of the converter and a voltage of a single-phase alternating current signal, and outputting a PWM control signal for controlling the switching tube Q1 to switch from the conduction stage to the disconnection stage when the inductance current flowing through the inductance L1 is larger than or equal to a product of the output value of the voltage ring of the converter and the voltage of the single-phase alternating current signal;

8. The control method of claim 7, wherein the generating the off-carrier signal comprises:

9. The control method according to claim 7, wherein acquiring a grid voltage modulation signal having the same trend of variation as the voltage of the single-phase alternating current signal includes: