CN114006524B - Method, medium, control circuit and Boost PFC control system for inhibiting overcurrent - Google Patents
Method, medium, control circuit and Boost PFC control system for inhibiting overcurrent Download PDFInfo
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- CN114006524B CN114006524B CN202111307798.0A CN202111307798A CN114006524B CN 114006524 B CN114006524 B CN 114006524B CN 202111307798 A CN202111307798 A CN 202111307798A CN 114006524 B CN114006524 B CN 114006524B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention provides a method, a medium, a control circuit and a Boost PFC control system for inhibiting overcurrent; the method comprises the following steps: acquiring a first inductance current value of a previous switching period and a second inductance current value of a current switching period; judging whether the current switching period is a target switching period or not; judging whether to close the next switching period so as to inhibit overcurrent in the Boost PFC control system; according to the invention, whether a switching period is directly closed or not is judged according to the current change, so that abnormal overcurrent caused by untimely control in Boost PFC frequency division control is inhibited, the safety is ensured, and the reliability of the whole system is enhanced; the method can be applied to occasions with high switching frequency and low control frequency, well avoids overcurrent and stop, is simple to implement, has less operand compared with the method for executing a complete control algorithm, reduces the requirement on the performance of a control chip in a control circuit, is beneficial to reducing the cost and is easy for practical application.
Description
Technical Field
The invention belongs to the technical field of power factor correction, and particularly relates to a method, medium, control circuit and Boost PFC control system for inhibiting overcurrent.
Background
In order to improve the power density of power factor correction (Power Factor Correction, abbreviated as PFC), the high frequency is a trend, and the requirement on a control chip is higher and higher due to the improvement of the switching frequency, so that the cost is increased, and under the condition of certain performance of the control chip, how to improve the switching frequency becomes an element of cost control; reducing the control frequency without changing the control algorithm is obviously a straightforward measure.
For the direct current voltage control of traditional Boost type (Boost type) power factor correction, the problem caused by low control frequency is not great because of slow voltage change and large inertia, but for current control, the current change caused by deviation in control is great because of the reduction of inductance caused by high frequency, especially in the vicinity of a current peak, the inductance is lowest in the whole current period, the current change rate is higher, the current peak is easier to occur out of control, but the reduction of control frequency inevitably leads to untimely abnormal treatment occurring between adjacent controls.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a method, medium, control circuit and Boost PFC control system for suppressing an overcurrent, which are used for solving the problem of abnormal overcurrent caused by untimely control in the existing Boost PFC frequency division control.
To achieve the above and other related objects, the present invention provides a Boost type PFC control system, which is a two-frequency division control, including: the PFC circuit, the control circuit, the driving circuit and the current sampling circuit; the current sampling circuit is respectively connected with the PFC circuit and the control circuit and is used for obtaining an inductance current value of an inductor flowing in the PFC circuit and sending the inductance current value to the control circuit; the driving circuit is respectively connected with the control circuit and a switching device in the PFC circuit; the control circuit is used for judging whether a switching period is closed according to the inductance current value so as to realize the suppression of overcurrent.
In an embodiment of the present invention, the Boost PFC control system adopts a dual-loop average current control strategy of a current inner loop and a voltage outer loop, and the Boost PFC control system further includes: an ac power source and a load; the PFC circuit includes: the rectifier bridge, the diode, the capacitor, the inductor and the switching device; wherein the switching device is an insulated gate bipolar transistor; the alternating current power supply is connected with the rectifier bridge; one end of the inductor is connected with the rectifier bridge, and the other end of the inductor is respectively connected with the anode of the diode and the collector of the switching device; the cathode of the diode is respectively connected with one end of the capacitor and one end of the load; the grid electrode of the switching device is connected with the driving circuit, and the emitter electrode of the switching device, the other end of the capacitor and the other end of the load are connected and commonly connected to the current sampling circuit; the current sampling circuit is also connected with the rectifier bridge; the inductance current value participates in the current inner loop control so as to sine the current of the alternating current power supply and obtain a unit power factor.
The invention provides a method for realizing overcurrent inhibition based on the Boost PFC control system, which is applied to a control circuit in the Boost PFC control system and comprises the following steps: acquiring an inductance current value of the previous switching period, and recording the inductance current value as a first inductance current value and the inductance current value of the current switching period as a second inductance current value; judging whether the current switching period is a target switching period for completely executing current control; and judging whether to close the next switching period according to the first inductance current value, the second inductance current value and the judging result of whether the current switching period is the target switching period so as to inhibit overcurrent in the Boost PFC control system.
In an embodiment of the present invention, determining whether the current switching cycle is a target switching cycle for performing current control completely includes the following steps: and taking one switching period of two continuous switching periods of the Boost PFC control system controlled by two frequency division as the target switching period, and taking the other switching period as a non-target switching period for incompletely executing current control so as to judge whether the current switching period is the target switching period.
In an embodiment of the present invention, determining whether to close the next switching cycle according to the first inductor current value, the second inductor current value, and the determination result of whether the current switching cycle is the target switching cycle includes the following steps: when the judging result is that the current switching period is the target switching period, updating the duty ratio of the next switching period based on the second inductance current value; when the judging result is that the current switching period is not the target switching period, judging whether the second inductance current value is larger than a preset current threshold value or not; when the second inductance current value is larger than the preset current threshold value, setting the duty ratio of the next switching period to be zero; when the second inductance current value is not greater than the preset current threshold value, predicting an inductance current value of the next switching period based on the first inductance current value and the second inductance current value, and recording the inductance current value as a third inductance current value; judging whether the third inductance current value is larger than the preset current threshold value or not; when the third inductance current value is larger than the preset current threshold value, setting the duty ratio of the next switching period to be zero; and when the third inductance current value is not greater than the preset current threshold value, keeping the duty ratio of the next switching cycle equal to the duty ratio of the current switching cycle.
In an embodiment of the present invention, updating the duty cycle of the next switching cycle based on the second inductor current value includes the steps of: a result is calculated based on the second inductor current value, and the duty cycle of the next switching cycle is updated using the result.
In an embodiment of the present invention, the formula for predicting the inductor current value of the next switching cycle based on the first inductor current value and the second inductor current value is:
I(k+1)'＝I(k)+[I(k)-I(k-1)]；
wherein I (k+1)' represents the third inductor current value; i (k-1) represents the first inductor current value; i (k) represents the second inductor current value.
In an embodiment of the present invention, the preset current threshold is smaller than a current value that can be borne by a switching device in a PFC circuit of the Boost PFC control system, and smaller than a saturation current value of an inductor in the PFC circuit.
The present invention provides a storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described method of achieving suppression of overcurrent.
The present invention provides a control circuit comprising: a processor and a memory; the memory is used for storing a computer program; the processor is configured to execute the computer program stored in the memory, so that the control circuit executes the method for implementing the suppression of the overcurrent.
As described above, the method, medium, control circuit and Boost PFC control system for suppressing overcurrent provided by the invention have the following beneficial effects:
(1) Compared with the prior art, the invention reduces the current control frequency, simultaneously keeps the sampling frequency, analyzes the current sampling value, judges whether to directly close a switching cycle according to the current change instead of adjusting by the current control operation, thereby realizing the suppression of abnormal overcurrent caused by untimely control in Boost PFC frequency division control, ensuring the safety and enhancing the reliability of the whole system.
(2) The method for inhibiting the overcurrent can be applied to occasions with high switching frequency and low control frequency, can well avoid the overcurrent stop, is simple to implement, has less operand compared with the method for executing a complete control algorithm, reduces the requirement on the performance of a control chip in a control circuit, is beneficial to reducing the cost and is easy to practically apply.
Drawings
Fig. 1 is a schematic block diagram illustrating the operation of a Boost PFC control system according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a PFC circuit according to an embodiment of the present invention.
FIG. 3 is a flow chart illustrating a method for suppressing an overcurrent according to an embodiment of the invention.
Fig. 4 is a schematic diagram of a control circuit according to an embodiment of the invention.
Description of the reference numerals
11 PFC circuit
111. Rectifier bridge
12. Control circuit
13. Driving circuit
14. Current sampling circuit
15. AC power supply
16. Load(s)
41. Processor and method for controlling the same
42. Memory device
S1 to S3 steps
S31 to S36 steps
Detailed Description
The following specific examples are presented to illustrate the present invention, and those skilled in the art will readily appreciate the additional advantages and capabilities of the present invention as disclosed herein. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the illustrations, not according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Compared with the prior art, the method for realizing the suppression of the overcurrent, the medium, the control circuit and the Boost PFC control system provided by the invention have the advantages that the sampling frequency is kept while the current control frequency is reduced, the current sampling value is analyzed, the duty ratio is not adjusted by the current control operation, and whether one switching cycle is directly closed or not is judged according to the current change, so that the suppression of abnormal overcurrent caused by untimely control in Boost PFC frequency division control is realized, the safety is ensured, and the reliability of the whole system is enhanced; the method for inhibiting the overcurrent can be applied to occasions with high switching frequency and low control frequency, can well avoid the overcurrent stop, is simple to implement, has less operand compared with the method for executing a complete control algorithm, reduces the requirement on the performance of a control chip in a control circuit, is beneficial to reducing the cost and is easy to practically apply.
As shown in fig. 1 and 2, in an embodiment, the Boost PFC control system according to the present invention is a two-frequency control, and the Boost PFC control system includes a PFC circuit 11, a control circuit 12, a driving circuit 13, and a current sampling circuit 14.
Specifically, the current sampling circuit 14 is respectively connected to the PFC circuit 11 and the control circuit 12, and is configured to obtain an inductance current value (corresponding to I in fig. 2) of the PFC circuit 11 flowing through the inductance L L ) And for sending the inductor current value to the control circuit 12; the driving circuit 13 is connected with the control circuit 12 and the switching device Q in the PFC circuit 11 respectively; the control circuit 12 is configured to determine whether to close a switching period according to the inductor current value, so as to suppress the overcurrent.
The driving circuit 13 includes a driving chip; the control circuit 12 includes a control chip; specifically, the control chip is an MCU.
In one embodiment, the Boost PFC control system employs a dual-loop average current control strategy with an inner current loop and an outer voltage loop.
As shown in fig. 1 and 2, in an embodiment, the Boost PFC control system further includes an ac power source 15 (corresponding to Vac in fig. 2) and a load 16.
Specifically, the PFC circuit 11 is connected to the ac power supply 15 and the load 16, respectively, for performing power factor correction, and for inputting the voltage and current outputted after the power factor correction into the subsequent load 16.
As shown in fig. 2, in one embodiment, the PFC circuit 11 includes a rectifier bridge 111, a diode D, a capacitor C (the capacitor C is a bus capacitor), the inductor L, and the switching device Q.
The switching device Q is an Insulated Gate Bipolar Transistor (IGBT).
Specifically, the ac power supply 15 is connected to an ac terminal (-) of the rectifier bridge 111; the rectifier bridge 111 is configured to rectify the ac power supply 15, and then input the rectified power supply to the subsequent PFC circuit 11; one end of the inductor L is connected with the positive electrode (+) of the rectifier bridge 111, and the other end of the inductor L is respectively connected with the anode of the diode D and the collector of the switching device Q; the cathode of the diode D is respectively connected with one end of the capacitor C and the positive electrode (+) of the load 16; the grid electrode of the switching device Q is connected with the driving circuit 13, the emitter electrode of the switching device Q, the other end of the capacitor C and the negative electrode (-) of the load 16 are connected, and are commonly connected to the current sampling circuit 14; the current sampling circuit 14 is also connected to the negative electrode (-) of the rectifier bridge 111.
The inductor current value participates in the current inner loop control to sinusoidal the current of the ac power supply 15 and obtain a unit power factor.
In the present embodiment, the current sampling circuit 14 is used to collect the current value between the emitter of the switching device Q and the negative electrode (-) of the rectifier bridge 111, which is equal to the current flowing through the inductorInductance current value of L (I L ) If the current sampling circuit is adopted to directly sample the inductance current value on the inductance L, the current sampling can be usually only carried out by a Hall sensor mode due to the fact that the current sampling circuit is far away from the ground, and therefore the required cost is high; therefore, in this embodiment, the current value between the emitter of the switching device Q and the negative electrode (-) of the rectifier bridge 111 is sampled by the current sampling circuit 14, instead of directly sampling the inductance current value on the inductance L, and the current sampling circuit has a characteristic of being close to the ground.
The storage medium of the present invention stores a computer program that, when executed by a processor, implements the method of suppressing overcurrent described below. The storage medium includes: read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disks, U-discs, memory cards, or optical discs, and the like, which can store program codes.
Any combination of one or more storage media may be employed. The storage medium may be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a RAM, a ROM, an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages.
The present invention will be described below with reference to a method according to an embodiment of the present invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the computer program instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks (article of manufacture).
The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
As shown in fig. 3, in an embodiment, the method for suppressing the overcurrent based on the Boost PFC control system according to the present invention is applied to a control circuit in the Boost PFC control system; specifically, the method for realizing the suppression of the overcurrent comprises the following steps:
step S1, obtaining an inductance current value of the last switching period, and recording the inductance current value as a first inductance current value and the inductance current value of the current switching period as a second inductance current value.
And S2, judging whether the current switching period is a target switching period for completely executing current control.
In one embodiment, determining whether the current switching cycle is a target switching cycle for performing current control in its entirety includes the steps of: and taking one switching period of two continuous switching periods of the Boost PFC control system controlled by two frequency division as the target switching period, and taking the other switching period as a non-target switching period for incompletely executing current control so as to judge whether the current switching period is the target switching period.
It should be noted that, considering the performance of the control chip in the control circuit, in PFC frequency division control, it is a conventional technical means in the art to divide the switching period into a switching period in which current control is performed entirely (corresponding to the above-mentioned target switching period) and a switching period in which current control is performed incompletely (corresponding to the above-mentioned non-target switching period); specifically, the calculation result of the target switching period is utilized in the non-target switching period, namely, in the non-target switching period, a series of calculation is not needed, but the calculation result of the target switching period is directly borrowed, so that the algorithm of a control chip is reduced, and the problem of untimely control of a control circuit is effectively avoided.
Specifically, by determining in advance which one of the two consecutive switching periods of the PFC divide-by-two control is the target switching period described above, the corresponding other switching period is the non-target switching period described above.
For example, in PFC divide-by-two control, the counts of the switching periods are sequentially 1, 2, 3, 4, 5, 6, 7, 8 … … (each switching period corresponds to each beat), and since the PFC divide-by-two control employs divide-by-two, each of (3, 4), (5, 6), (7, 8) … … can be regarded as a group, and each group is identical to (1, 2), i.e., the switching periods can be equivalent to 1, 2, 1, 2 … ….
Assuming that the switching period corresponding to 1 is taken as a target switching period, 2 is a non-target switching period, and the following switching periods are all switching periods (3, 5, 7 and … …) corresponding to 1 are taken as target switching periods, and the switching periods (4, 6 and 8 and … …) corresponding to 2 are taken as non-target switching periods; similarly, if the switching period corresponding to 2 is taken as the target switching period, 1 is the non-target switching period.
Step S2 will be explained below taking the switching period corresponding to 1 as the target switching period and the switching period corresponding to 2 as the non-target switching period as an example.
In an embodiment, the above-mentioned switching cycle number is implemented by setting a counter with a cycle of 2 in a control algorithm stored in the control circuit, where the value of the counter can only be 1 and 2, and if the counter is 1 corresponding to the current switching cycle (the actual count of the switching cycle corresponding to the current switching cycle is any odd number in positive integers), the current cycle is considered as the target switching cycle; if it is 2 (the actual count of the switching period corresponding to the current switching period is any even number in the positive integer), the current switching period is considered to be the non-target switching period.
It should be noted that, the execution sequence of the step S1 and the step S2 is not limited, and may be executed sequentially, that is, the step S1 is executed first and then the step S2 is executed (as shown in fig. 3); or executing the step S2 and then executing the step S1; or may be performed simultaneously.
And S3, judging whether to close the next switching period according to the first inductance current value, the second inductance current value and the judging result of whether the current switching period is the target switching period so as to inhibit overcurrent in the Boost PFC control system.
It should be noted that, the "closing the next switching period" in the step S3 is that the switching device in the PFC circuit of the Boost PFC control system is closed in the next switching period, and at this time, the duty ratio corresponding to the switching period of the switching device is 0.
As shown in fig. 3, in an embodiment, determining whether to close the next switching cycle according to the first inductor current value, the second inductor current value and the determination result of whether the current switching cycle is the target switching cycle includes the following steps:
and when the judgment result is that the current switching period is the target switching period, executing step S31.
Step S31, updating the duty cycle of the next switching cycle based on the second inductor current value.
In one embodiment, updating the duty cycle of the next switching cycle based on the second inductor current value comprises the steps of: a result is calculated based on the second inductor current value, and the duty cycle of the next switching cycle is updated using the result.
Specifically, a corresponding control algorithm (such as a given value calculation of current and a PI control algorithm) is stored in the control circuit, after the control circuit obtains the second inductor current value, a result can be calculated based on the second inductor current value, and the duty ratio of the next switching cycle can be updated by using the result.
It should be noted that, the specific calculation method for calculating the duty ratio of the next switching period by the control circuit based on the second inductor current value adopts a technical means conventional in the field, and the specific working principle thereof is not a condition for limiting the present invention, so the detailed description thereof is omitted.
And when the judgment result is that the current switching period is not the target switching period, executing step S32.
And S32, judging whether the second inductance current value is larger than a preset current threshold value.
In an embodiment, the preset current threshold is smaller than a current value that can be borne by a switching device in a PFC circuit of the Boost PFC control system, and smaller than a saturation current value of an inductor in the PFC circuit.
It should be noted that, the preset current threshold value needs to satisfy the above conditions (less than the current value that can be borne by the switching device in the PFC circuit of the Boost PFC control system and less than the saturated current value of the inductor in the PFC circuit), and also needs to consider the ripple current margin of the switch.
The value of the preset current threshold is further explained by the following specific examples.
In one embodiment, the current value that can be borne by the switching device in the PFC circuit is 30a, the saturation current value of the inductor in the PFC circuit is 25A, and the switching ripple current margin is ±2a (-2A).
If the switching ripple current margin is not considered, the preset current threshold may be set to less than 25A, may be set to 23A, may be set to 20A, and is not particularly limited as long as less than 25A is satisfied; however, in practical applications, the influence of the ripple current margin of the switch needs to be considered, that is, the preset current threshold should be set to be less than 23A (25A-2A), and similarly, the specific setting of the preset current threshold is not limited to the specific setting, and the preset current threshold is only required to be less than 23A.
It should be noted that, in practical application, the current value that can be borne by the switching device in the PFC circuit and the saturation current value of the inductor in the PFC circuit are not determined, which may be that the current value that can be borne by the switching device in the PFC circuit is greater than the saturation current value of the inductor in the PFC circuit, or that the current value that can be borne by the switching device in the PFC circuit is less than the saturation current value of the inductor in the PFC circuit, depending on the selection of the inductor and the switching device; in general, the smaller the inductance of the inductor, or the lower the switching frequency of the switching device, the greater the corresponding switching ripple current margin.
And when the second inductance current value is greater than the preset current threshold value, executing step S33.
And step S33, setting the duty ratio of the next switching cycle to be zero.
In step S33, the duty cycle of the next switching cycle is set to zero, that is, the switching device is turned off in the next switching cycle.
And when the second inductance current value is not greater than the preset current threshold value, executing step S34.
And step S34, predicting the inductance current value of the next switching period based on the first inductance current value and the second inductance current value, and recording the inductance current value as a third inductance current value.
In one embodiment, the formula for predicting the inductor current value of the next switching cycle based on the first inductor current value and the second inductor current value is:
I(k+1)'＝I(k)+[I(k)-I(k-1)]；
where k represents the kth switching period (i.e., the current switching period); i (k+1) 'represents the third inductor current value (I (k+1)' herein is provided with a prime "", to indicate that the inductor current value of the k+1 switching cycle is an estimated value); i (k-1) represents the first inductor current value; i (k) represents the second inductor current value.
And step S35, judging whether the third inductance current value is larger than the preset current threshold value.
And when the third inductance current value is greater than the preset current threshold value, executing step S33.
And when the third inductance current value is not greater than the preset current threshold value, executing step S36.
Step S36, maintaining the duty cycle of the next switching cycle equal to the duty cycle of the current switching cycle.
The method of the present invention for achieving suppression of overcurrent will be further explained by means of specific examples.
Example 1
In an embodiment, the count of the period counter corresponding to the current switching period is 1, and first, the inductor current value of the previous switching period is obtained in step S1 and is denoted as a first inductor current value I (k-1), and the inductor current value of the current switching period is denoted as a second inductor current value I (k).
Meanwhile, if the current switching period is determined to be the switching period for performing current control completely in step S2, that is, the target switching period (assuming that the switching period corresponding to 1 is determined to be the target switching period in advance and the switching period corresponding to 2 is determined to be the non-target switching period, in fact, the count of the switching period corresponding to the current switching period may be any odd number of positive integers), step S31 is performed, that is, the duty ratio of the next switching period, that is, the duty ratio of the k+1th switching period is calculated according to the second inductor current value I (k), and is denoted as d (k+1).
Assuming that the count of the switching cycle corresponding to the current switching cycle is 5 in the present embodiment, the inductor current value of the previous switching cycle is denoted as a first inductor current value I (k-1) =i (4); the inductor current value of the current switching period is recorded as a second inductor current value I (k) =I (5); the duty cycle of the next switching cycle, i.e., the duty cycle of the k+1th switching cycle, is calculated from the second current value I (5), and is denoted as d (k+1) =d (6).
Example two
In an embodiment, the counter corresponding to the current switching period is counted as 2, and first, the inductor current value of the previous switching period is obtained in step S1 and is denoted as a first inductor current value I (k-1), and the inductor current value of the current switching period is denoted as a second inductor current value I (k).
Meanwhile, step S2 is performed to determine that the current switching period is a switching period in which current control is not performed completely, that is, a non-target switching period (assuming that it is determined in advance that the switching period corresponding to 1 is the target switching period and the switching period corresponding to 2 is the non-target switching period, in fact, the count of the switching periods corresponding to the current switching period may be any even number of positive integers), and step S32 is performed to determine whether the second inductor current value I (k) is greater than a preset current threshold.
(1) It is assumed that, in an embodiment, the second inductor current value I (k) is greater than the preset current threshold, step S33 is performed, i.e. the duty cycle of the next switching period is set to zero, i.e. the duty cycle of the k+1th switching period is set to zero, denoted as d (k+1) =0.
(2) It is assumed that, in an embodiment, the second inductor current value I (k) is not greater than the preset current threshold, and step S34 is performed, in which the inductor current value of the next switching cycle, that is, the inductor current value of the k+1th switching cycle, is predicted based on the first inductor current value and the second inductor current value, and the inductor current value is denoted as a third inductor current value I (k+1)', where a specific prediction formula is:
I(k+1)'＝I(k)+[I(k)-I(k-1)]；
after the third inductor current value I (k+1) 'is predicted, step S35 is performed, i.e. whether the third inductor current value I (k+1)' is greater than the preset current threshold is determined.
(21) In one embodiment, if the third inductor current value I (k+1)' is greater than the preset current threshold, step S33 is performed, i.e. the duty cycle of the next switching cycle is set to zero, i.e. the duty cycle of the k+1 switching cycle is set to zero, denoted as d (k+1) =0.
(22) In one embodiment, if the third inductor current value I (k+1)' is not greater than the preset current threshold, step S36 is performed, i.e. the duty cycle d (k+1) of the next switching cycle is kept equal to the duty cycle (denoted as d (k)) of the current switching cycle.
Assuming that the count of the switching cycle corresponding to the current switching cycle is 6 in the present embodiment, the inductor current value of the previous switching cycle is denoted as a first inductor current value I (k-1) =i (5); the inductor current value of the present switching cycle is noted as a second inductor current value I (k) =i (6):
corresponding to (1), if I (6) is greater than the preset current threshold, d (k+1) =d (7) =0.
Corresponding to (2), if I (6) is not greater than the preset current threshold, the predicted inductance current value of the k+1th switching cycle is denoted as I (k+1) '=i (7)' =i (6) + [ I (6) -I (5) ].
Corresponding to (21), if I (7)' is greater than the preset current threshold, d (k+1) =d (7) =0.
Corresponding to (22), if I (7)' is not greater than the preset current threshold, the duty cycle d (k+1) =d (7) of the next switching cycle is kept equal to the duty cycle d (k) =d (6) of the current switching cycle.
It should be noted that, in connection with the first embodiment, it is known that the duty ratio d (6) corresponding to the kth=6 switching period is calculated according to I (5) in step S31, and therefore, the duty ratio d (7) corresponding to the kth+1=7 switching period is equal to the duty ratio d (6) corresponding to the kth=6 switching period calculated according to I (5).
It should be noted that, the protection scope of the method for implementing the method for suppressing the overcurrent is not limited to the execution sequence of the steps listed in the embodiment, and all the schemes implemented by adding or removing steps and replacing steps according to the principles of the present invention in the prior art are included in the protection scope of the present invention.
As shown in fig. 4, the control circuit of the present invention includes a processor 41 and a memory 42.
The memory 42 is used for storing a computer program; preferably, the memory 42 includes: various media capable of storing program codes, such as ROM, RAM, magnetic disk, U-disk, memory card, or optical disk.
The processor 41 is connected to the memory 42 and is configured to execute a computer program stored in the memory 42, so that the control circuit executes the above-mentioned method for suppressing an overcurrent.
Preferably, the processor 41 may be a general-purpose processor, including a central processing unit (Central Processing Unit, abbreviated as CPU), a network processor (Network Processor, abbreviated as NP), etc.; but also digital signal processors (Digital Signal Processor, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field programmable gate arrays (Field Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
In summary, compared with the prior art, the method, medium, control circuit and Boost PFC control system for suppressing the overcurrent, provided by the invention, have the advantages that the sampling frequency is kept while the current control frequency is reduced, the current sampling value is analyzed, the duty ratio is not adjusted by the current control operation, and whether a switching cycle is directly closed or not is judged according to the current change, so that the abnormal overcurrent caused by untimely control in Boost PFC frequency division control is suppressed, the safety is ensured, and the reliability of the whole system is enhanced; the method for inhibiting the overcurrent can be applied to occasions with high switching frequency and low control frequency, can well avoid the overcurrent stop, is simple to implement, has less operand compared with the method for executing a complete control algorithm, reduces the requirement on the performance of a control chip in a control circuit, is beneficial to reducing the cost and is easy to be practically applied; therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (8)
1. A method for realizing suppression of overcurrent based on a Boost PFC control system is applied to a control circuit in the Boost PFC control system, and is characterized in that,
the Boost type PFC control system is a two-frequency division control, and the Boost type PFC control system comprises: the PFC circuit, the control circuit, the driving circuit and the current sampling circuit;
the current sampling circuit is respectively connected with the PFC circuit and the control circuit and is used for obtaining an inductance current value of an inductor flowing in the PFC circuit and sending the inductance current value to the control circuit;
the driving circuit is respectively connected with the control circuit and a switching device in the PFC circuit;
the control circuit is used for judging whether a switching period is closed according to the inductance current value so as to realize suppression of overcurrent;
the method comprises the following steps:
acquiring an inductance current value of the previous switching period, and recording the inductance current value as a first inductance current value and the inductance current value of the current switching period as a second inductance current value;
judging whether the current switching period is a target switching period for completely executing current control;
judging whether to close the next switching period according to the first inductance current value, the second inductance current value and the judging result of whether the current switching period is the target switching period or not so as to inhibit overcurrent in a Boost PFC control system; judging whether to close the next switching period according to the judging result of the first inductance current value, the second inductance current value and whether the current switching period is the target switching period or not comprises the following steps:
when the judging result is that the current switching period is the target switching period, updating the duty ratio of the next switching period based on the second inductance current value;
when the judging result is that the current switching period is not the target switching period, judging whether the second inductance current value is larger than a preset current threshold value or not;
when the second inductance current value is larger than the preset current threshold value, setting the duty ratio of the next switching period to be zero;
when the second inductance current value is not greater than the preset current threshold value, predicting an inductance current value of the next switching period based on the first inductance current value and the second inductance current value, and recording the inductance current value as a third inductance current value;
judging whether the third inductance current value is larger than the preset current threshold value or not;
when the third inductance current value is larger than the preset current threshold value, setting the duty ratio of the next switching period to be zero;
and when the third inductance current value is not greater than the preset current threshold value, keeping the duty ratio of the next switching cycle equal to the duty ratio of the current switching cycle.
2. The method of claim 1, wherein the Boost PFC control system employs a dual-loop average current control strategy of an inner current loop and an outer voltage loop, the Boost PFC control system further comprising: an ac power source and a load;
the PFC circuit includes: the rectifier bridge, the diode, the capacitor, the inductor and the switching device; wherein the switching device is an insulated gate bipolar transistor;
the alternating current power supply is connected with the rectifier bridge;
one end of the inductor is connected with the rectifier bridge, and the other end of the inductor is respectively connected with the anode of the diode and the collector of the switching device;
the cathode of the diode is respectively connected with one end of the capacitor and one end of the load;
the grid electrode of the switching device is connected with the driving circuit, and the emitter electrode of the switching device, the other end of the capacitor and the other end of the load are connected and commonly connected to the current sampling circuit;
the current sampling circuit is also connected with the rectifier bridge;
the inductance current value participates in the current inner loop control so as to sine the current of the alternating current power supply and obtain a unit power factor.
3. The method for implementing overcurrent suppression according to claim 1, wherein determining whether the current switching cycle is a target switching cycle for which current control is performed in its entirety includes the steps of:
and taking one switching period of two continuous switching periods of the Boost PFC control system controlled by two frequency division as the target switching period, and taking the other switching period as a non-target switching period for incompletely executing current control so as to judge whether the current switching period is the target switching period.
4. The method of claim 1, wherein updating the duty cycle of the next switching cycle based on the second inductor current value comprises the steps of: a result is calculated based on the second inductor current value, and the duty cycle of the next switching cycle is updated using the result.
5. The method of claim 1, wherein predicting the inductor current value for the next switching cycle based on the first inductor current value and the second inductor current value is formulated as:
I(k+1)′＝I(k)+[I(k)-I(k-1)]；
wherein I (k+1)' represents the third inductor current value; i (k-1) represents the first inductor current value; i (k) represents the second inductor current value.
6. The method of claim 1, wherein the preset current threshold is less than a current value that can be borne by a switching device in a PFC circuit of the Boost PFC control system and less than a saturation current value of an inductor in the PFC circuit.
7. A storage medium having stored thereon a computer program which, when executed by a processor, implements the method of suppressing an overcurrent as claimed in any one of claims 1 to 6.
8. A control circuit, comprising: a processor and a memory;
the memory is used for storing a computer program;
the processor is configured to execute the computer program stored in the memory, so that the control circuit executes the method for suppressing an overcurrent according to any one of claims 1 to 6.
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