CN116129784A - Signal transmission method, controller, source driver and electronic equipment - Google Patents

Signal transmission method, controller, source driver and electronic equipment Download PDF

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Publication number
CN116129784A
CN116129784A CN202211566801.5A CN202211566801A CN116129784A CN 116129784 A CN116129784 A CN 116129784A CN 202211566801 A CN202211566801 A CN 202211566801A CN 116129784 A CN116129784 A CN 116129784A
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China
Prior art keywords
signal
display
source driver
data
configuration
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南帐镇
李东明
吴佳璋
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Hefei Yisiwei Computing Technology Co ltd
Beijing Eswin Computing Technology Co Ltd
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Hefei Yisiwei Computing Technology Co ltd
Beijing Eswin Computing Technology Co Ltd
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Priority to CN202211566801.5A priority Critical patent/CN116129784A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/14Use of low voltage differential signaling [LVDS] for display data communication

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The present disclosure relates to a signal transmission method, a controller, a source driver, and an electronic apparatus. The signal transmission method is used for a controller to transmit a display signal to a source driver. The signal transmission method comprises the following steps: and in a frame display period, providing the display signals to the source driver in at least two modes through the low-voltage differential signal interface, wherein the display signals provided in the at least two modes comprise configuration data and image data, and the configuration data is used for configuring the source driver so that the source driver processes the image data according to the configuration data. The method can multiplex low-voltage differential signal interfaces to be used for providing image data and configuration data for a source driver, thereby reducing the number of interfaces for signal transmission, saving cost and flexibly embedding various control functions into the source driver.

Description

Signal transmission method, controller, source driver and electronic equipment
Technical Field
Embodiments of the present disclosure relate to a signal transmission method, a controller, a source driver, and an electronic apparatus.
Background
In the field of display technology, for example, a pixel array of a liquid crystal display panel or an organic light emitting diode (Organic Light Emitting Diode, OLED) display panel generally includes a plurality of rows of gate lines and a plurality of columns of data lines disposed to intersect the gate lines. The timing controller (T-con) of the display panel needs to supply gate signals and data signals to the plurality of rows of gate lines and the plurality of columns of data lines through the gate driving circuit and the source driving circuit, respectively, so as to form gray voltages required for each gray level required for displaying an image in pixel units of each row in a line-by-line scanning manner, for example, thereby displaying one frame of image.
Disclosure of Invention
At least one embodiment of the present disclosure provides a signal transmission method for a controller to transmit a display signal to a source driver, the method including: and in a frame display period, providing display signals to the source driver through the low-voltage differential signal interface in at least two modes, wherein the display signals provided in the at least two modes comprise configuration data and image data, and the configuration data is used for configuring the source driver so that the source driver processes the image data according to the configuration data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the display signal includes a display sub-signal provided by each of at least two modes, each display sub-signal includes a mode identification signal, and the mode identification signal is used to indicate, to the source driver, a mode to which the display sub-signal belongs, so that the source driver parses the display sub-signal according to the mode to which the display sub-signal belongs to obtain the configuration data or the image data.
For example, in a signal transmission method provided in an embodiment of the present disclosure, providing one or more display sub-signals per mode, providing a display signal to a source driver in at least two modes through a low voltage differential signal interface during one frame display period includes: the display signals are sequentially supplied to the source driver in at least two modes using the low voltage differential signal interface during a frame display period, and for each mode, one or more display sub-signals are sequentially supplied to the source driver using the low voltage differential signal interface.
For example, in the signal transmission method provided in an embodiment of the present disclosure, before each display sub-signal is provided to the source driver, a trigger signal is provided to the source driver, where the trigger signal is used to notify the source driver to perform a transmission operation for the at least two modes.
For example, in the signal transmission method provided in an embodiment of the present disclosure, providing the trigger signal to the source driver includes: providing a data transmission control signal and a data polarity inversion control signal to the source driver, and obtaining the trigger signal based on a relative time sequence relation between the data transmission control signal and the data polarity inversion control signal provided by the source driver, wherein a first transition edge of the data polarity inversion control signal is later than a second transition edge of the data transmission control signal, and a first transition state of the data polarity inversion control signal after the first transition edge is at least partially overlapped with a second transition state of the data transmission control signal after the second transition edge.
An embodiment of the present disclosure provides another signal transmission method for a source driver to acquire a display signal from a controller, the source driver including a low voltage differential signal interface, the method including: receiving display signals provided by the controller in at least two modes in a frame display period through the low-voltage differential signal interface; analyzing the display signal to obtain configuration data and image data; and processing the image data according to the configuration data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the display signal includes a display sub-signal provided by each of the at least two modes, each of the display sub-signals includes a mode identification signal, and analyzing the display signal to obtain the configuration data and the image data includes: acquiring the pattern recognition signal; determining a mode to which the display sub-signal belongs according to the mode identification signal; and analyzing the display sub-signals according to the modes of the display sub-signals to obtain the configuration data or the image data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, each mode provides one or more display sub-signals, and receiving, through the low voltage differential signal interface, the display signals provided by the controller in at least two modes within one frame display period includes: and in a frame display period, sequentially receiving the display signals provided by the controller in the at least two modes through the low-voltage differential signal interface, and sequentially receiving one or more display sub-signals through the low-voltage differential signal interface for each mode.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the method further includes: before receiving each display sub-signal, a trigger signal provided by the controller is received, so that the transmission operation for the at least two modes is performed in response to the trigger signal.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the trigger signal is obtained based on a relative timing relationship between the source driver providing a data transmission control signal and a data polarity inversion control signal, where a first transition edge of the data polarity inversion control signal is later than a second transition edge of the data transmission control signal, and a first transition state of the data polarity inversion control signal after the first transition edge coincides with a second transition state of the data transmission control signal after the second transition edge at least partially in time.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the configuration data includes line configuration data, at least one of the at least two modes is a line configuration mode, and the display sub-signal provided in the line configuration mode includes the line configuration data and the line image data.
For example, in a signal transmission method provided in an embodiment of the present disclosure, a display sub-signal provided in a row configuration mode includes: and combining data obtained by combining the line configuration data of each line with the line image data of each line in the image data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the configuration data includes frame configuration data, at least one of the at least two modes includes a frame configuration mode, and the display sub-signal provided by the frame configuration mode includes the frame configuration data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the configuration data includes a correction signal, at least one of the at least two modes includes a correction configuration mode, and the display sub-signal provided by the correction configuration mode includes a correction signal for correcting a clock signal of the source driver and a timing of the display signal.
For example, in the signal transmission method provided in an embodiment of the present disclosure, at least two modes include a line configuration mode and a frame configuration mode, a display sub-signal provided in the line configuration mode includes line configuration data and the image data, and a display sub-signal provided in the frame configuration mode includes frame configuration data.
For example, in the signal transmission method provided in an embodiment of the present disclosure, at least two modes further include a correction configuration mode, and the display sub-signal provided in the correction configuration mode includes a correction signal for correcting a clock signal of the source driver and a timing of the display signal.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the frame configuration mode and the correction configuration mode are in a vertical blanking period within the one-frame display period.
For example, in the signal transmission method provided in an embodiment of the present disclosure, the frame configuration mode includes a power consumption control sub-mode that provides a data signal of the source driver at least during the vertical blanking period.
For example, in the signal transmission method provided in an embodiment of the present disclosure, during a process of powering on the display device, a display signal transmitted between the controller and the source driver is a display sub-signal provided by the correction configuration mode and a display sub-signal provided by the frame configuration mode in sequence; and after the display device enters a working state, the display signals transmitted between the controller and the source driver are sequentially a display sub-signal provided by the row configuration mode, a display sub-signal provided by the frame configuration mode and a display sub-signal provided by the correction configuration mode.
At least one embodiment of the present disclosure provides a controller for transmitting a display signal to a source driver, the controller comprising: and a low-voltage differential signal interface configured to provide the display signals to the source driver in the at least two modes in one frame display period, wherein the display signals provided in the at least two modes include configuration data and image data, the configuration data being used for configuring the source driver so that the source driver processes the image data according to the configuration data.
At least one embodiment of the present disclosure provides a source driver for acquiring a display signal from a controller, the source driver including: a low voltage differential signal interface configured to receive display signals provided by the controller in at least two modes within a frame display period, the display signals provided by the at least two modes including configuration data and image data; the analysis unit is configured to analyze the display signal to obtain the configuration data and the image data; and a configuration unit configured to perform configuration according to the configuration data and process the image data according to the configuration data.
At least one embodiment of the present disclosure provides an electronic device comprising a controller provided by any one embodiment of the present disclosure; the source driver provided by any of the embodiments of the present disclosure; and a display panel connected with the source driver to receive a driving signal provided by the source driver, wherein the driving signal is generated based on the display signal.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, and it is apparent that the drawings in the following description relate only to some embodiments of the present disclosure, not to limit the present disclosure.
FIG. 1A is a schematic diagram of a circuit driving system of a display panel;
FIG. 1B shows a schematic diagram of a configuration of a connection between a timing controller TCON and a source driver via a mini-LVDS interface;
FIG. 1C illustrates a block diagram of an application signal transmission method provided by at least one embodiment of the present disclosure;
FIG. 1D illustrates a flow chart of a signal transmission method provided by at least one embodiment of the present disclosure;
FIG. 2A illustrates a schematic diagram of a signal format of a display sub-signal provided by a row configuration mode provided by at least one embodiment of the present disclosure;
FIG. 2B illustrates a signal format schematic of a display sub-signal provided by a frame configuration mode provided by at least one embodiment of the present disclosure;
FIG. 2C illustrates a signal format schematic of a display sub-signal provided by a correction configuration mode provided by at least one embodiment of the present disclosure;
FIGS. 3A and 3B are signal format diagrams illustrating a display signal provided by a controller to a source driver in accordance with at least one embodiment of the present disclosure;
fig. 4A is a timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure;
FIG. 4B illustrates a timing diagram of a single mode indication signal provided in accordance with at least one embodiment of the present disclosure;
FIG. 5 illustrates a flow chart of another signal transmission method provided by at least one embodiment of the present disclosure;
FIG. 6 illustrates a method flow diagram of step S520 of FIG. 5 provided by at least one embodiment of the present disclosure;
FIG. 7 illustrates a flow chart of another signal transmission method provided by at least one embodiment of the present disclosure;
fig. 8 illustrates a schematic block diagram of a controller provided by at least one embodiment of the present disclosure.
FIG. 9 illustrates a schematic block diagram of a source driver provided by at least one embodiment of the present disclosure; and
Fig. 10 illustrates a schematic block diagram of an electronic device provided by at least one embodiment of the present disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a," "an," or "the" and similar terms do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
Various driving circuits for display panels generally include a scan driving integrated circuit (also referred to as a gate driver or G-IC), a data driving integrated circuit (also referred to as a source driver or SD-IC), a controller, and the like. The controller is mainly used to convert a data signal, a control signal, a clock signal, etc., received from an external (e.g., a signal source such as a storage device, a network modem, etc.), into a data signal, a gate signal, a control signal, a clock signal, etc., suitable for a source driver and a gate driver for implementing image display driving of the display panel. For example, the controller may be a timing controller (Timing Controller, TCON). The source driver is mainly used for receiving the digital signals (display signals or image signals) and control signals and the like provided by the controller, converting the digital signals into corresponding analog gray scale voltage signals through digital-to-analog conversion, and inputting the corresponding analog gray scale voltage signals into each column of pixel units of the pixel array of the display panel. The grid driver is mainly used for opening pixel units of each row of the pixel array, such as progressive (or interlaced), and is matched with the source driver under the action of the control signal, and required data signals are input into corresponding pixel units for the opened pixel unit rows, so that the pixel units can display according to the data signals.
In the display process of the display panel, the video and the animation are combined by innumerable pictures displayed in sequence in time sequence (for example, the frame rate is 60Hz or 120Hz, etc.), and each picture is a frame, that is, a frame of image refers to a complete picture displayed by the display panel. In the display process of a frame image, the gate driver sequentially turns on each row of pixel units in the pixel array from the first row to the last row to scan, and in the scanning process, the source driver inputs data signals required by each row of pixel units into the turned-on pixel units, thereby completing the scanning and display required by a frame image. For example, in order to obtain a clear and complete display effect with good quality, the display screen needs to be continuously refreshed, and one frame of image needs to be displayed every refresh, so that the images displayed continuously by multiple frames form a still image or a dynamic image in visual effect due to the process of the pixel units of the display panel.
Fig. 1A shows a schematic diagram of a circuit driving system architecture of a display panel. As shown in fig. 1A, the circuit driving system architecture includes a timing controller TCON, a gate driver G-IC, a source driver SD-IC, and a display Panel. The circuit driving system architecture further comprises a power management integrated circuit PMIC, a Gamma (Gamma) circuit, a common electrode voltage (Vcom) circuit and the like.
The input voltage Vin of the power management integrated circuit is, for example, 5V or 12V, and the output voltage includes a digital operating voltage DVDD supplied to each IC, an analog voltage AVDD supplied to the Gamma circuit and the Vcom circuit, a gate-on voltage VGH supplied to the gate driver G-IC, a gate-off voltage VGL, and the like. A common electrode voltage (Vcom) circuit is used to provide a common voltage to the pixel array.
The control signals outputted from the timing controller TCON include a control signal supplied to the gate driver G-IC and a control signal supplied to the source driver SD-IC. For example, the control signals supplied to the source driver SD-IC include a line Start Signal (STH) for Start of line data transfer, a line clock signal (Clock Pulse Horizontal, CPH), a data transfer control signal Load, and a data polarity inversion signal POL. For example, the control signals supplied to the gate driver G-IC include a frame Start Signal (STV) representing the scan Start of one frame, a scan clock signal (Clock Pulse Vertical, CPV), an Enable signal (Enable), and the like.
For example, the input digital interface type of the timing controller TCON may be, for example, a Low-voltage differential signal (Low-Voltage Differential Signaling, LVDS), an embedded display signal (Embedded Display Port, eDP) interface, a V-by-One (Vx 1) interface, and the like. The digital interface type of the output of the timing controller TCON may be mini-LVDS, for example, for communication with the source driver SD-IC.
The LVDS interface is a device that transmits signals in the form of pairs, including a clock pair and several signal pairs. For example, the LVDS signal line pair includes three control signals: a field sync signal, a row sync signal, and an enable signal. The mini-LVDS interface is similar to the LVDS interface, and signals are transmitted by the differential signal line pair; unlike the LVDS signal line pair, the signals transmitted by the mini-LVDS signal line pair of the mini-LVDS interface do not include control signals, which are transmitted through a signal line or a signal differential pair independent of the mini-LVDS signal line pair.
Fig. 1B shows a schematic structural diagram of a connection between the timing controller TCON and the source driver through a mini-LVDS interface. As shown in fig. 1B, the timing controller TCON supplies control signals and image data signals to a plurality of source drivers. The plurality of source drivers includes, for example, source driver sd#1, source driver sd#2, and the like, the number of which is related to the physical resolution of the display panel, and tens or even hundreds may be required for one display panel. Each source driver is connected through a pair of clock signal lines for transmitting clock signals, a pair of mini-LVDS signal lines for transmitting image data signals, and a control signal line for transmitting a plurality of control signals. The mini-LVDS signal line pair may be 3 pairs of signal lines or 6 pairs of signal lines. The control signal lines may or may not be differential signal pairs. The mini-LVDS signal line and the plurality of control signal lines are independent of each other.
For example, the timing controller TCON and the source driver sd#1 are connected through a mini-LVDS signal line pair transmitting a data signal, a LOAD control signal line transmitting a data transmission control signal LOAD, a POL control signal line transmitting a control signal POL, a POL2 control signal line transmitting a control signal POL2, and the like; TCON and source driver sd#2 are also connected through a mini-LVDS signal line pair, a LOAD control signal line, a data polarity inversion control signal line (e.g., a POL control signal line, a POL2 control signal line, a POLC control signal line, etc.), and the like.
Other control signal lines, such as a horizontal DOT inversion (H2 DOT) control signal line, a bias voltage (PWRC) control signal line, etc., may also be included between each source driver and TCON.
As shown in fig. 1B, the mini-LVDS signal line pair is used only for transmitting image data signals, and is not used for transmitting control signals such as polarity inversion configuration information, data transmission control information, and the like. Therefore, there are a plurality of signal lines and a plurality of signal line interfaces between the timing controller and the source driver, which results in occupying a larger signal routing space in the display panel, and this problem is more remarkable particularly when the number of source drivers is large. If the signal routing space available in the display panel is not sufficient to accommodate the plurality of data lines, some of the commonly used control functions cannot be flexibly embedded in the source driver.
To this end, embodiments of the present disclosure provide a signal transmission method for a controller to transmit a display signal to a source driver. The signal transmission method comprises the steps of providing the display signals to a source driver in at least two modes through a low-voltage differential signal interface in a frame display period, wherein the display signals provided in the at least two modes comprise configuration data and image data, the configuration data are used for configuring the source driver, and the source driver processes the image data according to the configuration data. The signal transmission method can multiplex low-voltage differential signal interfaces so that the low-voltage differential signal interfaces can be used for providing image data and configuration data for a source driver, thereby reducing the number of interfaces for signal transmission, saving the cost and ensuring that various control functions can be flexibly embedded into the source driver.
Fig. 1C illustrates a schematic diagram of a method for transmitting an application signal according to at least one embodiment of the present disclosure.
As shown in fig. 1C, the architecture includes a timing controller 110, a source driver 120, and a display panel 130.
The timing controller 110 supplies image data signals, control signals, and clock signals suitable for the source driver to the source driver 120. The source driver 120 receives the digital signals (including the image data signals and the control signals) provided from the timing controller 110, converts the digital signals into corresponding analog gray scale voltage signals through digital-to-analog conversion, and inputs the corresponding analog gray scale voltage signals into the pixel array of the display panel 130. The explanation of the gate driving circuit and the like is omitted here to avoid redundancy. Embodiments of the present disclosure are not limited to specific structures, implementations, etc. of the timing controller 110, the source driver 120, the display panel 13, the gate driver, etc.
Fig. 1D illustrates a flowchart of a signal transmission method provided in at least one embodiment of the present disclosure. For example, the signal transmission method provided by the embodiment of the present disclosure is applicable to both LVDS interfaces and mini-LVDS interfaces.
As shown in fig. 1D, the signal transmission method includes step S10 and step S20. The signal transmission method described in fig. 1D is performed by the timing controller 110 in fig. 1C, for example. For example, the signal transmission method is used for the timing controller 110 to transmit the display signal to the source driver 120.
Step S10: a display signal is acquired.
Step S20: and in a frame display period, providing display signals to the source driver through the low-voltage differential signal interface in at least two modes, wherein the display signals provided in the at least two modes comprise configuration data and image data, and the configuration data is used for configuring the source driver so that the source driver processes the image data according to the configuration data.
For step S10, the display signal may include, for example, image data and configuration data. For example, the timing controller 110 receives LVDS differential signals from the outside and parses the LVDS differential signals to separate image data such as RGB data.
In the embodiments provided by the present disclosure, the display signals provided by the low voltage differential signal interface include both configuration data (e.g., control signals) and image data, so that multiple control signal lines independent of mini-LVDS signal lines or LVDS signal lines are no longer required between the controller and the source driver. For example, the LOAD control signal line, the data polarity inversion control signal line (e.g., POL control signal line, POL2 control signal line, and POLC control signal line, etc.), the horizontal DOT inversion (H2 DOT) control signal line, the bias voltage (PWRC) control signal line, etc. in fig. 1B may be omitted. For example, the signal transmission method provided in the embodiments of the present disclosure allows only mini-LVDS signal lines and clock signal lines to be included between the source driver and the controller, which may each include only mini-LVDS interface and clock signal interface. Of course, the source driver and the controller may each include other interfaces for redundancy, such as a LOAD control signal line, a data polarity inversion control signal line POL, and the like.
Thus, embodiments of the present disclosure reduce the number of interfaces and signal lines for signal transmission and ensure that a variety of control functions can be flexibly embedded in the source driver.
For example, the configuration data may be generated by a timing control module in the timing controller. The configuration data is used to configure the source driver such that after the source driver receives and stores the configuration data, the image data is processed according to the configuration data. For example, the source driver outputs image data to the pixel array according to the timing provided by the configuration data.
In some embodiments of the present disclosure, the configuration data includes control signals required in the process of displaying RGB data by the pixel array. For example, if the display panel is a liquid crystal display panel, the polarities of the liquid crystal molecules need to be controlled in the process of displaying RGB data by the liquid crystal display panel, and the control signals may include data polarity inversion control signals (e.g., POL control signal, POL2 control signal, and POLC control signal). For another example, the control signal may include a start signal STH of the row data when the start signal of the row data is required in the process of displaying the RGB data by the pixel array. For another example, the display panel may also be an OLED display panel or the like, to which embodiments of the present disclosure are not limited.
The configuration data may be set by those skilled in the art according to actual needs, and the present disclosure does not limit the configuration data, and the above-mentioned data polarity inversion control signal, frame scan start signal, and start signal of line data are only examples.
For step S20, in an embodiment of the present disclosure, the low voltage differential signal interface includes a plurality of pairs of transmission lines, each pair of transmission lines including two complementary differential signals through which image data and configuration data are transmitted. For example, the low voltage differential signal interface may be a mini-LVDS interface or an LVDS interface, or the like.
One Frame display period includes, for example, an image display period (Active Frame) and a vertical blanking period (Vertical Blanking Period, VBP). During image display, for example, pixels in a pixel array display image data line by line, and during vertical blanking, preparation is made for display of the next frame of image data.
In some embodiments of the present disclosure, for example, display signals are sequentially provided to the source driver in at least two modes through one low voltage differential signal interface.
For example, the display signal includes a display sub-signal provided by each of at least two modes. For example, each mode provides a display sub-signal that includes configuration data and image data. For another example, the at least two modes include a first mode including configuration data and image data and a second mode including configuration data. For another example, the first mode includes configuration data and the second mode includes image data.
In some embodiments of the present disclosure, at least one of the at least two modes is a line configuration mode, the configuration data includes line configuration data, and the display sub-signals provided by the line configuration mode include line configuration data and line image data.
The display sub-signals provided by the row configuration mode are used for image data display of a row of pixels. The line image data is, for example, RGB data corresponding to the line in the pixel array. The row configuration data is used to configure the source driver such that the source driver outputs the row image data, timing control signals, and the like to the row of pixels in response to the row configuration data.
In some embodiments of the present disclosure, display signals are provided to the source driver through the low voltage differential signal interface in at least two modes of signal format defined by the first signal transmission protocol. The signal formats of at least two modes defined by the first signal transmission protocol are exemplarily described below with reference to fig. 2A to 2C.
Fig. 2A is a schematic diagram illustrating a signal format of a display sub-signal provided by a row configuration mode provided by at least one embodiment of the present disclosure.
The first display sub-signal and the second display sub-signal provided to the source driver in a row configuration mode are shown in the example of fig. 2A. It should be understood that the first display sub-signal and the second display sub-signal are only for illustrating a signal format of the display sub-signal provided in the row configuration mode, and are not meant to merely provide two display sub-signals to the source driver in the row configuration mode, and in fact, the number of display sub-signals provided to the source driver in the row configuration mode may be the same as the number of rows of the pixel array, that is, the display sub-signals are provided to each row of pixels in the row configuration mode, respectively.
As shown in fig. 2A, the display sub-signals provided by the line configuration mode include line configuration data and line image data (e.g., RGB data for a line of pixels). Hereinafter, RGB (red, green and blue) data is taken as an example of image data in the embodiments of the present disclosure, but it is noted that the present disclosure is not limited thereto, and for example, some display devices may also employ image data in the form of RGBW (red, green, blue and white) or the like. For example, the first display sub-signal includes first line configuration data and first line RGB data, and the second display sub-signal includes second line configuration data and second line RGB data.
It should be noted that, in the embodiments of the present disclosure, "first" and "second" do not represent a sequence, only to distinguish different configuration data or RGB data. The first line of RGB data refers to RGB data of an optional line of subpixels in the pixel array, and the first line of configuration data always corresponds to the RGB data of the line of subpixels.
In some embodiments of the present disclosure, as shown in fig. 2A, the display sub-signals provided by the row configuration mode include: and combining data obtained by combining the line configuration data of each line with the line image data of each line in the image data. For example, the first display sub-signal is formed by combining the first line configuration data and the first line RGB data, and the second display sub-signal is formed by combining the second line configuration data and the second line RGB data. That is, the controller sequentially supplies the display sub-signals corresponding to each row of pixels to the source driver. In this embodiment, the configuration data and the image data of one line are combined and then transmitted through the low-voltage differential signal interface, so that multiplexing of the low-voltage differential signal interface is realized, and the source driver is facilitated to process the image data of each line according to the configuration data of each line in time, so that the image display is facilitated.
In the signal format example shown in fig. 2A, the line configuration data is located in front of the RGB data for each display sub-signal, i.e., the controller supplies the line configuration data to the source driver first and then supplies the RGB data of the line to the source driver for each display sub-signal. Providing the line configuration data to the source driver first and then providing the RGB data for the line to the source driver can facilitate the source driver to process the RGB data for the line in time according to the line configuration data.
In some embodiments of the present disclosure, at least one of the at least two modes is a frame configuration mode, the configuration data comprises frame configuration data, and the display sub-signal provided by the frame configuration mode comprises frame configuration data.
The display sub-signal provided by the frame configuration mode is used for displaying one frame of image. The frame configuration data is used, for example, to configure the source driver so that the source driver outputs a control signal for the frame image. The frame configuration data may include, for example, a Gamma (Gamma) setting signal, an Amplification (AMP) offset control signal, a shift direction selection signal, and the like.
Fig. 2B is a schematic diagram illustrating a signal format of a display sub-signal provided by a frame configuration mode according to at least one embodiment of the present disclosure.
As shown in fig. 2B, the display sub-signal provided by the frame configuration mode includes frame configuration data and invalid data.
In some embodiments of the present disclosure, for example, the frame configuration mode is applied to the vertical blanking period. During the vertical blanking period, the pixel array does not display image data, and thus the display sub-signal provided by the frame configuration mode may include invalid data.
In other embodiments of the present disclosure, the display sub-signal provided by the frame configuration mode may not include invalid data if the data length of the frame configuration data is the same as the data length of the combined data provided by the row configuration mode. In embodiments of the present disclosure, for example, invalid data may refer to a data signal at a logic invalid level, for example.
In the signal format example shown in fig. 2B, the frame configuration data is located before the invalid data for each display sub-signal, i.e., the controller supplies the frame configuration data to the source driver first and then the invalid data to the source driver for each display sub-signal.
In some embodiments of the present disclosure, at least one of the at least two modes includes a correction configuration mode, the configuration data includes a correction signal, and the display sub-signal provided by the correction configuration mode includes a correction signal, for example, for correcting a clock signal of the source driver and a timing of the display signal.
In some embodiments of the present disclosure, the controller provides the correction signal to the source driver in a correction configuration mode during the vertical blanking period.
For example, the transmission of the display signal depends on the clock signal. For example, in an ideal case, the transition edge of the clock signal is aligned with the middle time when the display signal is at the active logic level, but since there is a delay in the clock signal or the display signal in practice, the transition edge of the clock signal is not aligned with the middle time when the display signal is at the active logic level, correction of the clock signal or the display signal is required, for example. For example, the correction signal is used, for example, to align the transition edge of the clock signal with the middle instant at which the display signal is at an active logic level.
The frame configuration mode and the correction configuration mode enable the source driver to perform frame configuration and timing correction during the vertical blanking period to prepare for display of the next image frame, and since the frame configuration and the timing correction are performed during the vertical blanking period, time is saved and display efficiency is improved.
Fig. 2C illustrates a signal format diagram of a display sub-signal provided by a correction configuration mode provided by at least one embodiment of the present disclosure.
As shown in fig. 2C, the display sub-signal provided by the correction configuration mode includes a correction signal. For example, in at least one example, the correction signal may comprise, for example, a delay time length of a clock signal or a data signal for calculating a delay time length of a clock signal, etc. The correction signal can be set by a person skilled in the art according to the relevant correction method.
In some embodiments of the present disclosure, for example, each display sub-signal further comprises a pattern recognition signal. The mode identification signal is used for indicating the mode of the display sub-signal to the source driver so that the source driver analyzes the display sub-signal according to the mode of the display sub-signal to acquire configuration data or image data.
As shown in fig. 2A to 2C, the display sub-signal provided in the line configuration mode includes a mode identification signal a to indicate that the display sub-signal belongs to the line configuration mode, the display sub-signal provided in the frame configuration mode includes a mode identification signal B to indicate that the display sub-signal belongs to the frame configuration mode, and the display sub-signal provided in the correction configuration mode includes a mode identification signal C to indicate that the display sub-signal belongs to the correction configuration mode.
As shown in fig. 2A to 2C, the pattern recognition signal of the display sub-signal provided in each pattern may be located before the configuration data, i.e., the controller provides the pattern recognition signal of each display sub-signal to the source driver before providing the configuration data of the display sub-signal to the source driver. For example, for a row configuration mode, the controller provides the mode identification signal a to the source driver first, then provides the row configuration data to the source driver, and then provides the row image data to the source driver. For another example, for the frame configuration mode, the controller provides the mode identification signal B to the source driver first, then provides the frame configuration data to the source driver, and then provides the invalid data to the source driver. For another example, for a correction configuration mode, the controller provides the mode identification signal C to the source driver before providing the correction signal to the source driver. In embodiments of the present disclosure, the invalid data may be, for example, a logic invalid level signal, such as a low level signal.
Each display sub-signal comprises a pattern recognition signal which can facilitate the source driver to correctly analyze and process subsequently received data according to the pattern to which the display sub-signal belongs so as to acquire row configuration data, frame configuration data, correction signals or the like.
In some embodiments of the present disclosure, the at least two modes include a line configuration mode and a frame configuration mode, the line configuration mode providing display sub-signals including line configuration data and image data, and the frame configuration mode providing display sub-signals including frame configuration data. For the description of the row configuration mode and the frame configuration mode, reference is made to the above description.
In some embodiments of the present disclosure, the at least two modes further include a correction configuration mode, the display sub-signals provided by the correction configuration mode including correction signals for correcting a clock signal of the source driver and a timing of the display signals. For a description of the correction configuration mode, reference is made to the above description.
In some embodiments of the present disclosure, since RGB image data needs to be transferred during an image display period and RGB image data does not need to be transferred during a vertical blanking period, the image display period and the vertical blanking period respectively transfer display sub-signals in different modes.
For example, the at least two modes include a row configuration mode and a frame configuration mode. Display sub-signals required for displaying image data for each row of pixels are transferred to the source driver in a row arrangement mode during image display, and display sub-signals required for displaying image data for each row of pixels are transferred to the source driver in a frame arrangement mode during vertical blanking. For example, the frame configuration mode and the correction configuration mode are in the vertical blanking period within one frame display period.
In some embodiments of the present disclosure, the frame configuration mode includes a power consumption control sub-mode that provides a data signal, e.g., invalid data, of the source driver at least during the vertical blanking period for controlling (e.g., reducing) the power consumption of the source driver at least during the vertical blanking period, controlling the overall power consumption of the system.
For example, power consumption configuration sub-data for reducing power consumption of the source driver at least during the vertical blanking period is included in the frame configuration data. For example, the source driver enters a low power consumption operation state in which at least part of the circuit modules of the source driver are powered down in response to the power consumption configuration sub-data, thereby reducing the power consumption of the source driver at least during the vertical blanking period. The data signal provided by the power consumption control sub-mode may be, for example, a logic inactive level. In embodiments of the present disclosure, for example, the logic inactive level may be a low level signal, which represents a data signal "0", and the logic active level may be a high level signal, which represents a data signal "1". The controller is providing a logic disable level to the source driver during a low power consumption operating state of the source driver to reduce power consumption during vertical blanking. For example, the power consumption configuration sub-data includes at least part of the circuit blocks that the source driver disables during the vertical blanking period. Those skilled in the art can define circuit blocks that are disabled during the vertical blanking period into the power consumption configuration sub-data to issue the disabled circuit blocks to the source driver so that the source driver disables the circuit blocks in the power consumption configuration sub-data during the vertical blanking period. In some embodiments of the present disclosure, disabling a circuit module may refer to powering down the circuit module.
For example, the circuit module indicated by the power consumption configuration sub-data to be disabled at the vertical blanking device includes an output driver, and the source driver is configured to power down the output driver during the vertical blanking period.
Fig. 3A and 3B are signal format diagrams illustrating a display signal provided by a controller to a source driver according to at least one embodiment of the present disclosure.
As shown in fig. 3A, in one frame display period (including an image display period and a vertical blanking period), the display signal includes a plurality of display sub-signals 301 provided in a line configuration mode, a display sub-signal 302 provided in a frame configuration mode, and a display sub-signal 303 provided in a correction configuration mode.
For example, a plurality of display sub-signals 301 are provided in a line configuration mode during image display, a display sub-signal 302 is provided in a frame configuration mode and a display sub-signal 303 is provided in a correction configuration mode during vertical blanking.
As shown in fig. 3A, providing display signals to a source driver in at least two modes through a low voltage differential signal interface during a frame display period includes: the display signals are sequentially supplied to the source driver in at least two modes using the low voltage differential signal interface during a frame display period, and for each mode, one or more display sub-signals are sequentially supplied to the source driver using the low voltage differential signal interface.
For example, in the example of fig. 3A, a plurality of display sub-signals 301 are provided to the source driver in a row configuration mode, then a display sub-signal 302 is provided to the source driver in a frame configuration mode, and then a display sub-signal 303 is provided to the source driver in a correction configuration mode using the low voltage differential signal interface. For example, for a row configuration mode including a plurality of display sub-signals 301, the plurality of display sub-signals 301 are sequentially provided to the source driver using a low voltage differential signal interface. That is, in the example of fig. 3A, a plurality of display sub-signals 301 are provided to the source driver by using the low voltage differential signal interface, then a display sub-signal 302 is provided to the source driver by using the low voltage differential signal interface, and then a display sub-signal 303 is provided to the source driver by using the low voltage differential signal interface.
As shown in fig. 3A, each display sub-signal 301 provided in the line configuration mode includes line data LPC and image data (e.g., RGB data). As shown in fig. 3B, the line data LPC includes a pattern recognition signal a and line configuration data. For example, the pattern recognition signal a includes a RESET signal RESET and a line pattern Start signal LPC Start. For example, the row pattern start signal may be a logic inactive level, such as "000000". For the pattern recognition signal and the row configuration data of the row configuration pattern, refer to the above description.
As shown in fig. 3A, each of the display sub-signals 302 provided in the frame configuration mode includes frame data FPC and invalid data IDLE0 and invalid data IDLE1. The display sub-signals provided in the frame configuration mode include the data signals 312 provided in the power consumption control sub-mode. As shown in fig. 3B, the frame data FPC includes a pattern recognition signal B and frame configuration data. For example, the mode identification signal B of the frame data FPC is a RESET signal RESET and a frame mode Start signal FPC Start. For example, the frame mode start signal is different from the line mode start signal to distinguish between the frame configuration mode and the line configuration mode, and may be, for example, a logically valid level such as "111 111". For the pattern recognition signal and the frame configuration data of the frame configuration pattern, refer to the above description.
During the controller providing the data signals 312 (including the invalid data IDLE0 and the invalid data IDLE 1) to the source driver in the power consumption configuration sub-mode, at least some of the circuit blocks in the source driver are in a power down state to conserve power consumption.
As shown in fig. 3A, each display sub-signal 303 provided in the correction configuration mode includes correction data ASC. As shown in fig. 3B, the correction data ASC includes a pattern recognition signal C and a correction signal. The pattern recognition signal C may be, for example, a logic invalid level. For the correction signal, please refer to the description above.
As shown in fig. 3A, after the display signal in the display period of one frame is transmitted to the source driver, the display signal in the display period of the next frame is continuously transmitted to the source driver.
As shown in fig. 3A, before each display sub-signal is provided to the source driver, a trigger signal PSI for informing the source driver to perform a transmission operation for at least two modes is provided to the source driver.
In some embodiments of the present disclosure, the controller may transmit the display signal to the source driver through a single mode in addition to transmitting the display signal to the source driver in at least two modes.
In this embodiment, the source driver is informed of the transmission operations of at least two modes performed by the trigger signal PSI, which facilitates the source driver and the controller to be compatible with other transmission operations than the transmission operations of at least two modes, providing compatibility. For example, a single mode transfer operation may be compatibly performed between the controller and the source driver in addition to the transfer operation by at least two modes. For example, the display signals that can be transmitted in at least two modes conform to a first signal transmission protocol, and the display signals that can be transmitted in a single mode to the source driver conform to a second signal transmission protocol. If the controller and the source driver execute at least two modes of transmission operation, the controller firstly provides a trigger signal PSI to the source driver as an indication signal of the at least two modes of transmission operation; if the controller and the source driver perform a single mode transmission operation, control first provides a single mode indication signal different from the trigger signal PSI to the source driver. The second signal transmission protocol may be some different protocol than the first signal transmission protocol, for example some transmission protocols in the related art. The signal line multiplexing can be realized by setting the trigger signal, so that the chip has multiple functions, and the difficulty in popularization of the first signal transmission protocol is reduced.
In some embodiments of the present disclosure, providing a trigger signal to a source driver includes: the source driver is supplied with the data transfer control signal and the data polarity inversion control signal, and the trigger signal is obtained based on a relative timing relationship between the source driver supplied with the data transfer control signal and the data polarity inversion control signal. The first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge is at least partially time coincident with the second transition state of the data transmission control signal after the second transition edge.
The data polarity inversion control signal controls the polarity inversion of the data signal output by the source driver by switching the high and low levels to realize the alternating current driving of the liquid crystal. The data transfer control signal is used for latching the data input to the source driver and the data polarity inversion signal at the rising edge, and the falling edge controls the release of the data to the panel.
In this example, the controller and the source driver may be connected through a mini-LVDS signal line, a POL signal line, and a LOAD signal line, and thus other control signal lines such as a POL2 control signal line and a POLC control signal line, a horizontal DOT inversion (H2 DOT) control signal line, a bias voltage (PWRC) control signal line, and the like may be omitted in whole or in part. Thus, this example can not only reduce the number of signal lines between the controller and the source driver, but also inform the source driver which transfer operation to perform to be compatible with the single mode transfer operation.
Fig. 4A illustrates a timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure.
As shown in fig. 4A, the trigger signal PSI includes a data transmission control signal LOAD and a data polarity inversion control signal POL, and a first transition edge (e.g., a rising edge) of the data polarity inversion control signal POL is later than a second transition edge (e.g., a rising edge) of the data transmission control signal LOAD, and a first transition state (e.g., a high-level state) of the data polarity inversion control signal POL after the first transition edge is at least partially time-coincident with a second transition state (e.g., a high-level state) of the data transmission control signal LOAD after the second transition edge.
In some embodiments of the present disclosure, for example, a driver in the controller may be adjusted such that the data polarity inversion control signal POL is later than the data polarity inversion control signal LOAD by a time length tS2 in the same period of the data polarity inversion control signal LOAD and the data polarity inversion control signal POL, so that a rising edge of the data polarity inversion control signal POL is later than a rising edge of the data polarity inversion control signal LOAD. The data polarity inversion control signal POL and the data transmission control signal LOAD are simultaneously in a high state for a time period tH2 after a rising edge.
Fig. 4B illustrates a timing diagram of a single mode indication signal provided in at least one embodiment of the present disclosure.
As shown in fig. 4B, the single mode indication signal includes a data transmission control signal LOAD 'and a data polarity inversion control signal POL', and a first transition edge (e.g., a rising edge) of the data polarity inversion control signal POL 'is earlier than a second transition edge (e.g., a rising edge) of the data transmission control signal LOAD', and a first transition state (e.g., a high-level state) of the data polarity inversion control signal POL 'after the first transition edge is at least partially time-coincident with a second transition state (e.g., a high-level state) of the data transmission control signal LOAD' after the second transition edge.
In some embodiments of the present disclosure, for example, a driver in the controller may be adjusted such that the data polarity inversion control signal POL ' is earlier than the data polarity inversion control signal LOAD ' by a time length tS1 in the same period of the data polarity inversion control signal LOAD ' so that a rising edge of the data polarity inversion control signal POL ' is earlier than a rising edge of the data polarity inversion control signal LOAD '.
The embodiments of fig. 4A and 4B can distinguish between a single mode transmission operation and at least two modes transmission operation by a data transmission control signal and a data polarity inversion control signal, and are easy to implement without modifying the hardware circuit of the interface. In this way, the same set of controllers and source drivers may be selected to implement either the first signal transmission protocol or the second signal transmission protocol as desired without having to separately provide a set of controllers and source drivers for each of the first signal transmission protocol and the second signal transmission protocol, thereby reducing costs for design, development, manufacturing, and management for the provider.
As shown in fig. 3A, the frame configuration mode includes a power consumption configuration sub-mode. The display sub-signal 302 provided in the frame configuration mode includes a data signal 312 (including an inactive signal IDLE0 and an inactive signal IDLE 1) provided to the source driver in the power consumption configuration sub-mode. During the controller providing the inactive signal IDLE0 and the inactive signal IDLE1 to the source driver in the power consumption configuration sub-mode, at least part of the circuit blocks in the source driver are in a power down state to save power consumption. In the example of fig. 3A, before the source driver is supplied with the disable signal IDLE0 in the power consumption configuration sub-mode, the controller supplies the source driver with the trigger signal PSI again to instruct the source driver to enter the low power consumption operation state. The trigger signal PSI please refer to the description of fig. 4A.
In some embodiments of the present disclosure, the signal transmission method is applied to a display device. For example, to the display panel 130 shown in fig. 1C. In the starting-up process of the display device, display signals transmitted between the controller and the source driver are display sub-signals provided by the correction configuration mode and display sub-signals provided by the frame configuration mode in sequence; and after the display device enters a working state, the display signals transmitted between the controller and the source driver are sequentially a display sub-signal provided by a row configuration mode, a display sub-signal provided by a frame configuration mode and a display sub-signal provided by a correction configuration mode.
In the process of starting up the display device, the controller firstly provides a correction signal to the source driver, and then provides frame configuration data to the source driver, so that the controller prepares for image display in advance. During the power-on of the display device, no image display is performed, and thus it is not necessary to supply the display sub-signals to the source driver in the row configuration mode. After the source driver is configured according to the correction signal and configured according to the frame configuration data, the display device enters an operating state. After the display device enters an operating state, the controller supplies a plurality of display sub-signals to the source driver in a row configuration mode, a frame configuration mode, and a correction configuration mode.
For example, the controller first line-configures data and line image data to the source driver in a line configuration mode so that the display device sequentially displays the image data of each line to display a complete image of one frame. After the display device displays a complete image, the vertical blanking period is entered. During the vertical blanking period, the controller first provides frame configuration data to the source driver in a frame configuration mode, so that the source driver performs frame configuration. For example, the source driver enters a low power consumption state according to the frame configuration data, and then the controller supplies a logic disable level to the source driver in the correction configuration mode. During the vertical blanking period, the source driver is configured according to the frame configuration data and the correction configuration data to prepare for display of the next frame image.
Fig. 5 illustrates a flow chart of another signal transmission method provided by at least one embodiment of the present disclosure.
As shown in fig. 5, the signal transmission method includes steps S510 to S530. The signal transmission method shown in fig. 5 is performed by the source driver 120 in fig. 1C, for example. For example, the signal transmission method is used for the source driver 120 to receive the display signal from the timing controller 110.
Step S510: the display signals provided by the controller in at least two modes in one frame display period are received through the low-voltage differential signal interface.
Step S520: and analyzing the display signal to obtain configuration data and image data.
Step S530: image data is processed according to the configuration data.
For step S510, for example, in the example of fig. 1C, the controller 110 transmits a display signal within one frame display period to the source driver 120 through its own low voltage differential signal interface. The source driver 120 receives the display signal from the controller 110 through its own low voltage differential signal interface. For at least two modes and one frame display period, refer to the description above.
For step S520, please refer to the above for the relevant description of the configuration data and the image data. For example, line configuration data and line image data are extracted from the display signal. For another example, frame configuration data and correction configuration data are extracted from the display signal.
For step S530, for example, in driving a row image data display process according to row configuration data, rotation of liquid crystal molecules, conversion of digital signals into corresponding analog gray scale voltage data signals according to frame configuration data, and the like.
For row configuration data, frame configuration data, and correction configuration data, similar to the embodiments described above, reference is made to the description above.
Fig. 6 illustrates a method flow diagram of step S520 of fig. 5 provided by at least one embodiment of the present disclosure. As shown in fig. 6, this step S520 includes steps S521 to S523. In this embodiment, the display signal comprises a display sub-signal provided by each of the at least two modes, each display sub-signal comprising a mode identification signal. For the display sub-signals and the pattern recognition signal, please refer to the above description.
Step S521: a pattern recognition signal is acquired.
Step S522: and determining the mode to which the display sub-signal belongs according to the mode identification signal.
Step S523: and analyzing the display sub-signals according to the modes to which the display sub-signals belong to obtain configuration data or image data.
For example, if the pattern recognition signal is the pattern recognition signal a shown in fig. 3B, the pattern to which the display sub-signal belongs is a row configuration pattern.
For example, if the pattern recognition signal is the pattern recognition signal B shown in fig. 3B, the pattern to which the display sub-signal belongs is the frame configuration pattern.
For example, if the pattern recognition signal is the pattern recognition signal C shown in fig. 3B, the pattern to which the display sub-signal belongs is the correction configuration pattern.
After determining the mode to which the display sub-signal belongs according to the mode identification signal, the source driver parses the display sub-signal according to the mode to which the display sub-signal belongs. For example, line configuration data and line image data obtained by analyzing a display sub-signal supplied in a line configuration mode; frame configuration data obtained by analyzing the display sub-signals provided in the frame configuration mode; and a correction signal obtained by analyzing the display sub-signal supplied in the correction configuration mode.
In some embodiments of the present disclosure, step S510 includes: in one frame display period, display signals provided by the controller in at least two modes are sequentially received through the low-voltage differential signal interface, and one or more display sub-signals are sequentially received through the low-voltage differential signal interface for each mode.
For example, the source driver sequentially receives at least one display sub-signal provided by the controller in a row configuration mode, at least one display sub-signal provided in a frame configuration mode, and at least one display sub-signal provided in a correction configuration mode through the low voltage differential signal interface.
In some embodiments of the present disclosure, the transmission method performed by the source driver may further include, before receiving each of the display sub-signals, receiving a trigger signal provided by the controller to perform a transmission operation for at least two modes in response to the trigger signal.
In some embodiments of the present disclosure, the trigger signal is obtained based on a relative timing relationship between the source driver providing the data transfer control signal and the data polarity inversion control signal, wherein a first transition edge of the data polarity inversion control signal is later than a second transition edge of the data transfer control signal, and a first transition state of the data polarity inversion control signal after the first transition edge is at least partially time coincident with a second transition state of the data transfer control signal after the second transition edge.
The trigger signal may be, for example, the trigger signal PSI described in the previous embodiments, to which reference is made.
Fig. 7 illustrates a flow chart of another signal transmission method provided by at least one embodiment of the present disclosure. As shown in fig. 7, the signal transmission method includes steps S701 to S712. Steps S701 to S712 may be performed by the source driver, for example.
Step S701: the source driver is powered up.
Step S702: and judging whether the trigger signal PSI is acquired. For example, it is determined whether or not the rising edge of the data polarity inversion control signal POL is later than the rising edge of the data transmission control signal LOAD in the same period. If the rising edge of the data polarity inversion control signal POL is later than the rising edge of the data transmission control signal LOAD, the trigger signal PSI is acquired. If the rising edge of the data polarity inversion control signal POL is earlier than the rising edge of the data transmission control signal LOAD, a non-trigger signal (e.g., the single mode indication signal described above) is acquired.
If the trigger signal PSI is acquired, step S703 is executed; if the trigger signal PSI is not acquired, the process goes to step S711 to execute.
Step S703: it is determined whether the display sub-signal includes a reset signal. If the display sub-signal does not include a reset signal, the display sub-signal is a display sub-signal provided in a correction configuration mode. If the display sub-signal includes a reset signal, continuing to determine whether the display sub-signal is a display sub-signal provided in a frame configuration mode or a display sub-signal provided in a row configuration mode. That is, if the display sub-signal includes a reset signal, step S704 is performed; if the display sub-signal does not include the reset signal, the process proceeds to step S710.
Step S704: and judging whether a line mode starting signal LPC Start and a frame mode starting signal FPC Start are received. That is, whether the display sub-signal includes the line mode Start signal LPC Start or the frame mode Start signal FPC Start is judged.
If the line mode Start signal LPC Start is received, step S708 is performed; if the frame mode Start signal FPC Start is received, step S705 is performed.
Step S705: the frame configuration data continues to be received using the low voltage differential signal interface.
Step S706: and judging whether the low-power-consumption working state is enabled or not. For example, the source driver enters a low power consumption operation state according to the frame configuration data.
If the frame configuration data enables the low power consumption operation state, executing step S707; if the low power consumption operation state is not enabled by the frame configuration data, the process returns to step S702.
Step S707: the source driver enters a low power consumption operating state. For example, in a low power consumption operating state, at least part of the circuit blocks of the source driver are powered down, thereby reducing the power consumption of the source driver at least during the vertical blanking period. At least a portion of the circuit modules may be configured and in the frame configuration data.
Step S708: the row configuration data continues to be received using the low voltage differential signal interface.
Step S709: continuously receiving line image data using low voltage differential signal interface
Step S710: a correction signal provided by the controller in a correction configuration mode is received.
Step S711: a reset signal is received.
Step S712: image data is received.
For example, for steps S701 to S710, the reset signal and the image data supplied from the controller to the source driver conform to the first signal transmission protocol. For steps S711 and S712, for example, the controller supplies a reset signal to the source driver and the image data conforms to the second signal transmission protocol.
Fig. 8 illustrates a schematic block diagram of a controller 800 provided in accordance with at least one embodiment of the present disclosure. The controller 800 is used to transmit display signals to the source driver.
For example, as shown in fig. 8, the controller 800 includes a display signal acquisition unit 810 and a low voltage differential signal interface 820.
The display signal acquisition unit 810 is configured to acquire a display signal. For example, the display signal acquisition unit 810 generates display signals supplied to the source driver in at least two modes.
The display signal acquisition unit 810 may perform step S10 described in fig. 1D, for example.
The low voltage differential signal interface 820 is configured to provide display signals to the source driver in at least two modes during a frame display period, the display signals provided in at least two modes including configuration data for configuring the source driver such that the source driver processes the image data according to the configuration data and image data.
The low voltage differential signal interface 820 may perform step S20 described in fig. 1D, for example.
The controller 800 can multiplex low voltage differential signal interfaces for providing both image data and configuration data to the source driver, thereby reducing the number of interfaces for signal transmission and ensuring that various control functions can be flexibly embedded in the source driver.
Fig. 9 illustrates a schematic block diagram of a source driver 900 provided in accordance with at least one embodiment of the present disclosure. The source driver 900 is used to acquire a display signal from the controller.
For example, as shown in fig. 9, the source driver 900 includes a low voltage differential signal interface 910, a parsing unit 920, and a configuration unit 930.
The low voltage differential signal interface 910 is configured to receive display signals provided by the controller in at least two modes, including configuration data and image data, for a frame display period.
The low voltage differential signal interface 910 may perform, for example, step S510 described in fig. 5.
The parsing unit 920 is configured to parse the display signal to obtain configuration data and image data. The parsing unit 920 may perform, for example, step S520 described in fig. 5.
The configuration unit 930 is configured to perform configuration according to configuration data, and process image data according to the configuration data. The configuration unit 930 may perform, for example, step S530 described in fig. 5.
The source driver 900 is capable of multiplexing low voltage differential signal interfaces for use in providing both image data and configuration data to the source driver, thereby reducing the number of interfaces for signal transmission and ensuring that a variety of control functions can be flexibly embedded in the source driver.
For example, the display signal acquisition unit 810, the parsing unit 920, and the configuration unit 930 may be hardware, software, firmware, and any feasible combination thereof. For example, the display signal acquiring unit 810, the analyzing unit 920 and the configuring unit 930 may be dedicated or general-purpose circuits, chips, devices, or the like, or may be a combination of a processor and a memory. With respect to the specific implementation forms of the respective units described above, the embodiments of the present disclosure are not limited thereto.
It should be noted that, in the embodiment of the present disclosure, each unit of the controller 800 and the source driver 900 corresponds to each step of the foregoing signal transmission method, and reference may be made to the related description of the signal transmission method for the specific function of the controller 800 and the source driver 900, which is not repeated herein. The components and structures of the controller 800 shown in fig. 8 and the source driver 900 shown in fig. 9 are exemplary only and not limiting, and the controller 800 and the source driver 900 may also include other components and structures as desired.
Fig. 10 illustrates a schematic block diagram of an electronic device 1000 provided by at least one embodiment of the present disclosure. As shown in fig. 10, the electronic device 1000 includes a controller 1010, a source driver 1020, and a display panel 1030.
The controller 1010 performs the signal transmission method described above with respect to fig. 1D. The source driver 1020 performs, for example, the signal transmission method described above with respect to fig. 5. The display panel 1030 is, for example, a liquid crystal display panel, and is configured to receive a driving signal (i.e., a gray scale voltage signal) supplied from the source driver 1020 and display an image.
The electronic device 1000 may be a variety of electronic devices having image display capabilities including, but not limited to, smartphones, tablets, notebooks, displays, televisions, etc.
The electronic device is capable of multiplexing low voltage differential signal interfaces for use in providing both image data and configuration data to a source driver, thereby reducing the number of interfaces for signal transmission and ensuring that a variety of control functions can be flexibly embedded in the source driver.
Although as described above, the following points are also described:
(1) The drawings of the embodiments of the present disclosure relate only to the structures to which the embodiments of the present disclosure relate, and reference may be made to the general design for other structures.
(2) The embodiments of the present disclosure and features in the embodiments may be combined with each other to arrive at a new embodiment without conflict.
The foregoing is merely specific embodiments of the disclosure, but the scope of the disclosure is not limited thereto, and the scope of the disclosure should be determined by the claims.

Claims (22)

1. A signal transmission method for a controller to transmit a display signal to a source driver, the method comprising:
providing the display signals to the source driver in at least two modes through a low voltage differential signal interface during a frame display period, wherein the display signals provided in the at least two modes include configuration data and image data,
the configuration data is used for configuring the source driver, so that the source driver processes the image data according to the configuration data.
2. The method of claim 1, wherein the display signal comprises a display sub-signal provided by each of the at least two modes, each of the display sub-signals comprising a mode identification signal,
the mode identification signal is used for indicating a mode of the display sub-signal to the source driver so that the source driver analyzes the display sub-signal according to the mode of the display sub-signal to acquire the configuration data or the image data.
3. The method of claim 2, wherein each mode provides one or more display sub-signals,
providing the display signal to the source driver in the at least two modes through the low voltage differential signal interface during a frame display period includes:
providing the display signals to the source driver in the at least two modes sequentially using the low voltage differential signal interface during a frame display period,
wherein for each of said modes, said one or more display sub-signals are provided to said source driver in turn using said low voltage differential signal interface.
4. A method according to claim 3, further comprising:
before each display sub-signal is provided to the source driver, a trigger signal is provided to the source driver, wherein the trigger signal is used to inform the source driver to perform a transmission operation for the at least two modes.
5. The method of claim 4, wherein providing the trigger signal to the source driver comprises:
providing a data transfer control signal and a data polarity inversion control signal to the source driver, and obtaining the trigger signal based on a relative timing relationship between the source driver providing the data transfer control signal and the data polarity inversion control signal,
The first transition state of the data polarity inversion control signal after the first transition edge is at least partially overlapped with the second transition state of the data polarity inversion control signal after the second transition edge.
6. A signal transmission method for a source driver to acquire a display signal from a controller, the source driver including a low voltage differential signal interface, the method comprising:
receiving display signals provided by the controller in at least two modes in a frame display period through the low-voltage differential signal interface;
analyzing the display signal to obtain configuration data and image data; and
and processing the image data according to the configuration data.
7. The method of claim 6, wherein the display signal comprises a display sub-signal provided by each of the at least two modes, each of the display sub-signals comprising a mode identification signal,
analyzing the display signal to obtain the configuration data and the image data, including:
acquiring the pattern recognition signal;
Determining a mode to which the display sub-signal belongs according to the mode identification signal; and
and analyzing the display sub-signals according to the mode of the display sub-signals to obtain the configuration data or the image data.
8. The method of claim 6 or 7, wherein each mode provides one or more display sub-signals,
receiving display signals provided by the controller in at least two modes within a frame display period through the low voltage differential signal interface comprises:
in a frame display period, the display signals provided by the controller in the at least two modes are sequentially received through the low-voltage differential signal interface,
wherein for each of the modes, the one or more display sub-signals are received sequentially through the low voltage differential signal interface.
9. The method of claim 8, further comprising:
before receiving each display sub-signal, a trigger signal provided by the controller is received, so that the transmission operation for the at least two modes is performed in response to the trigger signal.
10. The method of claim 9, wherein the trigger signal is obtained based on a relative timing relationship between the source driver providing a data transfer control signal and a data polarity inversion control signal,
The first transition state of the data polarity inversion control signal after the first transition edge is at least partially overlapped with the second transition state of the data polarity inversion control signal after the second transition edge.
11. The method of any of claims 2-9, wherein the configuration data comprises row configuration data, at least one of the at least two modes is a row configuration mode, and the display sub-signals provided by the row configuration mode comprise the row configuration data and the row image data.
12. The method of claim 11, wherein the row configuration mode provides a display sub-signal comprising:
and combining data obtained by combining the line configuration data of each line with the line image data of each line in the image data.
13. The method of any of claims 2-9, wherein the configuration data comprises frame configuration data, at least one of the at least two modes comprises a frame configuration mode, and the display sub-signal provided by the frame configuration mode comprises the frame configuration data.
14. The method of any of claims 2-9, wherein the configuration data provides a display sub-signal comprising a correction signal, at least one of the at least two modes comprises a correction configuration mode, the correction configuration mode provides a display sub-signal comprising a correction signal,
the correction signal is used for correcting the clock signal of the source driver and the time sequence of the display signal.
15. The method of claim 2 or 7, wherein the at least two modes include a row configuration mode and a frame configuration mode,
wherein the display sub-signals provided by the row configuration mode comprise row configuration data and the image data,
the display sub-signal provided by the frame configuration mode includes frame configuration data.
16. The method of claim 15, wherein the at least two modes further comprise a correction configuration mode, the correction configuration mode providing a display sub-signal comprising a correction signal for correcting a clock signal of the source driver and a timing of the display signal.
17. The method of claim 16, wherein the frame configuration mode and the correction configuration mode are during a vertical blanking period within the one frame display period.
18. The method of claim 17, wherein the frame configuration mode comprises a power consumption control sub-mode that provides a data signal of the source driver at least during the vertical blanking period.
19. The method of claim 16, applied to a display device, wherein, during a power-on process of the display device, a display signal transmitted between the controller and the source driver is a display sub-signal provided by the correction configuration mode and a display sub-signal provided by the frame configuration mode in sequence; and
after the display device enters a working state, the display signals transmitted between the controller and the source driver are sequentially a display sub-signal provided by the row configuration mode, a display sub-signal provided by the frame configuration mode and a display sub-signal provided by the correction configuration mode.
20. A controller for transmitting a display signal to a source driver, the controller comprising:
a low voltage differential signal interface configured to provide the display signals to the source driver in the at least two modes during a frame display period, wherein the display signals provided in the at least two modes include configuration data and image data,
The configuration data is used for configuring the source driver, so that the source driver processes the image data according to the configuration data.
21. A source driver for acquiring a display signal from a controller, the source driver comprising:
a low voltage differential signal interface configured to receive a display signal within a display period of one frame provided by the controller in at least two modes, wherein the display signal provided by the at least two modes includes configuration data and image data;
the analysis unit is configured to analyze the display signal to obtain the configuration data and the image data; and
and a configuration unit configured to perform configuration according to the configuration data and process the image data according to the configuration data.
22. An electronic device, comprising:
the controller according to claim 20;
the source driver of claim 21, the source driver being connected to the controller through the low voltage differential signal interface; and
and a display panel connected with the source driver to receive a driving signal provided by the source driver, wherein the driving signal is generated based on the display signal.
CN202211566801.5A 2022-12-07 2022-12-07 Signal transmission method, controller, source driver and electronic equipment Pending CN116129784A (en)

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CN202211566801.5A CN116129784A (en) 2022-12-07 2022-12-07 Signal transmission method, controller, source driver and electronic equipment

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Application Number Priority Date Filing Date Title
CN202211566801.5A CN116129784A (en) 2022-12-07 2022-12-07 Signal transmission method, controller, source driver and electronic equipment

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