CN116090496A

CN116090496A - Method for producing a multilayer chip card and multilayer chip card

Info

Publication number: CN116090496A
Application number: CN202111312786.7A
Authority: CN
Inventors: 汪敦谱; M.尼德恩胡伯
Original assignee: Giesecke and Devrient GmbH
Current assignee: Giesecke and Devrient GmbH
Priority date: 2021-11-08
Filing date: 2021-11-08
Publication date: 2023-05-09
Also published as: JP2023070191A

Abstract

The invention discloses a method for manufacturing a multi-layer chip card and the multi-layer chip card. Providing a core structure (2) having a front surface and a rear surface, the core structure (2) comprising contact pads (20) on the front surface, further comprising an IC chip (10) and a conductor pattern, the IC chip (10) and the contact pads (20) not overlapping as seen in the front-rear direction; providing a front layer structure (1) on a front surface of the core layer structure (2), the front layer structure having a through hole (5) with a cross-sectional shape substantially corresponding in size and position to an outer contour of the contact pad (20); providing a rear layer structure (3) on the rear surface of the core layer structure (2); providing a label (50) between the rear layer structure (3) and the core layer structure (2), the label (50) overlapping the contact pad (20) as seen in the front-rear direction and preferably having an outer contour substantially corresponding in size and position to the outer contour of the contact pad (20); the stacked front, core and back layer structures and labels are laminated by applying heat and pressure to the stack.

Description

Method for producing a multilayer chip card and multilayer chip card

Technical Field

The present invention relates to a method of manufacturing a multi-layer chip card, also called an integrated circuit card or a smart card, and a multi-layer chip card, in particular a dual interface chip card. A dual interface chip card is a chip card that incorporates an integrated circuit chip (IC chip), metal contact pads for conductive communication with the IC chip, and an antenna for non-contact communication with the IC chip in a card structure.

Background

Typically, the IC chip and the contact pads are provided as a chip module in which they are mounted on opposite sides of the carrier substrate. The contact between the IC chip and the contact pads is achieved by a carrier substrate carrying them. The chip module is mounted in the cavity of the card body such that its contact pads are flush with the outer surface of the card body and the IC chip is hidden in the cavity. The antenna of a dual interface chip card is typically in the form of an antenna coil embedded in the card body, with the two antenna contact areas exposed in the cavity of the card body so that when the chip module is mounted in the cavity, they are in contact with the corresponding contact areas on the underside of the chip module, thereby being conductively connected to the IC chip of the chip module.

EP 3 384 B1 discloses a dual interface smart card in which the IC chip, contact pads and antenna are all provided on the same piece of flexible polyethylene terephthalate (PET) carrier substrate which forms the core layer of the card body. The front layer has a through hole and is arranged at the front side of the core layer such that the contact pad is accommodated in the through hole. The rear layer has a cavity and is mounted on the rear side of the core layer such that the IC chip is accommodated in the cavity. The IC chip and the contact pads are electrically connected to the conductor patterns on the core layer, and they do not overlap as viewed in the front-rear direction.

According to EP 3 384 B1, first the core layer and the back layer are laminated in a hot-pressing stage at a temperature of at least 80 ℃ and a pressure of 2 mpa for about 30 minutes, and then in a cold-pressing stage the core layer and the back layer are laminated at a temperature of not more than 30 ℃ and a pressure of 2 mpa for about 20 minutes. During lamination, the back layer softens, and the IC chip disposed as a flip chip on the core layer is pressed and embedded into the softened back layer. Next, after cooling, the laminate structure is laminated to the front layer under the same conditions, wherein the contact pads on the core layer protrude through the through holes in the front layer, forming a continuous flat plane with the front surface of the final laminate structure. Alternatively, the contact pads and the IC chip are arranged on the same side of the core layer, in which case the cavity for accommodating the IC chip is located on the rear side of the front layer.

Disclosure of Invention

The object of the invention is to improve the appearance of the outer surface of a chip card comprising a core structure as described above, i.e. the chip card comprises a core layer with at least one contact pad and an IC chip arranged thereon in a non-overlapping manner, and the core layer is laminated into the other layers of the chip card.

This object is achieved by a method and a multi-layer chip card as claimed in the appended independent claims. Preferred embodiments and improved specific features of the invention are defined in the dependent claims.

A first aspect of the invention relates to a method of manufacturing a multilayer chip card, wherein the chip card is provided with:

a core structure having a front surface and a rear surface, wherein the core structure comprises contact pads on the front surface and further comprises an IC chip and a conductor pattern, wherein the IC chip and the contact pads are electrically conductively connected to the conductor pattern and, seen in the front-rear direction, they do not overlap,

a front layer structure arranged on the front surface of the core layer structure, wherein the front layer structure has a through-hole, the cross-sectional shape of which corresponds substantially in size and position to the outer contour of the contact pad on the front surface of the core layer structure,

-a back layer structure arranged on the back surface of the core layer structure, and

a label arranged between the back layer structure and the core layer structure, wherein the label and the contact pad completely overlap or at least overlap to a large extent, seen in the front-back direction.

The stacked front, core and back structures, and the label between the core and back structures are then laminated by applying heat and pressure to the stack. Since the cross-sectional shape of the through-hole corresponds in size and position substantially to the outer contour of the contact pad, the contact pad will pass through the through-hole during lamination and preferably be flush with the outer surface of the laminated stack.

A second aspect of the invention relates to a multi-layer chip card having a corresponding structure. In case the chip card to be manufactured is a dual interface chip card, the core structure may further comprise an antenna, such as an antenna coil, electrically connected to the IC chip. Preferably, the IC chip and the contact pads are disposed on a common substrate, more preferably on opposite sides of the common substrate. Specifically, the IC chip and the contact pad may be disposed laterally spaced apart from each other.

The labels arranged between the back layer and the core structure have the function of compensating for undulations which may occur at the front and/or back side of the laminate. During lamination of the laminate, a local pressure is generated at the rear side of the core structure by means of the label and forces the core structure together with its contact pads at the front side into the through holes of the front layer structure. That is, the contact pads should be thin compared to the thickness of the front layer structure through which they protrude to be flush with the outer surface of the stack. Thus, the material of the tag compensates to some extent for the lack of material in the through hole.

Preferably, the outer contour of the label corresponds in size and position substantially to the outer contour of the contact pads on the front surface of the core structure. In this way, the pressure generated by the label during lamination is evenly distributed over the whole area of the contact pad.

In addition, the thickness of the label is preferably chosen to be as thick or thicker than the thickness of the front layer structure. For example, the thickness of the label may be selected to be 5% to 15% greater than the thickness of the front layer structure. As mentioned above, the volume of the label should compensate for the lack of material in the through holes of the front layer structure. Overcompensation is preferred over undercompensation because excess material flows and is uniformly distributed between the layer structures. In a preferred embodiment, the thickness of the front layer structure is selected to be 0.3 mm or slightly less than this value and the thickness of the label is selected to be 0.3 mm or slightly greater than this value.

Preferably the label is made of ethylene glycol modified polyethylene terephthalate (PETG) because of its low viscosity.

In a preferred embodiment, the core layer structure is formed of a first layer on which the IC chip is mounted and a second layer having apertures, such that the IC chip on the first layer is received in the apertures of the second layer. This can reduce the force exerted on the IC chip during lamination. More specifically, the size of the aperture is preferably larger than the size of the IC chip, so that when the two layers are laminated together with the remaining layers of the multilayer structure, the IC chip is accommodated within the aperture without being subjected to any force.

In one embodiment, the aperture in the second layer of the core structure may have the form of a through-hole and an adhesive is provided in the region of the through-hole, so that an adhesive connection between the IC chip accommodated in the through-hole and the rear layer structure is achieved when the second layer of the core structure is in contact with the rear layer structure.

It is further preferred that at least one of the front layer structure and the rear layer structure is formed by a plurality of layers of at least two layers, preferably three layers. For example, the inner layer may have properties that facilitate contact with the first layer carrying the contact pads described above or the second layer containing the IC chip described above. One or both of the inner layers may be provided with an adhesive to improve adhesion to the core structure. The outer layers of the front and/or rear layer structure may provide good protection and/or scratch resistance properties. One layer (e.g., the middle layer) of the front and/or back layer structure may have good print quality and bear one or more printed patterns. For example, at least one layer of the front layer and/or the rear layer structure may be white and/or at least one layer of the front layer and/or the rear layer structure may be provided with a printed pattern visible from outside the laminate.

In order to further improve the appearance of the outer surface of the laminated stack, a release film may be provided on one or both of the front surface of the stack and the back surface of the stack, preferably at least on the front surface of the stack, prior to the lamination step, and the release film is removed after the lamination step. For this purpose, the separator film may comprise polyethylene terephthalate (PET), or is preferably made of PET. The release film is used for protecting the laminate from the occurrence of indentations that might otherwise be caused by the through holes in the front layer structure. In summary, the front and back surfaces of the laminate and the appearance of the final chip card are improved.

With respect to the lamination process, it is preferred that the front layer structure, the core layer structure and the back layer structure are stacked and laminated together by a single lamination process. More preferably, in case one or more of these layer structures comprises more than one layer, all layers of all layer structures are stacked and laminated together by a single lamination process.

The lamination process includes a first heating step at a first heating temperature and a second heating step at a second heating temperature higher than the first heating temperature, followed by a cooling step. In this way, the generation of bubbles and the exposure of the antenna (if present) can be avoided. The first heating temperature may be set in a range of 120 to 130 ℃, for example 125 ℃, and the second heating temperature may be set in a range of 140 to 150 ℃, for example 145 ℃. Preferably, the first heating step is performed in a first laminator and the second heating step is performed in a further second laminator. The cooling may be carried out, for example, at a temperature as low as 20 ℃. Cooling may be performed in a second laminator.

According to a preferred embodiment, the pressure is increased during the first heating step and further increased during the second heating step, and preferably still further increased during the cooling step. For example, during the first heating step, the pressure may be continuously or stepwise increased from 3 bar to 15 bar, for example by three sub-steps of 3 bar, 10 bar and 15 bar. Similarly, during the second heating step, the pressure may be raised continuously or stepwise from 25 bar to 35 bar, for example by two sub-steps of 25 bar and 35 bar. During the cooling step, the pressure may be further increased from 50 bar to 60 bar, continuously or stepwise, for example by two sub-steps of 50 bar and 60 bar.

The appropriate duration of the heating and cooling steps and sub-steps may be chosen according to the particular circumstances, depending inter alia on the material of the layer and the thickness of the layer. The lamination temperatures and pressures described above have proven useful where most of the layers are composed of polyvinyl chloride (PVC) and other layers are made of polyethylene terephthalate (PET), but may also prove useful in other situations.

Drawings

Fig. 1 shows the layers in an exploded view.

Detailed Description

The preferred embodiment of the invention will be described below with reference to the accompanying drawings, in which fig. 1 is the only figure, which shows in an exploded view a plurality of layers 1.1 to 3.3, which are to be laminated together to form a multi-layer chip card, more particularly a dual interface chip card.

In one embodiment, a first layer structure 1, also called front layer structure, is provided, which is provided with through holes 5 and consists of three layers 1.1, 1.2 and 1.3 in total. The front layer structure 1 may comprise more or less layers and comprises at least one layer.

The second layer structure 2, also called core layer structure, comprises at least a layer 2.1 carrying contact pads 20 on its front surface and IC chips 10 on its rear surface. Antenna coils of the antenna 30 are also provided on the front and rear surfaces. The conductor patterns on layer 2.1, through which the IC chip 10 is electrically conductively connected to the contact pads 20 and the antenna 30, respectively, are not shown in the figure. Layer 2.1 may be made of polyethylene terephthalate (PET). The IC chip 10 may be mounted and connected on the layer 2.1 and embedded in a polymer matrix using wire bonding techniques or mounted and connected using flip chip techniques. The conductor pattern (not shown) and the antenna 30 and the contact pad 20 may be etched from an aluminium coating of the cover layer 2.1.

In the embodiment shown, the core layer structure further comprises a second layer 2.2 having an aperture 40, in which aperture 40 the ic chip 10 is accommodated. The second layer 2.2 may be attached to the first layer 2.1 with an adhesive G, which is preferably arranged on the second layer 2.2. The apertures 40 may have the form of recesses in the layer 2.2 or may form through holes as is the case currently. When the layers are stacked together, adhesive is filled into the aperture 40, thereby bonding the IC chip 10 to the next adjacent layer. The second layer 2.2 of the core structure 2 serves to protect the IC chip 10.

The third layer structure 3 (also called rear layer structure) comprises three layers 3.1, 3.2 and 3.3. The back layer structure may include more or fewer layers and include at least one layer. The thickness and material of the layers 3.1, 3.2, 3.3 may correspond to the thickness and material of the respective layers 1.1, 1.2 and 1.3 of the front layer structure 1. The inner surfaces of the front layer structure 1 and the rear layer structure 3 are coated with an adhesive G to achieve a firm bond with the core layer structure 2.

Furthermore, printed patterns P1 and/or P2 may be provided in one or both of the front layer structure 1 and the rear layer structure 3, respectively. For example, the central layers 1.2 and 3.2 of the front and

rear layer structures

1 and 3, respectively, may be made of polyethylene terephthalate (PET), which PET material may be colorless (i.e. transparent) and carry printed patterns P2, P1 on either of its surfaces, or preferably white (i.e. opaque) and carry printed patterns P2, P1 on the respective outer surfaces, as shown. Alternatively or additionally, one or both of the inner layers 1.3 and 3.3 may bear a printed pattern. Preferably, the inner layers 1.3 and 3.3 are made of polyvinyl chloride (PVC), more preferably colorless (i.e., opaque) PVC. Finally, the outer layers 1.1 and 3.1 of the front layer structure 1 and the rear layer structure 3, respectively, can be colorless and preferably consist of PVC as well. These layers serve to protect the layers and printed patterns within the multilayer structure. The printed pattern is externally visible (i.e., viewable by the user of the final chip card).

In embodiments where the core layer structure 2 comprises only the first layer 2.1 on which the electronic components are mounted, the apertures 40 may be provided in the adjacent rear layer structure 3, more specifically in the layer 3.3 thereof. If the IC chip 10 is mounted together with the contact pads 20 on the front side of the layer 2.1, the apertures 40 may be provided in the front layer structure 1, more specifically in its layer 1.3.

A label 50 is also provided. The label 50 is located precisely behind the contact pad 20, seen in the forward direction. That is, the contact pad 20 has an outer contour corresponding substantially or precisely to the cross-sectional shape of the through hole 5, and the label 50 also has an outer contour corresponding substantially or precisely to the outer contour of the contact pad. When the layers 1.1 to 3.3 are stacked together, the contact pad 20 is pressed through the through hole 5 so as to be flush with the outer surface of the entire stack, and the label 50 behind the contact pad 20 supports this process.

The label 50 is made of PETG material having a low melting temperature and low viscosity so as to flow easily upon melting.

The individual layers 1.1 to 3.3 can be stacked in groups and spot welded together before the groups are stacked and laminated on each other to improve positioning accuracy. For example, the layers 1.1 to 1.3 of the front layer structure 1 may be stacked in a first group and spot welded together, for example using a soldering iron. The through holes 5 are then punched out of the set of stacks 1.1 to 1.3 spot welded. Similarly, after punching out the apertures 40 in the layer 2.2 of the core layer structure 2, the layers 2.1, 2.2 of the core layer structure 2 may be stacked together with the layer 3.3 of the back layer structure 3, wherein the label 50 is placed in the correct position between the layers 2.2 and 3.3 covering the contact pads 20. Then, the layers 3.2 and 3.1 of the front layer structure are stacked and spot welded together to form a third set of spot welds. The first and second sets of spot welds are then stacked and transferred to a laminator where all of the layers are laminated together to form a unitary multi-layer structure.

It should be apparent that the dimensions shown in the drawings are not to true scale and should be understood only schematically. However, the thickness ratios of the individual layers are plotted to true scale. That is, PVC layers 1.3, 2.2 and 3.3 may have a thickness of 150 microns, PVC layers 1.1 and 3.1 may have a thickness of 80 microns, PET layers 1.2 and 3.2 may have a thickness of 100 microns, and PET layer 2.1 with electronic components (also referred to as "inlay") may have a thickness of 40 microns, such that the total thickness of the final laminated stack is approximately 850 microns. PETG label 50 may have a thickness of 300 microns, slightly greater than the combined thickness of layers 1.1 through 1.3 of front layer structure 1.

The exposed surface of the back layer structure 3 may carry other elements such as security element 60 (e.g., a hologram), signature panel 70, magnetic stripe 80, etc. The signature panel and magnetic stripe may be applied to the exposed surface of the layer 3.1 of the back layer structure 3 prior to the lamination step, while the hologram 60 may be applied after lamination, for example during a hot stamping process.

The lamination process is performed in two laminators arranged in succession to minimize manufacturing time on a continuous line. In the first machine, the stack was subjected to 125 ℃ temperatures for 480 seconds, 120 seconds and 420 seconds at successively higher pressures of 3 bar, 10 bar and 15 bar, respectively. In the second laminator, the laminate was subjected to higher 145 ℃ temperatures for 300 seconds and 720 seconds at successively higher pressures of 25 bar and 35 bar, respectively. Finally, the stack was subjected to a cooling step for 300 seconds and 720 seconds at successively higher pressures of 50 bar and 60 bar and temperatures of 20 ℃. In this way, the generation of bubbles and the exposure of the antenna 30 can be avoided. The cooling step may be performed in a second laminator or in an additional third laminator.

A release film (not shown) is provided at least on the front surface of the laminate (i.e. on the outer surface of the front layer structure 1) during the lamination step, preferably on the front surface of the laminate and the rear surface of the laminate before the lamination step, and the release film is removed after the lamination step. The release film comprises polyethylene terephthalate (PET), or is preferably made of PET. The release film may have a thickness of 0.05 millimeters.

It will be appreciated that these layers are typically provided in the form of larger sheets on which the respective electronic components, holes and apertures are arranged a plurality of times in a matrix (e.g. a 3 x 8 matrix) and finally the individual chip cards are punched out of the stack of sheets in a suitable format (e.g. the ID-1 format specified by ISO 7810).

In addition to the visible printed patterns mentioned above (e.g. printed patterns P1 and P2), processing marks may be provided on certain layers, which marks may likewise be provided in the form of printed patterns. For example, a printed pattern P2.2 may be provided on the second layer 2.2 of the core layer structure 2, and this printed pattern P2.2 may have a function of facilitating identification of the location of the apertures 40 to be produced (e.g. produced by stamping). More specifically, as shown, the printed pattern P2.2 may completely cover the second layer 2.2, except for the area where the aperture 40 is to be produced, or may be provided only partially, i.e. precisely around the aperture 40. Alternatively, the printed pattern P2.2 may be provided precisely only in the region of the aperture 40.

Similarly, with respect to the printed pattern P2.2 on the second layer 2.2 of the core layer structure 2, the printed pattern P3.3 may be provided on the inner surface of the inner layer 3.3 of the third layer structure 3, and the printed pattern P3.3 may have a function of facilitating recognition of the position where the label 50 will be placed before lamination. More specifically, as shown, the printed pattern P3.3 may completely cover the inner layer 3.3 except for the area where the label 50 is to be placed, or may be provided only partially, i.e. precisely around the area where the label 50 is to be placed. Alternatively, the printed pattern P3.3 may be provided only on the inner layer 3.3 and precisely in the area of the label 50.

Finally, the printed pattern P1 may even serve to facilitate identification of the location where the through holes 5 (e.g. produced by stamping) will be produced in the first layer structure 2. More specifically, the printed pattern P1 may completely or partially cover the central layer 1.2 and precisely leave the area where the through holes 5 are to be produced, as shown.

Preferred examples of the invention are outlined in paragraphs 1 to 26 below:

1. a method of manufacturing a multi-layer chip card, comprising the steps of:

providing a core structure (2) having a front surface and a rear surface, wherein the core structure (2) comprises contact pads (20) on the front surface and further comprises an IC chip (10) and a conductor pattern, wherein the IC chip (10) and the contact pads (20) are electrically conductively connected to the conductor pattern and, seen in the front-rear direction, do not overlap,

providing a front layer structure (1) on a front surface of the core layer structure (2), wherein the front layer structure (1) has a through hole (5) whose cross-sectional shape substantially corresponds in size and position to the outer contour of the contact pad (20) on the front surface of the core layer structure (2),

-providing a back layer structure (3) on the back surface of the core layer structure (2),

-providing a label (50) between the back layer structure (3) and the core layer structure (2), wherein the label (50) and the contact pad (20) are completely or at least largely overlapping, seen in the front-back direction; and is also provided with

-laminating the stacked front layer structure (1), core layer structure (2) and back layer structure (3), and a label (50) located between the core layer structure (2) and back layer structure (3) by applying heat and pressure to the stack.

2. The method of paragraph 1, wherein the outer contour of the label (50) corresponds in size and location to the outer contour of the contact pad (20) on the front surface of the core structure (2).

3. The method of paragraph 1 or paragraph 2, wherein the thickness of the label (50) is selected to be equal to or greater than the thickness of the front layer structure (1).

4. The method of paragraph 3, wherein the thickness of the label (50) is selected to be 5% to 15% greater than the thickness of the front layer structure (1).

5. The method of paragraph 3 or paragraph 4, wherein the front layer structure (1) has a thickness selected to be 0.3 millimeters or less and the label (50) has a thickness selected to be 0.3 millimeters or more.

6. The method of any one of paragraphs 1 to 5, wherein the label (50) is made of ethylene glycol modified polyethylene terephthalate (PETG).

7. The method as set forth in any one of paragraphs 1 to 6, comprising the step of forming the core layer structure (2) from a first layer (2.1) having the IC chip (10) mounted thereon and a second layer (2.2) having the aperture (40) such that the IC chip (10) on the first layer (2.1) is received in the aperture (40) of the second layer (2.2).

8. The method of paragraph 7, wherein the aperture (40) in the second layer (2.2) of the core structure (2) is a through-hole, and wherein the method further comprises the step of providing an adhesive in the region of the through-hole, thereby forming an adhesive connection between the IC chip (10) accommodated in the through-hole and the back-layer structure (3) when the second layer (2.2) of the core structure (2) is in contact with the back-layer structure (3).

9. The method as recited in any one of paragraphs 1 to 8, comprising the step of forming at least one of a front layer structure (1) and a rear layer structure (3) from a plurality of layers (1.1, 1.2, 1.3, 3.1, 3.2, 3.3).

10. The method of paragraph 9, wherein preferably at least one layer (1.3, 3.3) of the front layer structure or the back layer structure is white and one layer (1.2, 3.3) of the front layer structure or the back layer structure is provided with a printed pattern (P) visible from outside the stack.

11. The method as described in any one of paragraphs 1 to 10, comprising the steps of providing a release film on the front surface of the laminate and the back surface of the laminate prior to the lamination step and removing the release film after the lamination step.

12. The method of paragraph 11, wherein the barrier film comprises or is made of polyethylene terephthalate (PET).

13. The method of any one of paragraphs 1 to 12, wherein the front layer structure (1), the core layer structure (2) and the back layer structure (3) are laminated together by a single lamination process.

14. The method of paragraph 13, wherein one or more of the front layer structure (1), the core layer structure (2) and the back layer structure (3) comprises more than one layer, all layers (1.1, 1.2, 1.3, 2.1, 2.2, 3.1, 3.2, 3.3) of all layer structures (1, 2, 3) being laminated together by a single lamination process.

15. The method of any one of paragraphs 1 to 14, wherein the laminating step comprises a first heating step at a first heating temperature and a second heating step at a second heating temperature higher than the first heating temperature, followed by a cooling step.

16. The method of paragraph 15, wherein the first heating temperature is set in the range of 120 ℃ to 130 ℃ and the second heating temperature is set in the range of 140 ℃ to 150 ℃.

17. The method of paragraphs 15 or 16, wherein the first heating step is performed in a first laminator and the second heating step is performed in a second, additional laminator.

18. The method of any of paragraphs 15 to 17, wherein the pressure is increased during the first heating step and further increased during the second heating step and still further increased during the cooling step.

19. A multi-layer chip card comprising:

a core structure (2) having a front surface and a rear surface, wherein the core structure (2) comprises contact pads (20) on the front surface and further comprises an IC chip (10) and a conductor pattern, wherein the IC chip (10) and the contact pads (20) are electrically conductively connected to the conductor pattern and, seen in the front-rear direction, they do not overlap,

a front layer structure (1) on the front surface of the core layer structure (2), wherein the front layer structure (1) has a through-hole (5) whose cross-sectional shape substantially corresponds in size and position to the outer contour of the contact pad (20) on the front surface of the core layer structure (2),

-a back layer structure (3) on the back surface of the core layer structure (2), and

-a label (50) between the back layer structure (3) and the core layer structure (2), wherein the label (50) and the contact pad (20) overlap completely or at least to a large extent, seen in the front-back direction.

20. The multilayer chip card of paragraph 19, wherein the outer contour of the label (50) corresponds in size and location to the outer contour of the contact pads (20) on the front surface of the core structure (2).

21. The multi-layered chip card of paragraph 19 or 20, wherein the label (50) is made of polyethylene terephthalate glycol (PETG).

22. The multilayer chip card of any one of paragraphs 19 to 21, wherein the core layer structure (2) comprises a first layer (2.1) on which the IC chip (10) is mounted and a second layer (2.2) having an aperture (40), the IC chip (10) on the first layer (2.1) being received in the aperture (40).

23. The multi-layer chip card of any of paragraphs 19 to 22, wherein the core structure (2) includes an antenna (30) conductively coupled to the IC chip (10).

24. The multilayer chip card of paragraph 23, wherein the IC chip (10) and the contact pads (20) are disposed on a common substrate (2.1).

25. The multilayer chip card of paragraph 24, wherein the IC chip (10) and the contact pads (20) are disposed on opposite sides of the common substrate (2.1).

26. The multilayer chip card of any one of paragraphs 19 to 25, wherein the IC chip (10) and the contact pad (20) are disposed laterally spaced apart from one another.

Claims

1. A method of manufacturing a multi-layer chip card, comprising the steps of:

2. The method of claim 1, wherein the outer contour of the label (50) corresponds in size and position substantially to the outer contour of the contact pads (20) on the front surface of the core structure (2).

3. The method according to claim 1 or 2, wherein the thickness of the label (50) is selected to be equal to or greater than the thickness of the front layer structure (1), wherein preferably the thickness of the label (50) is selected to be 5% to 15% greater than the thickness of the front layer structure (1), and/or the thickness of the front layer structure (1) is selected to be 0.3 mm or less, and the thickness of the label (50) is selected to be 0.3 mm or more.

4. A method according to any one of claims 1 to 3, wherein the label (50) is made of ethylene glycol modified polyethylene terephthalate (PETG).

5. A method according to any one of claims 1 to 4, comprising the step of forming the core structure (2) from a first layer (2.1) on which the IC chip (10) is mounted and a second layer (2.2) having apertures (40), such that the IC chip (10) on the first layer (2.1) is accommodated in the apertures (40) of the second layer (2.2), wherein preferably the apertures (40) in the second layer (2.2) of the core structure (2) are through holes, and wherein the method further comprises the step of providing an adhesive in the area of the through holes, such that an adhesive connection is formed between the IC chip (10) accommodated in the through holes and the rear layer structure (3) when the second layer (2.2) of the core structure (2) is in contact with the rear layer structure (3).

6. A method according to any one of claims 1 to 5, comprising the step of forming at least one of the front layer structure (1) and the rear layer structure (3) from a plurality of layers (1.1, 1.2, 1.3, 3.1, 3.2, 3.3), wherein preferably at least one layer (1.3, 3.3) of the front layer structure or the rear layer structure is white and one layer (1.2, 3.3) of the front layer structure or the rear layer structure is provided with a printed pattern (P) visible from outside the stack.

7. A method as claimed in any one of claims 1 to 6, comprising the steps of providing a release film on the front surface of the stack and the back surface of the stack prior to the lamination step and removing the release film after the lamination step, wherein preferably the release film comprises or is made of polyethylene terephthalate (PET).

8. The method according to any one of claims 1 to 7, wherein the front layer structure (1), the core layer structure (2) and the rear layer structure (3) are laminated together by a single lamination process, more preferably, in case one or more of these layer structures comprises more than one layer, all layers (1.1, 1.2, 1.3, 2.1, 2.2, 3.1, 3.2, 3.3) of all layer structures (1, 2, 3) are laminated together by a single lamination process.

9. The method according to any one of claims 1 to 8, wherein the lamination process comprises a first heating step at a first heating temperature and a second heating step at a second heating temperature higher than the first heating temperature, followed by a cooling step, wherein preferably the first heating temperature is set in the range of 120 ℃ to 130 ℃, the second heating temperature is set in the range of 140 ℃ to 150 ℃, and/or the first heating step is performed in a first laminator and the second heating step is performed in a further second laminator.

10. The method of claim 9, wherein the pressure is increased during the first heating step and is further increased during the second heating step and is still further increased during the cooling step.

11. A multi-layer chip card comprising:

12. The multilayer chip card of claim 11, wherein the outer contour of the label (50) corresponds in size and position substantially to the outer contour of the contact pads (20) on the front surface of the core structure (2), and/or wherein the label (50) is made of polyethylene glycol modified polyethylene terephthalate (PETG).

13. The multilayer chip card of claim 11 or 12, wherein the core layer structure (2) comprises a first layer (2.1) on which the IC chip (10) is mounted and a second layer (2.2) having an aperture (40), the IC chip (10) on the first layer (2.1) being accommodated in the aperture (40).

14. The multilayer chip card according to any one of claims 11 to 13, wherein the core layer structure (2) comprises an antenna (30) in electrically conductive connection with an IC chip (10), wherein preferably the IC chip (10) and the contact pad (20) are arranged on a common substrate (2.1), more preferably the IC chip (10) and the contact pad (20) are arranged on opposite sides of the common substrate (2.1).

15. The multilayer chip card of any one of claims 11 to 14, wherein the IC chip (10) and the contact pad (20) are arranged laterally spaced apart from each other.