CN116029091A - Chip simulation method and device based on coherent transmission matrix method and computer equipment - Google Patents
Chip simulation method and device based on coherent transmission matrix method and computer equipment Download PDFInfo
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Abstract
The application relates to a chip simulation method, a device and computer equipment based on a coherent transmission matrix method, wherein the method comprises the following steps: a chip simulation system is constructed according to a switch unit arranged in a topological structure of a preset switching network; based on the optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit; and determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topology structure of a preset switching network. According to the method and the device, the problem that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of the single chip is solved, the chip simulation system is built based on the switch units, the performances corresponding to the switch units are simulated and analyzed, the performances of the chip simulation system are further determined, and the influence of the performances of the single switch in the whole chip simulation system can be clearly known.
Description
Technical Field
The present disclosure relates to the field of silicon-based optoelectronic chips, and in particular, to a chip simulation method, device and computer equipment based on a coherent transmission matrix method.
Background
In the age of information explosion nowadays, transmission, storage and exchange of information are still traditional optical-electrical-optical data exchange modes. The switching mode has the problems of high switching delay, small data bandwidth, large power consumption and the like. Therefore, the all-optical exchange of information will become a great trend in the future.
The all-optical switching mode adopts a topological structure of a large-scale chip array and a switching network to form a chip system, and the problem of the mode is that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of single chips.
Aiming at the problem that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of the single chips in the related technology, no effective solution is proposed at present.
Disclosure of Invention
In this embodiment, a method, an apparatus and a computer device for chip simulation based on a coherent transmission matrix method are provided, so as to solve the problem that in the related art, the chip system uncertainty is caused by the difference of the performances of the individual chips, so that the whole chip system presents an unknown state.
In a first aspect, in this embodiment, a chip simulation method based on a coherent transmission matrix method is provided, including:
a chip simulation system is constructed according to a switch unit arranged in a topological structure of a preset switching network;
based on an optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit;
and determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topological structure of the preset switching network.
In some of these embodiments, the method further comprises:
carrying out ion doping on one of the phase shift arms in the switch unit through carrier injection;
the switching unit is of an MZI structure and comprises a first MMI beam splitter, a phase shift arm and a second MMI beam splitter which are sequentially connected.
In some embodiments, the performing, based on the optical transmission matrix, a simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit includes:
determining performance parameters corresponding to each switch unit;
and according to the optical transmission matrix and the performance parameters, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit.
In some of these embodiments, the determining the performance parameter corresponding to each of the switching units includes:
selecting standard performance parameters of the switch unit;
and determining the performance parameter corresponding to each switch unit according to the standard performance parameter and the random fluctuation value.
In some of these embodiments, the expression of the optical transmission matrix is:
S MZI ＝S MMI1 S shift S MMI2 ；
wherein S is MZI An optical transmission matrix representing the switching elements; s is S MMI1 A transmission matrix representing a first MMI splitter; s is S shift Representing a transmission matrix of the phase shift arm; s is S MMI2 Representing the transmission matrix of the second MMI splitter.
In some of these embodiments, the method further comprises:
and setting a monitoring port in the chip simulation system, and correcting the static working point of the single switch unit based on a routing algorithm.
In some embodiments, the topology of the preset switching network is a topology of a Benes switching network.
In a second aspect, in this embodiment, there is provided a chip simulation apparatus based on a coherent transmission matrix method, including: the system comprises a construction module, an analysis module and a processing module;
the construction module is used for constructing a chip simulation system according to a switch unit arranged in a topological structure of a preset switching network;
the analysis module is used for carrying out simulation analysis on the performance of each switch unit based on the optical transmission matrix to obtain the performance corresponding to each switch unit;
the processing module is used for determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topological structure of the preset switching network.
In a third aspect, in this embodiment, there is provided a computer device, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor, where the processor executes the computer program to implement the chip emulation method based on the coherent transmission matrix method according to the first aspect.
In a fourth aspect, in this embodiment, there is provided a storage medium having stored thereon a computer program which, when executed by a processor, implements the coherent transmission matrix method-based chip emulation method of the first aspect described above.
Compared with the related art, the chip simulation method, the device and the computer equipment based on the coherent transmission matrix method provided in the embodiment construct a chip simulation system through the switch units arranged according to the topological structure of the preset switching network; based on the optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit; determining the performance of a chip simulation system according to the performance corresponding to each switch unit and the topology structure of a preset switching network; the method solves the problem that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of the single chip, realizes the construction of the chip simulation system based on the switch units, and realizes the simulation analysis of the performances corresponding to the switch units, thereby determining the performances of the chip simulation system and clearly knowing the influence of the performances of the single switch in the whole chip simulation system.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the other features, objects, and advantages of the application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:
FIG. 1 is a flow chart of a chip simulation method based on a coherent transmission matrix method according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a 16X16 chip simulation system provided in an embodiment of the present application;
FIG. 3 is a schematic diagram of a performance curve of a switching unit according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a performance curve of a switching unit according to another embodiment of the present application;
FIG. 5 is a schematic diagram of a performance curve of a switching unit according to still another embodiment of the present application;
FIG. 6 is a graph showing the result of the light intensity distribution of the input port 20 according to one embodiment of the present application;
FIG. 7 is a graph showing the result of the light intensity distribution of the input port 60 according to one embodiment of the present application;
FIG. 8 is a graph showing the result of the light intensity distribution of the middle input port 20 according to another embodiment of the present application;
FIG. 9 is a graph showing the result of the light intensity distribution of the middle input port 66 according to another embodiment of the present application;
FIG. 10 is a schematic diagram of monitoring-port-based test results provided in an embodiment of the present application;
fig. 11 is a block diagram of a chip simulation device based on a coherent transmission matrix method according to an embodiment of the present application.
In the figure: 210. constructing a module; 220. an analysis module; 230. and a processing module.
Detailed Description
For a clearer understanding of the objects, technical solutions and advantages of the present application, the present application is described and illustrated below with reference to the accompanying drawings and examples.
Unless defined otherwise, technical or scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terms "a," "an," "the," "these," and the like in this application are not intended to be limiting in number, but rather are singular or plural. The terms "comprising," "including," "having," and any variations thereof, as used in the present application, are intended to cover a non-exclusive inclusion; for example, a process, method, and system, article, or apparatus that comprises a list of steps or modules (units) is not limited to the list of steps or modules (units), but may include other steps or modules (units) not listed or inherent to such process, method, article, or apparatus. The terms "connected," "coupled," and the like in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference to "a plurality" in this application means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., "a and/or B" may mean: a exists alone, A and B exist together, and B exists alone. Typically, the character "/" indicates that the associated object is an "or" relationship. The terms "first," "second," "third," and the like, as referred to in this application, merely distinguish similar objects and do not represent a particular ordering of objects.
The method embodiments provided in the present embodiment may be executed in a terminal, a computer, or similar computing device. Such as on a terminal, which may include one or more processors and memory for storing data, where the processors may include, but are not limited to, a microprocessor MCU or a programmable logic device FPGA or the like. The terminal may further include a transmission device for a communication function and an input-output device.
The memory may be used to store a computer program, for example, a software program of application software and a module, such as a computer program corresponding to a chip emulation method based on a coherent transmission matrix method in the present embodiment, and the processor executes various functional applications and data processing by running the computer program stored in the memory, that is, implements the above-described method. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid state memory. In some examples, the memory may further include memory remotely located with respect to the processor, the remote memory being connectable to the terminal through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device is used for receiving or transmitting data via a network. The network includes a wireless network provided by a communication provider of the terminal. In one example, the transmission device includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through the base station to communicate with the internet. In one example, the transmission device may be an optical module for communicating wirelessly with the internet.
In this embodiment, a chip simulation method based on a coherent transmission matrix method is provided, and fig. 1 is a flowchart of the chip simulation method based on the coherent transmission matrix method in this embodiment, as shown in fig. 1, and the flowchart includes the following steps:
step S210, a chip simulation system is constructed according to a switch unit arranged in a topological structure of a preset switching network;
step S220, based on the optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit;
step S230, determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topology structure of the preset switching network.
Specifically, the chip simulation system is formed by connecting a plurality of switch units after the switch units are arranged according to the topological structure of a switching network. The switching network is pre-selected, which may be a Benes switching network, a reorderable non-blocking network. The corresponding topology is shown in fig. 2, corresponding to two banyan-type networks connected back-to-back, then the middle two stages are combined into one stage. If the total number of bus/total lines is N, the banyan network number is log2N, then the Benes network number is 2log2N-1. Then the chip emulation system may be a 16X16, 32X32, or 128X128 chip emulation system. A 16X16 chip emulation system refers to a 16 port input and a 16 port output. In other embodiments, the switching network may also be, without limitation, a topology of a Crossbar switching network, a butterfly interconnection topology of a Banyan switching network, and the like. The chip simulation system can transmit communication signals of 1310nm or 1550nm in the optical fiber.
The switching elements may be simulated as switching elements based on MZI (Mach-Zehnder interferometer ) structures. The phase difference transmitted by the light between the two arms of the phase shift arm in the switching unit forms interference constructive or destructive, and has a switching function. The performance of each switch unit can be simulated based on the simulation analysis of the performance of each switch unit by the optical transmission matrix; according to the corresponding performance of each switch unit and the topological structure of a preset switching network, the optical transmission relation between a single switch unit and the whole chip simulation system is simulated and analyzed, and then the performance of the chip simulation system is determined.
Through the steps, a chip simulation system is constructed according to a switch unit arranged in a topological structure of a preset switching network; based on the optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit, thereby simulating the performance of each switch unit; the chip simulation system is formed by connecting a plurality of switch units according to the topological structure of the switching network, and on the premise of simulating the performance of each switch unit, the optical transmission relation between a single switch unit and the whole chip simulation system is simulated and analyzed so as to further determine the performance of the chip simulation system, so that the influence of the performance of the single switch in the whole chip simulation system can be clearly known; the method solves the problem that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of the single chip in the related technology.
In some of these embodiments, the chip simulation method based on the coherent transmission matrix method further includes the following steps:
carrying out ion doping on one of the phase shift arms in the switch unit through carrier injection;
the switch unit is of an MZI structure and comprises a first MMI beam splitter, a phase shift arm and a second MMI beam splitter which are sequentially connected.
Specifically, the switch unit includes a first MMI beam splitter, a phase shift arm, and a second MMI beam splitter; the first MMI beam splitter, the phase shift arm and the second MMI beam splitter are connected in sequence.
The first MMI beam splitter and the second MMI beam splitter may have the same structure and parameters, and may be MMI beam splitters of 2X 2. That is to say that the first MMI splitter and the second MMI splitter each have two input ports and two output ports; in general, the two output ports of 2X2 are pi/2 out of phase. Depending on the actual design, the split ratio a of the two ports is different, i.e. the two output ports will have different proportions of light output (e.g. 1:9;1:1, etc.).
The phase shift arm comprises an upper arm and a lower arm, and one of the phase shift arms in the switch unit is ion doped through carrier injection. Such as: the upper arm is doped with ions to cause different material absorption coefficients of the upper arm, and the phase difference between the upper arm and the lower arm can be changed by applying voltage to form interference constructive or destructive, so that the switch unit has different states. The general switching unit has a pass-through state and a cross-over state: taking a 2X2 switching unit as an example: inputs are 1,2; the output is 1',2'. The through state is: 1 input, 1' output; or 2 in 2' out; the crossing state is: 1 input, 2' output; or 2 in 1' out.
In some embodiments, based on the optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit, including the following steps:
determining a performance parameter corresponding to each switching unit;
and performing simulation analysis on the performance of each switch unit according to the optical transmission matrix and the performance parameters to obtain the performance corresponding to each switch unit.
In particular, a set of performance parameters may be selected as standard performance parameters for the switching unit. The standard performance parameters are shown in table 1. In this embodiment, the standard performance parameter may be directly used as the performance parameter of each switch unit to simulate; and then, combining the optical transmission matrix to carry out simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit, and quickly simulating the switch units with various performances by adjusting standard performance parameters.
TABLE 1
Assuming that the first MMI beam splitter and the second MMI beam splitter in the switch unit have the same performance, the upper port beam splitting ratio and the lower port beam splitting ratio are both a: (1-a); the loss of the MMI beam splitter is alpha; phase difference between two output ports of MMI beam splitter
The upper and lower arms of the phase shift arm have losses of alpha respectively 1 And alpha 2 The carrier is injected into the upper arm of the phase shift arm in a carrier injection mode, so that the phase difference between the two arms is changed; loss of upper arm of phase shift arm alpha 3 . The phase difference of the two arms of the phase shift arm is +.>
The performance of a single switch is influenced by the combined action of standard performance parameters in table 1, the phase difference of the upper arm and the lower arm of the phase shift arm is changed by the action voltage, the simulation result is shown in fig. 3, and the abscissa of the graph is the action voltage; the ordinate is the optical power, and Bar represents the through state of the switch unit; cross represents the switching state of the switching element.
Wherein, the expression of the optical transmission matrix is:
S MZI ＝S MMI1 S shift S MMI2 ；
wherein S is MZI Representing optical transmission of a switching unitA matrix; s is S MMI1 A transmission matrix representing a first MMI splitter; s is S shift Representing a transmission matrix of the phase shift arm; s is S MMI2 Representing the transmission matrix of the second MMI splitter.
Wherein, the transmission matrix of the first MMI beam splitter is the same with the transmission matrix of the second MMI beam splitter, and the expression is:
wherein a is the beam splitting ratio of the upper arm and the lower arm of the beam splitter; alpha is the loss of the beam splitter;
the phase difference is the phase difference between two output ports of the beam splitter.
The expression of the transmission matrix of the phase shift arm is as follows:
wherein, the liquid crystal display device comprises a liquid crystal display device,
the phase difference of the upper arm and the lower arm of the phase shift arm; alpha 1 Loss of the upper arm, which is the phase shift arm; alpha 2 Is the loss of the lower arm of the phase shift arm.
Wherein, a single switch unit inputs the light intensity E at the input end i1 And E is i2 At the time, the output end outputs the light intensity E o1 And E is o2 Can be expressed as:
since the coherent matrix transmission method is an optical path transmission simulation taking into account the phase terms, not a simple light intensity superposition. The phase item is always reserved in the subsequent chip simulation system, and only the output port can be converted into light intensity, which is similar to the transmission of light in an actual chip; the influence of the performance of a single switch in the whole chip simulation system can be clearly known; and further determines the performance of the chip emulation system.
In some of these embodiments, to be able to simulate the effect of the manufacturing errors of the switching units on the performance parameters of the respective switching units, determining the performance parameters corresponding to each switching unit comprises the following steps:
selecting standard performance parameters of the switch unit;
and determining the performance parameter corresponding to each switch unit according to the standard performance parameter and the random fluctuation value.
Specific: the random fluctuation parameter may be applied to each parameter in table 1 or may be applied to a part of the parameters. Such as: the performance parameter after adjustment according to the random fluctuation value is a=0.45; α=0.9;
α 1 ＝0.5；α 2 ＝0.5；/>
α 3 =0.5. The performance curves obtained by the different performance parameter simulation switch units are shown in fig. 4 and 5. It should be noted that: alpha in FIG. 4 3 =0.5; alpha in FIG. 5 3 =0.2; the difference between fig. 4 and fig. 5 is +.>
And alpha 3 Different. Wherein (1)>
The phase difference between the upper and lower arms of the phase shift arm is mainly influenced by the deflection of the initial state of the switch unit. />
The initial state of the switch unit is biased to the exchange state; />
The initial state of the switch unit is biased to the pass-through state, as shown by two curves at voltageThe optical power at 0V. Wherein alpha is 3 Representing the loss of the upper arm of the phase shift arm, mainly affecting the extinction ratio of the switching unit.
As can be seen from the above performance graphs, the phase difference of MMI beam splitters is generally defaulted
And/2, the phase shift arms have the same loss in the initial state. It can be found that the losses of the MMI splitter, the magnitude of the losses of the upper and lower arms of the phase shift arm only affect the overall losses of the individual switches; the extinction ratio of different states of the switch unit, the initial state of the switch and the like are affected by the difference of the initial phase difference of the two arms of the phase shift arm and the difference of the absorption coefficient of the material caused by ion doping, so that the performance of the switch unit is the most important performance.
In this example, standard performance data is selected as the simulation parameter, the performance is shown in fig. 5, the overall loss of the switch is about 3dB, the extinction ratio of the switch is about 20dB, the initial state is the intermediate state of the switch, and the extinction ratio of the switch in the pass-through state is slightly worse than that in the cross state.
The initial phase difference of the phase shift arm is pi/2; and (3) constructing a 128×128 optical switching chip simulation system according to the topological structure of the Benes switching network by using the standard performance parameters in Table 1. The performance parameter of each switch unit is a random fluctuation value which is increased and decreased on the basis of the standard performance parameter to simulate COMS process errors; the resulting light intensity distribution of the input port 20 is shown in fig. 6 and the light intensity distribution of the input port 66 is shown in fig. 7. Due to
The light intensity distribution of the two output ports representing the switch unit is about 1:1, so that the light intensity distribution of the whole chip simulation system is relatively average. The method can simulate the optical transmission condition of the chip input by any port, and only 2 ports are randomly selected due to the spread problem.
With the initial phase difference of the phase shift arm being 0; i.e. the switching units are all in a crossed state. 128X128 optical cross-over built according to the topology of the Benes switching network using the standard performance parameters of Table 1And (5) replacing the chip simulation system. The performance parameter of each switch unit is a random fluctuation value which is increased and decreased on the basis of the standard performance parameter to simulate COMS process errors; the resulting light intensity distribution of the input port 20 is shown in fig. 8 and the light intensity distribution of the input port 66 is shown in fig. 9.
When it is indicated that the optical path only passes through some specific paths.
In this embodiment, under the same port input, the initial phase difference of the two arms is different, and the optical power distribution of each output port in the chip simulation system is greatly different. On one hand, the influence of two different initial phase differences on the optical power distribution of the whole chip simulation system can be compared; on the other hand, the output performance of the whole chip simulation system designed by the performance parameters can be determined a priori by using the method.
In some of these embodiments, the chip simulation method based on the coherent transmission matrix method further includes the following steps:
and setting a monitoring port in the chip simulation system, and correcting the static working point of the single switch unit based on a routing algorithm.
Specifically, according to the setting and route searching of the monitoring port, the static working characteristics of all the switch units under the monitoring port can be simulated. According to the routing algorithm, the state change of the switch under the current route can be realized, and the performance of the chip system can be obtained. Such as: using a 16x16 chip simulation system, as shown in fig. 1, the minimum value of optical power represents the optimum operating voltage in the pass-through state, and the maximum value of optical power represents the optimum operating voltage in the cross state, based on the test results of the monitor ports, as shown in fig. 10, according to the selected paths and the monitor ports (M1-M8). A method of setting up the monitoring port is described that can be used to verify the static operating point of a single switch.
It should be noted that the steps illustrated in the above-described flow or flow diagrams of the figures may be performed in a computer system, such as a set of computer-executable instructions, and that, although a logical order is illustrated in the flow diagrams, in some cases, the steps illustrated or described may be performed in an order other than that illustrated herein.
In this embodiment, a chip simulation device based on a coherent transmission matrix method is further provided, and the device is used to implement the foregoing embodiments and preferred embodiments, which are not described in detail. The terms "module," "unit," "sub-unit," and the like as used below may refer to a combination of software and/or hardware that performs a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware, are also possible and contemplated.
Fig. 11 is a block diagram of a chip simulation apparatus based on a coherent transmission matrix method according to this embodiment, and as shown in fig. 11, the apparatus includes: a construction module 210, an analysis module 220, and a processing module 230; the construction module 210 is configured to construct a chip simulation system according to a switch unit set in a topology structure of a preset switching network; the analysis module 220 is configured to perform simulation analysis on the performance of each switch unit based on the optical transmission matrix, so as to obtain performance corresponding to each switch unit; the processing module 230 is configured to determine the performance of the chip simulation system according to the performance corresponding to each switch unit and the topology structure of the preset switching network.
By the device, the problem that the whole chip system presents an unknown state due to the uncertainty of the chip system caused by the difference of the performances of the single chip is solved, the chip simulation system is built based on the switch units, the performances corresponding to the switch units are simulated and analyzed, the performances of the chip simulation system are further determined, and the influence of the performances of the single switch in the whole chip simulation system can be clearly known.
In some embodiments, the chip simulation device based on the coherent transmission matrix method further comprises a doping module; the doping module is used for carrying out ion doping on one of the phase shift arms in the switch unit through carrier injection; the switch unit is of an MZI structure and comprises a first MMI beam splitter, a phase shift arm and a second MMI beam splitter which are sequentially connected.
In some of these embodiments, the analysis module 220 is further configured to determine a performance parameter corresponding to each of the switching units; and performing simulation analysis on the performance of each switch unit according to the optical transmission matrix and the performance parameters to obtain the performance corresponding to each switch unit.
In some embodiments, the analysis module 220 is further configured to select a standard performance parameter of the switching unit; and determining the performance parameter corresponding to each switch unit according to the standard performance parameter and the random fluctuation value.
In some of these embodiments, the expression for the optical transmission matrix is:
S MZI ＝S MMI1 S shift S MMI2 ；
wherein S is MZI An optical transmission matrix representing the switching elements; s is S MMI1 A transmission matrix representing a first MMI splitter; s is S shift Representing a transmission matrix of the phase shift arm; s is S MMI2 Representing the transmission matrix of the second MMI splitter.
In some embodiments, the chip simulation device based on the coherent transmission matrix method further comprises a setting module; the setting module is used for setting a monitoring port in the chip simulation system and correcting the static working point of the single switch unit based on the routing algorithm.
In some of these embodiments, the topology of the preset switching network is the topology of a Benes switching network.
The above-described respective modules may be functional modules or program modules, and may be implemented by software or hardware. For modules implemented in hardware, the various modules described above may be located in the same processor; or the above modules may be located in different processors in any combination.
There is also provided in this embodiment a computer device comprising a memory in which a computer program is stored and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
Optionally, the computer device may further include a transmission device and an input/output device, where the transmission device is connected to the processor, and the input/output device is connected to the processor.
Alternatively, in the present embodiment, the above-described processor may be configured to execute the following steps by a computer program:
s1, a chip simulation system is built according to a switch unit arranged in a topological structure of a preset switching network;
s2, performing simulation analysis on the performance of each switch unit based on the optical transmission matrix to obtain the performance corresponding to each switch unit;
s3, determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topology structure of a preset switching network.
It should be noted that, specific examples in this embodiment may refer to examples described in the foregoing embodiments and alternative implementations, and are not described in detail in this embodiment.
In addition, in combination with the chip simulation method based on the coherent transmission matrix method provided in the above embodiment, a storage medium may be provided in this embodiment. The storage medium has a computer program stored thereon; the computer program, when executed by a processor, implements any of the chip emulation methods of the above embodiments based on a coherent transmission matrix method.
It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to be limiting. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present application, are within the scope of the present application in light of the embodiments provided herein.
It is evident that the drawings are only examples or embodiments of the present application, from which the present application can also be adapted to other similar situations by a person skilled in the art without the inventive effort. In addition, it should be appreciated that while the development effort might be complex and lengthy, it would nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and thus should not be construed as an admission of insufficient detail.
The term "embodiment" in this application means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive. It will be clear or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the patent. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (10)
1. A chip simulation method based on a coherent transmission matrix method is characterized by comprising the following steps:
a chip simulation system is constructed according to a switch unit arranged in a topological structure of a preset switching network;
based on an optical transmission matrix, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit;
and determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topological structure of the preset switching network.
2. The method for chip simulation based on the coherent transmission matrix method according to claim 1, further comprising:
carrying out ion doping on one of the phase shift arms in the switch unit through carrier injection;
the switching unit is of an MZI structure and comprises a first MMI beam splitter, a phase shift arm and a second MMI beam splitter which are sequentially connected.
3. The chip simulation method based on the coherent transmission matrix method according to claim 2, wherein the performing a simulation analysis on the performance of each of the switching units based on the optical transmission matrix to obtain the performance corresponding to each of the switching units includes:
determining performance parameters corresponding to each switch unit;
and according to the optical transmission matrix and the performance parameters, performing simulation analysis on the performance of each switch unit to obtain the performance corresponding to each switch unit.
4. A chip simulation method based on a coherent transmission matrix method according to claim 3, wherein said determining a performance parameter corresponding to each of said switching units comprises:
selecting standard performance parameters of the switch unit;
and determining the performance parameter corresponding to each switch unit according to the standard performance parameter and the random fluctuation value.
5. The chip simulation method based on the coherent transmission matrix method according to claim 3, wherein the expression of the optical transmission matrix is:
S MzI ＝S MMI1 S shift S MMI2 ；
wherein S is MZI An optical transmission matrix representing the switching elements; s is S MMI1 A transmission matrix representing a first MMI splitter; s is S shift Representing a transmission matrix of the phase shift arm; s is S MMI2 Representing the transmission matrix of the second MMI splitter.
6. The method for chip simulation based on the coherent transmission matrix method according to claim 1, further comprising:
and setting a monitoring port in the chip simulation system, and correcting the static working point of the single switch unit based on a routing algorithm.
7. The chip simulation method based on the coherent transmission matrix method according to claim 1, wherein the topology of the preset switching network is a topology of a Benes switching network.
8. A chip simulation device based on a coherent transmission matrix method, comprising: the system comprises a construction module, an analysis module and a processing module;
the construction module is used for constructing a chip simulation system according to a switch unit arranged in a topological structure of a preset switching network;
the analysis module is used for carrying out simulation analysis on the performance of each switch unit based on the optical transmission matrix to obtain the performance corresponding to each switch unit;
the processing module is used for determining the performance of the chip simulation system according to the performance corresponding to each switch unit and the topological structure of the preset switching network.
9. A computer device comprising a memory and a processor, characterized in that the memory has stored therein a computer program, the processor being arranged to run the computer program to perform the steps of the coherent transmission matrix method based chip emulation method of any one of claims 1 to 7.
10. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the coherent transmission matrix method based chip emulation method according to any one of claims 1 to 7.
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