CN116015276A - Digital capacitance isolator - Google Patents
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- CN116015276A CN116015276A CN202211686277.5A CN202211686277A CN116015276A CN 116015276 A CN116015276 A CN 116015276A CN 202211686277 A CN202211686277 A CN 202211686277A CN 116015276 A CN116015276 A CN 116015276A
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Abstract
The invention discloses a digital capacitance isolator, which comprises a signal modulation and transmission module, an isolation capacitance module, a common mode transient immunity enhancement module and a signal receiving and demodulation module, wherein the signal modulation and transmission module is positioned in a first voltage domain and is used for modulating and converting an input signal into a fully differential signal and then transmitting the fully differential signal to the common mode transient immunity enhancement module and the signal receiving and demodulation module positioned in a second voltage domain through the isolation capacitance module, the common mode transient immunity enhancement module is used for reducing common mode interference in the fully differential signal, and the receiving and demodulation module is used for demodulating and restoring the fully differential signal into an original input signal. The invention can effectively improve the common mode transient impulse immunity (CMTIs) of the isolator, and can improve the CMTIs to 500kV/us, namely, under the CMTIs of 500kV/us, input signals can be normally transmitted.
Description
Technical Field
The invention belongs to the technical field of isolation device design, and particularly relates to a digital capacitance isolator.
Background
The digital isolator can be divided according to different isolating mediumsIs an optical coupler isolator, a magnetic coupler isolator and a capacitance isolator. By SiO 2 The capacitive isolator used as the isolation medium adopts a standard CMOS process and has the advantages of high transmission rate, low delay, long service life, high withstand voltage and the like.
The digital isolator generally comprises a transmitting end (i.e. a modulating module), a receiving end (i.e. a demodulating module) and an isolating capacitor module, wherein the transmitting end modulates a transmission signal into a signal which can pass through an isolating capacitor, the receiving end demodulates the signal which passes through the isolating capacitor back into the transmission signal, the isolating capacitor is connected with the transmitting end and the receiving end, and the modulating and demodulating scheme is generally divided into two schemes of pulse modulation and OOK modulation.
The CMTI refers to a common mode transient signal suppression degree, two ends of the isolator are in different voltage domains, signals are transmitted from one voltage domain to the other voltage domain, common mode transient signals can be generated at the receiving end, different voltage rising rates can generate common mode transient signals with different magnitudes, the common mode transient signals can generate common mode rotating differential modes at the receiving end and influence direct current working points, and therefore misjudgment is caused.
To avoid erroneous decisions, increasing the isolator CMTI index becomes one of the key indicators of isolator design. As disclosed in chinese patent publication No. CN114244347a, a CMT suppression circuit for a four-port isolator and a four-port isolator are proposed, which also react by detecting CMT events, but the detection is complex, the time is long, and the CMT cannot respond to instantaneous CMT, and only a bleeder circuit is provided without a complementary circuit. Another example is chinese patent application publication No. CN112019206a, which proposes a digital isolator that reduces the low frequency CMT signal by filtering, but does not work for the high frequency CMT signal.
Disclosure of Invention
In view of the above, the present invention provides a digital capacitive isolator, which can effectively improve the common mode transient impulse immunity (CMTI) of the isolator.
A digital capacitance isolator comprises a signal modulation transmitting module, an isolation capacitance module, a common mode transient immunity enhancing module and a signal receiving demodulation module, wherein:
the signal modulation and transmission module is positioned in a first voltage domain and is used for modulating and converting an input signal into a fully differential signal and then transmitting the fully differential signal to the common mode transient immunity enhancement module and the signal receiving and demodulation module which are positioned in a second voltage domain through the isolation capacitor module;
the common mode transient immunity enhancement module is used for reducing common mode interference in the fully differential signal;
the receiving demodulation module is used for demodulating and restoring the fully-differential signal into the original input signal.
Further, the common mode transient immunity enhancement module includes:
a common mode transient signal detection circuit for detecting a common mode transient pulse signal (i.e., a common mode current) in the fully differential signal;
the common mode transient signal processing circuit is used for judging the magnitude and the positive and negative of the common mode transient pulse signal and controlling the working state of the common mode transient immunity enhancement execution circuit based on the judging result;
and the common mode transient immunity enhancement execution circuit is used for reducing the common mode current flowing into the signal receiving demodulation module or compensating the common mode current flowing out of the signal receiving demodulation module.
Further, when no common mode transient pulse signal appears, the common mode transient signal detection circuit, the common mode transient signal processing circuit and the common mode transient immunity enhancement execution circuit are all in a closed state; when the common mode transient pulse signal appears, the common mode transient signal detection circuit, the common mode transient signal processing circuit and the common mode transient immunity enhancement execution circuit can be started and responded instantly.
Further, the common mode transient signal detection circuit comprises a positive common mode transient signal detection circuit and a negative common mode transient signal detection circuit; the common mode transient signal detection circuit has a working threshold, the positive common mode transient signal detection circuit has a positive threshold, and the negative common mode transient signal detection circuit has a negative threshold; when the positive common mode transient signal detection circuit detects that the positive common mode transient pulse signal is lower than a positive threshold value, the signal is not detected; when the positive common mode transient pulse signal is detected to be higher than a positive threshold value, the positive common mode transient signal detection circuit outputs the signal; when the negative common mode transient signal detection circuit detects that the negative common mode transient pulse signal is higher than a negative threshold value, the signal is not detected; when the negative common mode transient pulse signal is detected to be lower than a negative threshold value, the negative common mode transient signal detection circuit outputs the signal; therefore, the common mode transient signal detection circuit can detect a positive common mode transient pulse signal and a negative common mode transient pulse signal, respectively.
Further, the common mode transient signal detection circuit adopts two comparators as detection devices of a positive common mode transient signal and a negative common mode transient signal respectively; the positive input end of the comparator for detecting the positive common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end of the comparator is connected with a positive threshold voltage of fixed bias, the output end of the comparator is connected with the common mode transient signal processing circuit, when the positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator outputs a turnover signal to the common mode transient signal processing circuit, and when no positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator keeps outputting a normal signal to the common mode transient signal processing circuit; the positive input end of the comparator for detecting the negative common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end of the comparator is connected with a negative threshold voltage of fixed bias, the output end of the comparator is connected with the common mode transient signal processing circuit, when the negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator outputs a turnover signal to the common mode transient signal processing circuit, and when no negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator keeps outputting a normal signal to the common mode transient signal processing circuit.
Further, the common mode transient signal processing circuit comprises a positive common mode transient processing circuit and a negative common mode transient processing circuit which are internally provided with an anti-shake circuit; the positive common mode transient processing circuit receives and processes the signal output by the positive common mode transient pulse signal detection circuit, and the negative common mode transient processing circuit receives and processes the signal transmitted by the negative common mode transient pulse signal detection circuit; when the positive common mode transient signal detection circuit detects a positive common mode transient pulse signal, the corresponding positive common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and the common mode transient immunity enhancement execution circuit enters a working state through the internal anti-shake circuit and exits the working state after being kept for a fixed period of time; when the negative common mode transient signal detection circuit detects a negative common mode transient pulse signal, the corresponding negative common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and the common mode transient immunity enhancement execution circuit enters a working state through the internal anti-shake circuit and exits the working state after being kept for a fixed period of time; in addition, the common mode transient signal processing circuit can also enter the working state through the anti-shake circuit and follow the detected common mode transient pulse signal, and the working state is exited when the common mode transient pulse signal disappears.
Further, the common mode transient signal processing circuit controls and controls the working state of the common mode transient immunity enhancement execution circuit through the current switch, and when the common mode transient signal detection circuit detects a common mode transient pulse signal, the common mode transient signal processing circuit controls and opens the current switch to increase the current flowing through the common mode transient immunity enhancement execution circuit so as to realize the function of current pulling or current filling of the common mode transient immunity enhancement execution circuit.
Further, the common mode transient immunity enhancement execution circuit comprises a positive common mode transient signal variable impedance and a negative common mode transient signal variable impedance; when a positive common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit pulls down common mode current from the input end of the signal receiving demodulation module to the ground through the variable impedance of the positive common mode transient signal, and reduces the common mode current flowing into the signal receiving demodulation module; when a negative common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit downwards pumps common mode current from a power supply to the input end of the signal receiving demodulation module through the variable impedance of the negative common mode transient signal to compensate the common mode current flowing out of the signal receiving demodulation module.
Further, the common mode transient immunity enhancement execution circuit can dynamically change with the common mode transient pulse signal by pulling down or down the current through the variable impedance of the common mode transient signal.
Furthermore, the common mode transient signal variable impedance has the characteristics of low direct current impedance and high alternating current impedance, and can be realized by adopting a controlled current source.
Further, the common mode transient immunity enhancement execution circuit adopts two controlled current sources H1 and H2 as positive common mode transient signal variable impedance and negative common mode transient signal variable impedance respectively, the positive end of the controlled current source H1 is connected with the input end of the signal receiving demodulation module, the negative end is grounded, when the positive common mode transient signal detection circuit detects a positive common mode transient pulse signal, the positive common mode transient processing circuit increases the current flowing into the controlled current source H1, and the controlled current source H1 amplifies the current and pulls the current down to the ground from the input end of the signal receiving demodulation module; the positive end of the controlled current source H2 is connected with a power supply, the negative end of the controlled current source H2 is connected with the input end of the signal receiving and demodulating module, and when the negative common mode transient state signal detection circuit detects a negative common mode transient state pulse signal, the negative common mode transient state processing circuit increases the current flowing into the controlled current source H2, and the controlled current source H2 amplifies the current and downwards sinks the current from the power supply to the input end of the signal receiving and demodulating module; the current magnitudes of the controlled current sources H1 and H2 dynamically change with the magnitudes of the positive common mode transient pulse signal and the negative common mode transient pulse signal, respectively.
Further, due to the differential structure, the common mode transient immunity enhancement module comprises two sets of symmetrical common mode transient signal detection circuits, a common mode transient signal processing circuit and a common mode transient immunity enhancement execution circuit which are sequentially connected and then respectively connected to the normal phase input end and the reverse phase input end of the signal receiving demodulation module, and meanwhile, the current flowing through the normal phase input end and the reverse phase input end is the duplicated common mode current.
Further, the common mode transient immunity enhancement execution circuit pulls down the current to the ground from the positive input end of the signal receiving demodulation module and the current to the ground from the negative input end of the signal receiving demodulation module are duplicated common mode currents, and simultaneously pull down the currents to the ground and have the same size; the common mode transient immunity enhancement execution circuit is characterized in that the current from the power supply to the positive input end of the signal receiving demodulation module and the current from the power supply to the negative input end of the signal receiving demodulation module are duplicated common mode currents, and the current is downwards applied and the sizes are the same.
Further, the signal receiving demodulation module is formed by sequentially connecting a pre-amplifier, an envelope comparator and a front edge blanking circuit, wherein the pre-amplifier is used for inhibiting a common mode signal from amplifying a differential mode signal, and the full-differential grid cross coupling method is adopted to change the equivalent transconductance into two times of the original transconductance so as to improve the differential mode gain and offset the common mode gain, so that the full-differential grid cross coupling not only improves the gain but also improves the CMTI performance of the isolator; the envelope comparator is used for demodulating and restoring the amplified fully-differential signal into the input signal received by the signal modulation and transmission module, and the leading edge blanking circuit is used for eliminating leading edge burrs in the signal.
Furthermore, the signal modulation and transmission module adopts an OOK modulation scheme, and simultaneously converts an input signal into a fully differential signal for transmission, and the fully differential signal can greatly improve the common mode rejection ratio.
The invention can effectively improve the common mode transient impulse immunity (CMTIs) of the isolator, and can improve the CMTIs to 500kV/us, namely, under the CMTIs of 500kV/us, input signals can be normally transmitted.
Drawings
Fig. 1 is a functional block diagram of a digital isolator of the present invention.
Fig. 2 is a schematic diagram of CMTI.
Fig. 3 is a schematic structural diagram of a common mode transient immunity enhancement module.
Fig. 4 is a schematic waveform diagram of a common mode transient signal processing circuit.
Fig. 5 is another waveform schematic diagram of a common mode transient signal processing circuit.
Fig. 6 is a schematic structural diagram of a signal modem module.
Detailed Description
In order to more particularly describe the present invention, the following detailed description of the technical scheme of the present invention is provided with reference to the accompanying drawings and the specific embodiments.
As shown in fig. 1, the digital isolator mainly comprises a signal modulation and transmission module, an isolation capacitor module, a common mode transient immunity enhancement module and a signal receiving and demodulation module, wherein the signal modulation and transmission module is connected with the isolation capacitor module, and the isolation capacitor module is simultaneously connected with the common mode transient immunity enhancement module and the signal receiving and demodulation module. The input signal is converted into a fully differential signal through a signal modulation and transmission module TX and is transmitted to an isolation capacitor module, the fully differential signal is transmitted to a common mode transient immunity enhancement module through the isolation capacitor module, the common mode transient immunity enhancement module processes common mode current, and meanwhile, the differential mode signal is transmitted to improve the CMTI of the digital isolator; the fully differential signal is retransmitted to a signal receiving demodulation module, which suppresses the common mode signal, amplifies the differential mode signal and restores the signal by an envelope comparator.
FIG. 2 shows the principle of CMTIs, which is stimulated by the voltage difference between the grounds of different voltage domains CM An input signal and an output signal. The isolator is in different voltage domains, signals are transmitted from one side voltage domain to the other side voltage domain, common mode transient pulses can be generated at the receiving end, common mode transient pulses with different magnitudes can be generated at different voltage rising rates, the common mode transient pulses can be equivalent by using a voltage difference excitation model, and the common mode transient pulses can generate differential mode influences to cause error codes and even damage the circuit. In FIG. 2, the voltage domain, i.e., voltage difference, excitation V across the isolator is shown CM When the signal rises and falls at a certain rate, a high-level signal is input, an output signal is also high, and the error code is within the requirement, namely, the common mode transient signal suppression degree can meet the voltage domain change of the rate.
As shown in fig. 3, the common mode transient immunity enhancement module mainly comprises a common mode transient signal detection circuit, a common mode transient signal processing circuit, and a common mode transient immunity enhancement execution circuit, wherein the common mode transient signal detection circuit can be composed of a comparator COMP 1 、COMP 2 、COMP 3 、COMP 4 A positive fixed threshold and a negative fixed threshold; common mode transient signal processing circuit routing digital processing P 1 、P 2 Composition; the common mode transient immunity enhancement execution circuit consists of controlled sources I1, I2, I3 and I4; signal transmission relies on isolation capacitance C 1 、C 2 And sampling resistor R in signal receiving demodulation module 1 、R 2 。
When positive common mode transient occursWhen in state signal, the resistor R is sampled 1 、R 2 To accumulate the positive high voltage at the same time, if the positive high voltage is lower than the positive fixed threshold value, the comparator COMP 3 、COMP 4 Output remains unchanged, digital processing P 2 Non-working, controlled current source I 3 、I 4 The method is not started, at the moment, the whole common mode transient immunity enhancement module is shielded, and the fully differential signal is normally transmitted to the signal receiving demodulation module; if the forward high voltage is higher than the positive fixed threshold, the comparator COMP 3 、COMP 4 Output inversion, digital processing P 2 Operating, controlled current source I 3 、I 4 Turned on with controlled current source I 3 、I 4 The current magnitude of (1) is dependent on the sampling resistor R 1 、R 2 The magnitude of the upper forward high voltage is dynamically changed, at the moment, common mode current components in the fully differential signals are pulled away, and the rest fully differential signals are transmitted to the signal receiving demodulation module. Controlled current source I 3 、I 4 And simultaneously pull down and are the same size.
Sampling resistor R when negative common mode transient signal appears 1 、R 2 And simultaneously accumulate negative high voltage, if the negative high voltage is higher than the negative fixed threshold, the comparator COMP 1 、COMP 2 Output remains unchanged, digital processing P 1 Non-working, controlled current source I 1 、I 2 The method is not started, at the moment, the whole common mode transient immunity enhancement module is shielded, and the fully differential signal is normally transmitted to the signal receiving demodulation module; if the negative high voltage is lower than the negative fixed threshold, the comparator COMP 1 、COMP 2 Output inversion, digital processing P 1 Operating, controlled current source I 1 、I 2 Turned on with controlled current source I 1 、I 2 The current magnitude of (1) is dependent on the sampling resistor R 1 、R 2 The magnitude of the upper forward high voltage is dynamically changed, at the moment, common mode current components in the fully differential signals are pulled away, and the rest fully differential signals are transmitted to the signal receiving demodulation module. Controlled current source I 1 、I 2 And simultaneously the same magnitude.
FIG. 4 shows a common mode transient signal processing circuit waveThe voltage of the signal receiving demodulation input end is the sampling resistor R 1 、R 2 Voltage accumulated on R when common mode transient signal exists 1 、R 2 The voltage accumulated on the capacitor will change, R is when there is a positive common mode transient signal 1 、R 2 The accumulated voltage is positive voltage, when a negative common mode transient signal exists, the accumulated voltage is negative voltage, and the voltage is compared with a positive fixed threshold value and a negative fixed threshold value; the input end of the positive common mode transient signal processing circuit is comparator COMP 3 、COMP 4 When sampling resistor R 1 、R 2 When the voltage accumulated on the comparator COMP is higher than the positive fixed threshold 3 、COMP 4 Outputting high level, and simultaneously, some burr jitter exists; the output end of the positive digital processing circuit is digital processing P 2 Comprises an anti-jitter circuit and a current switch control circuit, and when a high level signal is detected, the control is performed on the controlled current source I 3 、I 4 The current switch control signal of (1) is started for a fixed T time, and burrs are filtered, so that jitter is prevented; the input end of the negative common mode transient signal processing circuit is comparator COMP 1 、COMP 2 When sampling resistor R 1 、R 2 When the voltage accumulated on the comparator COMP is lower than the negative fixed threshold value 1 、COMP 2 Outputting high level, and simultaneously, some burr jitter exists; the output end of the negative digital processing circuit is digital processing P 1 Comprises an anti-jitter circuit and a current switch control circuit, and when a high level signal is detected, the control is performed on the controlled current source I 1 、I 2 The current switch control signal of (2) is turned on for a fixed T time while filtering burrs to prevent jitter.
FIG. 5 shows another waveform of a common mode transient signal processing circuit, in which the signal is received and demodulated at the input voltage, i.e., the sampling resistor R 1 、R 2 Voltage accumulated on R when common mode transient signal exists 1 、R 2 The voltage accumulated on the capacitor will change, R is when there is a positive common mode transient signal 1 、R 2 The accumulated voltage is positive voltage, and negative voltage when there is a negative common mode transient signalSimultaneously comparing the voltage with a positive fixed threshold and a negative fixed threshold; the input end of the positive common mode transient signal processing circuit is comparator COMP 3 、COMP 4 When sampling resistor R 1 、R 2 When the voltage accumulated on the comparator COMP is higher than the positive fixed threshold 3 、COMP 4 Outputting high level, and simultaneously, some burr jitter exists; the output end of the positive digital processing circuit is digital processing P 2 Comprises an anti-jitter circuit and a current switch control circuit, and when a high level signal is detected, the control is performed on the controlled current source I 3 、I 4 The time when the current switch control signal of (a) is turned on follows the duration of the common mode transient signal, and when the common mode transient signal is finished, the controlled current source I 3 、I 4 The current switch control signal of (2) is closed, and burrs are filtered, so that jitter is prevented; the input end of the negative common mode transient signal processing circuit is comparator COMP 1 、COMP 2 When sampling resistor R 1 、R 2 When the voltage accumulated on the comparator COMP is lower than the negative fixed threshold value 1 、COMP 2 Outputting high level, and simultaneously, some burr jitter exists; the output end of the negative digital processing circuit is digital processing P 1 Comprises an anti-jitter circuit and a current switch control circuit, and when a high level signal is detected, the control is performed on the controlled current source I 1 、I 2 The time when the current switch control signal of (a) is turned on follows the duration of the common mode transient signal, and when the common mode transient signal is finished, the controlled current source I 1 、I 2 The current switch control signal of (2) is turned off, and simultaneously, burrs are filtered to prevent jitter.
As shown in fig. 6, the signal receiving and demodulating module includes a pre-amplifier, an envelope comparator and a front-edge blanking circuit, the pre-amplifier circuit suppresses the common-mode signal and amplifies the differential-mode signal, the envelope comparator demodulates and restores the fully differential signal amplified by the pre-amplifier into the input signal received by the modulating and transmitting module, and the front-edge blanking circuit filters the front-edge burr.
The embodiments described above are described in order to facilitate the understanding and application of the present invention to those skilled in the art, and it will be apparent to those skilled in the art that various modifications may be made to the embodiments described above and that the general principles described herein may be applied to other embodiments without the need for inventive faculty. Therefore, the present invention is not limited to the above-described embodiments, and those skilled in the art, based on the present disclosure, should make improvements and modifications within the scope of the present invention.
Claims (10)
1. A digital capacitive isolator characterized by: the system comprises a signal modulation and transmission module, an isolation capacitor module, a common mode transient immunity enhancement module and a signal receiving and demodulation module, wherein:
the signal modulation and transmission module is positioned in a first voltage domain and is used for modulating and converting an input signal into a fully differential signal and then transmitting the fully differential signal to the common mode transient immunity enhancement module and the signal receiving and demodulation module which are positioned in a second voltage domain through the isolation capacitor module;
the common mode transient immunity enhancement module is used for reducing common mode interference in the fully differential signal;
the receiving demodulation module is used for demodulating and restoring the fully-differential signal into the original input signal.
2. The digital capacitive isolator of claim 1, wherein: the common mode transient immunity enhancement module comprises:
the common mode transient signal detection circuit is used for detecting a common mode transient pulse signal in the fully differential signal;
the common mode transient signal processing circuit is used for judging the magnitude and the positive and negative of the common mode transient pulse signal and controlling the working state of the common mode transient immunity enhancement execution circuit based on the judging result;
and the common mode transient immunity enhancement execution circuit is used for reducing the common mode current flowing into the signal receiving demodulation module or compensating the common mode current flowing out of the signal receiving demodulation module.
3. The digital capacitive isolator of claim 2, wherein: the common mode transient signal detection circuit comprises a positive common mode transient signal detection circuit and a negative common mode transient signal detection circuit; the common mode transient signal detection circuit has a working threshold, the positive common mode transient signal detection circuit has a positive threshold, and the negative common mode transient signal detection circuit has a negative threshold; when the positive common mode transient signal detection circuit detects that the positive common mode transient pulse signal is lower than a positive threshold value, the signal is not detected; when the positive common mode transient pulse signal is detected to be higher than a positive threshold value, the positive common mode transient signal detection circuit outputs the signal; when the negative common mode transient signal detection circuit detects that the negative common mode transient pulse signal is higher than a negative threshold value, the signal is not detected; when the negative common mode transient pulse signal is detected to be lower than a negative threshold value, the negative common mode transient signal detection circuit outputs the signal; therefore, the common mode transient signal detection circuit can detect a positive common mode transient pulse signal and a negative common mode transient pulse signal, respectively.
4. A digital capacitive isolator as claimed in claim 3, wherein: the common mode transient signal detection circuit adopts two comparators as detection devices of a positive common mode transient signal and a negative common mode transient signal respectively; the positive input end of the comparator for detecting the positive common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end of the comparator is connected with a positive threshold voltage of fixed bias, the output end of the comparator is connected with the common mode transient signal processing circuit, when the positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator outputs a turnover signal to the common mode transient signal processing circuit, and when no positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator keeps outputting a normal signal to the common mode transient signal processing circuit; the positive input end of the comparator for detecting the negative common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end of the comparator is connected with a negative threshold voltage of fixed bias, the output end of the comparator is connected with the common mode transient signal processing circuit, when the negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator outputs a turnover signal to the common mode transient signal processing circuit, and when no negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator keeps outputting a normal signal to the common mode transient signal processing circuit.
5. The digital capacitive isolator of claim 2, wherein: the common mode transient signal processing circuit comprises a positive common mode transient processing circuit and a negative common mode transient processing circuit which are internally provided with an anti-shake circuit; the positive common mode transient processing circuit receives and processes the signal output by the positive common mode transient pulse signal detection circuit, and the negative common mode transient processing circuit receives and processes the signal transmitted by the negative common mode transient pulse signal detection circuit; when the positive common mode transient signal detection circuit detects a positive common mode transient pulse signal, the corresponding positive common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and the common mode transient immunity enhancement execution circuit enters a working state through the internal anti-shake circuit and exits the working state after being kept for a fixed period of time; when the negative common mode transient signal detection circuit detects a negative common mode transient pulse signal, the corresponding negative common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and the common mode transient immunity enhancement execution circuit enters a working state through the internal anti-shake circuit and exits the working state after being kept for a fixed period of time; in addition, the common mode transient signal processing circuit can also enter the working state through the anti-shake circuit and follow the detected common mode transient pulse signal, and the working state is exited when the common mode transient pulse signal disappears.
6. The digital capacitive isolator of claim 2, wherein: the common mode transient signal processing circuit controls and controls the working state of the common mode transient immunity enhancement execution circuit through the current switch, and when the common mode transient signal detection circuit detects a common mode transient pulse signal, the common mode transient signal processing circuit controls and opens the current switch to increase the current flowing through the common mode transient immunity enhancement execution circuit so as to realize the function of current pulling or current filling of the common mode transient immunity enhancement execution circuit.
7. A digital capacitive isolator as claimed in claim 3, wherein: the common mode transient immunity enhancement execution circuit comprises a positive common mode transient signal variable impedance and a negative common mode transient signal variable impedance; when a positive common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit pulls down common mode current from the input end of the signal receiving demodulation module to the ground through the variable impedance of the positive common mode transient signal, and reduces the common mode current flowing into the signal receiving demodulation module; when a negative common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit downwards pumps common mode current from a power supply to the input end of the signal receiving demodulation module through the variable impedance of the negative common mode transient signal to compensate the common mode current flowing out of the signal receiving demodulation module.
8. The digital capacitive isolator of claim 7, wherein: the common mode transient immunity enhancement execution circuit adopts two controlled current sources H1 and H2 as positive common mode transient signal variable impedance and negative common mode transient signal variable impedance respectively, the positive end of the controlled current source H1 is connected with the input end of the signal receiving demodulation module, the negative end of the controlled current source H1 is grounded, when the positive common mode transient signal detection circuit detects a positive common mode transient pulse signal, the positive common mode transient processing circuit increases the current flowing into the controlled current source H1, and the controlled current source H1 amplifies the current and pulls the current down to the ground from the input end of the signal receiving demodulation module; the positive end of the controlled current source H2 is connected with a power supply, the negative end of the controlled current source H2 is connected with the input end of the signal receiving and demodulating module, and when the negative common mode transient state signal detection circuit detects a negative common mode transient state pulse signal, the negative common mode transient state processing circuit increases the current flowing into the controlled current source H2, and the controlled current source H2 amplifies the current and downwards sinks the current from the power supply to the input end of the signal receiving and demodulating module; the current magnitudes of the controlled current sources H1 and H2 dynamically change with the magnitudes of the positive common mode transient pulse signal and the negative common mode transient pulse signal, respectively.
9. The digital capacitive isolator of claim 2, wherein: the common mode transient immunity enhancement execution circuit pulls down the current to the ground from the normal phase input end of the signal receiving demodulation module and the current to the ground from the reverse phase input end of the signal receiving demodulation module into the copied common mode current, and simultaneously pulls down the current to the ground with the same size; the common mode transient immunity enhancement execution circuit is characterized in that the current from the power supply to the positive input end of the signal receiving demodulation module and the current from the power supply to the negative input end of the signal receiving demodulation module are duplicated common mode currents, and the current is downwards applied and the sizes are the same.
10. The digital capacitive isolator of claim 1, wherein: the signal receiving demodulation module is formed by sequentially connecting a pre-amplifier, an envelope comparator and a front edge blanking circuit, wherein the pre-amplifier is used for inhibiting a common mode signal from amplifying a differential mode signal, and adopts a full-differential grid cross coupling connection method, so that the equivalent transconductance is doubled as the original transconductance, the differential mode gain is improved, the common mode gain is offset, and the full-differential grid cross coupling improves the gain and the CMTI performance of an isolator; the envelope comparator is used for demodulating and restoring the amplified fully-differential signal into the input signal received by the signal modulation and transmission module, and the leading edge blanking circuit is used for eliminating leading edge burrs in the signal.
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| CN202211686277.5A CN116015276A (en) | 2022-12-26 | 2022-12-26 | Digital capacitance isolator |
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| CN202211686277.5A Pending CN116015276A (en) | 2022-12-26 | 2022-12-26 | Digital capacitance isolator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116743118A (en) * | 2023-08-16 | 2023-09-12 | 灵矽微电子(深圳)有限责任公司 | Signal shaping circuit and digital capacitive isolator |
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2022
- 2022-12-26 CN CN202211686277.5A patent/CN116015276A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116743118A (en) * | 2023-08-16 | 2023-09-12 | 灵矽微电子(深圳)有限责任公司 | Signal shaping circuit and digital capacitive isolator |
| CN116743118B (en) * | 2023-08-16 | 2024-04-26 | 灵矽微电子(深圳)有限责任公司 | Signal shaping circuit and digital capacitive isolator |
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