CN115982034A - Test method of carrier construction system virtual terminal, storage medium and electronic equipment - Google Patents
Test method of carrier construction system virtual terminal, storage medium and electronic equipment Download PDFInfo
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Abstract
The invention provides a test method of a virtual terminal of a carrier construction system, a computer storage medium and electronic equipment, wherein the virtual terminal comprises a system inlet, a plurality of operation buttons and a system level, and the test method comprises the following steps: s1, detecting whether a system level meets a set requirement; s2, detecting whether a system inlet and a plurality of operation buttons are normal or not; s3, testing the constructed carrier to judge whether the operation of the insertable element, the name template of the carrier and the raw material analysis tool is in accordance with the expectation; and S4, outputting a test result when the detection results of the step S1, the step S2 and the step S3 are normal or meet the set requirement or expectation. According to the testing method provided by the embodiment of the invention, whether the virtual terminal of the carrier construction system meets the use requirement can be quickly and effectively detected before a new carrier system is on line, so that the manpower, the time and the hardware resources are effectively saved, and the testing efficiency is greatly improved.
Description
Technical Field
The present invention relates to the field of system detection, and in particular, to a method for testing a virtual terminal of a carrier building system, a computer storage medium, and an electronic device.
Background
The automatic test is to execute related tests according to the preset flow of the test case and to check whether the actual result is consistent with the expected result.
With the rapid development of biology, a great deal of manpower and time are required to be consumed to test whether a newly-built carrier system meets requirements or not in the process of online new carrier systems, and the traditional manual test process is not suitable for the development requirements.
Disclosure of Invention
In order to solve the technical problems, the invention provides a test method for a virtual terminal of a carrier building system, a computer storage medium and an electronic device, which can save labor, time or hardware resources and improve test efficiency.
According to the embodiment of the first aspect of the invention, the test method for the virtual terminal of the carrier building system comprises a system entrance, a plurality of operation buttons and a system hierarchy, and comprises the following steps:
s1, detecting whether the system level meets a set requirement;
s2, detecting whether the system inlet and the plurality of operation buttons are normal or not;
s3, testing the constructed carrier to judge whether the operation of the insertable element, the name template of the carrier and the raw material analysis tool is in accordance with the expectation;
and S4, outputting a test result when the detection results of the step S1, the step S2 and the step S3 are normal or meet the set requirement or expectation.
According to the test method of the virtual terminal of the carrier building system, provided by the embodiment of the invention, the system level, the system inlet, the plurality of operation buttons and the built carrier of the virtual terminal are tested step by step, and whether the operation of the pluggable element, the name template of the carrier and the raw material analysis tool is expected or not is judged, so that whether the virtual terminal of the carrier building system meets the use requirement or not can be quickly and effectively detected before a new carrier system is on line, the labor, the time and the hardware resources are effectively saved, and the test efficiency is greatly improved.
According to one embodiment of the invention, a method of determining whether an insertable element is conformable to expectations comprises: determining whether a skeleton of the insertable element contains any one of the insertable items Promoter, ORF and Marker, and if the skeleton contains any one of the insertable items, determining that the insertable element is as expected.
According to one embodiment of the invention, the testing method further comprises: inspecting the scaffold to determine if the insertable element is in accordance with the expectation, the method of determining if the insertable element is in accordance with the expectation comprising: determining whether the insertable element uses a skeleton of des3d and des2d, and if the insertable element uses a skeleton of des3d and des2d, determining that the insertable element is as expected.
According to one embodiment of the invention, the method for judging whether the name template of the carrier is in accordance with the expectation comprises the following steps:
judging whether the name of the carrier conforms to the following formula:
p Ad5/F35[Exp]-Marker-Promoter>ORF
wherein p indicates that all vector names begin with the letter "p"; ad5/F35 indicates that the vector framework is a human Ad5/F35 chimeric adenovirus vector, exp indicates that the biological application is gene overexpression; marker represents a mark; promoter means a Promoter that drives expression of a gene of interest; ORF represents the gene of interest; "-" denotes a connector between elements; ">" indicates that the ORF is located behind the promoter.
According to one embodiment of the present invention, a method of determining whether a feedstock analysis tool is in anticipation comprises:
determining from the vector whether said skeleton of said insertable element contains said insertable option;
detecting the skeleton by using the raw material analysis tool;
judging whether the enzyme cutting site of the insertable element meets the requirement or not;
and judging whether the sequence of the vector is in accordance with the expectation.
According to one embodiment of the invention, the raw material analysis tool comprises a Destination Vector, a pUP, a pDOwn and a pTail, and the framework is detected by the Destination Vector.
According to one embodiment of the invention, the restriction site of the insertable element is detected using a Destination Vector.
According to one embodiment of the present invention, the method for determining whether the sequence of the vector conforms to the expectation comprises:
providing a standard genebank file, acquiring a fixed sequence and an expected position of the insertable element in the standard genebank file;
and acquiring the sequence and the position of the constructed vector, comparing the sequence and the position of the vector with the fixed sequence and the expected position, and judging that the sequence of the vector is in accordance with the expectation when the sequence and the position of the vector are matched with the fixed sequence and the expected position.
In a second aspect, embodiments of the present invention provide a computer storage medium comprising one or more computer instructions that, when executed, implement a method as in the above embodiments.
An electronic device according to an embodiment of the third aspect of the invention comprises a memory for storing one or more computer instructions and a processor; the processor is configured to invoke and execute the one or more computer instructions to implement the method according to any of the embodiments described above.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a flowchart of a method for testing a virtual terminal of a carrier building system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an electronic device according to an embodiment of the invention.
Reference numerals:
an electronic device 300;
a memory 310; an operating system 311; an application 312;
a processor 320; a network interface 330; an input device 340; a hard disk 350; a display device 360.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention. Furthermore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The proper nouns mentioned in the present application will be explained first.
The gene sequence is as follows: the primary structure of a nucleic acid is represented by a string of letters representing the primary structure of a real or hypothetical DNA molecule carrying genetic information. Each letter represents a nucleobase, two bases forming a base pair, the pairing rules of which are fixed, a = T, C ≡ G. Three adjacent base pairs form a codon. One codon corresponds to one amino acid, and different amino acids synthesize different proteins. The base pairing rules are critical in the replication of DNA and protein synthesis.
And (3) Promoter: the promoter is a DNA sequence located at the upstream of the 5' end of the structural gene, can activate RNA polymerase, enables the RNA polymerase to be accurately combined with template DNA and has the specificity of transcription initiation. Promoters (Promoters), like "switches", determine the activity of a gene.
ORF Open Reading Frame (ORF), is the normal nucleotide sequence of a structural gene, and the reading frame from the start codon to the stop codon can encode a complete polypeptide chain without a stop codon interrupting translation.
Marker: a marker, a region on the chromosome that can be identified (e.g., the site of cleavage by a restriction enzyme, the location of a gene, etc.). The inheritance of the marker can be detected. The marker may be a part having an expression function (e.g., a gene) on a chromosome, or a part having no function of encoding a protein but whose genetic property can be detected.
Destination Vector: the final vector is a vector which is finally constructed by a client.
pUP, pDOwn and pTail: all refer to entry cloning vectors divided by att sites.
The following describes a method for testing a virtual terminal of a carrier building system according to an embodiment of the present invention with reference to the accompanying drawings.
The virtual terminal comprises a system entrance, a plurality of operation buttons and a system hierarchy, and as shown in fig. 1, the method for testing the virtual terminal of the carrier building system according to the embodiment of the invention comprises the following steps:
s1, detecting whether a system level meets a set requirement;
s2, detecting whether a system inlet and a plurality of operation buttons are normal;
s3, testing the constructed carrier to judge whether the operation of the insertable element, the name template of the carrier and the raw material analysis tool is in accordance with the expectation;
and S4, outputting a test result when the detection results of the step S1, the step S2 and the step S3 are normal or meet the set requirement or expectation.
In other words, the test method according to the embodiment of the present invention can be used to test a new carrier building system that needs to be on-line, so as to determine whether the system meets the use requirement. The virtual terminal of the test system comprises a system entry, a plurality of operation buttons and a system hierarchy, the operation buttons may comprise an insertion component button and a click completion button, and the test method comprises a system hierarchy check, a system entry and a plurality of operation buttons, and a constructed carrier test, wherein the system entry, the operation buttons and the system hierarchy contained in the virtual terminal, and a system entry, an operation button and a system hierarchy check standard and the like are all understood and easily implemented by those skilled in the art, so the detection of the system entry, the operation button and the system hierarchy is not described in detail in the present application, but the process of the constructed carrier test is described in an important way.
The process of testing the constructed carrier includes testing the operation of the insertable element, the name template of the carrier and the material analysis tool to determine if the operation of the insertable element, the name template of the carrier and the material analysis tool is expected. Only when the system entry, the operation button and the system level included in the virtual system meet the set requirements, and the operation of the insertable element, the name template of the carrier and the raw material analysis tool also meet the set requirements, the test result is output, which indicates that the carrier building system needing to be on-line meets the requirements and can be on-line used.
Therefore, according to the test method of the virtual terminal of the carrier building system, provided by the embodiment of the invention, the system level, the system inlet, the plurality of operation buttons and the built carrier of the virtual terminal are tested step by step, and whether the operation of the pluggable element, the name template of the carrier and the raw material analysis tool is expected or not is judged, so that whether the virtual terminal of the carrier building system meets the use requirement or not can be quickly and effectively detected before a new carrier system is on line, the labor, the time and the hardware resources are effectively saved, and the test efficiency is greatly improved.
According to one embodiment of the invention, a method of determining whether an insertable element is conformable to expectations comprises: and judging whether the skeleton of the insertable element contains any one of the insertable options Promoter, ORF and Marker, and if the skeleton contains any one of the insertable options, judging that the insertable element is in accordance with the expectation.
In other words, the insertable element has a skeleton if the Promoter is contained in the skeleton; ORF; any one or more of the three insertable options of Marker then considers the insertable element to meet the set requirements and can proceed to the next detection.
In some embodiments of the invention, the test method further comprises: detecting the skeleton and judging whether the insertable element is in accordance with the expectation, wherein the method for judging whether the insertable element is in accordance with the expectation comprises the following steps:
determining whether the insertable element uses a skeleton of des3d and des2d, and if the insertable element uses a skeleton of des3d and des2d, determining that the insertable element is as desired.
That is, in analyzing the insertable element, there are two possible expected outcomes of the skeleton of the insertable element, namely:
the first method comprises the following steps: determining whether the insertable elements all use a des3d scaffold; (pAd. Des3d (Ad 5-F35)). Where p indicates that all vector names begin with the letter "p", des3d indicates the type of backbone, and Ad5-F35 indicates that the vector backbone is a human Ad5/F35 chimeric adenovirus vector. In this determination method, one insertable item of the insertable element is selected first, and if the insertable element has no insertable item Marker or contains two or more ORFs, it means that the insertable elements do not all use the des3d skeleton.
And the second method comprises the following steps: determining whether the insertable elements all use a des2d scaffold; des2d (Ad 5-F35)).
When the detection result of the insertable element meets the first and second conditions, it is indicated that the insertable element is satisfactory, and when the detection result of the insertable element does not meet the first and second conditions, it is indicated that the insertable element is unsatisfactory.
Optionally, according to an embodiment of the present invention, the method for determining whether the name template of the carrier matches the expected name template includes: judging whether the name of the carrier conforms to the following formula:
p Ad5/F35[Exp]-Marker-Promoter>ORF
wherein p indicates that all vector names begin with the letter "p"; ad5/F35 indicates that the vector framework is a human Ad5/F35 chimeric adenovirus vector, exp indicates that the biological application is gene overexpression; marker represents a mark; promoter means a Promoter that drives expression of a gene of interest; ORF represents the gene of interest; "-" denotes a connector between elements; ">" indicates that the ORF is located behind the promoter.
If the name of the carrier conforms to the naming mode and naming sequence of the formula, the name template of the carrier conforms to the expectation.
In some embodiments of the present invention, a method of determining whether a feedstock analysis tool is in anticipation comprises:
determining from the vector whether the backbone of the insertable element contains an insertable option;
detecting the skeleton by adopting a raw material analysis tool;
judging whether the enzyme cutting site of the insertable element meets the requirement;
and judging whether the sequence of the vector is in accordance with the expectation.
Specifically, the material analysis tool may include a Destination Vector, a pUP, a pDOwn and a pTail, and a sequence satisfying any one of the criteria in the material analysis tool may be automatically decomposed.
Wherein, can judge according to the carrier that has inserted Marker in the pluggable unit, if the skeleton of pluggable unit accords with the skeleton that uses des3d, compare pluggable unit and specification Vector of the material analysis tool, can judge that the skeleton of pluggable unit accords with expecting.
According to one embodiment of the present invention, the method of determining whether a feedstock analysis tool is in anticipation further comprises: and detecting the enzyme cutting site of the insertable element by adopting a Destination Vector, and further judging whether the enzyme cutting site of the insertable element meets the requirement.
Specifically, the method for determining whether the enzyme cutting site of the insertable element sequence meets the requirement comprises the following steps:
pUp is corresponding to the Promoter;
corresponding pDOwn to ORF;
pTail corresponds to Marker, for example: firstly, obtaining a sequence of a Restriction enzyme of Materials > pUp, creating the sequence in Snapgene Viewer, and selecting a corresponding enzyme (MluI + SacI) to obtain an expected Restriction enzyme site (Location) and fragment sequence length (Fragments). It should be noted that the sequence is a string of bases, which can form a certain cleavage site, and the corresponding enzyme is selected to cleave the string of sequences, and if the string of sequences is not aligned, the enzyme cannot cleave it.
And (3) comparing the expected enzyme cutting site with the enzyme cutting site of the insertable element, namely comparing the enzyme cutting site with the sequence length of the fragment, and if the comparison result is consistent, determining that the enzyme cutting site of the insertable element is consistent with the expected enzyme cutting site. It is to be noted that if there are 1-2 base differences in the alignment, which are acceptable, the cleavage site of the insertable element is considered to be as expected.
In some embodiments of the invention, the method of determining whether the sequence of the vector corresponds to the expected sequence comprises:
providing a standard genebank file, acquiring a fixed sequence and an expected position of an insertable element in the standard genebank file;
and acquiring the sequence and the position of the constructed vector, comparing the sequence and the position of the vector with the fixed sequence and the expected position, and judging that the sequence of the vector is in accordance with the expectation when the sequence and the position of the vector are matched with the fixed sequence and the expected position.
Specifically, the fixed sequence and the specific position of the pluggable element in the genebank file may be obtained from a standard genebank file, and the fixed sequence and the specific position may be used as the desired result. For example, the first section n of the insertable element represents the insertable Promoter, the second section n represents the insertable ORF, and the third section n represents the insertable Marker. The vector generated by the vector construction system must include the sequence of sequence 1, sequence 2, sequence 3, and sequence 4.
And then acquiring a sequence of a constructed vector, and judging whether the actual sequence and position are consistent with the sequence 1, the sequence 2, the sequence 3 and the sequence 4 expected by the genebank file.
When all the positions and sequences meet the expected conditions, the detection result is in accordance with the requirements, and the vector construction system can be used online.
In addition, the present invention also provides a computer storage medium, where the computer storage medium includes one or more computer instructions, and when executed, the one or more computer instructions implement the method for testing the virtual terminal of the carrier building system described above.
That is, the computer storage medium stores a computer program, and the computer program, when executed by the processor, causes the processor to execute any of the above-described methods for testing a virtual terminal of a carrier building system.
As shown in fig. 2, an embodiment of the present invention provides an electronic device 300, which includes a memory 310 and a processor 320, where the memory 310 is configured to store one or more computer instructions, and the processor 320 is configured to call and execute the one or more computer instructions, so as to implement any one of the methods described above.
That is, the electronic apparatus 300 includes: a processor 320 and a memory 310, in which memory 310 computer program instructions are stored, wherein the computer program instructions, when executed by the processor, cause the processor 320 to perform any of the methods described above.
Further, as shown in fig. 2, the electronic device 300 further includes a network interface 330, an input device 340, a hard disk 350, and a display device 360.
The various interfaces and devices described above may be interconnected by a bus architecture. A bus architecture may be any architecture that may include any number of interconnected buses and bridges. Various circuits of one or more Central Processing Units (CPUs), represented in particular by processor 320, and one or more memories, represented by memory 310, are coupled together. The bus architecture may also connect various other circuits such as peripherals, voltage regulators, power management circuits, and the like. It will be appreciated that a bus architecture is used to enable communications among the components. The bus architecture includes a power bus, a control bus, and a status signal bus, in addition to a data bus, all of which are well known in the art and therefore will not be described in detail herein.
The network interface 330 may be connected to a network (e.g., the internet, a local area network, etc.), obtain relevant data from the network, and store the relevant data in the hard disk 350.
The input device 340 may receive various commands input by an operator and send the commands to the processor 320 for execution. The input device 340 may include a keyboard or a pointing device (e.g., a mouse, a trackball, a touch pad, a touch screen, or the like).
The display device 360 may display the result of the instructions executed by the processor 320.
The memory 310 is used for storing programs and data necessary for operating the operating system, and data such as intermediate results in the calculation process of the processor 320.
It will be appreciated that memory 310 in embodiments of the invention may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read Only Memory (EPROM), an Electrically Erasable Programmable Read Only Memory (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. The memory 310 of the apparatus and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.
In some embodiments, memory 310 stores the following elements, executable modules or data structures, or a subset thereof, or an expanded set thereof: an operating system 311 and application programs 312.
The operating system 311 includes various system programs, such as a framework layer, a core library layer, a driver layer, and the like, and is used for implementing various basic services and processing hardware-based tasks. The application programs 312 include various application programs, such as a Browser (Browser), and are used for implementing various application services. A program implementing methods of embodiments of the present invention may be included in application 312.
The method disclosed by the above embodiment of the present invention can be applied to the processor 320, or implemented by the processor 320. Processor 320 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 320. The processor 320 may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, and may implement or perform the methods, steps, and logic blocks disclosed in the embodiments of the present invention. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 310, and the processor 320 reads the information in the memory 310 and completes the steps of the method in combination with the hardware.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or any combination thereof. For a hardware implementation, the processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
In particular, the processor 320 is further configured to read the computer program and execute any one of the methods described above.
In the several embodiments provided in the present application, it should be understood that the disclosed method and apparatus may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be physically included alone, or two or more units may be integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) to execute some steps of the transceiving method according to various embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a portable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other media capable of storing program codes.
While the foregoing is directed to the preferred embodiment of the present invention, it will be appreciated by those skilled in the art that various changes and modifications may be made therein without departing from the principles of the invention as set forth in the appended claims.
Claims (10)
1. A test method for a virtual terminal of a carrier building system is characterized in that the virtual terminal comprises a system entrance, a plurality of operation buttons and a system hierarchy, and the test method comprises the following steps:
s1, detecting whether the system level meets a set requirement;
s2, detecting whether the system inlet and the plurality of operation buttons are normal or not;
s3, testing the constructed carrier to judge whether the operation of the insertable element, the name template of the carrier and the raw material analysis tool is in accordance with the expectation;
and S4, outputting a test result when the detection results of the step S1, the step S2 and the step S3 are normal or meet the set requirement or expectation.
2. The method of testing of claim 1, wherein the step of determining whether the insertable element is compliant with the expectation comprises:
judging whether a skeleton of the insertable element contains any one of insertable options Promoter, ORF and Marker, and if the skeleton contains any one of the insertable options, judging that the insertable element is in accordance with the expectation.
3. The test method of claim 2, further comprising: detecting the skeleton to determine whether the insertable element is in accordance with expectations, the method of determining whether the insertable element is in accordance with expectations comprising:
determining whether the insertable element uses a skeleton of des3d and des2d, and if the insertable element uses a skeleton of des3d and des2d, determining that the insertable element is as expected.
4. The test method according to claim 1, wherein the method of determining whether the name template of the carrier matches the expected name template is: judging whether the name of the carrier conforms to the following formula:
p Ad5/F35[Exp]-Marker-Promoter>ORF
wherein p indicates that all vector names begin with the letter "p"; ad5/F35 indicates that the vector framework is a human Ad5/F35 chimeric adenovirus vector, exp indicates that the biological application is gene overexpression; marker represents a mark; promoter means a Promoter that drives expression of a gene of interest; ORF represents the gene of interest; "-" indicates a connector between elements; ">" indicates that the ORF is located behind the promoter.
5. The method of claim 3, wherein determining whether the feedstock analysis tool is in accordance with expectations comprises:
determining from the vector whether said skeleton of said insertable element contains said insertable option;
detecting the skeleton by using the raw material analysis tool;
judging whether the enzyme cutting site of the insertable element meets the requirement;
and judging whether the sequence of the vector is in accordance with the expectation.
6. The test method according to claim 5, wherein the material analysis tool comprises Destination Vector, pUP, pDOwn and pTail, and the framework is detected by the Destination Vector.
7. The test method according to claim 6, wherein the cleavage site of the insertable element is detected using a Destination Vector.
8. The test method of claim 5, wherein the step of determining whether the sequence of the vector corresponds to an expected sequence comprises:
providing a standard genebank file, obtaining a fixed sequence and an expected position of the insertable element in the standard genebank file;
and acquiring the sequence and the position of the constructed vector, comparing the sequence and the position of the vector with the fixed sequence and the expected position, and judging that the sequence of the vector is in accordance with the expectation when the sequence and the position of the vector are matched with the fixed sequence and the expected position.
9. A computer storage medium comprising one or more computer instructions which, when executed, implement the method of any one of claims 1-8.
10. An electronic device comprising a memory and a processor, wherein,
the memory is to store one or more computer instructions;
the processor is configured to invoke and execute the one or more computer instructions to implement the method of any of claims 1-8.
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