CN115915582A - PCB signal layer power supply plane structure capable of increasing current-carrying capacity and manufacturing method - Google Patents
PCB signal layer power supply plane structure capable of increasing current-carrying capacity and manufacturing method Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 41
- 229910052802 copper Inorganic materials 0.000 claims abstract description 142
- 239000010949 copper Substances 0.000 claims abstract description 142
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 140
- 238000007747 plating Methods 0.000 claims abstract description 22
- 238000013461 design Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 29
- 238000009713 electroplating Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 8
- 238000012545 processing Methods 0.000 claims description 6
- 230000001681 protective effect Effects 0.000 claims description 6
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- 230000005540 biological transmission Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000012938 design process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Abstract
The invention relates to the field of PCB (printed circuit board) manufacturing, and particularly discloses a PCB signal layer power supply plane structure for increasing current-carrying capacity and a manufacturing method thereof, wherein the power supply plane structure comprises a first power supply area, a second power supply area and a copper plating area laid on the second power supply area; the first power supply area is connected with the second power supply area, and the width of the first power supply area is larger than that of the second power supply area; the length and the width of the copper-plated area are the same as those of the second power supply area; the first power supply region width h1 satisfies the following relationship: d h1= I D 0 *h 0 (ii) a The thickness d of the copper-plated area satisfies the following relationship: (D + D) × h2= I × D 0 *h 0 . The invention solves the current-carrying problem on the PCB board card of the low-voltage large-current power supply system on the premise of not increasing the area and the number of PCB layers, thereby being beneficial to the miniaturization of electronic productsThe modeling design reduces the production cost of the PCB and improves the competitiveness of electronic products.
Description
Technical Field
The invention relates to the field of PCB manufacturing, in particular to a PCB signal layer power supply plane structure for increasing current-carrying capacity and a manufacturing method thereof.
Background
With the rapid development of electronic information, electronic products have more and more functions, and the power consumption of corresponding electronic components is gradually increased and is developed towards low voltage and high current. In the process of designing the PCB, the power design is also a major difficulty, especially for low voltage and large current circuits. Meanwhile, electronic products gradually tend to be miniaturized, so that the area of a PCB (printed circuit board) card is gradually reduced.
In the conventional PCB design process, when a low-voltage high-current power circuit is encountered, a plurality of layers of large-area copper planes are usually laid on the source end of the power supply. This design has greatly occupied PCB integrated circuit board wiring space, and simultaneously in the circuit transmission process of this power network, when power plane met the via hole of other networks or when walking the line, other networks were walked the line can be dodged to this power plane, consequently can make the planar copper skin area of this power reduce, cause the current-carrying to reduce, and circuit voltage drop increases. In order to meet the current carrying capacity of a circuit system, a PCB layer can be increased or the area of the PCB can be increased in the conventional PCB design, so that the current carrying plane of the high-current power supply is widened and thickened, and the current carrying capacity of the high-current power supply is increased.
It can be seen that if there is a low-voltage large-current circuit in the circuit system, in order to meet the required current-carrying capability of the circuit, the PCB board layer is usually increased or the PCB area is increased so as to widen the power supply current-carrying plane of the large-current circuit, but both of these solutions increase the PCB cost and are not favorable for product miniaturization. If the current carrying of the power supply system in the PCB card cannot meet the maximum current amount required by the system, the system operation of the whole electronic product is liable to be unstable.
Disclosure of Invention
In order to solve the problems, the invention provides a power plane structure of a signal layer of a PCB (printed circuit board) with increased current-carrying capacity and a manufacturing method thereof, which solve the current-carrying problem on a PCB board card of a low-voltage large-current power supply system on the premise of not increasing the area and the number of PCB layers, thereby being beneficial to the miniaturization design of electronic products, reducing the production cost of the PCB and improving the competitiveness of the electronic products.
In a first aspect, the technical solution of the present invention provides a PCB signal layer power plane structure for increasing current-carrying capacity, where the power plane structure includes a first power area, a second power area, and a copper plating area laid on the second power area;
the first power supply area is connected with the second power supply area, and the width of the first power supply area is larger than that of the second power supply area; the length and the width of the copper-plated area are the same as those of the second power supply area;
recording the copper thickness of the signal layer as D, the current-carrying capacity of a power supply as I, the width of the first power supply area as h1, the width of the copper-plated area as h2 and the thickness of the copper-plated area as D;
presetting a signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
The unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area and the unit of the width h2 of the copper-plated area are mm;
thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a power supply region width h 0 The units of (a) are oz and mm, respectively;
the first power supply region width h1 satisfies the following relationship: d h1= I D 0 *h 0 ；
The thickness d of the copper-plated area satisfies the following relationship: (D + D) × h2= I × D 0 *h 0 。
Further, the thickness D of the signal layer copper corresponding to the current-carrying capacity of the 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
In a second aspect, a technical solution of the present invention provides a method for manufacturing a power plane of a signal layer of a PCB, which increases current-carrying capacity, and includes the following steps:
designing PCB parameters, including,
selecting the copper thickness D of the signal layer;
determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
According to the formula D h1= I D 0 *h 0 Calculating the width h1 of a first power supply area, wherein I is the current-carrying capacity of a power supply;
when the power plane passes through the signal line wiring density large area from the signal line wiring density small area, the power plane is designed with a first power area width h1 in the signal line wiring density small area, and the remaining usable area width is set as a second power area width, i.e., a copper plating area width h2 in the signal line wiring density large area, according to a formula (D + D) h2= I D 0 *h 0 Calculating the thickness d of the copper plating area;
the unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area and the unit of the width h2 of the copper-plated area are mm;
1A signal layer copper thickness D corresponding to power current-carrying capacity 0 And a power supply region width h 0 The units of (a) are oz and mm respectively;
etching the PCB layer by layer according to PCB design parameters in a conventional processing mode to enable the copper thickness of a signal layer to be D;
exposing the power supply area of the signal layer, and electroplating copper on the second power supply area to ensure that the thickness of a copper-plated area on the second power supply area is D, the final copper thickness of the power supply plane in the first power supply area is D, and the final copper thickness in the second power supply area is D + D;
and step four, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
Further, the method specifically comprises the following steps:
and step three, when copper is electroplated on the second power supply area, covering other signal wires on the signal layer with protective films.
Further, the thickness D of the signal layer copper corresponding to the current-carrying capacity of the 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
In a third aspect, the technical solution of the present invention provides a PCB signal layer power plane structure for increasing current-carrying capacity, where the power plane structure includes a copper-plated area laid on a power area;
recording the copper thickness of the signal layer as D, the current-carrying capacity of a power supply as I, the width of the copper-plated area as h and the thickness of the copper-plated area as D; wherein the unit of the copper thickness D of the signal layer and the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h of the copper-plated area is mm;
the width and the length of the power supply area are the same as those of the copper plating area;
the thickness d of the copper-plated area satisfies the following relationship: (D + D) × h = I × D 0 *h 0 ；
Wherein D is 0 And h 0 Respectively corresponding to preset 1A power current-carrying capacityThe thickness of the signal layer copper and the width of the power supply area in oz and mm, respectively.
Further, the signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
In a fourth aspect, a technical solution of the present invention provides a method for manufacturing a power plane of a signal layer of a PCB, which increases current-carrying capacity, and includes the following steps:
designing PCB parameters, including,
selecting the copper thickness D of the signal layer;
determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
Determining the width h of a copper plating area;
according to the formula (D + D) × h = I × D 0 *h 0 Calculating the thickness d of the copper-plated area, wherein I is the current-carrying capacity of a power supply;
the unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h of the copper-plated area is mm;1A signal layer copper thickness D corresponding to power current-carrying capacity 0 And a power supply region width h 0 The units of (a) are oz and mm, respectively;
etching the PCB layer by layer according to PCB design parameters in a conventional processing mode to enable the copper thickness of a signal layer to be D;
exposing the power supply area of the signal layer, and electroplating copper on the power supply area to ensure that the thickness of the copper-plated area on the power supply area is D and the final copper thickness of the power supply plane is D + D;
and step four, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
Further, the method specifically comprises:
in the third step, when electroplating copper on the power supply region, the other signal wires on the signal layer are covered by the protective film.
Further, the thickness D of the signal layer copper corresponding to the current-carrying capacity of the 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
Compared with the prior art, the PCB signal layer power supply plane structure for increasing the current-carrying capacity and the manufacturing method thereof provided by the invention have the following beneficial effects: the copper thickness of the power wiring plane is locally increased, so that the power wiring plane of a region with high wiring density of the PCB board card signal lines is reduced, other important signal wiring planes are sufficient, the wiring distance between important signals is increased, mutual coupling crosstalk between the signals is reduced, and the signal integrity of important signal transmission is further improved. Or the planar copper thickness is increased on the power supply wiring of the signal layer, the occupied space of the power supply plane on the signal layer is further reduced, and the wiring space of other signal wires is increased. According to the invention, the current-carrying plane of the high-current power supply is thickened in a bottleneck region of the power supply plane through local electroplating of the low-voltage high-current circuit, or the current-carrying plane of the high-current power supply is increased through electroplating of the whole power supply plane, so that the current-carrying capacity of a power supply transmission path is greatly increased, the current-carrying requirement of the high-current power supply is met, the wiring area of the high-current power supply plane is reduced, and meanwhile, the PCB board card size is not required to be increased or the PCB board card lamination is not required to be increased, so that the PCB board card cost is reduced, the manufacturing cost of electronic products is reduced, and the competitiveness of the electronic products is improved.
Drawings
In order to clearly illustrate the embodiments or technical solutions of the present application, the drawings used in the embodiments or technical solutions of the present application will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic diagram of a PCB board partial longitudinal cut of a power plane structure of a PCB board signal layer for increasing current-carrying capacity according to an embodiment of the present invention.
Fig. 2 is a schematic side view of a power plane structure of a signal layer of a PCB, which is provided by an embodiment of the invention and increases current-carrying capacity.
Fig. 3 is a schematic top view of a power plane structure of a signal layer of a PCB board with increased current-carrying capacity according to an embodiment of the present invention.
Fig. 4 is a schematic flow chart of a method for manufacturing a power plane of a signal layer of a PCB, which increases current-carrying capacity according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a PCB partial longitudinal cut of a power plane structure of a PCB signal layer for increasing current-carrying capacity according to an embodiment of the present invention.
Fig. 6 is a schematic side view of a power plane structure of a signal layer of a PCB, which is provided by an embodiment of the invention and increases current-carrying capacity.
Fig. 7 is a schematic flow chart of a method for manufacturing a power plane of a signal layer of a PCB, which increases current-carrying capacity according to an embodiment of the present invention.
In the figure, 1-copper reference plane, 2-signal line, 3-copper plating area, 4-second power area, 5-first power area, and 6-power area.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic diagram of a PCB partial longitudinal cut of a signal layer power plane structure of a PCB for increasing current-carrying capacity according to an embodiment of the present invention, as shown in fig. 1, copper sheet reference planes 1 are disposed on upper and lower sides of the signal layer, PP material is filled between the signal layer and the copper sheet reference planes 1 on the upper and lower sides, a signal line 2 and a power line are etched in the signal layer, and fig. 1 includes a second power area 4 and a copper plated area 3 of the power plane structure.
Fig. 2 is a schematic side view of a PCB signal layer power plane structure for increasing current-carrying capacity according to an embodiment of the present invention, and fig. 3 is a schematic top view of the PCB signal layer power plane structure for increasing current-carrying capacity according to the embodiment of the present invention. As shown in fig. 1, 2 and 3, the power plane structure includes a first power area 5 and a second power area 4, and a copper-plated area 3 laid on the second power area 4.
The first power supply area 5 is connected with the second power supply area 4, and the width of the first power supply area 5 is greater than that of the second power supply area 4; the copper-plated area 3 has the same length and width as the second power supply area 4, i.e., the second power supply area 4 is covered with the electrolytic copper to constitute the copper-plated area 3.
The width of the first power supply region 5 is large and the width of the second power supply region 4 is small, and as shown in fig. 3, the signal lines 2 are provided on both sides of the second power supply region 4, that is, the copper-plated region 3. In the embodiment, in the area of the signal layer where the density of the signal lines 2 is small, that is, the area where the density of the signal lines 2 is not large, the power plane is made to adopt the plane of the structure of the first power area 5, in the area where the density of the signal layer becomes large, that is, in the area where the density of the signal lines 2 is large, the width of the power plane is reduced, that is, the power plane adopts the structure of the second power area 4, the copper-plated area 3 is laid on the second power area 4, and the copper thickness is increased on the basis of the reduction of the width, so that the current-carrying capacity of the power supply is increased, and the area of a PCB (printed circuit board) is not occupied.
Presetting a signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 And a width h of the power supply region 6 0 And setting power plane parameters according to the selected copper thickness D of the signal layer, the power current-carrying capacity I of the circuit, the density of the signal line 2 in the area where the power plane is located and the like.
Note that the signal layer copper thickness is D, the power carrying capacity is I, the width of the first power area 5 is h1, the width of the copper-plated area 3 is h2, and the thickness of the copper-plated area 3 is D. Wherein the unit of the copper thickness D of the signal layer and the thickness D of the copper-plated area 3 is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area 5 and the unit of the width h2 of the copper-plated area 3 are mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a width h of the power supply region 6 0 In oz and mm, respectively.
The parameters of the power plane satisfy the following two aspects:
the width h1 of the first power supply region 5 satisfies the following relationship: d h1= I D 0 *h 0 ；
The thickness d of the copper-plated area 3 satisfies the following relationship: (D + D) × h2= I × D 0 *h 0 。
Wherein, the signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 And a width h of the power supply region 6 0 Generally, 1oz and 1mm are selected, namely, 1oz copper thickness and 1mm width correspond to the current carrying capacity of a 1A power supply.
According to a preset D 0 And h 0 And selecting the copper thickness D of the signal layer of the substrate material, the width h1 of the first power supply region 5 required to satisfy the power supply current-carrying capacity I can be determined. The typical signal layer copper thickness D is 1oz, and if the power supply current capacity I is 50A, the width of the first power supply region 5 is 50mm. When the PCB is manufactured, in the areas with low wiring density of the signal wires 2, the power plane design with the width of 50mm can be met, and in the areas, the power plane adopts the structural design of the first power supply area 5, namely, the copper thickness of 1oz and the width of 50mm.
The width of the second power region 4 is determined by the density of the signal lines 2 in the space where the second power region is located, for example, the width of the remaining usable region in the space is 25mm, and the width of the second power region 4, that is, the width h2 of the copper-plated region 3 is 25mm, according to the above formula (D + D) × h2= I × D 0 *h 0 The thickness d of the copper plated area 3 can be calculated to be 1oz. When the PCB is manufactured, in the areas with high wiring density of the signal lines 2, the power plane design with the width of 50mm cannot be met, and only the width of 25mm can be met, so that the second power area 4 structure is adopted in the areas, namely the thickness of copper in the second power area 4 (namely the thickness of copper in a signal layer) is 1oz, the thickness of copper in a copper plating area 3 is 1oz, and finally the thickness of copper in the second power area is 2oz and the width of 25 mm.
According to the PCB signal layer power plane structure for increasing the current-carrying capacity, the copper thickness of the power wiring plane is locally increased, so that the power wiring plane of the area with higher wiring density of the PCB board signal wire 2 is reduced, other important signal wirings have sufficient wiring planes, the wiring distance among important signals is increased, the mutual coupling crosstalk among the signals is reduced, and the signal integrity of important signal transmission is further improved. According to the invention, the low-voltage large-current circuit is enabled to thicken the large-current power supply current-carrying plane in the bottleneck region of the power supply plane through local electroplating, so that the current-carrying capacity of a power supply transmission path is greatly increased, the large-current power supply current-carrying requirement is met, the wiring area of the large-current power supply plane is reduced, and meanwhile, the size of a PCB (printed circuit board) or the number of laminated PCB boards is not required to be increased, so that the cost of the PCB is reduced, the manufacturing cost of electronic products is reduced, and the competitiveness of the electronic products is improved.
The embodiment of the power plane structure of the PCB signal layer for increasing the current-carrying capacity is described in detail above, and based on the power plane structure of the PCB signal layer for increasing the current-carrying capacity described in the above embodiment, the embodiment of the present invention further provides a method for manufacturing the power plane of the PCB signal layer for increasing the current-carrying capacity corresponding to the structure.
Fig. 4 is a schematic flow chart of a method for manufacturing a power plane of a signal layer of a PCB board with increased current-carrying capacity according to an embodiment of the present invention, and as shown in fig. 4, the method includes the following steps.
S1, designing parameters of the PCB.
Specifically, the following parameters are included.
1) The signal layer copper thickness D is selected.
2) Determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a width h of the power supply region 6 0 。
3) According to the formula D h1= I D 0 *h 0 The width h1 of the first power region 5 is calculated, where I is the power ampacity.
4) When the power plane passes through the signal line 2 wiring density large area from the signal line 2 wiring density small area, the power plane is designed with the width h1 of the first power area 5 in the signal line 2 wiring density small area, and the width of the remaining usable area is set as the width h2 of the second power area 4, i.e., the width h2 of the copper plating area 3 in the signal line 2 wiring density large area, according to the formula (D + D) × h2= I × D 0 *h 0 The thickness d of the copper-plated area 3 is calculated.
Wherein the unit of the copper thickness D of the signal layer and the thickness D of the copper-plated area 3 is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area 5 and the unit of the width h2 of the copper-plated area 3 are mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a width h of the power supply region 6 0 In oz and mm, respectively.
WhereinGeneral 1A power supply current-carrying capacity corresponding signal layer copper thickness D 0 The value is 1oz, and the width h of the power supply area 6 0 The value is 1mm.
And S2, etching the PCB layer by layer according to the design parameters of the PCB according to a conventional processing mode to enable the copper thickness of the signal layer to be D.
And S3, exposing the power supply area 6 of the signal layer, and electroplating copper on the second power supply area 4 to ensure that the thickness of the copper-plated area 3 on the second power supply area 4 is D, the final copper thickness of the power supply plane in the first power supply area 5 is D, and the final copper thickness in the second power supply area 4 is D + D.
In this step, when copper plating is performed on the second power supply region 4, other signal wirings on the signal layer are covered with a protective film.
And S4, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
In the manufacturing process of the PCB of this embodiment, after the signal line 2 and the power supply area 6 are etched according to a conventional manufacturing process, copper is electroplated on the second power supply area 4, and then the PCB is manufactured according to a conventional manufacturing process, including laminating, etching, drilling, and the like.
The method for manufacturing the PCB signal layer power plane with increased current-carrying capacity of this embodiment is implemented based on the aforementioned PCB signal layer power plane structure with increased current-carrying capacity, so that the specific implementation in the method can be seen in the foregoing embodiment of the PCB signal layer power plane structure with increased current-carrying capacity, and therefore, the specific implementation thereof can refer to the description of the corresponding partial embodiments, and will not be further described here.
In addition, since the method for manufacturing the PCB signal layer power plane with increased current-carrying capacity of this embodiment is implemented based on the aforementioned PCB signal layer power plane structure with increased current-carrying capacity, the function of the method corresponds to that of the aforementioned structure, and details are not described here.
Fig. 5 is a schematic diagram of a PCB partial longitudinal cut of a power plane structure of a PCB signal layer for increasing current-carrying capacity provided by an embodiment of the present invention, as shown in fig. 5, copper sheet reference planes 1 are disposed on upper and lower sides of the signal layer, PP material is filled between the signal layer and the copper sheet reference planes 1 on the upper and lower sides, and a signal line 2 and a power line are etched in the signal layer.
Fig. 6 is a schematic side view of a power plane structure of a signal layer of a PCB, which is provided by an embodiment of the invention and increases current-carrying capacity. Unlike the embodiment shown in fig. 1 described above, this embodiment lays the copper-plated regions 3 on all the power supply regions 6, and the width and length of the source regions are the same as those of the copper-plated regions 3. The power plane is manufactured by adopting the operation of electroplating copper on the whole signal layer, so that the area occupied by the power plane is further saved, more space is saved for the signal wire 2, and the development of small models of PCB boards is facilitated.
Presetting a signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 And a width h of the power supply region 6 0 And setting power plane parameters according to the selected copper thickness of the signal layer, the power current-carrying capacity of the circuit and the like.
Note that the signal layer copper thickness is D, the power carrying capacity is I, the width of the first power area 5 is h1, the width of the copper-plated area 3 is h2, and the thickness of the copper-plated area 3 is D. Wherein the unit of the copper thickness D of the signal layer and the thickness D of the copper-plated area 3 is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area 5 and the unit of the width h2 of the copper-plated area 3 are mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a width h of the power supply region 6 0 In oz and mm, respectively.
The power plane parameters satisfy: (D + D) × h = I × D 0 *h 0 。
The width h of the copper-plated area 3, that is, the width of the second power area 4, can be set according to the user's requirement, and certainly, the area with higher wiring density of the signal lines 2 should be considered, and the width of the second power area 4 should not be larger than the width of the remaining available area.
The copper thickness D of the signal layer corresponding to the current-carrying capacity of the preset 1A power supply 0 And a width h of the power supply region 6 0 Generally, 1oz and 1mm are selected, namely, 1oz copper thickness and 1mm width correspond to the current carrying capacity of a 1A power supply.
According to a preset D 0 And h 0 And selecting a predetermined width h of the copper plating region 3 of the signal layer copper thickness D of the substrate material to satisfy the power carrying capacity IThe desired thickness d of the copper plated area 3. The thickness D of the signal layer is generally 1oz, and if the width h of the copper plating area 3 is 25mm, and the current carrying capacity I of the power supply is 50A, the thickness D is calculated according to (D + D) × h = I × D 0 *h 0 The thickness D of the copper plated area 3 can be calculated to be 1oz, i.e. the final copper thickness of the power plane is the signal layer copper thickness D + the copper area thickness D =2oz. The 50A power ampacity was taken with a 2oz copper thickness and 25mm width.
Of course, in a region where the wiring density of the signal lines 2 is high, if the width of the remaining usable region does not satisfy 25mm, the width h of the power supply region 6 may be reduced and the thickness D of the copper plating region 3 may be increased so as to satisfy the formula (D + D) × h = I × D 0 *h 0 And (4) finishing.
If the copper-plated area 3 is not laid on the power supply area 6, the width thereof is 50mm, which corresponds to the first power supply area 5 in the above-described embodiment, as in the above-described embodiment. In the embodiment, only 25mm is needed, and the area of the PCB is further saved.
According to the PCB signal layer power plane structure for increasing the current-carrying capacity, provided by the embodiment of the invention, the plane copper thickness is increased on the power wiring of the signal layer, the occupied space of the power plane on the signal layer is further reduced, and the wiring space of other signal wires 2 is increased. The invention ensures that the low-voltage heavy-current circuit is completely electroplated on the power supply plane to increase the current-carrying plane of the current power supply, thus greatly increasing the current-carrying capacity of the power transmission path, meeting the current-carrying requirement of the heavy-current power supply, reducing the wiring area of the heavy-current power supply plane, and simultaneously not needing to increase the size of the PCB board card or increase the lamination of the PCB board card, thereby reducing the cost of the PCB board card, further reducing the manufacturing cost of electronic products and improving the competitiveness of the electronic products.
The embodiment of the power plane structure of the PCB signal layer for increasing the current-carrying capacity is described in detail above, and based on the power plane structure of the PCB signal layer for increasing the current-carrying capacity described in the above embodiment, the embodiment of the present invention further provides a method for manufacturing the power plane of the PCB signal layer for increasing the current-carrying capacity corresponding to the structure.
Fig. 7 is a schematic flow chart of a method for manufacturing a power plane of a signal layer of a PCB with increased current-carrying capacity according to an embodiment of the present invention, and as shown in fig. 7, the method includes the following steps.
S1, designing PCB parameters.
Specifically, the following parameters are included.
1) The signal layer copper thickness D is selected.
2) Determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a width h of the power supply region 6 0 。
3) The width h of the copper-plated area 3 is determined.
4) According to the formula (D + D) × h = I × D 0 *h 0 The thickness d of the copper plated area 3 is calculated, where I is the current carrying capacity of the power supply.
Wherein, the unit of the copper thickness D of the signal layer and the thickness D of the copper plating area 3 is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h of the copper plating area 3 is mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And width h of power supply region 6 0 In oz and mm, respectively.
Wherein, the thickness D of the signal layer copper corresponding to the current-carrying capacity of the general 1A power supply 0 The value is 1oz, and the width h of the power supply area 6 0 The value is 1mm.
And S2, etching the PCB layer by layer according to the design parameters of the PCB according to a conventional processing mode to enable the copper thickness of the signal layer to be D.
And S3, exposing the power supply area 6 of the signal layer, and electroplating copper on the power supply area 6 to ensure that the thickness of the copper-plated area 3 on the power supply area 6 is D, and the final copper thickness of the power supply plane is D + D.
In this step, when copper plating is performed on the power supply region 6, other signal wirings on the signal layer are covered with a protective film.
And S4, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
In the manufacturing process of the PCB of this embodiment, after the signal line 2 and the power supply area 6 are etched according to a conventional manufacturing process, copper is electroplated on the second power supply area 4, and then the PCB is manufactured according to a conventional manufacturing process, including laminating, etching, drilling, and the like.
The method for manufacturing the PCB signal layer power plane with increased current-carrying capacity of this embodiment is implemented based on the aforementioned PCB signal layer power plane structure with increased current-carrying capacity, so that the specific implementation in the method can be seen in the foregoing embodiment of the PCB signal layer power plane structure with increased current-carrying capacity, and therefore, the specific implementation thereof can refer to the description of the corresponding partial embodiments, and will not be further described here.
In addition, since the method for manufacturing the PCB signal layer power plane with increased current-carrying capacity of this embodiment is implemented based on the aforementioned PCB signal layer power plane structure with increased current-carrying capacity, the function of the method corresponds to that of the aforementioned structure, and details are not described here.
The above disclosure is only for the preferred embodiments of the present invention, but the present invention is not limited thereto, and any non-inventive changes that can be made by those skilled in the art and several modifications and amendments made without departing from the principle of the present invention shall fall within the protection scope of the present invention.
Claims (10)
1. A PCB signal layer power plane structure for increasing current-carrying capacity is characterized in that the power plane structure comprises a first power area, a second power area and a copper-plated area laid on the second power area;
the first power supply area is connected with the second power supply area, and the width of the first power supply area is greater than that of the second power supply area; the length and the width of the copper-plated area are the same as those of the second power supply area;
recording the copper thickness of the signal layer as D, the current-carrying capacity of a power supply as I, the width of the first power supply area as h1, the width of the copper-plated area as h2 and the thickness of the copper-plated area as D;
presetting a signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
The unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h1 of the first power supply area and the unit of the width h2 of the copper-plated area are mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a power supply region width h 0 Unit ofOz and mm, respectively;
the first power supply region width h1 satisfies the following relationship: d h1= I D 0 *h 0 ；
The thickness d of the copper-plated area satisfies the following relationship: (D + D) × h2= I × D 0 *h 0 。
2. The PCB signal layer power plane structure for increasing current-carrying capacity of claim 1, wherein the signal layer copper thickness D corresponding to the current-carrying capacity of the 1A power supply is D 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
3. A method for manufacturing a power plane of a signal layer of a PCB (printed circuit board) with increased current-carrying capacity is characterized by comprising the following steps:
designing PCB parameters, including,
selecting the copper thickness D of the signal layer;
determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
According to the formula D h1= I D 0 *h 0 Calculating the width h1 of a first power supply area, wherein I is the current-carrying capacity of a power supply;
when the power plane passes through the signal line wiring density large area from the signal line wiring density small area, the power plane is designed with a first power area width h1 in the signal line wiring density small area, and the remaining usable area width is set as a second power area width, i.e., a copper plating area width h2 in the signal line wiring density large area, according to a formula (D + D) h2= I D 0 *h 0 Calculating the thickness d of the copper plating area;
wherein the unit of the signal layer copper thickness D and the copper plating area thickness D is oz, the unit of the power supply current-carrying capacity I is A, and the unit of the first power supply area width h1 and the unit of the copper plating area width h2 is mm; thickness D of signal layer copper corresponding to current-carrying capacity of 1A power supply 0 And a power supply region width h 0 The units of (a) are oz and mm, respectively;
etching the PCB layer by layer according to PCB design parameters in a conventional processing mode to enable the copper thickness of the signal layer to be D;
exposing the power supply area of the signal layer, and electroplating copper on the second power supply area to ensure that the thickness of the copper-plated area on the second power supply area is D, the final copper thickness of the power supply plane in the first power supply area is D, and the final copper thickness in the second power supply area is D + D;
and step four, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
4. The method for manufacturing a power plane of a signal layer of a PCB with increased current-carrying capacity according to claim 3, wherein the method specifically comprises the following steps:
in the third step, when copper is electroplated on the second power supply region, other signal wires on the signal layer are covered by the protective film.
5. The method as claimed in claim 4, wherein the signal layer has a copper thickness D corresponding to the current-carrying capacity of 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
6. A PCB signal layer power plane structure for increasing current-carrying capacity is characterized in that the power plane structure comprises a copper-plated area laid on a power area;
recording the copper thickness of the signal layer as D, the current-carrying capacity of a power supply as I, the width of a copper-plated area as h and the thickness of the copper-plated area as D; the unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h of the copper-plated area is mm;
the width and the length of the power supply area are the same as those of the copper-plated area;
the thickness d of the copper-plated area satisfies the following relationship: (D + D) × h = I × D 0 *h 0 ；
Wherein D is 0 And h 0 The unit is oz and mm respectively corresponding to the preset 1A power current-carrying capacity of the signal layer copper thickness and the power area width.
7.The PCB signal layer power plane structure with increased current-carrying capacity of claim 6, wherein the signal layer copper thickness D corresponding to the current-carrying capacity of 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
8. A method for manufacturing a power plane of a signal layer of a PCB (printed circuit board) with increased current-carrying capacity is characterized by comprising the following steps:
designing PCB parameters, including,
selecting the copper thickness D of the signal layer;
determining the copper thickness D of the signal layer corresponding to the current-carrying capacity of the 1A power supply 0 And a power supply region width h 0 ；
Determining the width h of a copper plating area;
according to the formula (D + D) × h = I × D 0 *h 0 Calculating the thickness d of the copper plating area, wherein I is the current-carrying capacity of a power supply;
the unit of the copper thickness D of the signal layer and the unit of the thickness D of the copper-plated area is oz, the unit of the current-carrying capacity I of the power supply is A, and the unit of the width h of the copper-plated area is mm;1A signal layer copper thickness D corresponding to power current-carrying capacity 0 And a power supply region width h 0 The units of (a) are oz and mm, respectively;
etching the PCB layer by layer according to PCB design parameters in a conventional processing mode to enable the copper thickness of a signal layer to be D;
exposing the power supply area of the signal layer, and electroplating copper on the power supply area to ensure that the thickness of a copper-plated area on the power supply area is D and the final copper thickness of the power supply plane is D + D;
and step four, carrying out a subsequent conventional PCB manufacturing process after the power plane of the signal layer is manufactured.
9. The method for manufacturing a power plane of a signal layer of a PCB with increased current-carrying capacity according to claim 8, wherein the method specifically comprises the following steps:
in the third step, when electroplating copper on the power supply region, the other signal wires on the signal layer are covered by the protective film.
10. The method as claimed in claim 9, wherein the signal layer has a copper thickness D corresponding to the current-carrying capacity of 1A power supply 0 The value is 1oz, and the width h of the power supply area 0 The value is 1mm.
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| CN202211447635.7A CN115915582A (en) | 2022-11-18 | 2022-11-18 | PCB signal layer power supply plane structure capable of increasing current-carrying capacity and manufacturing method |
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