CN115913155A - High-linearity power amplifier suitable for 5G system - Google Patents
High-linearity power amplifier suitable for 5G system Download PDFInfo
- Publication number
- CN115913155A CN115913155A CN202310050283.XA CN202310050283A CN115913155A CN 115913155 A CN115913155 A CN 115913155A CN 202310050283 A CN202310050283 A CN 202310050283A CN 115913155 A CN115913155 A CN 115913155A
- Authority
- CN
- China
- Prior art keywords
- terminal
- transistor
- resistor
- hbt transistor
- hbt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims abstract description 39
- 230000003321 amplification Effects 0.000 claims abstract description 33
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 33
- 230000003446 memory effect Effects 0.000 claims abstract description 21
- 230000000694 effects Effects 0.000 claims abstract description 15
- 230000002411 adverse Effects 0.000 claims abstract description 10
- 239000003990 capacitor Substances 0.000 claims description 72
- 230000003044 adaptive effect Effects 0.000 claims description 31
- 230000008859 change Effects 0.000 description 7
- 230000009467 reduction Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Amplifiers (AREA)
Abstract
The invention discloses a high-linearity power amplifier suitable for a 5G system, which comprises a radio frequency amplification unit, a self-adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit. The radio frequency amplifying unit comprises a plurality of cascade amplifying circuits, and HBT transistors Q of the amplifying circuit of the final stage n Is connected with the output matching network, and the base electrode passes through a resistor R m+1 The self-adaptive bias circuit is connected with the final stage; one end of the bias voltage detection unit is arranged at the resistor R m+1 And the other end of the self-adaptive bias circuit is connected with a low envelope impedance unit which is connected with an HBT transistor Q n Is connected to the base of (1). Due to the low envelope impedance unit having frequency selectionThe characteristic is that the working frequency of the power amplifier is constant and presents a high configuration, and a controllable low-resistance envelope frequency is provided for the input end of the final amplifier tube of the amplifier to be connected to the ground at the baseband frequency, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
Description
Technical Field
The invention belongs to the technical field of radio frequency front-end equipment, and particularly relates to a high-linearity power amplifier suitable for a 5G system.
Background
With the 5G (fifth generation mobile communication) technology, a solid wireless communication technology foundation is laid for the people to enter the industrial 4.0 era by virtue of the advantages of high speed, low time delay, high mobility, high connection capacity, high flow density, high energy efficiency, low cost and the like. The 5G system adopts a Multiple Input Multiple Output (MIMO) architecture, and because the 5G needs to realize an ultra-high transmission speed, widening the spectrum bandwidth and improving the spectrum utilization rate are two methods for increasing the wireless transmission speed. However, the frequency of the signal is increased, the bandwidth is increased, the modulation mode is more complex, the peak-to-average ratio is further increased, and the complex scenes provide higher performance requirements for the linearization technology of the radio frequency front end. Therefore, this requires that the power amplifier in the 5G system have high linearity characteristics to reduce the bit error rate and the parasitic interference of the communication system.
The power amplifier is used as a key device at the end of the transmitter, which directly determines the performance of the transmitter, and because the power amplifier is the device with the strongest nonlinearity in the whole wireless communication system, the linearity of the whole communication system can be obviously improved by improving the linearization level of the power amplifier.
As the HBT device has the advantages of high power density, high breakdown voltage, high current amplification factor beta, capability of being powered by a single power supply and the like in the sub-6GHz frequency band, the GaAs HBT device is widely applied to the design of the sub-6GHz frequency band power amplifier. As shown in fig. 1, a conventional linear power amplifier generally adopts a 2-stage or 3-stage cascaded amplification structure because a single-stage amplifier cannot meet the requirement of a system on the power gain of a device. The emitter junction voltage of the HBT transistor decreases as the input power increases and operating point drift causes a decrease in transconductance, which in turn results in gain compression and phase distortion. HBT transistor Q 2a HBT transistor Q 3a HBT transistor Q 4a And a resistor R 1a And a resistor R 2a And a capacitor C 3a Self-adaptive bias, HBT transistor Q forming first stage amplifier 6a HBT transistor Q 7a HBT transistor Q 8a And a resistor R 3a Resistance R 4a And a capacitor C 4a The self-adaptive bias of the second-stage amplifier is formed, and the self-adaptive bias structure can well inhibit bias point drift of the HBT transistor due to self-heating effect, improve the linearity of the power amplifier and improve the output power.
A self-adaptive bias structure adopted by the traditional linear power amplifier presents high resistance to radio frequency signals in working frequency, so that a bias circuit is prevented from generating a modulation effect on the radio frequency signals. But due to the resistance R in the adaptive bias structure in the conventional linear power amplifier 4a And HBT transistor Q 5a The introduction of the self-adaptive bias structure easily causes the bias circuit to generate envelope modulation, generates obvious memory effect, and becomes more obvious along with the increase of output power and the increase of signal bandwidth, thereby causing the linearity index of the linear power amplifier to be obviously poor. At present, with the great improvement of the 5G working bandwidth, the influence of the memory effect on the linearity of the power amplifier is more serious, and the design and the application of the linear power amplifier under the large signal bandwidth are seriously limited. Therefore, the problem is urgently solved.
Disclosure of Invention
The invention aims to provide a high-linearity power amplifier suitable for a 5G system, and aims to solve the problems.
The invention is mainly realized by the following technical scheme:
a high-linearity power amplifier suitable for a 5G system comprises a radio frequency amplification unit, an adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit; the radio frequency amplification unit comprises a plurality of cascaded amplification circuits, and the self-adaptive bias unit is provided with a plurality of self-adaptive bias circuits corresponding to the plurality of amplification circuits; the amplifying circuit comprises an HBT transistor Q n Said HBT transistor Q n Emitter of the transistor (2) is grounded, and an HBT transistor Q of an amplifier circuit of a final stage n The collector of the grid is connected with the output matching network; the self-adaptive bias circuit passes through a resistor R m+1 HBT transistor Q connected with amplifying circuit n The base electrode of (1) is connected; one end of the bias voltage detection unit is arranged on a self-adaptive bias circuit and a resistor R of the final stage m+1 And the other end is connected with the low envelope impedance unit;
the low envelope impedance unit comprises a resistor R t Inductor L t Capacitor C t And pHEMT transistor M t pHEMT transistor M t Gate pass resistance of (R) t Connected with the bias voltage detection unit, and having a source electrode connected with the inductor L t And drain electrodes are respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 And HBT transistor Q of amplifier circuit of final stage n The base electrode of (1) is connected; inductor L t Second terminal of (2) and capacitor C t Is connected to a first terminal of a capacitor C t The second terminal of (1) is grounded;
the bias voltage detection unit is used for detecting a voltage signal of a final-stage self-adaptive bias circuit, amplifying the voltage signal and inputting the amplified voltage signal to the low-envelope impedance unit to serve as a pHEMT transistor M of the low-envelope impedance unit t As a gate control signal of the HBT transistor Q of the final amplifier circuit n The input end provides a controllable low-resistance envelope frequency to the ground path, so that adverse effects of memory effects on the linearity of the linear power amplifier are suppressed.
To better implement the present invention, further, the bias voltage detecting unit includes a resistor R h Resistance R h+1 Resistance R h+2 Resistance R h+3 Resistance R h+4 Diode D h And HBT transistor Q h (ii) a The resistor R h The first end of the self-adaptive bias circuit is arranged at the final stage and the resistor R m+1 And the second ends are respectively connected with the resistor R h+2 First terminal of (2), diode D h The anode of the diode D h Negative electrode and resistor R h+1 Is connected to a first terminal of a resistor R h+1 The second terminal of (a) is grounded; resistance R h+2 And HBT transistor Q h Base connection of HBT transistor Q h Emitter and resistor R of h+4 Is connected to a first terminal of a resistor R h+4 The second terminal of the first diode is grounded,resistance R h+3 Is connected to a power supply, and the second terminals are respectively connected to HBT transistors Q h Collector electrode, resistor R t Is connected to the first end of the first housing.
To better implement the present invention, further, the adaptive bias circuit comprises an HBT transistor Q m HBT transistor Q m+1 HBT transistor Q m+2 Resistance R m And a capacitor C m (ii) a Resistance R m Is connected to a power supply, and a second terminal is connected to the HBT transistor Q m Collector, base and capacitor C m First terminal of, HBT transistor Q m+2 Is connected with the base electrode; HBT transistor Q m Emitter of and HBT transistor Q m+1 Base and collector connections of, a transistor Q m+1 Emitter of (2) is grounded, capacitor C m The second terminal of (1) is grounded; HBT transistor Q m+2 Is connected to a power supply, and the emitter is connected to a resistor R m+1 Is connected with the first end of the first connecting pipe; resistance R of the bias voltage detection unit h Respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 First terminal of and HBT transistor Q of the final stage adaptive bias circuit m+2 Is connected to the emitter.
In order to better implement the present invention, further, the amplifying circuit further includes an inductor L n Capacitor C n Said HBT transistor Q n Collector and inductor L n Is connected to the first terminal of the inductor L n The second end of the switch is connected with a power supply; capacitor C of the first stage of the amplifier circuit n First terminal and signal input terminal IN n Connected with the first end of the input matching network, and the second end of the input matching network is connected with the HBT transistor Q of the first stage of the amplifying circuit n The base electrode of (1) is connected; capacitance C of final amplifier circuit n First terminal of (2) and inductor L n Is connected with the first terminal and the second terminal is connected with the signal output terminal OUT n And (4) connecting.
In order to better implement the present invention, further, the radio frequency amplifying unit includes two cascaded amplifying circuits, and the adaptive bias unit is correspondingly provided with two adaptive bias circuits.
To better implement the invention, further, the input matching network is coupled to the HBT transistor Q of the amplifier circuit of the first stage n A first-stage self-adaptive bias circuit is arranged between the base electrodes; HBT transistor Q of the first-stage amplification circuit n Collector of the HBT transistor Q and the amplifier circuit of the final stage n Is provided with an inter-stage matching network with the HBT transistor Q of the amplifier circuit of the final stage n A final-stage adaptive bias circuit is arranged between the bases of the two.
In order to better implement the invention, furthermore, the inductance L n Is a choke inductor used for supplying power to the amplifying circuit.
The invention has the following beneficial effects:
on the basis of the traditional linear power amplifier, the bias voltage detection unit and the low envelope impedance unit are added, so that the influence of the memory effect on the linear power amplifier can be reduced under the condition of large working bandwidth, and the linearity of the linear power amplifier is improved.
The memory effect of the linear power amplifier is mainly caused by envelope modulation generated by the signal at the input end of the final amplifying tube. When the output power is small, the linearity of the linear power amplifier is high, the memory effect is small, and the linearity of the radio-frequency signal output by the transmitter is hardly influenced, so that the pHEMT transistor in the low-envelope impedance unit is in a high configuration in order to give consideration to the conventional electrical characteristics of the linear power amplifier, such as small signal gain, temperature stability and the like. Along with the gradual increase of the output power, the bias voltage detection unit detects the gradually increased voltage signal, the gradually increased voltage signal is amplified to become a gate control signal of the pHEMT transistor in the low-envelope impedance unit, and the magnitude of the impedance value of the low-envelope impedance channel in the access signal path is controlled through the conduction degree of the pHEMT transistor. Because the low-envelope impedance unit has the frequency-selecting characteristic, the working frequency of the power amplifier is constant, and a high configuration is presented, and a controllable low-impedance envelope frequency is provided for the input end of the final-stage amplification tube of the linear power amplifier to the ground at the baseband frequency, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
Drawings
FIG. 1 is a circuit diagram of a conventional linear power amplifier;
FIG. 2 is a circuit schematic of a high linearity power amplifier of the present invention;
FIG. 3 is a curve of the output third-order intermodulation point of the conventional linear power amplifier varying with the output power;
fig. 4 is a curve of the output third-order intermodulation point of the high-linearity power amplifier of the present invention along with the change of the output power.
Detailed Description
Example 1:
a high-linearity power amplifier suitable for a 5G system comprises a radio frequency amplification unit, an adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit; the radio frequency amplification unit comprises a plurality of cascaded amplification circuits, and the self-adaptive bias unit is provided with a plurality of self-adaptive bias circuits corresponding to the plurality of amplification circuits; the amplifying circuit comprises an HBT transistor Q n Said HBT transistor Q n Is grounded, and an HBT transistor Q of an amplifier circuit of a final stage n The collector of the grid is connected with the output matching network; self-adaptive bias circuit pass resistor R m+1 HBT transistor Q connected with amplifying circuit n The base electrode of (1) is connected; one end of the bias voltage detection unit is arranged on a self-adaptive bias circuit and a resistor R of the final stage m+1 And the other end is connected with the low envelope impedance unit.
The low envelope impedance unit comprises a resistor R t Inductor L t Capacitor C t And pHEMT transistor M t pHEMT transistor M t Gate pass resistance R t Connected with the bias voltage detection unit, and having source electrode and inductor L t And drain electrodes are respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 And HBT transistor Q of amplifier circuit of final stage n The base electrode of (1) is connected; inductor L t Second terminal of (2) and capacitor C t Is connected to a first terminal of a capacitor C t The second terminal of (a) is grounded. A resistance R in the low envelope impedance unit during use t Initiating a primary radio communicationSignal isolation effect, inductance L t Capacitor C t The signal path presents low resistance at envelope frequency and high resistance at working frequency of linear power amplifier, and the control voltage provided by the bias voltage detection unit can control the pHEMT transistor M t To exhibit variable resistance characteristics.
The bias voltage detection unit is used for detecting a voltage signal of a final-stage self-adaptive bias circuit, amplifying the voltage signal and inputting the amplified voltage signal to the low-envelope impedance unit to serve as a pHEMT transistor M of the low-envelope impedance unit t Is a gate control signal of the HBT transistor Q of the amplifier circuit of the final stage n The input end provides a controllable low-resistance envelope frequency to the ground path, so that adverse effects of memory effects on the linearity of the linear power amplifier are suppressed.
Preferably, the bias voltage detecting unit includes a resistor R h Resistance R h+1 Resistance R h+2 Resistance R h+3 Resistance R h+4 Diode D h And HBT transistor Q h (ii) a The resistance R h The first end of the self-adaptive bias circuit is arranged at the final stage and the resistor R m+1 And the second terminals are respectively connected with the resistor R h+2 First terminal of (1), diode D h The anode of the diode D h Negative electrode and resistor R h+1 Is connected to a first terminal of a resistor R h+1 The second terminal of (1) is grounded; resistance R h+2 And HBT transistor Q h Base connection of HBT transistor Q h Emitter and resistor R of h+4 Is connected to a first terminal of a resistor R h+4 Is grounded, and a resistor R h+3 Is connected to a power supply, and the second terminals are respectively connected to HBT transistors Q h Collector electrode, resistor R t Is connected to the first end of the first housing.
Preferably, the adaptive bias circuit comprises an HBT transistor Q m HBT transistor Q m+1 HBT transistor Q m+2 And a resistor R m And a capacitor C m (ii) a Resistance R m Is connected to a power supply, and a second terminal is connected to an HBT transistor Q m Collector, base and capacitor C m First terminal of (1), HBT crystalTransistor Q m+2 Is connected with the base electrode; HBT transistor Q m Emitter of and HBT transistor Q m+1 Base and collector connections of, a transistor Q m+1 Emitter of (2) is grounded, a capacitor C m The second terminal of (1) is grounded; HBT transistor Q m+2 Is connected with a power supply, and an emitter is connected with a resistor R m+1 Is connected with the first end of the first connecting pipe; resistance R of the bias voltage detection unit h Respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 First terminal of and HBT transistor Q of the final stage adaptive bias circuit m+2 Is connected to the emitter.
On the basis of the traditional linear power amplifier, the bias voltage detection unit and the low envelope impedance unit are added, so that the influence of the memory effect on the linear power amplifier can be reduced under the condition of large working bandwidth, and the linearity of the linear power amplifier is improved.
The memory effect of the linear power amplifier is mainly caused by envelope modulation generated by the signal at the input end of the final amplifying tube. When the output power is small, the linearity of the linear power amplifier is high, the memory effect is small, and the linearity of the radio-frequency signal output by the transmitter is hardly influenced, so that the pHEMT transistor in the low-envelope impedance unit is in a high configuration in order to give consideration to the conventional electrical characteristics of the linear power amplifier, such as small signal gain, temperature stability and the like. Along with the gradual increase of the output power, the bias voltage detection unit detects the gradually increased voltage signal, the gradually increased voltage signal is amplified to become a gate control signal of the pHEMT transistor in the low-envelope impedance unit, and the magnitude of the impedance value of the low-envelope impedance channel in the access signal path is controlled through the conduction degree of the pHEMT transistor. Because the low-envelope impedance unit has the frequency-selecting characteristic, the working frequency of the power amplifier is constant, and a high configuration is presented, and a controllable low-impedance envelope frequency is provided for the input end of the final-stage amplification tube of the linear power amplifier to the ground at the baseband frequency, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
Example 2:
a high-linearity power amplifier suitable for 5G system comprises a radio frequency amplification unit and a self-gain amplifierThe device comprises an adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit. The radio frequency amplification unit comprises a plurality of cascaded amplification circuits, and the self-adaptive bias unit is provided with a plurality of self-adaptive bias circuits corresponding to the plurality of amplification circuits; the final amplifier circuit includes HBT transistor Q n Said HBT transistor Q n The emitter of the grid is grounded, and the collector is connected with the output matching network; the final stage of the adaptive bias circuit passes through a resistor R m+1 HBT transistor Q of amplifier circuit connected with final stage n The base electrode of (1) is connected; one end of the bias voltage detection unit is arranged on the resistor R m+1 And the other end of the self-adaptive bias circuit is connected with a low envelope impedance unit which is connected with an HBT transistor Q n Is connected to the base of (1).
The bias voltage detection unit is used for detecting a voltage signal of a final-stage self-adaptive bias circuit, amplifying the voltage signal and inputting the amplified voltage signal to the low-envelope impedance unit to serve as a pHEMT transistor M of the low-envelope impedance unit t As a gate control signal of the HBT transistor Q of the final amplifier circuit n The input end provides a controllable low-resistance envelope frequency to the ground path, so that adverse effects of memory effects on the linearity of the linear power amplifier are suppressed.
Preferably, the amplifying circuit of the final stage further includes an inductor L n Capacitor C n HBT transistor Q n An output matching network, the HBT transistor Q n Is grounded, and the collector is connected to the inductor L n The first end of the output matching network is connected with the inductor L n The second end of the output matching network is respectively connected with the power supply and the capacitor C n Is connected to the first terminal of the capacitor C n Second terminal and signal output terminal OUT n And (4) connecting.
Preferably, the amplifying circuit of the first stage comprises an inductor L n Capacitor C n HBT transistor Q n Input matching network, capacitor C n First terminal and signal input terminal IN n Connected with the first end of the input matching network, and the second ends of the input matching network are respectively connected with HBT transistors Q n To the base electrodeAnd an adaptive bias circuit connection, HBT transistor Q n Is grounded, and an HBT transistor Q n Respectively with the inductor L n First terminal and inter-stage matching network connection, inductor L n Is connected to a power supply. Wherein, the inductance L 1b The choke inductor supplies power to the amplifying circuit.
During operation, radio frequency signals pass through signal input IN n Entering a high linearity power amplifier, passing through a capacitor C of an amplifying circuit of a first stage n Then, the signal enters an input matching network to carry out impedance change on the signal, and passes through an HBT transistor Q of an amplifying circuit of a first stage n Amplifying the signal, sequentially processing by intermediate cascade amplification circuits, and finally performing impedance change on the signal by an interstage matching network, and using an HBT transistor Q of a final stage amplification circuit n Amplifying the signal again, changing the impedance of the signal via an output matching network, and passing through a capacitor C of a final-stage amplifying circuit n Then, the signal output terminal OUT n And (6) outputting.
Preferably, the adaptive bias circuit can inhibit bias point drift of the HBT transistor due to self-heating effect, improve linearity of the power amplifier and improve output power. The adaptive bias circuit comprises an HBT transistor Q m HBT transistor Q m+1 HBT transistor Q m+2 Resistance R m Resistance R m+1 And a capacitor C m (ii) a Resistance R m Is connected to a power supply, and a second terminal is connected to an HBT transistor Q m Collector, base and capacitor C m First terminal of, HBT transistor Q m+2 The base electrode of (1) is connected; HBT transistor Q m Emitter of and HBT transistor Q m+1 Base and collector connections of, a transistor Q m+1 Emitter of (2) is grounded, capacitor C m The second terminal of (1) is grounded; HBT transistor Q m+2 Is connected with a power supply, and an emitter is connected with a resistor R m+1 Is connected; resistance R of the bias voltage detection unit h First terminals of the first and second resistors are respectively connected with the resistance R of the self-adaptive bias circuit of the final stage m+1 First terminal of, HBT transistor Q m+2 Is connected to the emitter.
HBT transistor Q m HBT transistor Q m+1 The base electrode and the collector electrode are in short circuit to form a structure of double diodes in series connection. Through HBT transistor Q m+2 HBT transistor Q of post-flow-in amplifying circuit n Current magnitude and HBT transistor Q m The current above is proportional. And as the input power increases, the HBT transistor Q m+2 The BE junction diode of (1) also has V be A reduced voltage condition. And HBT transistor Q m And HBT transistor Q m+1 Serially connected HBT transistor Q m+2 Provides a relatively stable diode-clamped voltage, so that the HBT transistor Q m+2 V of be HBT transistor Q capable of compensating for amplification circuit by voltage reduction n Upper BE junction voltage decreases with increasing input power. Decoupling capacitor C m Suppressing the HBT transistor Q m+2 The voltage of the base electrode node is changed, and the linear power level of the HBT power amplifier is improved. The self-adaptive bias structures of the amplifiers of each stage are completely the same and have consistent functions.
Preferably, the low envelope impedance unit comprises a resistor R t An inductor L t Capacitor C t And pHEMT transistor M t pHEMT transistor M t Gate pass resistance R t Is connected to a bias voltage detection unit, a pHEMT transistor M t Source and inductor L t Is connected to the first terminal, and the drain electrodes are respectively connected to the resistors R m+1 And HBT transistor Q of amplifier circuit of final stage n Is connected with the base electrode; inductor L t Second terminal of (2) and capacitor C t Is connected to a first terminal of a capacitor C t The second terminal of (a) is grounded.
A resistance R in the low envelope impedance unit during use t Mainly plays a role of radio frequency signal isolation, and the inductor L t Capacitor C t The signal path presents low resistance at envelope frequency and high resistance at working frequency of linear power amplifier, and the control voltage provided by the bias voltage detection unit can control the pHEMT transistor M t To exhibit variable resistance characteristics.
Preferably, the bias voltage is detectedThe measuring unit comprises a resistor R h Resistance R h+1 And a resistor R h+2 And a resistor R h+3 Resistance R h+4 Diode D h And HBT transistor Q h (ii) a Resistance R h Respectively connected with the resistor R m+1 And the emitter of HBT transistor of the final stage self-adaptive bias circuit is connected, and the second ends of the HBT transistor are respectively connected with the resistor R h+2 First terminal of (1), diode D h The anode of the diode D h Negative electrode and resistor R h+1 Is connected to a first terminal of a resistor R h+1 The second terminal of (a) is grounded; resistance R h+2 And HBT transistor Q h Base connection of (2), HBT transistor Q h Emitter and resistor R of h+4 Is connected to a first terminal of a resistor R h+4 Is grounded, and a resistor R h+3 Is connected to a power supply, and the second terminals are respectively connected to HBT transistors Q h Collector of, a resistance R of said low envelope impedance unit t Is connected.
With the increase of the output power of the linear power amplifying circuit, the pass resistor R in the self-adaptive bias circuit of the final amplifying circuit m+1 Is also gradually increased, and thus, can be at its HBT transistor Q m+2 The emitter obtains a voltage value V which increases with the output power 1 HBT transistor Q h For applying a voltage V 1 Amplifying, diode D h For compensating HBT transistor Q h V of BE junction appears with increasing temperature be Voltage reduction to ensure HBT transistor Q 9b Has temperature uniformity. Resistance R h And a resistor R h+1 Diode D h Collectively defining HBT transistors Q h D.c. operating point of (3), resistance R h+3 And a resistor R h+4 For setting a typical value of the output level of the bias voltage detection unit.
Example 3:
a high linearity power amplifier suitable for 5G application, as shown in FIG. 2, includes a radio frequency amplification unit, an adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit.
The radio frequencyThe amplifying unit comprises a cascade of several stages of amplifiers, as shown in FIG. 2, the circuit of the amplifier of the final stage comprises an inductor L 2b Capacitor C 4b HBT transistor Q 5b . HBT transistor Q 5b Grounded emitter, HBT transistor Q 5b Collector electrode and inductor L 2b A first terminal connected to the first terminal of the output matching network 1b, and an inductor L 2b Second terminal and power VCC 1b Connected to the second terminal of the output matching network 1b and the capacitor C 4b A first terminal connected to a capacitor C 4b Second terminal and signal output terminal OUT 1b And (4) connecting.
The direct current bias unit comprises a plurality of self-adaptive biases corresponding to the amplifier setting. As shown in fig. 2, HBT transistor Q 6b HBT transistor Q 7b HBT transistor Q 8b And a resistor R 3b Resistance R 4b And a capacitor C 3b Constituting the adaptive biasing of the final amplifier. Resistance R 3b First terminal and power VCC 3b Connection, resistance R 3b Second terminal and HBT transistor Q 6b Collector, HBT transistor Q 6b Base electrode and capacitor C 3b First terminal, HBT transistor Q 8b Base electrodes connected together, HBT transistor Q 6b Emitter and HBT transistor Q 7b Base and HBT transistor Q 7b Collector electrodes connected together, HBT transistor Q 7b Grounded emitter, capacitor C 3b Second terminal grounded, HBT transistor Q 8b Collector and power VCC 2b And (4) connecting.
The bias voltage detection unit comprises a resistor R 5b And a resistor R 6b And a resistor R 7b And a resistor R 8b Resistance R 9b Diode D 1b And HBT transistor Q 9b . Resistance R 5b A first terminal and a resistor R 4b First terminal, HBT transistor Q 8b The emitters being connected together, the resistor R 5b Second terminal and resistor R 7b First terminal, diode D 1b Positive electrodes connected together, diode D 1b Negative electrode and resistor R 6b A first terminal connected to a resistor R 6b A second terminal connected to ground and a resistor R 7b Second terminal and HBT transistor Q 9b Base connection, HBT crystalTransistor Q 9b Emitter and resistor R 9b A first terminal connected to a resistor R 9b Second terminal is grounded, and resistor R 8b First terminal and power VCC 7b And (4) connecting.
As the output power of the linear power amplifier increases, the self-adaptive bias of the final amplifier passes through a resistor R 4b Is also gradually increased, so that the HBT transistor Q can be operated at 8b The emitter obtains a voltage value V which increases with the output power 1 HBT transistor Q 9b For applying a voltage V 1 Amplifying, diode D 1b For compensating HBT transistor Q 9b V of BE junction appears with increasing temperature be Voltage reduction to ensure HBT transistor Q 9b Has temperature uniformity. Resistance R 5b And a resistor R 6b Diode D 1b Collectively defining HBT transistors Q 9b D.c. operating point of (3), resistance R 8b And a resistance R 9b For setting a typical value of the output level of the bias voltage detection unit.
The low envelope impedance unit comprises a resistor R 10b Inductor L 3b Capacitor C 5b And pHEMT transistor M 1b . Resistance R 10b A first terminal and a resistor R 8b Second terminal, HBT transistor Q 9b The collectors are connected together, and a resistor R 10b Second terminal and pHEMT transistor M 1b Gate-connected, pHEMT transistor M 1b Source and inductor L 3b First end connected to inductor L 3b Second terminal and capacitor C 5b A first terminal connected to a capacitor C 5b Second terminal grounded, pHEMT transistor M 1b Drain and resistor R 4b Second terminal, second terminal of inter-stage matching network 1b, and HBT transistor Q 5b The bases are connected together.
Resistance R in low envelope resistance cell 10b Mainly plays a role of radio frequency signal isolation, and the inductor L 3b And a capacitor C 5b The signal path presents low resistance at envelope frequency and high resistance at working frequency of linear power amplifier, and the control voltage provided by the bias voltage detection unit can control the pHEMT transistor M 1b Is turned onTo such an extent that it exhibits variable resistance characteristics. pHEMT transistor M 1b And an inductance L 3b Capacitor C 5b The controllable low-resistance envelope frequency to ground path is formed together, and the controllable low-resistance envelope frequency to ground path is provided for the input end of the final amplification tube of the linear power amplifier, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
Example 4:
a high linearity power amplifier suitable for a 5G system comprises a radio frequency amplifying unit, an adaptive bias unit, a bias voltage detecting unit and a low envelope impedance unit, as shown in figure 2. Specifically, the radio frequency amplification unit comprises a first-stage amplifier and a last-stage amplifier which are cascaded. The self-adaptive bias unit is correspondingly provided with the self-adaptive bias of the first-stage amplifier and the self-adaptive bias of the final-stage amplifier.
The radio frequency amplification unit comprises an inductor L 1b An inductor L 2b Capacitor C 1b Capacitor C 4b HBT transistor Q 1b HBT transistor Q 5b Input matching network 1b 、 An interstage matching network 1b and an output matching network 1b. Capacitor C 1b First terminal and signal input terminal IN 1b Connection, capacitance C 1b A second terminal connected to the first terminal of the input matching network 1b, and an HBT transistor Q 1b Emitter connected to ground, HBT transistor Q 1b Collector electrode and inductor L 1b A first terminal connected to the first terminal of the interstage matching network 1b, and an inductor L 1b Second terminal and power VCC 4b Connected, HBT transistor Q 5b Emitter connected to ground, HBT transistor Q 5b Collector electrode and inductor L 2b A first terminal connected to the first terminal of the output matching network 1b, and an inductor L 2b Second terminal and power VCC 1b Connected to the second terminal of the output matching network 1b and the capacitor C 4b A first terminal connected to a capacitor C 4b Second terminal and signal output terminal OUT 1b And (4) connecting.
In the adaptive bias unit, HBT transistor Q 2b HBT transistor Q 3b HBT transistor Q 4b Resistance R 1b Resistance R 2b And a capacitor C 2b Constituting the adaptive biasing of the first stage amplifier. HBT transistor Q 6b HBT transistor Q 7b HBT transistor Q 8b Resistance R 3b Resistance R 4b And a capacitor C 3b Constituting the adaptive biasing of the second stage amplifier. Resistance R 1b First terminal and power VCC 6b Connection, resistance R 1b Second terminal and HBT transistor Q 2b Collector, HBT transistor Q 2b Base electrode and capacitor C 2b First terminal, HBT transistor Q 4b Base electrodes connected together, HBT transistor Q 2b Emitter and HBT transistor Q 3b Base and HBT transistor Q 3b Collector electrodes connected together, HBT transistor Q 3b Emitter connected to ground, capacitor C 2b A second terminal connected to ground, an HBT transistor Q 4b Collector and power VCC 5b Connected, HBT transistor Q 4b Emitter and resistor R 2b A first end connected to a resistor R 2b A second terminal connected to the second terminal of the input matching network 1b, and an HBT transistor Q 1b Base electrodes connected together, resistor R 3b First terminal and power VCC 3b Connection, resistance R 3b Second terminal and HBT transistor Q 6b Collector, HBT transistor Q 6b Base electrode and capacitor C 3b First terminal, HBT transistor Q 8b Base electrodes connected together, HBT transistor Q 6b Emitter and HBT transistor Q 7b Base and HBT transistor Q 7b Collector electrodes connected together, HBT transistor Q 7b Emitter connected to ground, capacitor C 3b A second terminal connected to ground, an HBT transistor Q 8b Collector and power VCC 2b And (4) connecting.
The bias voltage detection unit includes a resistor R 5b Resistance R 6b Resistance R 7b Resistance R 8b Resistance R 9b Diode D 1b And HBT transistor Q 9b . Resistance R 5b A first terminal and a resistor R 4b First terminal, HBT transistor Q 8b The emitters being connected together, the resistor R 5b Second terminal and resistor R 7b First terminal, diode D 1b Positive electrodes connected together, diode D 1b Negative electrode and resistor R 6b A first end connected to a resistor R 6b A second terminal connected to ground, a resistor R 7b Second terminal and HBT transistor Q 9b Base connection, HBT transistor Q 9b Emitter and resistor R 9b A first terminal connected to a resistor R 9b A second terminal connected to ground, a resistor R 8b First terminal and power VCC 7b And (4) connecting.
The low envelope impedance unit comprises a resistor R 10b Inductor L 3b Capacitor C 5b And pHEMT transistor M 1b . Resistance R 10b A first terminal and a resistor R 8b Second terminal, HBT transistor Q 9b The collectors are connected together, and a resistor R 10b Second terminal and pHEMT transistor M 1b Gate-connected, pHEMT transistor M 1b Source and inductor L 3b First end connected to inductor L 3b Second terminal and capacitor C 5b A first terminal connected to a capacitor C 5b A second terminal connected to ground, a pHEMT transistor M 1b Drain and resistor R 4b Second terminal, second terminal of inter-stage matching network 1b, and HBT transistor Q 5b The bases are connected together.
As shown in fig. 2, the working principle of the present invention is as follows:
radio frequency signal pass signal input terminal IN 1b Entering a high linearity power amplifier and passing through a capacitor C 1b Then, the input matching network 1b is entered to perform impedance change on the signal, and the signal passes through HBT transistor Q 1b The signal is amplified, subjected to impedance change by an interstage matching network 1b, and then subjected to HBT (heterojunction bipolar transistor) Q 5b The signal is amplified again, subjected to impedance change through an output matching network 1b and passes through a capacitor C 4b Then, the signal output terminal OUT 1b And (6) outputting.
In a DC bias unit, HBT transistor Q 2b HBT transistor Q 3b HBT transistor Q 4b Resistance R 1b Resistance R 2b And a capacitor C 2b Forming an adaptive bias for the first stage amplifier; HBT transistor Q 6b HBT transistor Q 7b HBT transistor Q 8b Resistance R 3b Resistance R 4b And a capacitor C 3b Forming a final amplifierAnd (4) self-adaptive bias. HBT transistor Q in adaptive biasing of final amplifier 6b And HBT transistor Q 7b The base electrode and the collector electrode of the tube are in short circuit to form a structure of connecting double diodes in series. Through HBT transistor Q 8b Back-flow HBT transistor Q 5b Current magnitude and HBT transistor Q 6b The current above is proportional. And as the input power increases, HBT transistor Q 8b The BE junction diode of (1) also has V be A reduced voltage condition. While HBT transistor Q 6b And HBT transistor Q 7b Serially connected HBT transistor Q 8b The transistor base provides a relatively stable diode clamping voltage, so that the HBT transistor Q 8b V of the tube be The voltage reduction can compensate for the HBT transistor Q 5b Upper BE junction voltage decreases with increasing input power. Decoupling capacitor C 3b Suppressing the HBT transistor Q 8b The voltage of the base electrode node is changed, and the linear power level of the HBT power amplifier is improved. The self-adaptive bias structure of the first-stage amplifier is completely the same as that of the final-stage amplifier, and the functions are consistent. In summary, the adaptive bias structure can suppress bias drift of the HBT transistor due to self-heating effect, improve linearity of the power amplifier, and increase output power.
As the output power of the linear power amplifier increases, the self-adaptive bias of the final amplifier passes through a resistor R 4b Is also gradually increased, so that the HBT transistor Q can be operated at 8b The emitter obtains a voltage value V which increases along with the increase of the output power 1 HBT transistor Q 9b For applying a voltage V 1 Amplifying, diode D 1b For compensating HBT transistor Q 9b V of BE junction appears with increasing temperature be Voltage reduction to ensure HBT transistor Q 9b Has temperature uniformity. Resistance R 5b Resistance R 6b Diode D 1b Collectively defining HBT transistors Q 9b D.c. operating point of (3), resistance R 8b And a resistance R 9b For setting a typical value of the output level of the bias voltage detection unit.
Resistance R in low envelope impedance unit 10b Mainly plays a role of radio frequency signal isolation, and the inductor L 3b And a capacitor C 5b The signal path presents low resistance at envelope frequency and high resistance at working frequency of linear power amplifier, and the control voltage provided by the bias voltage detection unit can control the pHEMT transistor M 1b To exhibit variable resistance characteristics.
pHEMT transistor M 1b And an inductance L 3b Capacitor C 5b The controllable low-resistance envelope frequency to ground path is formed together, and the controllable low-resistance envelope frequency to ground path is provided for the input end of the final amplification tube of the linear power amplifier, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
As shown in fig. 3, the output third-order intermodulation point curves of the low side and the high side of the conventional linear power amplifier are not equal, and the distance between the output third-order intermodulation point curves of the low side and the high side tends to be larger and larger as the output power increases. As shown in fig. 4, the overlap ratio of the low-side and high-side output third-order intermodulation point curves of the high-linearity power amplifier of the invention is high, and the phenomenon that the distance between the low-side and high-side output third-order intermodulation point curves is increased obviously does not occur with the increase of the output power.
The linear characteristic of the linear power amplifier is generally characterized by adopting a curve of output third-order intermodulation points of the linear power amplifier along with the change of output power:
under the same output power, the smaller the output third-order intermodulation point value is, the better the linearity is.
Under the same output power, the higher the coincidence degree of the three-order inter-modulation point curves output by the low side and the high side is, the better the linearity is.
Comparing fig. 3 and fig. 4, it can be seen that the high linearity power amplifier of the present invention has significantly better linearity than the conventional linear power amplifier.
On the basis of the traditional linear power amplifier, the bias voltage detection unit and the low envelope impedance unit are added, so that the influence of the memory effect on the linear power amplifier can be reduced under the condition of large working bandwidth, and the linearity of the linear power amplifier is improved. The memory effect of the linear power amplifier is mainly caused by envelope modulation generated by the signal at the input end of the final amplifier tube. When the output power is small, the linearity of the linear power amplifier is high, the memory effect is small, and the linearity of the radio-frequency signal output by the transmitter is hardly influenced, so that the pHEMT transistor in the low envelope impedance unit is in a high configuration in order to give consideration to the conventional electrical characteristics of the linear power amplifier, such as small signal gain, temperature stability and the like.
Along with the gradual increase of the output power, the bias voltage detection unit detects the gradually increased voltage signal, the gradually increased voltage signal is amplified to become a gate control signal of the pHEMT transistor in the low-envelope impedance unit, and the magnitude of the impedance value of the low-envelope impedance channel in the access signal path is controlled through the conduction degree of the pHEMT transistor. Because the low-envelope impedance unit has the frequency-selecting characteristic, the working frequency of the power amplifier is constant, and a high configuration is presented, and a controllable low-impedance envelope frequency is provided for the input end of the final-stage amplification tube of the linear power amplifier to the ground at the baseband frequency, so that the adverse effect of the memory effect on the linearity of the linear power amplifier is inhibited.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications and equivalent variations of the above embodiments according to the technical spirit of the present invention are included in the scope of the present invention.
Claims (7)
1. A high-linearity power amplifier suitable for a 5G system is characterized by comprising a radio frequency amplification unit, an adaptive bias unit, a bias voltage detection unit and a low envelope impedance unit; the radio frequency amplification unit comprises a plurality of cascaded amplification circuits, and the self-adaptive bias unit is provided with a plurality of self-adaptive bias circuits corresponding to the plurality of amplification circuits; the amplifying circuit comprises an HBT transistor Q n Said HBT transistor Q n Emitter of the transistor (2) is grounded, and an HBT transistor Q of an amplifier circuit of a final stage n The collector of the grid is connected with an output matching network; the self-adaptive bias circuit passes through a resistor R m+1 HBT transistor Q connected with amplifying circuit n The base electrode of (1) is connected; the bias voltage detection unitAn adaptive bias circuit with one end of the element arranged at the final stage and a resistor R m+1 And the other end is connected with the low envelope impedance unit;
the low envelope impedance unit comprises a resistor R t Inductor L t Capacitor C t And pHEMT transistor M t pHEMT transistor M t Gate pass resistance R t Connected with the bias voltage detection unit, and having a source electrode connected with the inductor L t And drain electrodes are respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 And HBT transistor Q of amplifier circuit of final stage n The base electrode of (1) is connected; inductor L t Second terminal of (2) and capacitor C t Is connected to a first terminal of a capacitor C t The second terminal of (1) is grounded;
the bias voltage detection unit is used for detecting a voltage signal of a final-stage self-adaptive bias circuit, amplifying the voltage signal and inputting the amplified voltage signal to the low-envelope impedance unit to serve as a pHEMT transistor M of the low-envelope impedance unit t As a gate control signal of the HBT transistor Q of the final amplifier circuit n The input end provides a controllable low-resistance envelope frequency to the ground path, so that adverse effects of memory effects on the linearity of the linear power amplifier are suppressed.
2. The high linearity power amplifier suitable for 5G system of claim 1, wherein the bias voltage detection unit comprises a resistor R h And a resistor R h+1 Resistance R h+2 Resistance R h+3 Resistance R h+4 Diode D h And HBT transistor Q h (ii) a The resistor R h The first end of the self-adaptive bias circuit is arranged at the final stage and the resistor R m+1 And the second terminals are respectively connected with the resistor R h+2 First terminal of (1), diode D h The anode of the diode D is connected with h Negative electrode and resistor R h+1 Is connected to a first terminal of a resistor R h+1 The second terminal of (1) is grounded; resistance R h+2 And HBT transistor Q h Base connection of HBT transistor Q h Emitter and resistor R of h+4 Is connected to a first terminal of a resistor R h+4 Is grounded, and a resistor R h+3 Is connected to a power supply, and the second terminals are respectively connected to HBT transistors Q h Collector electrode, resistor R t Is connected to the first end of the first housing.
3. The high linearity power amplifier of claim 2, wherein the adaptive bias circuit comprises an HBT transistor Q m HBT transistor Q m+1 HBT transistor Q m+2 Resistance R m And a capacitor C m (ii) a Resistance R m Is connected to a power supply, and a second terminal is connected to an HBT transistor Q m Collector, base and capacitor C m First terminal of, HBT transistor Q m+2 Is connected with the base electrode; HBT transistor Q m Emitter of and HBT transistor Q m+1 Base and collector connections of, a transistor Q m+1 Emitter of (2) is grounded, capacitor C m The second terminal of (1) is grounded; HBT transistor Q m+2 Is connected to a power supply, and the emitter is connected to a resistor R m+1 Is connected with the first end of the first connecting pipe; resistance R of the bias voltage detection unit h Respectively connected with resistors R connected with the self-adaptive bias circuit of the final stage m+1 First terminal of and HBT transistor Q of the final stage adaptive bias circuit m+2 Is connected to the emitter.
4. The high linearity power amplifier suitable for 5G system as claimed in claim 1, wherein the amplifying circuit further comprises an inductor L n Capacitor C n Said HBT transistor Q n Collector and inductor L n Is connected to the first terminal of the inductor L n The second end of the power supply is connected with a power supply; capacitor C of the first stage of the amplifying circuit n First terminal and signal input terminal IN n Connected with the first end of the input matching network, and the second end of the input matching network is connected with the HBT transistor Q of the first stage of the amplifying circuit n The base electrode of (1) is connected; capacitance C of final amplifier circuit n First terminal of (2) and inductor L n Is connected with the first terminal of the signal output terminal OUT, and the second terminal is connected with the signal output terminal OUT n And (4) connecting.
5. The high linearity power amplifier suitable for 5G system according to claim 4, wherein the radio frequency amplifying unit comprises two cascaded amplifying circuits, and two adaptive bias circuits are correspondingly arranged in the adaptive bias unit.
6. The high linearity power amplifier of claim 5G, wherein the input matching network and the HBT transistor Q of the amplifying circuit of the first stage are connected in series n A first-stage self-adaptive bias circuit is arranged between the base electrodes; HBT transistor Q of the first-stage amplification circuit n Collector of the HBT transistor Q and the final stage of the amplifier circuit n Is provided with an inter-stage matching network with the HBT transistor Q of the amplifier circuit of the final stage n A final-stage adaptive bias circuit is arranged between the bases of the two.
7. The high linearity power amplifier suitable for 5G system as claimed in claim 4, wherein the inductor L is n Is a choke inductance for powering the amplification circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310050283.XA CN115913155B (en) | 2023-02-01 | 2023-02-01 | High-linearity power amplifier suitable for 5G system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310050283.XA CN115913155B (en) | 2023-02-01 | 2023-02-01 | High-linearity power amplifier suitable for 5G system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115913155A true CN115913155A (en) | 2023-04-04 |
| CN115913155B CN115913155B (en) | 2023-05-23 |
Family
ID=85750223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310050283.XA Active CN115913155B (en) | 2023-02-01 | 2023-02-01 | High-linearity power amplifier suitable for 5G system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115913155B (en) |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6404579B1 (en) * | 1999-11-23 | 2002-06-11 | Texas Instruments Incorporated | Current bias voltage sense single ended preamplifier |
| US20100073088A1 (en) * | 2006-03-17 | 2010-03-25 | Nujira Limited | Joint optimisation of supply and bias modulation |
| US20160065250A1 (en) * | 2014-08-27 | 2016-03-03 | Freescale Semiconductor, Inc. | Wireless communication unit, integrated circuits and method for linearizing a transmitter signal |
| WO2017020255A1 (en) * | 2015-08-04 | 2017-02-09 | Nokia Technologies Oy | Method and apparatus for power amplification |
| CN107911086A (en) * | 2017-12-25 | 2018-04-13 | 牛旭 | The radio-frequency power amplifier and radio frequency communication terminal of a kind of high linearity |
| US20190157983A1 (en) * | 2017-11-20 | 2019-05-23 | National Cheng Kung University | Energy Acquisition and Power Supply System |
| CN111313849A (en) * | 2020-02-26 | 2020-06-19 | 上海华虹宏力半导体制造有限公司 | High-linearity radio frequency power amplifier |
| CN113595518A (en) * | 2021-09-30 | 2021-11-02 | 成都明夷电子科技有限公司 | Self-adaptive high-reliability HBT linear power amplifier |
| WO2022142637A1 (en) * | 2020-12-31 | 2022-07-07 | 锐石创芯(深圳)科技股份有限公司 | Low noise amplifier circuit |
| US20220416726A1 (en) * | 2021-01-20 | 2022-12-29 | The Regents Of The University Of California | Adaptive bias circuits and methods for cmos millimeter-wave power amplifiers |
| CN115567012A (en) * | 2022-11-22 | 2023-01-03 | 成都明夷电子科技有限公司 | Self-adaptive broadband Doherty power amplifier |
-
2023
- 2023-02-01 CN CN202310050283.XA patent/CN115913155B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6404579B1 (en) * | 1999-11-23 | 2002-06-11 | Texas Instruments Incorporated | Current bias voltage sense single ended preamplifier |
| US20100073088A1 (en) * | 2006-03-17 | 2010-03-25 | Nujira Limited | Joint optimisation of supply and bias modulation |
| US20160065250A1 (en) * | 2014-08-27 | 2016-03-03 | Freescale Semiconductor, Inc. | Wireless communication unit, integrated circuits and method for linearizing a transmitter signal |
| WO2017020255A1 (en) * | 2015-08-04 | 2017-02-09 | Nokia Technologies Oy | Method and apparatus for power amplification |
| US20190157983A1 (en) * | 2017-11-20 | 2019-05-23 | National Cheng Kung University | Energy Acquisition and Power Supply System |
| CN107911086A (en) * | 2017-12-25 | 2018-04-13 | 牛旭 | The radio-frequency power amplifier and radio frequency communication terminal of a kind of high linearity |
| CN111313849A (en) * | 2020-02-26 | 2020-06-19 | 上海华虹宏力半导体制造有限公司 | High-linearity radio frequency power amplifier |
| WO2022142637A1 (en) * | 2020-12-31 | 2022-07-07 | 锐石创芯(深圳)科技股份有限公司 | Low noise amplifier circuit |
| US20220416726A1 (en) * | 2021-01-20 | 2022-12-29 | The Regents Of The University Of California | Adaptive bias circuits and methods for cmos millimeter-wave power amplifiers |
| CN113595518A (en) * | 2021-09-30 | 2021-11-02 | 成都明夷电子科技有限公司 | Self-adaptive high-reliability HBT linear power amplifier |
| CN115567012A (en) * | 2022-11-22 | 2023-01-03 | 成都明夷电子科技有限公司 | Self-adaptive broadband Doherty power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115913155B (en) | 2023-05-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109951159B (en) | Doherty power amplifier based on transformer | |
| US7928804B2 (en) | Power amplifier | |
| US7944306B2 (en) | Dual bias control circuit | |
| CN115567012B (en) | Self-adaptive broadband Doherty power amplifier | |
| US11133786B2 (en) | Radio frequency power amplifier module having high linearity and power-added efficiency and implementation method | |
| JP6680235B2 (en) | Power amplifier circuit and high frequency module | |
| CN213990604U (en) | Amplifier bias circuit and radio frequency power amplifier | |
| CN107863939B (en) | Low-power consumption feedback type power amplifying circuit | |
| US6492869B1 (en) | Linear amplifier and radio communication apparatus using the same | |
| CN112260654B (en) | Power amplifier system | |
| US11848650B2 (en) | Differential power amplifier | |
| CN111510089A (en) | Low-noise amplification module with bypass function and control method | |
| CN114679140B (en) | High linearity radio frequency power amplifier | |
| US20230344397A1 (en) | Dynamic Bias for Doherty PA | |
| CN116260401A (en) | Radio frequency power amplifier and radio frequency power amplifier module | |
| CN115865013A (en) | High-linearity power amplifier based on Baseband impedance matching | |
| CN211791445U (en) | Self-adaptive bias circuit for power amplifier chip | |
| CN116232246A (en) | Radio frequency power amplifier | |
| CN115913155B (en) | High-linearity power amplifier suitable for 5G system | |
| CN110719077B (en) | Power amplifier and electronic equipment | |
| CN111262534A (en) | Self-adaptive bias circuit for power amplifier chip | |
| CN114584077A (en) | Bias circuit of Doherty power amplifier | |
| CN112953421A (en) | High-linearity AB power amplifier with broadband predistortion and phase compensation | |
| US11936350B2 (en) | Power amplifier circuit | |
| US20230353095A1 (en) | Linearization of differential rf power amplifier by bias control using cross-coupling components |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: Floor 9, block a, Xiewei center, No. 333 Dehua Road, hi tech Zone, Chengdu, Sichuan 610000 Patentee after: Chengdu Mingyi Electronic Technology Co.,Ltd. Country or region after: China Address before: Floor 9, block a, Xiewei center, No. 333 Dehua Road, hi tech Zone, Chengdu, Sichuan 610000 Patentee before: Chengdu Mingyi Electronic Technology Co.,Ltd. Country or region before: China |
|
| CP03 | Change of name, title or address |