CN115912955B

CN115912955B - Bridge rectifier control circuit and control method

Info

Publication number: CN115912955B
Application number: CN202310144331.1A
Authority: CN
Inventors: 刘祖贵; 钱秋晓; 覃自党; 杨威
Original assignee: Great Wall Power Technology Co ltd
Current assignee: Great Wall Power Technology Co ltd
Priority date: 2023-02-21
Filing date: 2023-02-21
Publication date: 2023-05-16
Anticipated expiration: 2043-02-21
Also published as: CN115912955A

Abstract

The utility model provides a bridge rectifier control circuit and control method, relates to bridge rectifier's technical field. The control circuit includes a first control circuit including: the first input end is connected with a first center node of a first bridge arm of the bridge rectifier circuit and the first output end; a second control circuit comprising: the second input end is connected with a second center node of a second bridge arm of the bridge rectifier circuit and the second output end; wherein the first output is configured to output a low level when the first input receives a positive voltage and to output a high level when the first input receives a negative voltage; the second output terminal is configured to output a low level when the second input terminal receives a positive voltage, and to output a high level when the second input terminal receives a negative voltage. The control signal of the bridge rectifier bridge is generated by means of the hardware circuit, so that the design difficulty and the manufacturing cost are low. And any MOS tube in the rectifier bridge can be flexibly controlled, and misleading of the MOS tube is prevented.

Description

Bridge rectifier control circuit and control method

Technical Field

The invention relates to the technical field of bridge rectification, in particular to a bridge rectification control circuit and a control method thereof.

Background

With the development of technology, higher requirements are placed on power supply circuits and power supply modules. The rectifier bridge in the traditional bridge rectifier circuit uses diodes for rectification, and the loss generated by voltage drop is larger. At present, synchronous rectification technology is a very common technology applied to the field of switching power supplies, and a metal oxide semiconductor field effect transistor (MOSFET (Metal oxide semiconductor field Effect transistor) with extremely low on-state resistance is adopted to replace a diode, so that the loss generated by a circuit can be reduced, and the integral rectification loss is reduced.

When alternating voltage is applied to two ends of the rectifier bridge, when forward current flows from a source electrode to a drain electrode of the MOS tube, the MOS tube is driven to be opened by a Pulse Width Modulation (PWM) signal, and the conduction internal resistance of the MOS tube is far smaller than the forward voltage drop of the diode. When the reverse current flows from the source electrode to the drain electrode of the MOS tube, the MOS tube is driven to be turned off by PWM, and the reverse current is cut off. If the MOS tube is matched with ideal PWM driving control, the bridge rectifier circuit has the characteristic of an ideal rectifier bridge.

However, the integrated synchronous rectification chip has higher cost, and the synchronous rectification has higher control requirement on the MOS tube, if the conduction time sequence is wrong, the error conduction of the MOS tube can be caused, so that the bridge rectification circuit is invalid in operation. Therefore, a control circuit for realizing the driving function of the bridge rectifier circuit at low cost is needed in the industry, and meanwhile, the control circuit can interlock the rectifier drive to prevent misleading of the MOS tube.

Disclosure of Invention

The method aims at the problems that the cost of the integrated synchronous rectification chip is high, and the MOS tube of the bridge rectification circuit is easy to be conducted by mistake in the synchronous rectification control process.

The application proposes a bridge rectifier control circuit, include: a first control circuit comprising: the first input end is connected with a first center node of a first bridge arm of the bridge rectifier circuit and the first output end; a second control circuit comprising: the second input end is connected with a second center node of a second bridge arm of the bridge rectifier circuit and the second output end; wherein the first output terminal is configured to output a low level when the first input terminal receives a positive voltage, and to output a high level when the first input terminal receives a negative voltage; the second output terminal is configured to output a low level when the second input terminal receives a positive voltage, and to output a high level when the second input terminal receives a negative voltage.

Optionally, the bridge rectifier control circuit further includes: the first isolation driver is connected with the first output end and comprises a third output end; the second isolation driver is connected with the second output end and comprises a fourth output end; wherein the first isolation driver is configured to output a third output signal to the third output terminal in accordance with a first output signal of the first output terminal; the second isolation driver is configured to output a fourth output signal to the fourth output terminal in accordance with a second output signal of the second output terminal.

Optionally, the first control circuit further includes a first diode, a first resistor, a second resistor, a first dc power supply, and a first triode; the first diode, the first resistor and the first direct current power supply are connected in series between the first input end and the grounding end, the cathode of the first diode is connected with the first input end, the cathode of the first direct current power supply is connected with the grounding end, the second resistor is connected between the anode of the first direct current power supply and the first output end, the anode of the first diode is connected with the base electrode of the first triode, the collector electrode of the first triode is connected with the first output end, and the emitter of the first triode is connected with the grounding end; the second control circuit also comprises a fourth diode, a fourth resistor, a fifth resistor, a second direct current power supply and a second triode; the fourth diode, the fourth resistor and the second direct current power supply are connected in series between the second input end and the grounding end, the cathode of the fourth diode is connected with the second input end, the cathode of the second direct current power supply is connected with the grounding end, the fifth resistor is connected between the anode of the second direct current power supply and the second output end, the anode of the fourth diode is connected with the base of the second triode, the collector of the second triode is connected with the second output end, and the emitter of the second triode is connected with the grounding end.

Optionally, the first control circuit further includes a second diode, a cathode of the second diode is connected to the first input terminal, and an anode of the second diode is connected to the second output terminal; and the second control circuit further comprises a third diode, wherein the cathode of the third diode is connected with the second input end, and the anode of the third diode is connected with the first output end.

Optionally, the first control circuit further includes a third resistor, and the third resistor is connected between the anode of the first diode and the base of the first triode; and the second control circuit further comprises a sixth resistor connected between the anode of the fourth diode and the base of the second triode.

Optionally, the first bridge arm of the bridge rectifier circuit includes a first MOS transistor and a third MOS transistor connected in series between a first bus and a ground line, and a common node of the first MOS transistor and the third MOS transistor is connected to the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the second MOS tube and the fourth MOS tube is connected with the second input end; the first output end is connected with the grid electrode of the third MOS tube, the second output end is connected with the grid electrode of the fourth MOS tube, the third output end is connected with the grid electrode of the second MOS tube, and the fourth output end is connected with the grid electrode of the first MOS tube.

Optionally, the first bridge arm of the bridge rectifier circuit includes a fifth diode and a third MOS transistor connected in series between a first bus and a ground line, and a common node of the fifth diode and the third MOS transistor is connected to the first input end; the second bridge arm of the bridge rectifier circuit comprises a sixth diode and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the sixth diode and the fourth MOS tube is connected with the second input end; the first output end is connected with the grid electrode of the third MOS tube, and the second output end is connected with the grid electrode of the fourth MOS tube.

Optionally, the first bridge arm of the bridge rectifier circuit includes a first MOS transistor and a fifth diode connected in series between a first bus and a ground line, and a common node of the fifth diode and the first MOS transistor is connected to the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a sixth diode which are connected in series between the first bus and the ground wire, and a common node of the sixth diode and the second MOS tube is connected with the second input end; the fourth output end is connected with the grid electrode of the first MOS tube, and the third output end is connected with the grid electrode of the second MOS tube.

Optionally, the first bridge arm of the bridge rectifier circuit includes a first MOS transistor and a third MOS transistor connected in series between a first bus and a ground line, and a common node of the fifth diode and the third MOS transistor is connected to the first input end; the second bridge arm of the bridge rectifier circuit comprises a fifth diode and a sixth diode which are connected in series between the first bus and the ground, and a common node of the fifth diode and the sixth diode is connected with the second input end; the fourth output end is connected with the grid electrode of the first MOS tube, and the first output end is connected with the grid electrode of the third MOS tube.

Optionally, the first bridge arm of the bridge rectifier circuit includes a fifth diode and a sixth diode connected in series between a first bus and a ground, and a common node of the fifth diode and the sixth diode is connected to the first input terminal; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the second MOS tube and the fourth MOS tube is connected with the second input end; the second output end is connected with the grid electrode of the fourth MOS tube, and the third output end is connected with the grid electrode of the second MOS tube.

The application also provides a bridge rectification control method, which comprises the following steps:

when the first input end of the first control circuit receives a positive voltage and the second input end of the second control circuit receives a negative voltage, the first control circuit outputs a low level at the first output end, and the second control circuit outputs a high level at the second output end;

when the second input end of the second control circuit receives the positive voltage and the first input end of the first control circuit receives the negative voltage, the second control circuit outputs a low level at the second output end, and the first control circuit outputs a high level at the first output end;

outputting, by a first isolation driver, a third output signal at a third output of the first isolation driver in accordance with a first output signal of the first output;

outputting, by a second isolation driver, a fourth output signal at a fourth output of the second isolation driver in accordance with a second output signal of the second output;

the first input end of the first control circuit is connected with a first central node of a first bridge arm of the bridge rectifier circuit, and the second input end of the second control circuit is connected with a second central node of a second bridge arm of the bridge rectifier circuit.

Optionally, the first control circuit includes a first diode, a first resistor, a second resistor, a first dc power supply, and a first triode; the first diode, the first resistor and the first direct current power supply are connected in series between the first input end and the grounding end, the cathode of the first diode is connected with the first input end, the cathode of the first direct current power supply is connected with the grounding end, the second resistor is connected between the anode of the first direct current power supply and the first output end, the anode of the first diode is connected with the base electrode of the first triode, the collector electrode of the first triode is connected with the first output end, and the emitter of the first triode is connected with the grounding end; the second control circuit comprises a fourth diode, a fourth resistor, a fifth resistor, a second direct current power supply and a second triode; the fourth diode, the fourth resistor and the second direct current power supply are connected in series between the second input end and the grounding end, the cathode of the fourth diode is connected with the second input end, the cathode of the second direct current power supply is connected with the grounding end, the fifth resistor is connected between the anode of the second direct current power supply and the second output end, the anode of the fourth diode is connected with the base of the second triode, the collector of the second triode is connected with the second output end, and the emitter of the second triode is connected with the grounding end.

Optionally, the method further comprises: when the first input end of the first control circuit receives a positive voltage and the second input end of the second control circuit receives a negative voltage, a first triode in the first control circuit is conducted to pull down the first output end of the first control circuit, so that the first control circuit outputs a low level at the first output end, and meanwhile, the voltage of the second output end of the second control circuit is gradually raised to a high level, so that the second control circuit outputs a high level at the second output end.

Optionally, the method further comprises: when the second input end of the second control circuit receives a positive voltage and the first input end of the first control circuit receives a negative voltage, a second triode in the second control circuit is conducted to pull down the second output end of the second control circuit, so that the second control circuit outputs a low level at the second output end, and meanwhile, the voltage of the first output end of the first control circuit is gradually raised to a high level, so that the first control circuit outputs a high level at the first output end.

Optionally, the method further comprises: when the first input end receives a positive voltage and the second input end receives a negative voltage, a third diode in the second control circuit is conducted so as to lock the first output end of the first control circuit at a low level; in step 1204, when the second input receives a positive voltage and the first input receives a negative voltage, a second diode in the first control circuit is turned on to lock a second output of the second control circuit at a low level.

Optionally, the method further comprises:

connecting the first output end with a grid electrode of a third MOS tube in the bridge rectifier circuit;

connecting the second output end with a grid electrode of a fourth MOS tube in the bridge rectifier circuit;

connecting the third output end with a grid electrode of a second MOS tube in the bridge rectifier circuit;

connecting the fourth output end with the grid electrode of the first MOS tube in the bridge rectifier circuit;

the first bridge arm of the bridge rectifier circuit comprises a first MOS tube and a third MOS tube which are connected in series between a first bus and a ground wire, and a common node of the first MOS tube and the third MOS tube is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the second MOS tube and the fourth MOS tube is connected with the second input end.

The present application may achieve at least one of the following benefits:

the bridge rectifier control signal is generated by using fewer discrete devices, and the cost of the discrete devices is lower than that of the integrated bridge rectifier control chip. In addition, the bridge rectifier control circuit provided by the application can independently control any one or a plurality of MOS (metal oxide semiconductor) tubes in the rectifier bridge, has high flexibility and can be suitable for bridge rectifier circuits with different configurations. Furthermore, the bridge rectifier control circuit can interlock the rectifier drive to prevent misleading of the MOS tube, so that the circuit has strong anti-interference capability and can still work normally under the limit conditions of lightning stroke, AC ignition and the like.

The foregoing has outlined rather broadly the features and technical advantages of the present application in order that the detailed description of the application that follows may be better understood. Additional features and advantages of the application will be described hereinafter which form the subject of the claims of the application. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present application. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the application as set forth in the appended claims.

Drawings

For a more complete understanding of the present application and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 shows a block diagram of a bridge rectifier control circuit provided by an embodiment of the present application;

FIG. 2 shows a schematic connection diagram of a first embodiment of a bridge rectifier control circuit of the present application;

FIG. 3 shows a schematic connection diagram of a second embodiment of a bridge rectifier control circuit of the present application;

FIG. 4 is a schematic diagram showing the connection of a third embodiment of the bridge rectifier control circuit of the present application;

FIG. 5 shows a schematic connection diagram of a fourth embodiment of a bridge rectifier control circuit of the present application;

FIG. 6 is a diagram showing a connection example of the first embodiment of the bridge rectifier circuit of the present application;

FIG. 7 shows a timing diagram of the operation of a fourth embodiment of the bridge rectifier control circuit of the present application;

FIG. 8 is a diagram showing a connection example of a second embodiment of the bridge rectifier circuit of the present application;

fig. 9 shows a connection example diagram of a third embodiment of the bridge rectifier circuit of the present application;

fig. 10 shows a connection example diagram of a fourth embodiment of the bridge rectifier circuit of the present application;

fig. 11 shows a connection example diagram of a fifth embodiment of the bridge rectifier circuit of the present application;

Fig. 12 shows a flowchart of a bridge rectification control method according to an embodiment of the present application.

Corresponding numerals and symbols in the various drawings generally indicate corresponding parts unless otherwise indicated. The drawings are not necessarily to scale in order to clearly illustrate the relevant aspects of the various embodiments.

Description of the embodiments

The following description of the embodiments of the present application will be made apparent and complete in conjunction with the accompanying drawings, in which embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

Fig. 1 shows a block diagram of a bridge rectification control circuit according to an embodiment of the present application. As shown in fig. 1, the bridge rectifier control circuit 100 includes a first control circuit 102 and a second control circuit 104. The first control circuit 102 includes a first input AC-L and a first output N-DRVL. The first input AC-L is connected to a center point of a first leg of the bridge rectifier circuit 200. In one embodiment, the first leg of the bridge rectifier circuit 200 includes a first switching tube and a second switching tube. The first input AC-L is connected to a common node of the first switching tube and the second switching tube. The second control circuit 104 includes a second input AC-H and a second output L-DRVL. The second input AC-N is connected to a center point of the second leg of the bridge rectifier circuit 200. In one embodiment, the second leg of the bridge rectifier circuit 200 includes a third switching tube and a fourth switching tube. The second input terminal AC-H is connected to a common node of the third switching tube and the fourth switching tube.

When the center point of the first bridge arm and the center point of the second bridge arm of the bridge rectifier circuit 200 receive the alternating voltages, the first input terminal AC-L and the second input terminal AC-H of the bridge rectifier control circuit 100 receive the alternating voltages. When the first input terminal AC-L receives a positive voltage from the bridge rectifier circuit 200, the first control circuit 102 outputs a low level at the first output terminal N-DRVL; when the first input terminal AC-L receives a negative voltage, the first control circuit 102 outputs a high level at the first output terminal N-DRVL. When the second input terminal AC-H receives a positive voltage from the bridge rectifier circuit 200, the second control circuit 104 outputs a low level at the second output terminal L-DRVL; when the second input terminal AC-H receives a negative voltage, the second control circuit 104 outputs a high level at the second output terminal L-DRVL.

In one embodiment of the present application, the bridge rectifier control circuit 100 further includes a first isolation driver 106 and a second isolation driver 108. The first isolation driver 106 is coupled to the first output N-DRVL of the first control circuit 102 and includes a third output N-DRVH. The second isolation driver 108 is coupled to the second output terminal L-DRVL of the second control circuit 104 and includes a fourth output terminal L-DRVH. The first isolation driver 106 outputs a third output signal to the third output terminal N-DRVH according to the first output signal of the first output terminal N-DRVL. The second isolation driver 108 outputs a fourth output signal to the fourth output terminal L-DRVH according to the second output signal of the second output terminal L-DRVL.

In one embodiment, the first control circuit 102 outputs a low level first output signal at the first output terminal N-DRVL when the first input terminal AC-L of the bridge rectifier control circuit 100 receives a positive voltage and the first input terminal AC-N receives a negative voltage. The first isolation driver 106 outputs a low-level third output signal at the third output terminal N-DRVH according to the received low level. The low level first and third output signals may cause the switching transistors in the bridge rectification circuit 200 to be turned off. When the first input AC-L of the bridge rectifier control circuit 100 receives a negative voltage and the AC-N receives a positive voltage, the first control circuit 102 outputs a high level first output signal at the first output N-DRVL. The first isolation driver 106 outputs a third output signal at a third output terminal N-DRVH according to the received high level. The high level first and third output signals may cause the switching tubes in the bridge rectification circuit 200 to be turned on. Similarly, the second isolation driver 108 outputs a low or high fourth output signal to the fourth output terminal L-DRVH according to the low or high second output signal of the second output terminal L-DRVL.

Fig. 2 shows a connection schematic diagram of a first embodiment of the bridge rectifier control circuit of the present application. As shown in fig. 2, the first control circuit 102 has a first input AC-L and a first output N-DRVL, and further includes a first diode D1, a first resistor R1, a second resistor R2, a first direct current DC1, and a first transistor Q5. The first diode D1, the first resistor R1 and the first direct current power supply DC1 are connected in series between the first input terminal AC-L and the ground terminal. The cathode of the first diode D1 is connected to the first input terminal AC-L, and the anode of the first direct current power supply DC1 is connected to the ground terminal. The second resistor R2 is connected between the positive pole of the first direct current power supply DC1 and the first output terminal N-DRVL. An anode of the first diode D1 is connected with a base electrode of the first triode Q5, a collector electrode of the first triode Q5 is connected with the first output end N-DRVL, and an emitter electrode of the first triode Q5 is connected with a grounding end.

The second control circuit 104 has a second input terminal AC-N and a second output terminal L-DRVL, and further includes a fourth diode D4, a fourth resistor R4, a fifth resistor R5, a second DC power supply DC2, and a second transistor Q6. The fourth diode D4, the fourth resistor R4 and the second direct current power supply DC2 are connected in series between the second input terminal AC-N and the ground terminal. The cathode of the fourth diode D4 is connected to the second input terminal AC-N, and the anode of the second direct current power supply DC2 is connected to the ground terminal. The fifth resistor R5 is connected between the positive electrode of the second direct current power supply DC2 and the second output end L-DRVL, the anode of the fourth diode D4 is connected with the base electrode of the second triode Q6, the collector electrode of the second triode Q6 is connected with the second output end L-DRVL, and the emitter electrode of the second triode Q6 is connected with the grounding end.

Specifically, when the first input terminal AC-L receives a positive voltage, the first diode D1 is in an off state. The current flows from the first direct current power supply DC1 through the first resistor R1 into the base electrode of the first triode Q5, and the Q5 is in a conducting state. At the same time, current flows from DC1 to the emitter from the collector of Q5 through the second resistor R2, and the voltage of the first output terminal N-DRVL is pulled down by Q5, and a low level is output. At this time, the second input terminal AC-N receives a negative voltage, the cathode of the fourth diode D4 is pulled down by the negative voltage, the fourth diode D4 is turned on, and the current flows from the second DC power source DC2 through the fourth resistor R4 into the anode of D4, and no longer flows into the base of the second triode through the fourth resistor R4, so Q6 becomes an off state. The current flows from DC2 through the fifth resistor R5 into the second output terminal L-DRVL, and the voltage of the second output terminal L-DRVL gradually rises until a high level is output. Likewise, when the first input terminal AC-L receives a negative voltage, Q5 becomes an off state. The current flows from the first direct current power supply DC1 into the first output end N-DRVL through the second resistor R2, and the voltage of the first output end N-DRVL gradually rises until a high level is output. At this time, the second input terminal AC-N receives a positive voltage, the voltage of the second output terminal L-DRVL is pulled down by the turned-on Q6, and a low level is output.

Fig. 3 shows a connection schematic diagram of a second embodiment of the bridge rectifier control circuit of the present application. The bridge rectifier control circuit shown in fig. 3 is similar to the bridge rectifier control circuit shown in fig. 2, except that the first control circuit 102 further includes a third resistor R3 and the second control circuit 104 further includes a fourth resistor R4. In the first control circuit 102, a third resistor R3 is disposed between the anode of the first diode D1 and the base of the first transistor Q5. In the second control circuit 104, a sixth resistor R6 is disposed between the anode of the fourth diode D4 and the base of the second transistor Q6. By setting the third resistor R3, the first triode Q5 can be reliably turned off when the first diode D1 is turned on, and the reliability of the circuit is improved. By setting the sixth resistor R6, the second triode Q6 can be reliably turned off when the fourth diode D4 is turned on, and the reliability of the circuit is improved.

Fig. 4 shows a connection schematic diagram of a third embodiment of the bridge rectifier control circuit of the present application. The bridge rectifier control circuit shown in fig. 4 is similar to the bridge rectifier control circuit shown in fig. 2, except that the first control circuit 102 further includes a second diode D2 and the second control circuit 104 further includes a third diode D3. The cathode of the second diode D2 is connected to the first input AC-L of the first control circuit 102, and the anode of the second diode D2 is connected to the second output L-DRVL of the second control circuit 104. The cathode of the third diode D3 is connected to the second input AC-N of the second control circuit 104, and the anode of the third diode D3 is connected to the first output N-DRVL of the first control circuit 102.

Specifically, when the first input terminal AC-L receives a positive voltage, the first diode D1 is in an off state. The current flows from the first direct current power supply DC1 through the first resistor R1 into the base electrode of the first triode Q5, and the Q5 is in a conducting state. Current also flows from DC1 to the emitter from the collector of Q5 via the second resistor R2, and the voltage at the first output terminal N-DRVL is pulled down by the turned-on Q5, outputting a low level. At this time, the second input terminal AC-N receives a negative voltage, the cathode of the third diode D3 is a negative voltage, and the third diode D3 is turned on, so that the voltage of the first output terminal N-DRVL is also pulled down. Therefore, the low level of the first output terminal N-DRVL is doubly ensured by the operation of the third diode D3 and the first transistor Q5. And since the second input terminal AC-N receives a negative voltage, the cathode of the fourth diode D4 is pulled down by the negative voltage, and current flows from the second direct current power supply DC2 through the fourth resistor R4 into the anode of D4, and no longer flows through the fourth resistor R4 into the base of the second triode, Q6 becomes an off state. The current also flows from the output current of DC2 through the fifth resistor R5 into the second output terminal L-DRVL, and the voltage of the second output terminal L-DRVL gradually rises until a high level is output.

Likewise, when the first input terminal AC-L receives a negative voltage, Q5 becomes an off state. The current flows from the first direct current power supply DC1 into the first output end N-DRVL through the second resistor R2, and the voltage of the first output end N-DRVL gradually rises until a high level is output. At this time, the second input terminal AC-N receives a positive voltage, the voltage of the second output terminal L-DRVL is pulled down by the turned-on Q6, and a low level is output. And, since the first input terminal AC-L receives a negative voltage, the cathode of the second diode D2 is a negative voltage, and the second diode D2 is turned on, so that the voltage of the second output terminal L-DRVL is also pulled down. Therefore, the low voltage of the second output terminal L-DRVL is doubly ensured by the operation of the second diode D2 and the second transistor Q6.

Under the limit conditions of lightning strike, AC strike and the like, the bridge rectifier control circuit shown in fig. 2 or 3 may cause the MOS tube which is supposed to be turned off in the bridge rectifier circuit to be turned on by mistake, so that the same bridge arm of the bridge rectifier circuit generates a through phenomenon, and fatal influence is brought to the bridge rectifier circuit. In the bridge rectifier control circuit shown in fig. 4, due to the double guarantees provided by D2 and D3, the MOS transistor of the bridge rectifier circuit is prevented from being turned on by mistake, so that the anti-interference capability of the whole circuit is enhanced.

Fig. 5 shows a connection schematic diagram of a fourth embodiment of the bridge rectifier control circuit of the present application. The bridge rectifier control circuit shown in fig. 5 is similar to the bridge rectifier control circuit shown in fig. 4, except that the first control circuit 102 further includes a third resistor R3 and the second control circuit 104 further includes a fourth resistor R4. In the first control circuit 102, a third resistor R3 is disposed between the anode of the first diode D1 and the base of the first transistor Q5. In the second control circuit 104, a sixth resistor R6 is disposed between the anode of the fourth diode D4 and the base of the second transistor Q6. By setting the third resistor R3, the first triode Q5 can be reliably turned off when the first diode D1 is turned on, and the reliability of the circuit is improved. By setting the sixth resistor R6, the second triode Q6 can be reliably turned off when the fourth diode D4 is turned on, and the reliability of the circuit is improved.

Fig. 6 shows a connection example diagram of the first embodiment of the bridge rectifier circuit of the present application. As shown in fig. 6, the bridge rectifier circuit 200 includes a first leg and a second leg. The first bridge arm comprises a first MOS tube Q1 and a third MOS tube Q3 which are connected in series between a first bus BD+ and a ground wire, and the second bridge arm comprises a second MOS tube Q2 and a fourth MOS tube Q4 which are connected in series between the first bus BD+ and the ground wire.

The bridge rectifier circuit 200 is connected to the bridge rectifier control circuit 100. Specifically, the common node of the first MOS transistor Q1 and the third MOS transistor Q3 is a first center node of the first bridge arm, and is connected to the first input AC-L of the first control circuit 102 in the rectification control circuit 100; the common node of the second MOS transistor Q2 and the fourth MOS transistor Q4 is a second center node of the second bridge arm, and is connected to the second input AC-N of the second control circuit 104 in the rectification control circuit 100. The first output end N-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the third MOS transistor Q3, the second output end L-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the fourth MOS transistor Q4, the third output end N-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the second MOS transistor Q2, and the fourth output end L-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the first MOS transistor Q1. When the grid electrodes of the MOS transistors Q1-Q4 receive low level, the MOS transistors are turned off; when the gates of the MOS transistors Q1-Q4 receive the high level, the MOS transistors are conducted.

Fig. 7 shows an operation timing chart of a fourth embodiment of the bridge rectification control circuit of the present application. VL-DRVL in fig. 7 is the voltage at the second output terminal of the bridge rectifier control circuit 100; VL-DRVH is the voltage of the fourth output terminal of the bridge rectifier control circuit 100; VN-DRVL is the voltage at the first output of the bridge rectifier control circuit 100; VN-DRVH is the voltage of the third output terminal of the bridge rectifier control circuit 100. The VAC is the input ac voltage between the first and second center nodes of the bridge rectifier circuit. The operation timing and principle of the bridge rectifier control circuit will be described below with reference to fig. 5 and 6.

During the period t0-t1, VAC increases from 0V, the first input AC-L receives a positive voltage, and the second input AC-N receives a negative voltage. The body diodes of the first and fourth MOS transistors Q1 and Q4 are turned on, and current flows from AC-L, Q1, load, ground, Q4 to AC-N. At this time, the voltage at the second input terminal AC-N is about-0.7V due to the voltage drop of the body diode of Q4, and D3 and D4 are turned on, the anode of D3 in the second control circuit is pulled low, and VN-DRVL is low. Since the voltage at the first input terminal AC-L is a positive voltage, the first diode D1 is turned off, and a current flows from the first direct current power supply DC1 through the first resistor R1 and the third resistor R3 to the base of the first transistor Q5, and Q5 is in a conductive state. Current also flows from DC1 through the second resistor R2 from the collector to the emitter of Q5, and the voltage at the first output terminal N-DRVL is likewise pulled low by Q5, with VN-DRVL being low. Since the voltage at the first output terminal N-DRVL is at a low level, the third MOS transistor Q3 is in an off state. At this time, the low voltage of the first output end N-DRVL is doubly guaranteed by the operation of the third diode D3 and the first triode Q5, so as to realize the driving and locking of the third MOS transistor Q3 and prevent the MOS transistor from being turned on by mistake. The voltage VN-DRVH at the third output end N-DRVH of the bridge rectification control circuit is also low level through the first isolation driver, and the second MOS transistor Q2 is in an off state.

Since D4 is turned on, current flows from the second direct current source DC2 through the fourth resistor R4 into D4, and no longer flows through the fourth resistor R4 and the sixth resistor R6 into the base of the second triode, Q6 becomes an off state. The current flows from DC2 into the second output end L-DRVL through the fifth resistor R5, the grid electrode of the fourth MOS tube Q4 is charged, and VL-DRVL is gradually increased until a high level is output. During this process, Q4 gradually decreases in internal resistance as VL-DRVL rises until Q4 is fully on, i.e., at time t 11. When Q4 is completely conducted, the voltage VL-DRVH at the fourth output end L-DRVH is changed from low level to high level through the second isolation driver, and the first MOS tube Q1 is also conducted. The current flows from the body diode flows of Q1 and Q4 instead through the MOS transistor of low internal resistance.

During the period t1-t2, the voltage at the first input terminal AC-L is always positive, the voltage at the second input terminal AC-N is always negative, VL-DRVL and VL-DRVH are maintained at a high level, and VN-DRVL and VN-DRVH are maintained at a low level. Therefore, the first MOS transistor Q1 and the fourth MOS transistor Q4 maintain an on state, and the second MOS transistor Q2 and the third MOS transistor Q3 maintain an off state.

In the period t2-t3, the voltage at the first input end AC-L is reduced to 0V from a positive value, the voltage at the second input end AC-N is gradually changed from a negative value to OV, the voltage of the cathode of D4 is gradually increased, the current flows from the second direct current power supply DC2 to the D4 through R4 and gradually changes into the base from R4 to R6 to Q6, and the base of Q6 is gradually conducted after the current flows. VL-DRVL decreases and Q4 changes from on to off. Via the second isolation driver, when Q4 becomes off, Q1 also changes from on to off, also at time t22. Current flows from the body diodes of Q1 and Q4. During this time, Q2 and Q3 continue to be in the off state.

In the period t3-t4, the first input terminal AC-L receives a negative voltage and the second input terminal AC-N receives a positive voltage. The body diodes of the second MOS transistor Q2 and the third MOS transistor Q3 are conducted, and current flows from the AC-N, Q2, the load, the ground terminal and the Q3 to the AC-L. At this time, the voltage at the first input terminal AC-L is about-0.7V due to the voltage drop of the body diode of Q3, and D1 and D2 are turned on, the anode of D2 in the first control circuit is pulled low, and VL-DRVL is low. And, because the voltage at the second input terminal AC-N is a positive voltage, the fourth diode D4 is turned off, and current flows from the second DC power supply DC2 through the fourth resistor R4 and the sixth resistor R6 into the base of the second triode Q6, and Q6 is in a conductive state. The current also flows from DC2 through the fifth resistor R5 from the collector to the emitter of Q6, and the voltage at the second output terminal L-DRVL is likewise pulled low by Q6, with VL-DRVL being low. Since the voltage at the second output terminal L-DRVL is low, the fourth MOS transistor Q4 is in an off state. At this time, the low voltage of the second output terminal L-DRVL is doubly guaranteed by the operation of the second diode D2 and the second triode Q6, so as to realize the driving and locking of the fourth MOS transistor Q4 and prevent the MOS transistor from being turned on by mistake. The voltage VL-DRVH at the fourth output terminal L-DRVH of the bridge rectifier control circuit is also low level through the second isolation driver, and the first MOS transistor Q1 is in an off state.

Since D1 is turned on, current flows from the first direct current power source DC1 through the first resistor R1 into D1, and no longer flows through the first resistor R1 and the third resistor R3 into the base of the first triode, Q5 becomes an off state. The current flows from DC1 to the first output end N-DRVL through the second resistor R2 to charge the grid electrode of the third MOS tube Q3, and VN-DRVL is gradually increased until a high level is output. In this process, Q3 gradually decreases in internal resistance as VN-DRVL rises until Q3 is fully on. In this process, Q3 gradually decreases in internal resistance as VN-DRVL rises until it is fully on, i.e., at time t 33. When Q3 is completely conducted, the voltage VN-DRVH at the third output end N-DRVH is changed from low level to high level through the first isolation driver, and the second MOS transistor Q2 is also conducted. The current flows from the body diodes of Q2 and Q3 through the MOS transistors of low internal resistance instead.

During the period t4-t5, the voltage at the first input terminal AC-L is always negative, the voltage at the second input terminal AC-N is always positive, VN-DRVL and VN-DRVH are maintained at a high level, and VL-DRVL and VL-DRVH are maintained at a low level. Therefore, the second MOS transistor Q2 and the third MOS transistor Q3 maintain an on state, and the first MOS transistor Q1 and the fourth MOS transistor Q4 maintain an off state.

In the period t5-t6, the voltage at the first input end AC-L rises from a negative value to 0V, the voltage at the second input end AC-N gradually changes from a positive value to OV, the cathode voltage of D1 gradually rises, current flows from a first direct current power supply DC1 to D1 from R1 to flow from R1 to the base electrodes from R3 to Q5, the base electrode of Q5 is gradually conducted after current flows, VN-DRVL is reduced, and Q3 is changed from conduction to cut-off. Via the first isolation driver, when Q3 becomes off, Q2 also changes from on to off, also at time t44. Current flows from the body diodes of Q2 and Q3. During this time, Q1 and Q4 continue to be in the off state.

The bridge rectification control circuit can realize accurate rectification by repeatedly and circularly executing each stage.

In one embodiment, the first DC power source DC1 and the second DC power source DC2 provide 12V voltages, respectively. Resistors R1, R2, R4 and R5 are 10K ohms and resistors R3 and R6 are 1K ohms. The off-time of Q6 can be determined by the resistance settings of R4 and R6. The voltage at the L-DRVL terminal can be determined to be charged to the charging time capable of driving the switch tube to conduct, namely the conducting time of Q4 through the resistance value setting of R5. Therefore, by adjusting the resistance values of R1, R3, R4, R6, R2, R5 and the DC direct current voltage, and the parameters of the isolation driver, the dead time between the pair of tubes of the bridge rectifier circuit can be adjusted.

Various embodiments of the bridge rectifier circuit are described below.

Fig. 8 shows a connection example diagram of a second embodiment of the bridge rectifier circuit of the present application. As shown in fig. 8, the bridge rectifier circuit 200 includes a first leg and a second leg. The first bridge arm includes a fifth diode D5 and a third MOS transistor Q3 connected in series between the first bus bd+ and the ground line, and the second bridge arm includes a sixth diode D6 and a fourth MOS transistor Q4 connected in series between the first bus bd+ and the ground line.

The bridge rectifier circuit 200 is connected to the bridge rectifier control circuit 100. Specifically, the common node of the fifth diode D5 and the third MOS transistor Q3 is a first center node of the first bridge arm, and is connected to the first input AC-L of the first control circuit 102 in the rectification control circuit 100; the common node of the sixth diode D6 and the fourth MOS transistor Q4 is a second center node of the second bridge arm, and is connected to the second input AC-N of the second control circuit 104 in the rectification control circuit 100. The first output end N-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the third MOS transistor Q3, and the second output end L-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the fourth MOS transistor Q4.

In this embodiment, the bridge rectifier control circuit 100 may not include the first isolation driver 106 and the second isolation driver 108. Alternatively, the bridge rectifier control circuit 100 includes a third output terminal N-DRVH of the first isolation driver 106 and a fourth output terminal L-DRVH of the second isolation driver 108, but the voltage signals of the third output terminal and the fourth output terminal are not fed to the bridge rectifier circuit 200.

Fig. 9 shows a connection example diagram of a third embodiment of the bridge rectifier circuit of the present application. As shown in fig. 9, the bridge rectifier circuit 200 includes a first leg and a second leg. The first bridge arm includes a first MOS transistor Q1 and a fifth diode D5 connected in series between the first bus bd+ and the ground line, and the second bridge arm includes a second MOS transistor Q2 and a sixth diode D6 connected in series between the first bus bd+ and the ground line.

The bridge rectifier circuit 200 is connected to the bridge rectifier control circuit 100. Specifically, the common node of the fifth diode D5 and the first MOS transistor Q1 is a first center node of the first bridge arm, and is connected to the first input AC-L of the first control circuit 102 in the rectification control circuit 100; the common node of the sixth diode D6 and the second MOS transistor Q2 is a second center node of the second bridge arm, and is connected to the second input AC-N of the second control circuit 104 in the rectification control circuit 100. The third output end N-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the second MOS transistor Q2, and the fourth output end L-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the first MOS transistor Q1.

In this embodiment, the bridge rectifier control circuit 100 includes a third output N-DRVH of the first isolation driver 106 and a fourth output L-DRVH of the second isolation driver 108. However, the first output terminal and the voltage signal of the first output terminal are not fed into the bridge rectifier circuit 200.

Fig. 10 shows a connection example diagram of a fourth embodiment of the bridge rectifier circuit of the present application. As shown in fig. 10, the bridge rectifier circuit 200 includes a first leg and a second leg. The first bridge arm includes a first MOS transistor Q1 and a third MOS transistor Q3 connected in series between the first bus bd+ and the ground line, and the second bridge arm includes a fifth diode D5 and a sixth diode D6 connected in series between the first bus bd+ and the ground line.

The bridge rectifier circuit 200 is connected to the bridge rectifier control circuit 100. Specifically, the common node of the first MOS transistor Q1 and the third MOS transistor Q3 is a first center node of the first bridge arm, and is connected to the first input AC-L of the first control circuit 102 in the rectification control circuit 100; the common node of the fifth diode D5 and the sixth diode D6 is the second center node of the second bridge arm, and is connected to the second input AC-N of the second control circuit 104 in the rectification control circuit 100. The first output end N-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the third MOS transistor Q3, and the fourth output end L-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the first MOS transistor Q1.

In this embodiment, the bridge rectifier control circuit 100 may not include the first isolation driver 106. Alternatively, the bridge rectifier control circuit 100 includes a third output N-DRVH of the first isolation driver 106. However, the voltage signals of the third output terminal and the second output terminal are not fed to the bridge rectifier circuit 200.

Fig. 11 shows a connection example diagram of a fifth embodiment of the bridge rectifier circuit of the present application. As shown in fig. 11, the bridge rectifier circuit 200 includes a first leg and a second leg. The first bridge arm includes a fifth diode D5 and a sixth diode D6 connected in series between the first bus bd+ and the ground line, and the second bridge arm includes a first MOS transistor Q1 and a third MOS transistor Q3 connected in series between the first bus bd+ and the ground line.

The bridge rectifier circuit 200 is connected to the bridge rectifier control circuit 100. Specifically, the common node of the fifth diode D5 and the sixth diode D6 is a first center node of the first bridge arm, and is connected to the first input AC-L of the first control circuit 102 in the rectification control circuit 100; the common node of the first MOS transistor Q1 and the third MOS transistor Q3 is a second center node of the second bridge arm, and is connected to the second input AC-N of the second control circuit 104 in the rectification control circuit 100. The second output end L-DRVL of the bridge rectifier control circuit 100 is connected to the gate of the fourth MOS transistor Q4, and the third output end N-DRVH of the bridge rectifier control circuit 100 is connected to the gate of the second MOS transistor Q2.

In this embodiment, the bridge rectifier control circuit 100 may not include the second isolation driver 108. Alternatively, the bridge rectifier control circuit 100 includes a fourth output L-DRVH of the second isolation driver 108. However, the voltage signals of the third output terminal and the second output terminal are not fed to the bridge rectifier circuit 200.

Fig. 12 shows a flowchart of a bridge rectification control method according to an embodiment of the present application. The flow chart shown in fig. 12 is merely an example, which should not unduly limit the scope of the claims. Those of ordinary skill in the art will recognize many variations, alternatives, and modifications. For example, various steps shown in fig. 12 may be added, removed, replaced, rearranged, and repeated.

In an embodiment, referring to fig. 2, the first control circuit includes a first diode, a first resistor, a second resistor, a first dc power supply, and a first transistor; the first diode, the first resistor and the first direct current power supply are connected in series between the first input end and the grounding end, the cathode of the first diode is connected with the first input end, the cathode of the first direct current power supply is connected with the grounding end, the second resistor is connected between the anode of the first direct current power supply and the first output end, the anode of the first diode is connected with the base electrode of the first triode, the collector of the first triode is connected with the first output end, and the emitter of the first triode is connected with the grounding end. The second control circuit comprises a fourth diode, a fourth resistor, a fifth resistor, a second direct current power supply and a second triode; the fourth diode, the fourth resistor and the second direct current power supply are connected in series between the second input end and the grounding end, the cathode of the fourth diode is connected with the second input end, the cathode of the second direct current power supply is connected with the grounding end, the fifth resistor is connected between the anode of the second direct current power supply and the second output end, the anode of the fourth diode is connected with the base of the second triode, the collector of the second triode is connected with the second output end, and the emitter of the second triode is connected with the grounding end.

In another embodiment, referring to fig. 4, the first control circuit further includes a second diode, a cathode of the second diode is connected to the first input terminal, and an anode of the second diode is connected to the second output terminal; and the second control circuit further comprises a third diode, the cathode of the third diode is connected with the second input end, and the anode of the third diode is connected with the first output end.

The following steps can be accomplished by the bridge rectifier control circuit in the above-described embodiments.

In step 1202, when the first input terminal of the first control circuit receives a positive voltage and the second input terminal of the second control circuit receives a negative voltage, the first control circuit is enabled to output a low level at the first output terminal, and the second control circuit is enabled to output a high level at the second output terminal.

In step 1204, when the second input terminal of the second control circuit receives the positive voltage and the first input terminal of the first control circuit receives the negative voltage, the second control circuit is enabled to output a low level at the second output terminal, and the first control circuit is enabled to output a high level at the first output terminal.

In step 1206, a third output signal is output at a third output of the first isolation driver in accordance with the first output signal of the first output by the first isolation driver.

In step 1208, a fourth output signal is output at a fourth output of the second isolation driver based on the second output signal of the second output through the second isolation driver.

Specifically, in step 1202, when the first input terminal of the first control circuit receives a positive voltage and the second input terminal of the second control circuit receives a negative voltage, a transistor (such as transistor Q5 in fig. 2 and 4) in the first control circuit is turned on, and the first output terminal of the first control circuit is pulled down, so that the first control circuit outputs a low level at the first output terminal, and meanwhile, the voltage at the second output terminal of the second control circuit is gradually raised to a high level, so that the second control circuit outputs a high level at the second output terminal.

As shown in fig. 2 and 4, the voltage at the second output terminal of the second control circuit is gradually raised by the dc voltage source.

And in step 1202, when the first input receives a positive voltage and the second input receives a negative voltage, a diode in the second control circuit is turned on (e.g., diode D3 in fig. 4) to lock the first output of the first control circuit at a low level.

Specifically, in step 1204, when the second input terminal of the second control circuit receives a positive voltage and the first input terminal of the first control circuit receives a negative voltage, a transistor (such as the transistor Q6 in fig. 2 and 4) in the second control circuit is turned on, and the second output terminal of the second control circuit is pulled down, so that the second control circuit outputs a low level at the second output terminal, and meanwhile, the voltage at the first output terminal of the first control circuit is gradually raised to a high level, so that the first control circuit outputs a high level at the first output terminal.

As shown in fig. 2 and 4, the voltage at the first output terminal of the first control circuit is gradually raised by the dc voltage source.

And in step 1204, when the second input receives a positive voltage and the first input receives a negative voltage, a diode in the first control circuit is turned on (e.g., diode D2 in fig. 4) to lock the second output of the second control circuit at a low level.

In an embodiment of the present application, the bridge rectifier control method further includes connecting the first output end to a gate of a third MOS transistor in the bridge rectifier circuit; connecting the second output end with a grid electrode of a fourth MOS tube in the bridge rectifier circuit; connecting the third output end with a grid electrode of a second MOS tube in the bridge rectifier circuit; and connecting the fourth output end with the grid electrode of the first MOS tube in the bridge rectifier circuit.

As described above, each switching tube in the bridge rectifier circuit is exemplified by a MOS tube, but in practical application, it may also be another switching tube, and the application is not limited to a specific type of switching tube, as long as it can implement the above function, and at this time, the gate, the drain and the source of the MOS tube may respectively correspond to the control end, the first end and the second end of the switching tube. As described above, each switching tube in the bridge rectifier circuit is exemplified as one MOS tube, but in practical application, it may also be formed by connecting a plurality of switching tubes in series and parallel.

In the above, the switching tube in the bridge rectifier control circuit is taken as an example of a triode, but in practical application, the switching tube can also be other switching tubes, the application is not limited to specific types of switching tubes, as long as the switching tube can realize the functions, and at this time, the base electrode, the collector electrode and the emitter electrode of the triode can respectively correspond to the control end, the first end and the second end of the switching tube. In the above, the switching tube in the bridge rectifier control circuit is exemplified as a triode, but in practical application, the switching tube can also be formed by a plurality of switching tubes connected in series and parallel.

Although embodiments of the present application and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the application as defined by the appended claims.

Furthermore, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present application, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present application. It is therefore intended that the following appended claims include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

Claims

1. A bridge rectifier control circuit, comprising:

a first control circuit comprising:

the first input end is connected with a first center node of a first bridge arm of the bridge rectifier circuit and the first output end;

a second control circuit comprising:

the second input end is connected with a second center node of a second bridge arm of the bridge rectifier circuit and the second output end;

wherein the first output terminal is configured to output a low level when the first input terminal receives a positive voltage, and to output a high level when the first input terminal receives a negative voltage; the second output terminal is configured to output a low level when the second input terminal receives a positive voltage, and to output a high level when the second input terminal receives a negative voltage;

The first control circuit further comprises a first diode, a first resistor, a second resistor, a first direct current power supply and a first triode;

the first diode, the first resistor and the first direct current power supply are connected in series between the first input end and the grounding end, the cathode of the first diode is connected with the first input end, the cathode of the first direct current power supply is connected with the grounding end, the second resistor is connected between the anode of the first direct current power supply and the first output end, the anode of the first diode is connected with the base electrode of the first triode, the collector electrode of the first triode is connected with the first output end, and the emitter of the first triode is connected with the grounding end; and is also provided with

The second control circuit further comprises a fourth diode, a fourth resistor, a fifth resistor, a second direct current power supply and a second triode;

the fourth diode, the fourth resistor and the second direct current power supply are connected in series between the second input end and the grounding end, the cathode of the fourth diode is connected with the second input end, the cathode of the second direct current power supply is connected with the grounding end, the fifth resistor is connected between the anode of the second direct current power supply and the second output end, the anode of the fourth diode is connected with the base of the second triode, the collector of the second triode is connected with the second output end, and the emitter of the second triode is connected with the grounding end.

2. The bridge rectifier control circuit of claim 1, further comprising:

the first isolation driver is connected with the first output end and comprises a third output end; and

the second isolation driver is connected with the second output end and comprises a fourth output end;

wherein the first isolation driver is configured to output a third output signal to the third output terminal in accordance with a first output signal of the first output terminal; the second isolation driver is configured to output a fourth output signal to the fourth output terminal in accordance with a second output signal of the second output terminal.

3. The bridge rectifier control circuit of claim 1, wherein,

the first control circuit further comprises a second diode, wherein the cathode of the second diode is connected with the first input end, and the anode of the second diode is connected with the second output end; and is also provided with

The second control circuit further comprises a third diode, wherein the cathode of the third diode is connected with the second input end, and the anode of the third diode is connected with the first output end.

4. A bridge rectifier control circuit according to claim 1 or 3, characterized in that,

The first control circuit further comprises a third resistor, and the third resistor is connected between the anode of the first diode and the base electrode of the first triode; and is also provided with

The second control circuit further comprises a sixth resistor connected between the anode of the fourth diode and the base of the second triode.

5. The bridge rectifier control circuit of claim 2, wherein,

the first bridge arm of the bridge rectifier circuit comprises a first MOS tube and a third MOS tube which are connected in series between a first bus and a ground wire, and a common node of the first MOS tube and the third MOS tube is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the second MOS tube and the fourth MOS tube is connected with the second input end;

the first output end is connected with the grid electrode of the third MOS tube, the second output end is connected with the grid electrode of the fourth MOS tube, the third output end is connected with the grid electrode of the second MOS tube, and the fourth output end is connected with the grid electrode of the first MOS tube.

6. The bridge rectifier control circuit of claim 1, wherein,

The first bridge arm of the bridge rectifier circuit comprises a fifth diode and a third MOS tube which are connected in series between a first bus and a ground wire, and a common node of the fifth diode and the third MOS tube is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a sixth diode and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the sixth diode and the fourth MOS tube is connected with the second input end;

the first output end is connected with the grid electrode of the third MOS tube, and the second output end is connected with the grid electrode of the fourth MOS tube.

7. The bridge rectifier control circuit of claim 2, wherein,

the first bridge arm of the bridge rectifier circuit comprises a first MOS tube and a fifth diode which are connected in series between a first bus and a ground wire, and a common node of the fifth diode and the first MOS tube is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a sixth diode which are connected in series between the first bus and the ground wire, and a common node of the sixth diode and the second MOS tube is connected with the second input end;

the fourth output end is connected with the grid electrode of the first MOS tube, and the third output end is connected with the grid electrode of the second MOS tube.

8. The bridge rectifier control circuit of claim 2, wherein,

the first bridge arm of the bridge rectifier circuit comprises a first MOS tube and a third MOS tube which are connected in series between a first bus and a ground wire, and a common node of the first MOS tube and the third MOS tube is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a fifth diode and a sixth diode which are connected in series between the first bus and the ground, and a common node of the fifth diode and the sixth diode is connected with the second input end;

the fourth output end is connected with the grid electrode of the first MOS tube, and the first output end is connected with the grid electrode of the third MOS tube.

9. The bridge rectifier control circuit of claim 2, wherein,

the first bridge arm of the bridge rectifier circuit comprises a fifth diode and a sixth diode which are connected in series between a first bus and a ground wire, and a common node of the fifth diode and the sixth diode is connected with the first input end; the second bridge arm of the bridge rectifier circuit comprises a second MOS tube and a fourth MOS tube which are connected in series between the first bus and the ground wire, and a common node of the second MOS tube and the fourth MOS tube is connected with the second input end;

The second output end is connected with the grid electrode of the fourth MOS tube, and the third output end is connected with the grid electrode of the second MOS tube.

10. A bridge rectifier control method, the method comprising:

the first input end of the first control circuit is connected with a first central node of a first bridge arm of the bridge rectifier circuit, and the second input end of the second control circuit is connected with a second central node of a second bridge arm of the bridge rectifier circuit;

The first control circuit comprises a first diode, a first resistor, a second resistor, a first direct current power supply and a first triode;

The second control circuit comprises a fourth diode, a fourth resistor, a fifth resistor, a second direct current power supply and a second triode;

11. The bridge rectifier control method of claim 10, further comprising:

when the first input end of the first control circuit receives a positive voltage and the second input end of the second control circuit receives a negative voltage, a first triode in the first control circuit is conducted to pull down the first output end of the first control circuit, so that the first control circuit outputs a low level at the first output end, and meanwhile, the voltage of the second output end of the second control circuit is gradually raised to a high level, so that the second control circuit outputs a high level at the second output end.

12. The bridge rectifier control method of claim 10, further comprising:

when the second input end of the second control circuit receives a positive voltage and the first input end of the first control circuit receives a negative voltage, a second triode in the second control circuit is conducted to pull down the second output end of the second control circuit, so that the second control circuit outputs a low level at the second output end, and meanwhile, the voltage of the first output end of the first control circuit is gradually raised to a high level, so that the first control circuit outputs a high level at the first output end.

13. The bridge rectifier control method of claim 10, wherein,

14. The bridge rectifier control method of claim 13, further comprising: when the first input end receives a positive voltage and the second input end receives a negative voltage, a third diode in the second control circuit is conducted so as to lock the first output end of the first control circuit at a low level; when the second input terminal receives a positive voltage and the first input terminal receives a negative voltage, a second diode in the first control circuit is conducted to lock a second output terminal of the second control circuit at a low level.

15. The bridge rectifier control method of claim 10, further comprising: