CN218888381U - Driving circuit for outputting positive and negative asymmetric voltages - Google Patents
Driving circuit for outputting positive and negative asymmetric voltages Download PDFInfo
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- CN218888381U CN218888381U CN202222492512.7U CN202222492512U CN218888381U CN 218888381 U CN218888381 U CN 218888381U CN 202222492512 U CN202222492512 U CN 202222492512U CN 218888381 U CN218888381 U CN 218888381U
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- 238000004804 winding Methods 0.000 claims abstract description 54
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- 230000000087 stabilizing effect Effects 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 6
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- 230000003071 parasitic effect Effects 0.000 abstract description 8
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- 230000005669 field effect Effects 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
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- 230000003137 locomotive effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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- 230000009466 transformation Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application discloses a drive circuit for exporting positive and negative asymmetric voltage, include driving transformer, first power device, second power device, connect driving transformer with first drive circuit between the first power device, and connect driving transformer with second drive circuit between the second power device, driving transformer includes primary winding, first secondary winding and second secondary winding, primary winding's one end is connected with first drive signal's output, primary winding's the other end and second drive signal's output are connected. The method and the device can effectively ensure the isolation between the two paths of drives. The MOS transistor driving circuit can effectively ensure that each MOS transistor can output positive voltage and negative voltage. The negative pressure amplitude of the drive can be adjusted by adjusting voltage-stabilizing tubes with different voltage-stabilizing values in the circuit, and the parasitic energy on the power MOS tube can be quickly released through the negative voltage when a turn-off signal occurs.
Description
Technical Field
The application relates to the technical field of electronic switches, in particular to a driving circuit for outputting positive and negative asymmetric voltages.
Background
MOS transistor, is an abbreviation for MOSFET. MOSFET metal-oxide semiconductor field effect transistors, field effect transistors for short. The MOS transistor is a voltage-controlled element, has the advantages of high input resistance, low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown phenomenon, wide safe working area and the like, and is a strong competitor of a bipolar transistor and a power transistor. When the MOS tube is widely applied to various fields of social production and life, such as aerospace, locomotive ships, military weapons, power generation and distribution, post and telecommunications, metallurgical mines, automatic control, household appliances, instruments and meters, scientific research experiments and the like. Especially, the application of the switching power supply is wide, and at least more than one MOS tube is required in almost every switching power supply product. The field effect transistor is a voltage control element, and only needs to take less current from a signal source when the field effect transistor is normally switched on. However, due to the existence of the parasitic junction capacitance, the MOS transistor needs to be turned off after the residual voltage of the parasitic capacitance is discharged every time the MOS transistor is turned off. When the MOS tube works in a high-frequency switching state, particularly, residual parasitic energy on parasitic capacitance of the MOS tube needs to be quickly discharged, otherwise, the turn-off time is greatly increased, the switching loss is increased, and the reliability of the MOS tube is influenced.
MOS tube often need form the bridge type topology (half-bridge, full-bridge, H bridge) of establishing ties in switching power supply, motor driver's application process, and the drive signal of upper and lower MOS pipe need keep apart and complementary appearance in pairs. Common driving modes of the upper tube and the lower tube are an optical coupling isolation driving mode, a capacitance isolation driving mode and a transformer magnetic isolation driving mode. The magnetic isolation driving mode of the transformer has the fastest response speed, and the isolation withstand voltage is controlled most easily.
The normal driving voltage of the silicon MOS tube is normally +/-20V at most, and the driving mode of magnetic isolation of the transformer can easily generate output voltage with symmetrical positive and negative voltage. However, some MOS tubes such as SiC and GaN can only bear a very small negative voltage, and the maximum value of the normal driving voltage is generally +19V/-8V or +19V/-5V. In terms of negative pressure, negative pressure driving is desirable for realizing rapid turn-off of the MOS tube and rapidly discharging parasitic energy on the power MOS tube. And the reliability of the MOS tube is affected by the fact that the negative pressure is not high.
Disclosure of Invention
Therefore, the application provides a driving circuit for outputting positive and negative asymmetric voltages, so that the problem of magnetic isolation driving of a transformer, which can output asymmetric positive and negative voltages and can flexibly adjust the amplitude of the negative voltage, can be better solved.
In order to achieve the above purpose, the present application provides the following technical solutions: the power supply comprises a driving transformer (T1), a first power device (Q1), a second power device (Q2), a first driving circuit connected between the driving transformer (T1) and the first power device (Q1), and a second driving circuit connected between the driving transformer (T1) and the second power device (Q2);
the driving transformer (T1) comprises a primary winding, a first secondary winding and a second secondary winding, one end of the primary winding is connected with the output end of a first driving signal, and the other end of the primary winding is connected with the output end of a second driving signal;
the first driving circuit comprises a first resistor (R1), a first transistor (VT 1), a first capacitor (C1), a first voltage stabilizing diode (ZD 1) and a first unidirectional conduction module, wherein the first resistor (R1) is connected with the first secondary winding in parallel; a collector of the first transistor (VT 1) is connected with one end of the first secondary winding, an emitter of the first transistor (VT 1) is connected with the anode of the first unidirectional conducting module, and a base of the first transistor (VT 1) and the cathode of the first unidirectional conducting module are both connected with the other end of the first secondary winding; the first capacitor (C1) is connected in parallel with the first zener diode (ZD 1), one end of the first capacitor (C1) is connected to the anode of the first unidirectional conducting module, and the other end of the first capacitor (C1) is connected to the source of the first power device (Q1) and the drain of the second power device (Q2), respectively; the grid electrode of the first power device (Q1) is connected with one end of the first secondary winding, and the drain electrode of the first power device (Q1) is connected with a power supply input end (VIN);
the second driving circuit comprises a second resistor (R2), a second transistor (VT 2), a second capacitor (C2), a second voltage stabilizing diode (ZD 2) and a second unidirectional conduction module, and the second resistor (R2) is connected with the second secondary winding in parallel; a collector of the second transistor (VT 2) is connected with one end of the second secondary winding, an emitter of the second transistor (VT 2) is connected with the anode of the second unidirectional conducting module, and a base of the second transistor (VT 2) and the cathode of the second unidirectional conducting module are both connected with the other end of the second secondary winding; the second capacitor (C2) is connected in parallel with the second zener diode (ZD 2), one end of the second capacitor (C2) is connected with the anode of the second unidirectional conducting module, and the other end of the second capacitor (C2) is grounded; the grid electrode of the second power device (Q2) is connected with one end of the second secondary winding, and the source electrode of the first power device (Q1) is grounded.
Preferably, the first power device (Q1) and the second power device (Q2) are both NMOS transistors.
Preferably, the first transistor (VT 1) and the second transistor (VT 2) are both NPN transistors.
Preferably, the first unidirectional conducting module comprises at least one first diode (D1), and the first diode (D1) is a silicon diode or a germanium diode.
Preferably, the second unidirectional conducting module includes at least one second diode (D2), and the second diode (D2) is a silicon diode or a germanium diode.
Compared with the prior art, the method has the following beneficial effects:
the application provides a drive circuit for exporting positive and negative asymmetric voltage, include driving transformer, first power device, second power device, connect driving transformer with first drive circuit between the first power device, and connect driving transformer with second drive circuit between the second power device, driving transformer includes primary winding, first secondary winding and second secondary winding, primary winding's one end is connected with first drive signal's output, primary winding's the other end and second drive signal's output are connected. The method and the device can effectively ensure the isolation between the two paths of drives. The MOS transistor driving circuit can effectively ensure that each MOS transistor can output positive voltage and negative voltage. The negative pressure amplitude of the drive can be adjusted by adjusting voltage-stabilizing tubes with different voltage-stabilizing values in the circuit, and the parasitic energy on the power MOS tube can be quickly released through the negative voltage when a turn-off signal occurs.
Drawings
To more intuitively explain the prior art and the present application, several exemplary drawings are given below. It should be understood that the specific shapes, configurations and illustrations in the drawings are not to be construed as limiting, in general, the practice of the present application; for example, it is within the ability of those skilled in the art to make routine adjustments or further optimization of the add/drop/attribute division, specific shapes, positional relationships, connection manners, size ratios, etc. of certain elements (components) based on the technical concepts disclosed in the present application and the exemplary drawings.
Fig. 1 is a schematic diagram of a driving circuit for outputting positive and negative asymmetric voltages according to the present application.
Detailed Description
The present application will be described in further detail below with reference to specific embodiments in conjunction with the accompanying drawings.
In the description of the present application: "plurality" means two or more unless otherwise specified. The terms "first", "second", "third", and the like in this application are intended to distinguish one referenced item from another without having a special meaning in technical connotation (e.g., should not be construed as emphasizing a degree or order of importance, etc.). The terms "comprising," "including," "having," and the like, are intended to be inclusive and mean "not limited to" (some elements, components, materials, steps, etc.).
In the present application, terms such as "upper", "lower", "left", "right", "middle", and the like are generally used for easy visual understanding with reference to the drawings, and are not intended to absolutely limit the positional relationship in an actual product. Changes in these relative positional relationships are also considered to be within the scope of the present disclosure without departing from the technical concepts disclosed in the present disclosure.
Referring to fig. 1, the present application provides a driving circuit for outputting positive and negative asymmetric voltages, including a driving transformer (T1), a first power device (Q1), a second power device (Q2), a first driving circuit connected between the driving transformer (T1) and the first power device (Q1), and a second driving circuit connected between the driving transformer (T1) and the second power device (Q2);
the driving transformer (T1) comprises a primary winding, a first secondary winding and a second secondary winding, one end of the primary winding is connected with the output end of a first driving signal, and the other end of the primary winding is connected with the output end of a second driving signal;
the first driving circuit comprises a first resistor (R1), a first transistor (VT 1), a first capacitor (C1), a first voltage stabilizing diode (ZD 1) and a first unidirectional conduction module, wherein the first resistor (R1) is connected with the first secondary winding in parallel; a collector of the first transistor (VT 1) is connected with one end of the first secondary winding, an emitter of the first transistor (VT 1) is connected with the anode of the first unidirectional conducting module, and a base of the first transistor (VT 1) and the cathode of the first unidirectional conducting module are both connected with the other end of the first secondary winding; the first capacitor (C1) is connected in parallel with the first zener diode (ZD 1), one end of the first capacitor (C1) is connected to the anode of the first unidirectional conduction module, and the other end of the first capacitor (C1) is connected to the source of the first power device (Q1) and the drain of the second power device (Q2), respectively; the grid electrode of the first power device (Q1) is connected with one end of the first secondary winding, and the drain electrode of the first power device (Q1) is connected with a power supply input end (VIN);
the second driving circuit comprises a second resistor (R2), a second transistor (VT 2), a second capacitor (C2), a second zener diode (ZD 2) and a second unidirectional conduction module, wherein the second resistor (R2) is connected with the second secondary winding in parallel; a collector of the second transistor (VT 2) is connected with one end of the second secondary winding, an emitter of the second transistor (VT 2) is connected with a positive electrode of the second unidirectional conducting module, and a base of the second transistor (VT 2) and a negative electrode of the second unidirectional conducting module are both connected with the other end of the second secondary winding; the second capacitor (C2) is connected in parallel with the second zener diode (ZD 2), one end of the second capacitor (C2) is connected with the anode of the second unidirectional conducting module, and the other end of the second capacitor (C2) is grounded; the grid electrode of the second power device (Q2) is connected with one end of the second secondary winding, and the source electrode of the first power device (Q1) is grounded. Wherein the model numbers of (R1) and (R2) are RB100, and the model numbers of (ZD 1) and (ZD 2) are ISMB5920BT3G.
In the present embodiment, the driving transformer (T1) is a three-winding transformer.
In this embodiment, the first driving signal is complementary to the second driving signal.
In the embodiment, the utility model performs isolated transformation on the complementary first driving signal and the second driving signal through the driving transformer (T1), and generates two voltage signals with opposite positive and negative polarities respectively at the first secondary winding and the second secondary winding of the driving transformer (T1); in the first driving circuit, the first diode (D1) and the first voltage stabilizing diode (ZD 1) enable the driving of the first power device (Q1) to generate a positive voltage signal with the amplitude of (V1-VZD 1) under the condition that V1 is positive voltage, and the first resistor (R1), the first transistor (VT 1), the first capacitor (C1) and the first voltage stabilizing diode (ZD 1) enable the driving of the first power device (Q1) to generate a negative voltage signal with the amplitude of VZD1 under the condition that V1 is negative voltage; in the second driving circuit, the second diode (D2) and the second voltage stabilizing diode (ZD 2) enable the second power device (Q2) to drive to generate a positive voltage signal with the amplitude of (V2-VZD 2) under the condition that V2 is positive voltage, and the second resistor (R2), the second transistor (VT 2), the second capacitor (C2) and the second voltage stabilizing diode (ZD 2) enable the second power device (Q2) to drive to generate a negative voltage signal with the amplitude of VZD2 under the condition that V2 is negative voltage.
In the present embodiment, the first secondary winding and the second secondary winding of the driving transformer (T1) generate two voltage signals with opposite positive and negative polarities.
In this embodiment, when V1 is a positive voltage, the first transistor (VT 1) is not turned on, the first zener diode (ZD 1) is turned on and the clamping voltage is VZD1, and at the same time, the first capacitor (C1) is charged to the magnitude VZD1, and the first diode (D1) is turned on, so that the driving magnitude of the first power device (Q1) is the forward voltage of (V1-VZD 1). When V1 is negative voltage, the first diode (D1) is not conducted, the first transistor (VT 1) is conducted, the voltage of the first capacitor (C1) is maintained at-VZD 1, and the driving amplitude of the first power device (Q1) is made to be negative voltage of VZD 1.
In this embodiment, when V2 is a positive voltage, the second transistor (VT 2) is not turned on, the second zener diode (ZD 2) is turned on and the clamping voltage is VZD2, and at the same time, the second capacitor (C2) is charged to the magnitude VZD2, and the second diode (D2) is turned on, so that the driving magnitude of the second power device (Q2) is a forward voltage of (V2-VZD 2). When the voltage V2 is negative voltage, the second diode (D2) is not conducted, the second transistor (VT 2) is conducted, and the voltage of the second capacitor (C2) is maintained at-VZD 2, so that the driving amplitude of the second power device (Q2) is negative voltage of VZD 2.
In this embodiment, the present invention can effectively ensure the isolation between the two driving circuits of the first driving circuit and the second driving circuit, and further effectively ensure that the driving of the first power device (Q1) and the second power device (Q2) can output both positive voltage and negative voltage; meanwhile, the negative pressure amplitude of the drive can be adjusted by adjusting a first voltage-regulator tube (ZD 1) with different voltage-stabilizing values in the first drive circuit and a second voltage-regulator diode (ZD 2) with different voltage-stabilizing values in the second drive circuit, and parasitic energy on the first power device (Q1) and the second power device (Q2) can be quickly released through negative voltage when a turn-off signal appears.
The first power device (Q1) and the second power device (Q2) are both NMOS tubes. The first transistor (VT 1) and the second transistor (VT 2) are both NPN type triodes, the first unidirectional conduction module comprises at least one first diode (D1), the first diode (D1) is a silicon diode or a germanium diode, the second unidirectional conduction module comprises at least one second diode (D2), and the second diode (D2) is a silicon diode or a germanium diode.
All the technical features of the above embodiments can be arbitrarily combined (as long as there is no contradiction between the combinations of the technical features), and for the sake of brevity, all the possible combinations of the technical features in the above embodiments are not described; these examples, which are not explicitly described, should be considered to be within the scope of the present description.
The present application has been described in considerable detail with reference to the foregoing general description and specific examples. It should be understood that several conventional adaptations or further innovations of these specific embodiments may also be made based on the technical idea of the present application; however, such conventional modifications and further innovations can also fall into the scope of the claims of the present application as long as they do not depart from the technical idea of the present application.
Claims (5)
1. A driving circuit for outputting positive and negative asymmetrical voltages, comprising a driving transformer (T1), a first power device (Q1), a second power device (Q2), a first driving circuit connected between the driving transformer (T1) and the first power device (Q1), and a second driving circuit connected between the driving transformer (T1) and the second power device (Q2);
the driving transformer (T1) comprises a primary winding, a first secondary winding and a second secondary winding, one end of the primary winding is connected with the output end of a first driving signal, and the other end of the primary winding is connected with the output end of a second driving signal;
the first driving circuit comprises a first resistor (R1), a first transistor (VT 1), a first capacitor (C1), a first voltage stabilizing diode (ZD 1) and a first unidirectional conduction module, wherein the first resistor (R1) is connected with the first secondary winding in parallel; a collector of the first transistor (VT 1) is connected with one end of the first secondary winding, an emitter of the first transistor (VT 1) is connected with a positive electrode of the first unidirectional conduction module, and a base of the first transistor (VT 1) and a negative electrode of the first unidirectional conduction module are both connected with the other end of the first secondary winding; the first capacitor (C1) is connected in parallel with the first zener diode (ZD 1), one end of the first capacitor (C1) is connected to the anode of the first unidirectional conducting module, and the other end of the first capacitor (C1) is connected to the source of the first power device (Q1) and the drain of the second power device (Q2), respectively; the grid electrode of the first power device (Q1) is connected with one end of the first secondary winding, and the drain electrode of the first power device (Q1) is connected with a power supply input end (VIN);
the second driving circuit comprises a second resistor (R2), a second transistor (VT 2), a second capacitor (C2), a second zener diode (ZD 2) and a second unidirectional conduction module, wherein the second resistor (R2) is connected with the second secondary winding in parallel; a collector of the second transistor (VT 2) is connected with one end of the second secondary winding, an emitter of the second transistor (VT 2) is connected with the anode of the second unidirectional conducting module, and a base of the second transistor (VT 2) and the cathode of the second unidirectional conducting module are both connected with the other end of the second secondary winding; the second capacitor (C2) is connected in parallel with the second zener diode (ZD 2), one end of the second capacitor (C2) is connected with the anode of the second unidirectional conducting module, and the other end of the second capacitor (C2) is grounded; the grid electrode of the second power device (Q2) is connected with one end of the second secondary winding, and the source electrode of the first power device (Q1) is grounded.
2. The driving circuit for outputting positive and negative asymmetric voltages according to claim 1, wherein the first power device (Q1) and the second power device (Q2) are both NMOS transistors.
3. The driving circuit for outputting positive and negative asymmetric voltages according to claim 1, wherein the first transistor (VT 1) and the second transistor (VT 2) are NPN transistors.
4. The driving circuit for outputting positive and negative asymmetric voltages according to claim 1, wherein the first unidirectional conducting module comprises at least one first diode (D1), and the first diode (D1) is a silicon diode or a germanium diode.
5. The driving circuit for outputting positive and negative asymmetric voltages according to claim 1, wherein the second unidirectional conducting module comprises at least one second diode (D2), and the second diode (D2) is a silicon diode or a germanium diode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222492512.7U CN218888381U (en) | 2022-09-20 | 2022-09-20 | Driving circuit for outputting positive and negative asymmetric voltages |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222492512.7U CN218888381U (en) | 2022-09-20 | 2022-09-20 | Driving circuit for outputting positive and negative asymmetric voltages |
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| CN218888381U true CN218888381U (en) | 2023-04-18 |
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| CN202222492512.7U Active CN218888381U (en) | 2022-09-20 | 2022-09-20 | Driving circuit for outputting positive and negative asymmetric voltages |
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