CN115882756A - Processing method for two input instruction modes of stepping motor driver - Google Patents
Processing method for two input instruction modes of stepping motor driver Download PDFInfo
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- CN115882756A CN115882756A CN202211610155.8A CN202211610155A CN115882756A CN 115882756 A CN115882756 A CN 115882756A CN 202211610155 A CN202211610155 A CN 202211610155A CN 115882756 A CN115882756 A CN 115882756A
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Abstract
The invention belongs to the field of motor drive, and particularly relates to a method for processing two input instruction modes of a stepping motor driver. When a single pulse instruction signal is input, only one counter is used, when a double pulse instruction signal is input, the two counters are matched, on the premise that an additional instruction mode switching circuit is not added, the switching of different processing modes of the single pulse mode and the double pulse mode is realized by utilizing hardware circuit resources in the DSP28335 processor and according to the state of a mode selection signal in a software programming mode, and the simplified design of the circuit is realized.
Description
Technical Field
The invention belongs to the field of motor drive, and particularly relates to a method for processing two input instruction modes of a stepping motor driver.
Background
The step motor driver receives the instruction information sent by the upper controller to control the rotation angle, the rotation speed and the rotation direction of the step motor. The command information includes pulse information and direction information, wherein the number of pulses determines the rotation angle of the motor, the frequency of the pulses determines the rotation speed of the motor, and the direction information determines the rotation direction of the motor.
The rotation angle and rotation direction of the step motor during operation are determined by the output state of the ring division table arranged in the DSP in the driver, and the address value of the ring division table is determined by the counting value of the counter in the DSP after operation. Therefore, a driver is required to convert instruction information of the upper controller into a count value of a counter inside the DSP to determine an address value of the loop table.
The instruction input mode of the stepping motor driver generally comprises a single-pulse mode and a double-pulse mode, the input interface circuits of instruction signals of the two modes are shared, and the counting mode of a high-speed counter in the DSP processor only comprises a single-pulse counting mode and does not comprise a double-pulse counting mode, so the conventional processing mode is to convert the two instruction input modes into the single-pulse mode which can be received by the high-speed counter in the DSP processor through a mode selection signal and an instruction mode switching circuit. This approach requires the design of specialized hardware circuits, which increases the complexity of the circuit.
Disclosure of Invention
The invention provides a method for processing two input instruction modes of a stepping motor driver, which aims to solve the problem that a special hardware circuit needs to be designed for processing input instructions in a single-pulse mode and a double-pulse mode in the prior art.
In order to achieve the purpose, the invention provides the following technical scheme:
a processing method for two input instruction modes of a stepping motor driver comprises the following steps:
the method comprises the following steps: judging whether the mode of the input instruction is a single-pulse instruction mode or not according to an external mode selection signal input into the DSP28335, if so, entering a second step, otherwise, if not, the input instruction is a double-pulse instruction signal, and entering a third step;
the DSP28335 processor comprises a first counter and a second counter, the single pulse instruction signal comprises a pulse signal CLK and a direction signal DIR, and the double pulse instruction signal comprises a forward pulse signal CCW and a reverse pulse signal CW;
step two: the pulse signal CLK and the direction signal DIR are respectively input to a counting end and a direction end of a first counter, and an address value of the cyclic division table is obtained through data obtained in the first counter;
step three: the positive rotation pulse signal CCW is input into the counting end of the first counter, the reverse rotation pulse signal CW is input into the counting end of the second counter, and the address value of the cyclic division table is obtained through the data obtained in the first counter and the second counter.
Preferably, the first counter and the second counter are both reversible counters.
Preferably, in the second step, the first counter is set to a counting mode in the pulse + direction.
Preferably, in step two, the pulse signal CLK is input to the count terminal EQEP1A of the first counter, and the direction signal DIR is input to the direction terminal EQEP1B of the first counter.
Preferably, in step three, the forward rotation pulse CCW is input to the count terminal EQEP1A of the first counter.
Preferably, in step three, the pulse CW is inverted and input to the count terminal EQEP2A of the second counter.
Preferably, in step three, the first counter and the second counter are set to an up-count mode.
Preferably, in the second step, the specific step of obtaining the address value of the ring table through the data obtained in the first counter is as follows:
and subtracting the count value of the previous period from the count value of the current period, and adding the difference value with the cyclic address value of the previous period to obtain the address value of the cyclic table of the current period.
Preferably, in the third step, the count value of the last period is subtracted from the count value of the first counter of the present period to obtain a first difference value of the first counter;
subtracting the count value of the previous period from the count value of the second counter of the current period to obtain a second difference value of the second counter;
and subtracting the second difference value from the first difference value to obtain a third difference value, and performing addition operation on the third difference value and the ring division address value of the previous period to obtain the address value of the ring division table of the current period.
The invention has the advantages that:
hardware circuit resources in the DSP28335 processor are utilized, processing modes are switched according to a single pulse mode and a double pulse mode, extra circuits do not need to be added, and the simplified design of the circuit is achieved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of a method for processing two input command modes of a stepping motor driver.
FIG. 2 is a schematic diagram of a method for processing two input command modes of a stepping motor driver.
Fig. 3 is a schematic diagram of the prior art.
Detailed Description
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings. It should be noted that the embodiments and features of the embodiments of the present invention may be combined with each other without conflict.
The following detailed description is exemplary in nature and is intended to provide further explanation of the invention as claimed. Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention.
Example 1:
referring to fig. 1, the present invention provides a method for processing two input instruction modes of a stepping motor driver, which specifically comprises:
the DSP28335 receives an external mode selection signal through an IO port, and judges whether an input instruction is in a single-pulse instruction mode or a double-pulse instruction mode according to the external mode selection signal; the external mode selection signal is a high level signal or a low level signal.
In the single-pulse instruction mode, the single-pulse first instruction signal is a pulse signal CLK, and the single-pulse second instruction signal is a direction signal DIR; in the double-pulse command mode, the double-pulse first command signal is a forward rotation pulse signal CCW, and the double-pulse second command signal is a reverse rotation pulse signal CW.
The DSP28335 processor includes a first counter and a second counter, both of which are reversible counters.
When the external mode selection signal determines that the input instruction is in a single-pulse instruction mode, a first counter in the DSP28335 processor is set to be in a pulse + direction counting mode through DSP software, a pulse signal CLK is input to a counting end EQEP1A of the first counter, a direction signal DIR is input to a direction end EQEP1B of the first counter, reversible counting of the pulse signal can be achieved, the DSP28335 processor calculates a difference value of a counting value of the first counter in each PWM period, namely the counting value of the period subtracts a counting value of an upper period, and the difference value is added with a ring division address value of the upper period to obtain an address value of a ring division table of the period.
When the external mode selection signal determines that the input instruction is in the double-pulse instruction mode, the up-down counter inside the DSP28335 processor does not have the double-pulse counting mode, so that the counter cannot be directly used for double-pulse counting. In the double pulse mode, a first counter and a second counter are used simultaneously, wherein the first counter and the second counter are both set to an up-counting mode. When the forward rotation pulse CCW is input, the forward rotation pulse CCW is input to a counting end EQEP1A of a first counter, and the first counter counts the forward rotation pulse; when the inversion pulse CW is input, the inversion pulse CW is input to the count terminal EQEP2A of the second counter, and the second counter counts the inversion pulses. The DSP28335 performs difference calculation on the count value of the first counter in each PWM period, that is, the count value of the first counter in the present period is subtracted from the count value of the previous period to obtain a first difference value of the first counter. The DSP28335 performs difference calculation on the count value of the second counter in each PWM period, that is, the count value of the second counter in the current period is subtracted from the count value of the previous period to obtain a second difference value of the second counter.
The DSP28335 then subtracts the values of the two counters, that is, the first difference value subtracts the second difference value to obtain a third difference value, and the third difference value and the cyclic address value of the previous cycle are added to obtain the address value of the cyclic table of the present cycle.
The above-mentioned judging and switching processes are realized by DSP programming.
Fig. 2 schematically illustrates a method for processing two input command modes of a stepping motor driver.
In the prior art, instruction input modes of a stepping motor driver generally include a single pulse mode and a double pulse mode, and input interface circuits of instruction signals of the two modes are shared, and since a counting mode of a high-speed counter in a DSP processor only includes a single pulse counting mode and does not include a double pulse counting mode, as shown in fig. 3.
Compared with the prior art, the method and the device only utilize hardware circuit resources inside the DSP28335 processor, and realize the switching of the processing modes aiming at the single-pulse mode and the double-pulse mode.
It will be appreciated by those skilled in the art that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed above are therefore to be considered in all respects as illustrative and not restrictive. All changes which come within the scope of or equivalence to the invention are intended to be embraced therein.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: although the present invention has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.
Claims (9)
1. A processing method for two input instruction modes of a stepping motor driver is characterized by comprising the following steps:
the method comprises the following steps: judging whether the mode of an input instruction is a single-pulse instruction mode or not according to an external mode selection signal input into the DSP28335, if so, entering a second step, otherwise, if not, the input instruction is a double-pulse instruction signal, and entering a third step;
the DSP28335 processor comprises a first counter and a second counter, the single pulse instruction signal comprises a pulse signal CLK and a direction signal DIR, and the double pulse instruction signal comprises a forward pulse signal CCW and a reverse pulse signal CW;
step two: the pulse signal CLK and the direction signal DIR are respectively input to a counting end and a direction end of a first counter, and an address value of the cyclic division table is obtained through data obtained in the first counter;
step three: the positive rotation pulse signal CCW is input into the counting end of the first counter, the reverse rotation pulse signal CW is input into the counting end of the second counter, and the address value of the cyclic division table is obtained through the data obtained in the first counter and the second counter.
2. The method as claimed in claim 1, wherein said first counter and said second counter are both reversible counters.
3. The method as claimed in claim 1, wherein in the second step, the first counter is set to a pulse + direction counting mode.
4. The method as claimed in claim 1, wherein in step two, the pulse signal CLK is inputted to the count terminal EQEP1A of the first counter, and the direction signal DIR is inputted to the direction terminal EQEP1B of the first counter.
5. The method as claimed in claim 1, wherein in step three, the positive rotation pulse CCW is inputted to the count terminal EQEP1A of the first counter.
6. The method as claimed in claim 1, wherein the pulse CW is reversed and inputted to the count terminal EQEP2A of the second counter.
7. The method as claimed in claim 1, wherein in step three, the first counter and the second counter are set to count up mode.
8. The method as claimed in claim 1, wherein in the second step, the step of obtaining the address value of the cyclic division table from the data obtained from the first counter comprises the following specific steps:
and subtracting the count value of the previous period from the count value of the current period, and adding the difference value with the ring division address value of the previous period to obtain the address value of the ring division table of the current period.
9. The method as claimed in claim 1, wherein in step three, the count value of the first counter in the current period is subtracted by the count value of the last period to obtain a first difference value of the first counter;
subtracting the count value of the previous period from the count value of the second counter of the current period to obtain a second difference value of the second counter;
and subtracting the second difference value from the first difference value to obtain a third difference value, and performing addition operation on the third difference value and the cyclic division address value of the previous cycle to obtain the address value of the cyclic division table of the cycle.
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| CN202211610155.8A CN115882756A (en) | 2022-12-14 | 2022-12-14 | Processing method for two input instruction modes of stepping motor driver |
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| CN202211610155.8A CN115882756A (en) | 2022-12-14 | 2022-12-14 | Processing method for two input instruction modes of stepping motor driver |
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| CN202211610155.8A Pending CN115882756A (en) | 2022-12-14 | 2022-12-14 | Processing method for two input instruction modes of stepping motor driver |
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