CN115876866A - Nanopore sequencing circuit unit and gene sequencing device - Google Patents
Nanopore sequencing circuit unit and gene sequencing device Download PDFInfo
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- CN115876866A CN115876866A CN202111163753.0A CN202111163753A CN115876866A CN 115876866 A CN115876866 A CN 115876866A CN 202111163753 A CN202111163753 A CN 202111163753A CN 115876866 A CN115876866 A CN 115876866A
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- C—CHEMISTRY; METALLURGY
- C12—BIOCHEMISTRY; BEER; SPIRITS; WINE; VINEGAR; MICROBIOLOGY; ENZYMOLOGY; MUTATION OR GENETIC ENGINEERING
- C12M—APPARATUS FOR ENZYMOLOGY OR MICROBIOLOGY; APPARATUS FOR CULTURING MICROORGANISMS FOR PRODUCING BIOMASS, FOR GROWING CELLS OR FOR OBTAINING FERMENTATION OR METABOLIC PRODUCTS, i.e. BIOREACTORS OR FERMENTERS
- C12M1/00—Apparatus for enzymology or microbiology
- C12M1/34—Measuring or testing with condition measuring or sensing means, e.g. colony counters
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- C—CHEMISTRY; METALLURGY
- C12—BIOCHEMISTRY; BEER; SPIRITS; WINE; VINEGAR; MICROBIOLOGY; ENZYMOLOGY; MUTATION OR GENETIC ENGINEERING
- C12Q—MEASURING OR TESTING PROCESSES INVOLVING ENZYMES, NUCLEIC ACIDS OR MICROORGANISMS; COMPOSITIONS OR TEST PAPERS THEREFOR; PROCESSES OF PREPARING SUCH COMPOSITIONS; CONDITION-RESPONSIVE CONTROL IN MICROBIOLOGICAL OR ENZYMOLOGICAL PROCESSES
- C12Q1/00—Measuring or testing processes involving enzymes, nucleic acids or microorganisms; Compositions therefor; Processes of preparing such compositions
- C12Q1/68—Measuring or testing processes involving enzymes, nucleic acids or microorganisms; Compositions therefor; Processes of preparing such compositions involving nucleic acids
- C12Q1/6869—Methods for sequencing
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- G—PHYSICS
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- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
- G01N27/28—Electrolytic cell components
- G01N27/30—Electrodes, e.g. test electrodes; Half-cells
- G01N27/327—Biochemical electrodes, e.g. electrical or mechanical details for in vitro measurements
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
- G01N27/416—Systems
- G01N27/447—Systems using electrophoresis
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
- G01N27/416—Systems
- G01N27/48—Systems using polarography, i.e. measuring changes in current under a slowly-varying voltage
Abstract
The embodiment of the present disclosure provides a nanopore sequencing circuit unit and gene sequencing device, and this nanopore sequencing circuit unit adopts the CMOS circuit to realize for the realization detects the two-way little current signal of nanopore, and it includes: the nanopore clamping circuit is used for stabilizing the voltage of the detection electrode positioned on one side of the nanopore, generating a fixed voltage difference at two ends of the nanopore with the common electrode positioned on the other side of the nanopore, and driving single nucleotide molecules to pass through the nanopore one by virtue of the voltage difference; the nanopore clamping circuit comprises a charging path consisting of a first operational amplification circuit and a first clamping tube and a discharging path consisting of a second operational amplification circuit and a second clamping tube; the integral reset circuit is used for carrying out integral amplification on the bidirectional micro-current signal of the nanopore and converting the bidirectional micro-current signal into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively conducted; and the output circuit is used for receiving and outputting the voltage signal converted by the integral reset circuit. The high-throughput gene sequencing device with the bidirectional detection capability is constructed based on the small-area sequencing circuit unit, so that the detection precision and efficiency can be improved.
Description
Technical Field
The disclosure belongs to the technical field of electronic circuits, and particularly relates to a nanopore sequencing circuit unit and a gene sequencing device, which can be used for detecting biological micro-current signals of gene sequencing and pA-level micro-currents in other application fields.
Background
The nanopore sequencing method adopts an electrophoresis technology, and realizes sequencing by driving single molecules to pass through a nanopore one by means of electrophoresis. At present, nanopore sequencing technology has been widely used in studies on DNA sequencing, disease detection, drug screening, environmental monitoring, and the like. In the existing nanopore sequencing technology, direct current power supply and alternating current power supply can be simply divided according to a power supply mode, and corresponding nanopore electrodes can also be divided into direct current electrodes and alternating current electrodes. The direct current electrode generally generates oxidation-reduction reaction with the solution, and provides electrons or captures the electrons in the reaction, so that current can be provided only in one direction, the electrode can be slowly consumed along with time, and the problem of service life is solved; the alternating current electrode can not generate oxidation-reduction reaction with the solution, the purpose of power supply is achieved mainly through the mode of adsorbing ions in the solution or releasing ions, the ions can not be consumed, and the alternating current electrode can normally work only through charging or discharging. According to the characteristics of the nanopore electrode material, the mode of supplying power by adopting alternating current is beneficial to reducing the area of the electrode and prolonging the service life.
The currently known Roche gene sequencing scheme only carries out sequencing in a single direction, only supplements charges to electrodes in the other direction, and has a great space for improving the sequencing efficiency and precision. In addition, the known gene sequencing device can integrate more sequencing units to work synchronously, and the high-throughput gene sequencing device needs a sequencing unit with smaller area.
Disclosure of Invention
In view of this, the present disclosure provides a nanopore sequencing circuit unit and a gene sequencing device, which are used for constructing a high-throughput gene sequencing device with bidirectional detection capability based on a small-area sequencing circuit unit, and can improve detection accuracy and efficiency.
In a first aspect, the present disclosure provides a nanopore sequencing circuit unit, which is implemented by a CMOS circuit, for implementing detection of a bidirectional micro-current signal of a nanopore, and includes:
the nanopore clamping circuit is used for stabilizing the voltage of the detection electrode positioned on one side of the nanopore, generating a fixed voltage difference at two ends of the nanopore with the common electrode positioned on the other side of the nanopore, and driving single nucleotide molecules to pass through the nanopore one by virtue of the voltage difference; the nanopore clamping circuit comprises a charging channel consisting of a first operational amplifier circuit and a first clamping tube and a discharging channel consisting of a second operational amplifier circuit and a second clamping tube;
the integral reset circuit is used for carrying out integral amplification on the bidirectional micro-current signal of the nanopore and converting the bidirectional micro-current signal into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively conducted;
and the output circuit is used for receiving and outputting the voltage signal converted by the integral reset circuit.
In an alternative embodiment, the source electrode of the first clamping tube and the source electrode of the second clamping tube are connected, and are connected with the detection electrode; and the drain electrode of the first clamping tube is connected with the drain electrode of the second clamping tube and is connected to the integral reset circuit.
In an optional embodiment, a negative input end of the first operational amplifier circuit is connected to the detection electrode, a positive input end is connected to a common level, and an output end is connected to a control end of the first clamp tube; the negative input end of the second operational amplifier circuit is connected with the detection electrode, the positive input end of the second operational amplifier circuit is connected with the common level, and the output end of the second operational amplifier circuit is connected with the control end of the second clamping tube.
In an alternative embodiment, the first clamp includes a first transistor and a second transistor, and the second clamp includes a third transistor and a fourth transistor; the drain electrode of the first transistor is connected with the source electrode of the second transistor, and the drain electrode of the third transistor is connected with the source electrode of the fourth transistor; the source electrode of the first transistor is connected with the source electrode of the third transistor and is connected with the detection electrode; the drain electrode of the second transistor is connected with the drain electrode of the fourth transistor and is connected to the integral reset circuit; the control end of the second transistor is connected with the control end of the fourth transistor and is connected to a first switching control signal; the first switching control signal controls the nanopore clamp circuit to switch between a charging path and a discharging path.
In an alternative embodiment, a negative input terminal of the first operational amplifier circuit is connected to the detection electrode, a positive input terminal is connected to a common level, and an output terminal is connected to the control terminal of the first transistor; the negative input end of the second operational amplifier circuit is connected with the detection electrode, the positive input end of the second operational amplifier circuit is connected with the common level, and the output end of the second operational amplifier circuit is connected with the control end of the third transistor.
In an optional embodiment, the first operational amplifier circuit comprises a fifth transistor, the second operational amplifier circuit comprises a sixth transistor, and control terminals of the fifth transistor and the sixth transistor are connected to a second switching control signal; the fifth transistor and the sixth transistor are used for respectively controlling the power supply of the first operational amplification circuit and the power supply of the second operational amplification circuit to be switched on and off under the action of the second switching control signal and controlling the nanopore clamping circuit to be switched between a charging path and a discharging path.
In an optional embodiment, the first operational amplifier circuit and the second operational amplifier circuit further comprise an offset voltage input terminal, wherein a first offset voltage is input to the offset voltage input terminal of the first operational amplifier circuit, and a second offset voltage is input to the offset voltage input terminal of the second operational amplifier circuit.
In an alternative embodiment, the integration reset circuit includes an integration capacitor and a first reset switch, a first end of the integration capacitor is connected to a first end of the first reset switch, and is connected to a drain of the second transistor and a drain of the fourth transistor, and a second end of the integration capacitor is grounded; and the second end of the first reset switch is connected with a pre-charged value voltage and is used for periodically resetting the voltage of the integrating capacitor.
In an alternative embodiment, the integration reset circuit comprises an integration capacitor and a first reset switch, a first end of the integration capacitor is connected with a first end of the first reset switch and is simultaneously connected with the drains of the first clamping tube and the second clamping tube, and a second end of the integration capacitor is grounded; and the second end of the first reset switch is connected with a pre-charged value voltage and is used for periodically resetting the voltage of the integrating capacitor.
In an optional implementation manner, the output circuit includes a second source follower and a selection switch, an input end of the second source follower is connected to the first end of the integration capacitor, an output end of the second source follower is connected to the first end of the selection switch, and a second end of the selection switch outputs the voltage signal converted by the integration reset circuit to a common signal line.
In an alternative embodiment, the nanopore sequencing circuit unit further comprises a second reset switch, a first terminal of the second reset switch is connected to the detection electrode, and a second terminal of the second reset switch is connected to the common level, and is used for fixing the voltage of the detection electrode at the common level when the nanopore clamping circuit is switched between the charging path and the discharging path.
In a second aspect, the present disclosure also provides a gene sequencing device, comprising a chip integrated with a plurality of microporous structural units and a plurality of nanopore sequencing circuit units as described in any one of the foregoing embodiments, wherein the microporous structural units comprise nanopores, common electrodes and detection electrodes located at two sides of the nanopores; and the nanopore sequencing circuit units are correspondingly connected with the micropore structure units and are used for measuring bidirectional micro-current signals of the nanopores in the corresponding micropore structure units.
In an optional embodiment, the nanopore sequencing device further comprises a common signal line and an analog-to-digital conversion circuit connected to the common signal line, wherein the common signal line is used for receiving a voltage signal output by the nanopore sequencing circuit unit, and the analog-to-digital conversion circuit is used for converting the voltage signal into a digital signal.
In an alternative embodiment, the system further comprises a common tail current source, one end of the common tail current source is connected to the common signal line, and the other end of the common tail current source is grounded.
In an alternative embodiment, the chip comprises a MEMS chip implementing the microporous structural unit.
The nanopore sequencing circuit unit disclosed by the invention has extremely small circuit area, has bidirectional micro-current detection capability, is suitable for integrating and constructing a nanopore gene sequencing device with million fluxes or even tens of millions of fluxes, and can greatly improve the integration level, thereby realizing high flux and high detection efficiency. Furthermore, the nanopore sequencing circuit unit and the gene sequencing device thereof can carry out detection in one direction and carry out error correction in the other direction, thereby further correcting errors, reducing the error rate and improving the detection precision.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present disclosure, and it is also possible for those skilled in the art to obtain other drawings based on the drawings without inventive exercise.
FIG. 1 is a schematic diagram of the structural and electrical model of a nanopore test chamber 101 employed in embodiments of the present disclosure;
FIG. 2 is a schematic circuit diagram of a nanopore sequencing circuit unit 200 according to an embodiment of the present disclosure;
FIG. 3 is a schematic circuit diagram of a nanopore sequencing circuit unit 300 according to a second embodiment of the disclosure;
FIG. 4 is a schematic circuit diagram of a nanopore sequencing circuit unit 400 according to a third embodiment of the present disclosure;
FIG. 5A is a schematic diagram of a first circuit operating state of the nanopore sequencing circuit unit 400 of the embodiment shown in FIG. 4;
FIG. 5B is a schematic diagram of a second circuit operating state of the nanopore sequencing circuit unit 400 of the embodiment shown in FIG. 4;
FIG. 6 is a schematic circuit diagram of a nanopore sequencing circuit cell 600 according to a fourth embodiment of the present disclosure;
FIG. 7 is a schematic structural diagram of a gene sequencing apparatus according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described below in detail and completely with reference to the accompanying drawings in the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
In the present disclosure, it is to be understood that terms such as "including" or "having," etc., are intended to indicate the presence of the disclosed features, numbers, steps, behaviors, components, parts, or combinations thereof, and are not intended to preclude the possibility that one or more other features, numbers, steps, behaviors, components, parts, or combinations thereof may be present or added.
In a nanopore sequencing device, nucleotide molecules are driven to pass through a nanopore by means of voltage applied to two ends of a test cavity, and the type of the nucleotide molecules passing through the nanopore is detected by detecting micro-current characteristic signals output by the nanopore, so that gene sequencing is realized.
FIG. 1 is a schematic diagram of the structural and electrical model of a nanopore test chamber 101 employed in embodiments of the present disclosure. As shown in fig. 1, the nanopore test chamber 101 comprises a first compartment and a second compartment separated by a phospholipid bilayer membrane 105, and an electrode 103 connected to the first compartment and an electrode 102 connected to the second compartment. The phospholipid bilayer membrane 105 has a nanopore 104 therein, and a nucleotide molecule 106 linked to a linker 107 is located in the first compartment and passes through the nanopore 104 under the application of a voltage applied to the electrodes 102 and 103. In fig. 1, the nanopore equivalent capacitance 108 and the nanopore equivalent resistance 109 may be used to simulate the electrical characteristics of the nanopore 104, and for convenience of description, the nanopore test chamber 101 is simplified to a nanopore equivalent circuit model 113 in the embodiment of the present disclosure.
Fig. 2 is a circuit diagram of a nanopore sequencing circuit unit 200 according to a first embodiment of the disclosure. As shown in fig. 2, the nanopore sequencing circuit unit 200 is implemented by a CMOS circuit, and includes a nanopore clamp circuit, an integration reset circuit, and an output circuit.
The nanopore clamping circuit is used for stabilizing the voltage of a detection electrode of the nanopore 201, generating a fixed voltage difference at two ends of the nanopore 201 with a common electrode VCMD 202 positioned at the other side of the nanopore 201, forming a charging and discharging path with the integral reset circuit, and driving single nucleotide molecules to pass through the nanopore one by means of the voltage difference at the two ends of the nanopore 201. The nanopore clamping circuit comprises a charging path consisting of a first operational amplifier circuit (OP 1) 205 and a first clamping tube 214, and a discharging path consisting of a second operational amplifier circuit (OP 2) 204 and a second clamping tube 215.
The integral reset circuit is used for carrying out integral amplification on the bidirectional micro-current signal of the nanopore 201 and converting the bidirectional micro-current signal into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively conducted. The output circuit is used for receiving and outputting the voltage signal converted by the integral reset circuit.
In some embodiments, the source of the first clamping tube 214 and the source of the second clamping tube 215 are connected, and are connected with the detection electrode of the nanopore 201; the drain of the first clamping tube 214 is connected with the drain of the second clamping tube 215 and is connected to the integral reset circuit. Wherein, the negative input end of the first operational amplifier circuit (OP 1) 205 is connected to the detection electrode of the nanopore 201, and the positive input end is connected to the common level VCM 203; the output end of the first operational amplifier circuit (OP 1) 205 is connected to the control end of the first clamp tube 214. The negative input end of the second operational amplifier circuit (OP 2) 204 is connected with the detection electrode of the nanopore 201, and the positive input end is connected with the common level VCM 203; the output end of the second operational amplifier circuit (OP 2) 204 is connected to the control end of the second clamp tube 215.
In some embodiments, the first clamp 214 may be a PMOS transistor and the second clamp 215 may be an NMOS transistor.
In some embodiments, the integrating reset circuit may include an integrating capacitor 208 and a reset switch 207. A first terminal (i.e., a charging terminal) of the integration capacitor 208 is connected to a first terminal of the reset switch 207, the other terminal of the integration capacitor 208 is grounded, and a second terminal of the reset switch 207 is connected to the pre-charge voltage Vpre 206. The charging end of the integrating capacitor 208 is connected to the drain of the first clamping tube 214 and the drain of the second clamping tube 215 at the same time, and is used for integrating and amplifying the micro-current signal to be measured of the nanopore and converting the micro-current signal into a voltage signal. The reset switch 207 is used to periodically perform clear reset on the voltage of the integration capacitor 208 by the reset signal Rst.
In some embodiments, when the output terminals of the first operational amplifier circuit (OP 1) 205 and the second operational amplifier circuit (OP 2) 204 output a low level, the first clamp 214 is turned on, the second clamp 215 is turned off, and the charging path is turned on and the discharging path is turned off. When the output ends of the first operational amplifier circuit (OP 1) 205 and the second operational amplifier circuit (OP 2) 204 output high levels, the first clamp tube 214 is turned off, the second clamp tube 215 is turned on, and at this time, the charging path is turned off and the discharging path is turned on. The charge and discharge path switches the nanopore current to the integrating capacitor 208, which is output via an output circuit after being integrated and amplified for a fixed time.
In some embodiments, the output circuit includes a source follower 216 and a selection switch 209. The input terminal of the source follower 216 is connected to the first terminal (i.e., the charging terminal) of the integrating capacitor 208, receives the voltage signal output from the integrating reset circuit, and is connected to the common signal line 211 via the selection switch 209.
In some embodiments, the common signal line 211 is connected in parallel with the tail current source 213 and connected to the analog-to-digital converter 212, and the analog-to-digital converter 212 is configured to receive the output voltage signal of the source follower 216 and convert the output voltage signal into a digital code value, which has a multiplexing function and can be multiplexed among a plurality of nanopore sequencing circuit units.
The nanopore sequencing circuit unit disclosed by the embodiment of the disclosure is realized by adopting a CMOS circuit, has extremely small circuit area, is convenient for high-flux integration, has bidirectional detection capability of charging and discharging, and can obviously improve sequencing precision and efficiency when being used in a high-flux gene sequencing device.
Fig. 3 is a circuit schematic diagram of a nanopore sequencing circuit unit 300 according to a second embodiment of the disclosure. As shown in fig. 3, the nanopore sequencing circuit unit 300 of this embodiment is based on the circuit configuration of the first embodiment, and a reset switch Rst _ cmd317 is connected in series between the detection electrode of the nanopore 301 and the common level VCM 303. The reset switch 317 is added, so that the detection electrodes of the nano holes 301 can be fixed at a common level when the circuit performs detection switching of the charging and discharging directions, the quick establishment of the working points of the circuit is facilitated, and the response speed of the circuit during bidirectional detection switching is improved.
Fig. 4 is a circuit schematic of a nanopore sequencing circuit unit 400 according to a third embodiment of the disclosure. As shown in fig. 4, the nanopore sequencing circuit unit 400 of this embodiment further improves the design of the nanopore clamp circuit based on the scheme of the previous embodiment.
Wherein the first operational amplification circuit (OP 1) 408 and the second operational amplification circuit (OP 2) 409 comprise a five transistor (5T) operational amplifier implementation. The first clamp 410 includes a first transistor and a second transistor connected in series, and the second clamp 411 includes a third transistor and a fourth transistor connected in series. The drain electrode of the first transistor is connected with the source electrode of the second transistor, and the drain electrode of the third transistor is connected with the source electrode of the fourth transistor. The source of the first transistor is coupled to the source of the third transistor and to the sense electrode of nanopore 401. The drain of the second transistor is connected to the drain of the fourth transistor and to the charging terminal of the integrating capacitor 414. And the control end of the second transistor is connected with the control end of the fourth transistor and is connected to a switching control signal CMD.
The positive input terminal of the first operational amplifier circuit (OP 1) 408 is connected to the common level VCM404, and the negative input terminal is connected to the detection electrode of the nanopore 401. Similarly, the positive input of the second operational amplifier circuit (OP 2) 409 is also connected to the common level VCM404, and the negative input is also connected to the detection electrode of the nanopore 401. The output terminal of the first operational amplifier circuit (OP 1) 408 is connected to the control terminal of the first transistor of the first clamp 410, and the output terminal of the second operational amplifier circuit (OP 2) 409 is connected to the control terminal of the third transistor of the second clamp 411.
The offset voltage VP 403 is input to an offset voltage input terminal of the first operational amplifier circuit (OP 1) 408, and the offset voltage VN 406 is input to an offset voltage input terminal of the second operational amplifier circuit (OP 2) 409.
In some embodiments, the nanopore sequencing circuit unit 400 of this embodiment may further include a reset switch 407 connected in series between the detection electrode of the nanopore 401 and the common level VCM404, so as to fix the detection electrode of the nanopore 401 at the common level when the circuit performs detection switching of the charge and discharge directions, which is beneficial to quickly establishing a circuit operating point and improving a response speed when the circuit performs bidirectional detection switching.
Fig. 5A and 5B are schematic diagrams illustrating the operation status of the nanopore sequencing circuit unit 400 according to the embodiment shown in fig. 4. As shown in fig. 5A, when the switching control signal CMD is '0', the second transistor of the first clamp 410 is controlled to be turned on, the fourth transistor of the second clamp 411 is turned off, and at this time, the circuit operates in a charging state, and the charging path formed by the first operational amplifier circuit (OP 1) 408 and the first clamp 410 is gated and starts to operate. At this time, the current flows from the nanopore 401 to the integrating capacitor 414, is converted into a voltage signal after being integrated and amplified, and is output through the source follower 416 and is subjected to sampling analog-to-digital conversion.
When the switching control signal CMD is '1', the second transistor of the first clamp 410 is controlled to be turned off, the fourth transistor of the second clamp 411 is controlled to be turned on, at this time, the circuit works in a discharging state, and a discharging path formed by the second operational amplifier circuit (OP 2) 409 and the second clamp 411 is gated and starts to work. At this time, the current flows to the nanopore 401 through the integrating capacitor 414, is integrated and amplified, and then is converted into a voltage signal, and is output through the source follower 416 and is subjected to sampling analog-to-digital conversion.
The precharge voltage Vpre is set to VL in the charge state and to VH in the discharge state, and VL and VH are located on both upper and lower sides of the common level VCM. The reference voltage VCMD of the common electrode of the nanopore is varied up and down by a fixed voltage difference Δ V centered on the common level VCM. Since the integration capacitor 414 is reset by the reset signal Rst of the reset switch 412 in a cycle, the reset voltage value is the precharge voltage Vpre, and therefore the voltage of the integration capacitor 414 rises from VL during charging and falls from VH during discharging, with the precharge voltage Vpre as a boundary. It should be noted that although fig. 5A schematically illustrates a manner in which the reference voltage VCMD of the common electrode of the nanopore is a symmetrical voltage, in other embodiments, the reference voltage VCMD may be an asymmetrical voltage, and the voltage signals shown in fig. 5A may be flexibly adjusted according to the system requirement.
As shown in fig. 5B, if the circuitry is required to be fast stable, the RST _ CMD signal of the reset switch 407 may be enabled, the RST _ CMD signal may be turned on at the transition of the switching control signal CMD, the reset switch 407 may be turned on, and the detection electrode of the nanopore may be directly connected to the common level VCM, so that the clamp terminal voltage of the nanopore may be fast stabilized.
Fig. 6 is a circuit schematic of a nanopore sequencing circuit cell 600 according to a fourth embodiment of the disclosure. As shown in fig. 6, the nanopore sequencing circuit unit 600 of this embodiment further improves the design of the nanopore clamping circuit based on the scheme of the previous embodiment.
In this embodiment, compared with the third embodiment, the first clamp tube 610 only includes the first transistor, and the second clamp tube 611 only includes the third transistor. The source electrode of the first transistor is connected with the source electrode of the third transistor and is connected with the detection electrode of the nanopore 601; the drain of the first transistor is coupled to the drain of the third transistor and to the charge terminal of the integrating capacitor 614. The output terminal of the first operational amplifier circuit (OP 1) 608 is connected to the control terminal of the first transistor of the first clamp tube 610, and the output terminal of the second operational amplifier circuit (OP 2) 609 is connected to the control terminal of the third transistor of the second clamp tube 611.
The first operational amplifier circuit (OP 1) 608 further includes a fifth transistor 620 in addition to the five-transistor (5T) operational amplifier, and the second operational amplifier circuit (OP 2) 609 further includes a sixth transistor 621 in addition to the five-transistor (5T) operational amplifier. The control end of the fifth transistor is connected with the control end of the sixth transistor and is connected to a switching control signal CMDN, the switching control signal CMDN is an inverted signal of the control signal CMD in the previous embodiment and is used for controlling the on and off of the fifth transistor and the sixth transistor and switching the working states of the first operational amplifier circuit (OP 1) 608 and the second operational amplifier circuit (OP 2) 609, and meanwhile, only one operational amplifier circuit works in the charging and discharging states, so that the power consumption of the whole circuit unit is reduced.
When the switching control signal CMDN is "0", the fifth transistor 620 is turned off, the sixth transistor 621 is turned on, the second operational amplifier circuit (OP 2) 609 operates, the power of the first operational amplifier circuit (OP 1) 608 is cut off, and meanwhile, the control terminal of the first clamp tube 610 is pulled to a high level, the charging path is turned off, and the circuit operates in a discharging state. When the switching control signal CMDN is "1", the fifth transistor 620 is turned on, the sixth transistor 621 is turned off, the first operational amplifier circuit (OP 1) 608 operates, the power supply of the second operational amplifier circuit (OP 2) 609 is cut off, meanwhile, the control end of the second clamp tube 611 is pulled down to a low level, the discharging path is closed, and at this time, the circuit operates in a charging state, so that the selection of the detection direction of the circuit is realized. Compared with the previous embodiment, only one operational amplifier (OP 1 or OP 2) works in the embodiment, which can reduce the power consumption of about 50% of the whole unit, and can greatly reduce the whole power consumption during high-throughput integration under the condition of realizing the same circuit area. The working timing of the circuit of this embodiment is compared with the three phases of the embodiment, the switching control signal CMDN is the inverse signal of CMD, and other control signals are the same.
FIG. 7 is a schematic structural diagram of a gene sequencing apparatus according to an embodiment of the present disclosure. As shown in fig. 7, the gene sequencing apparatus of this embodiment includes a plurality of integrated microporous structure units 702 and a plurality of nanopore sequencing circuit units 706 described in any of the foregoing embodiments, where the microporous structure units 702 and the nanopore sequencing circuit units 706 are in one-to-one correspondence. Each microporous structure unit 702 includes a nanopore 704, a common electrode 701 and a detection electrode 703 on both sides of the nanopore 704. The device can realize the micropore structure unit 702 through MEMS technology, and integrate the micropore structure unit 702 and the nanopore sequencing circuit unit 706 corresponding to the micropore structure unit on the same chip, thereby forming a high-flux gene sequencing device.
In some embodiments, the plurality of microporous structure units 702 may share a common electrode 701, and the output voltages of the plurality of nanopore sequencing circuit units 706 may be output to a shared common signal line 707 through a selection switch, and output after being converted into digital signals by an analog-to-digital converter 709, thereby implementing multiplexing of analog-to-digital conversion functions of the output voltage signals of the nanopore sequencing circuit units 706.
In some embodiments, the gene sequencing apparatus further comprises a common tail current source 708, one end of the common tail current source 708 is connected to the common signal line 707, and the other end is grounded.
The nanopore sequencing circuit unit disclosed by the embodiment of the disclosure can be realized by adopting a CMOS circuit, has extremely small circuit area, is suitable for integrating and constructing a nanopore gene sequencing device with million flux or even millions of fluxes, can greatly improve the integration level, and thus realizes high flux and high detection efficiency. In addition, the nanopore sequencing circuit unit disclosed by the embodiment of the disclosure has bidirectional detection capability, so that the error rate can be further reduced, and the detection precision of sequencing is improved.
It should be noted that the above embodiments can be freely combined as required, the devices involved in the circuit are illustrated as CMOS devices, and other devices, such as BJT, JFET, etc., can also implement the technical solution of the present disclosure. The foregoing is illustrative of the preferred embodiments of the present disclosure, and it is noted that variations and modifications can be made by persons skilled in the art without departing from the principles of the present disclosure, which should be considered as falling within the scope of the present disclosure.
Claims (15)
1. The utility model provides a nanopore sequencing circuit unit, its characterized in that, this nanopore sequencing circuit unit adopts CMOS circuit to realize for realize detecting the two-way little current signal of nanopore, it includes:
the nanopore clamping circuit is used for stabilizing the voltage of a detection electrode positioned on one side of a nanopore, generating a fixed voltage difference at two ends of the nanopore with a common electrode positioned on the other side of the nanopore, and driving single nucleotide molecules to pass through the nanopore one by virtue of the voltage difference; the nanopore clamping circuit comprises a charging path consisting of a first operational amplification circuit and a first clamping tube and a discharging path consisting of a second operational amplification circuit and a second clamping tube;
the integral reset circuit is used for carrying out integral amplification on the bidirectional micro-current signal of the nanopore and converting the bidirectional micro-current signal into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively conducted;
and the output circuit is used for receiving and outputting the voltage signal converted by the integral reset circuit.
2. The nanopore sequencing circuit unit of claim 1, wherein the source of the first clamp and the source of the second clamp are connected to the detection electrode; and the drain electrode of the first clamping tube is connected with the drain electrode of the second clamping tube and is connected to the integral reset circuit.
3. The nanopore sequencing circuit unit of claim 2, wherein the negative input terminal of the first operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to a common level, and the output terminal is connected to the control terminal of the first clamp; the negative input end of the second operational amplifier circuit is connected with the detection electrode, the positive input end of the second operational amplifier circuit is connected with the common level, and the output end of the second operational amplifier circuit is connected with the control end of the second clamping tube.
4. The nanopore sequencing circuit unit of claim 1, wherein the first clamp comprises a first transistor and a second transistor, the second clamp comprises a third transistor and a fourth transistor; the drain electrode of the first transistor is connected with the source electrode of the second transistor, and the drain electrode of the third transistor is connected with the source electrode of the fourth transistor; the source electrode of the first transistor is connected with the source electrode of the third transistor and is connected with the detection electrode; the drain electrode of the second transistor is connected with the drain electrode of the fourth transistor and is connected to the integral reset circuit; the control end of the second transistor is connected with the control end of the fourth transistor and is connected to a first switching control signal; the first switching control signal controls the nanopore clamp circuit to switch between a charging path and a discharging path.
5. The nanopore sequencing circuit unit of claim 4, wherein the first operational amplifier circuit has a negative input connected to the detection electrode, a positive input connected to a common level, and an output connected to the control terminal of the first transistor; the negative input end of the second operational amplifier circuit is connected with the detection electrode, the positive input end of the second operational amplifier circuit is connected with the common level, and the output end of the second operational amplifier circuit is connected with the control end of the third transistor.
6. The nanopore sequencing circuit unit of claim 3, wherein the first operational amplification circuit comprises a fifth transistor, the second operational amplification circuit comprises a sixth transistor, and control terminals of the fifth transistor and the sixth transistor are connected to a second switching control signal; the fifth transistor and the sixth transistor are used for respectively controlling the power supply of the first operational amplification circuit and the power supply of the second operational amplification circuit to be switched on and off under the action of the second switching control signal and controlling the nanopore clamping circuit to be switched between a charging path and a discharging path.
7. The nanopore sequencing circuit unit of claim 5 or 6, wherein the first and second operational amplification circuits further comprise a bias voltage input, wherein a first bias voltage is input to the bias voltage input of the first operational amplification circuit and a second bias voltage is input to the bias voltage input of the second operational amplification circuit.
8. The nanopore sequencing circuit unit of claim 5, wherein the integrating reset circuit comprises an integrating capacitor and a first reset switch, a first end of the integrating capacitor is connected to a first end of the first reset switch, and is connected to a drain of the second transistor and a drain of the fourth transistor, and a second end of the integrating capacitor is grounded; and the second end of the first reset switch is connected with a pre-charged value voltage and is used for periodically resetting the voltage of the integrating capacitor.
9. The nanopore sequencing circuit unit of claim 6, wherein the integrating reset circuit comprises an integrating capacitor and a first reset switch, a first end of the integrating capacitor is connected to a first end of the first reset switch and to the drains of the first clamping tube and the second clamping tube, and a second end of the integrating capacitor is grounded; and the second end of the first reset switch is connected with a pre-charged value voltage and is used for periodically resetting the voltage of the integrating capacitor.
10. The nanopore sequencing circuit unit of claim 8 or 9, wherein the output circuit comprises a second source follower and a selection switch, wherein an input end of the second source follower is connected to a first end of the integrating capacitor, an output end of the second source follower is connected to a first end of the selection switch, and a second end of the selection switch outputs the voltage signal converted by the integrating reset circuit to a common signal line.
11. The nanopore sequencing circuit unit of claim 10, further comprising a second reset switch having a first terminal connected to the detection electrode and a second terminal connected to the common level for fixing the voltage of the detection electrode at the common level when the nanopore clamping circuit switches between the charging path and the discharging path.
12. A gene sequencing apparatus comprising a chip integrated with a plurality of microwell structure units comprising a nanopore, common electrodes and detection electrodes located on both sides of the nanopore, and a plurality of nanopore sequencing circuit units according to any one of claims 1 to 11; the nanopore sequencing circuit units are correspondingly connected with the micropore structure units and used for measuring bidirectional micro-current signals of the nanopores in the corresponding micropore structure units.
13. The gene sequencing apparatus of claim 12, further comprising a common signal line for receiving a voltage signal output by the nanopore sequencing circuit unit and an analog-to-digital conversion circuit connected to the common signal line for converting the voltage signal into a digital signal.
14. The gene sequencing apparatus of claim 13, further comprising a common tail current source having one end connected to the common signal line and the other end at ground potential.
15. The gene sequencing apparatus of claim 12, wherein the chip comprises a MEMS chip that implements the microwell structural unit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111163753.0A CN115876866A (en) | 2021-09-30 | 2021-09-30 | Nanopore sequencing circuit unit and gene sequencing device |
| PCT/CN2022/122448 WO2023051665A1 (en) | 2021-09-30 | 2022-09-29 | Nanopore sequencing circuit unit and gene sequencing apparatus |
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| CN202111163753.0A CN115876866A (en) | 2021-09-30 | 2021-09-30 | Nanopore sequencing circuit unit and gene sequencing device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8592225B2 (en) * | 2006-09-28 | 2013-11-26 | The Board Of Trustees Of The Leland Stanford Junior University | Array-based bioactivated nanopore devices |
| EP2678669A1 (en) * | 2011-02-23 | 2014-01-01 | The Trustees of Columbia University in the City of New York | Systems and methods for single-molecule detection using nanopores |
| AU2012284113B2 (en) * | 2011-07-20 | 2013-11-28 | The Regents Of The University Of California | Compensated patch-clamp amplifier for nanopore polynucleotide sequencing and other applications |
| WO2013074546A1 (en) * | 2011-11-14 | 2013-05-23 | The Regents Of The University Of California | Two- chamber dual-pore device |
| JP6333179B2 (en) * | 2012-01-20 | 2018-05-30 | ジニア テクノロジーズ， インコーポレイテッド | Nanopore-based molecular detection and sequencing |
| US9863904B2 (en) * | 2014-12-19 | 2018-01-09 | Genia Technologies, Inc. | Nanopore-based sequencing with varying voltage stimulus |
| CN107533045B (en) * | 2015-02-05 | 2020-10-09 | 哈佛大学校长及研究员协会 | Nanopore sensor including fluidic channel |
| US9945836B2 (en) * | 2015-04-23 | 2018-04-17 | International Business Machines Corporation | Field effect based nanopore device |
| US10718737B2 (en) * | 2016-01-21 | 2020-07-21 | Roche Sequencing Solutions, Inc. | Molded flow channel |
| CN105695318B (en) * | 2016-02-24 | 2018-10-23 | 严媚 | A kind of nano-pore genetic test sensor chip |
| US10724065B2 (en) * | 2017-02-21 | 2020-07-28 | Qualcomm Incorporated | Noise improvement in DNA sequencing circuit by FinFET-like nanopore formation |
| CN109266537B (en) * | 2018-09-14 | 2019-10-29 | 首度生物科技（苏州）有限公司 | Reach the gene sequencer of accurate sequencing using unimolecule multipass nano-pore |
| CN112708544A (en) * | 2019-10-25 | 2021-04-27 | 成都今是科技有限公司 | Measuring device and measuring method for gene sequencing |
| CN111090002A (en) * | 2019-12-24 | 2020-05-01 | 中国科学院苏州生物医学工程技术研究所 | Nanopore gene sequencing micro-current detection device and current stability compensation method |
| CN111019814B (en) * | 2019-12-26 | 2022-12-09 | 中国科学院苏州生物医学工程技术研究所 | Nucleic acid sequencing device and nucleic acid sequencing method based on nanopore |
| CN112924745A (en) * | 2021-01-21 | 2021-06-08 | 季华实验室 | Nanopore gene sequencing micro-current detection device |
| CN112795476B (en) * | 2021-04-15 | 2021-07-02 | 成都齐碳科技有限公司 | Nanopore sequencing circuit, sequencing method and device |
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2021
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