CN115813406A - EEG sensor circuit, method and device - Google Patents
EEG sensor circuit, method and device Download PDFInfo
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Abstract
The application relates to the technical field of electroencephalogram detection, in particular to an EEG sensor circuit, a method and a device, wherein the circuit comprises a switching circuit, a first ADC circuit, a main control circuit and a plurality of preceding-stage analog circuits; each preceding-stage analog circuit is used for filtering and amplifying signals; the switching circuit is used for switching the connection between the preceding stage analog circuit and the first ADC circuit; the first ADC circuit is used for converting an analog signal into a digital signal; and the main control circuit receives the digital signal output by the first ADC circuit and transmits the digital signal to an upper computer. The application has the effect of reducing cost.
Description
Technical Field
The present application relates to the field of electroencephalogram detection technologies, and in particular, to an EEG sensor circuit, method, and apparatus.
Background
With the development of sensor technology and signal processing technology, the signal changes of the brain and the nervous system thereof can be recorded in real time, and the brain of a human can be better researched by detecting and analyzing the change of the electroencephalogram signals.
When the electroencephalogram signals are detected, the electroencephalogram sensor needs to be worn to collect the electroencephalogram signals, a plurality of signals need to be collected in the analysis and processing process of the electroencephalogram signals, and a plurality of circuits used for converting analog signals into digital signals need to be arranged in sensor circuits, so that the manufacturing cost of the sensor is high.
Disclosure of Invention
To reduce costs, the present application provides an EEG sensor circuit, method and apparatus.
In a first aspect, the present application provides an EEG sensor circuit that employs the following technical solution:
an EEG sensor circuit comprises a switching circuit, a first ADC circuit, a main control circuit and a plurality of preceding-stage analog circuits;
each preceding-stage analog circuit is used for filtering and amplifying signals;
the switching circuit is used for switching the connection between the preceding stage analog circuit and the first ADC circuit;
the first ADC circuit is used for converting an analog signal into a digital signal;
and the main control circuit receives the digital signal output by the first ADC circuit and transmits the digital signal to an upper computer.
By adopting the technical scheme, the preceding stage analog circuit is utilized to collect signals and carry out filtering amplification processing on the signals, then the switching circuit transmits the signals to the first ADC circuit under the control of the main control circuit, and the first ADC circuit converts the signals into digital signals and transmits the digital signals to the upper computer. The setting that utilizes switching circuit and the cooperation of first ADC circuit can be a plurality of preceding stage analog circuit and be connected with first ADC circuit in proper order to reduce the setting of first ADC circuit, thereby reduce cost.
Optionally, the switching circuit includes at least one switching chip, each input pin of the switching chip is connected to one output terminal of the preceding stage analog circuit, an output pin of the switching chip is connected to the first ADC circuit, and a control pin of the switching chip is connected to the main control circuit.
By adopting the technical scheme, the main control circuit sends the control signal to the switching chip, so that the connection between the preceding-stage analog circuit and the first ADC circuit is switched, and the conversion of the signal acquired each time by one first ADC circuit is realized.
Optionally, the first ADC circuit includes at least one ADC module, an input pin of the ADC module is connected to the switching circuit, an output pin of the ADC module is connected to the main control circuit, and the ADC module is of a single channel type.
Through adopting above-mentioned technical scheme, under switching circuit's cooperation, the conversion to whole signals can be realized to the ADC module of single channel type, compares in the ADC module of multichannel, can reduce cost.
Optionally, preceding stage analog circuit includes filter circuit, amplifier circuit and drive circuit, drive circuit is used for connecting the people brain in order to gather the signal, filter circuit is arranged in filtering clutter in the signal, amplifier circuit is used for amplifying the signal so that first ADC circuit can discern.
By adopting the technical scheme, the collected signals are filtered and amplified while being collected, so that clutter influence is reduced.
In a second aspect, the present application provides an EEG sensor circuit control method that adopts the following technical solution:
an EEG sensor circuit control method for use in an EEG sensor circuit as described in the first aspect;
the main control circuit controls the switching circuit to switch so that each preceding-stage analog circuit is communicated with the first ADC circuit in sequence;
meanwhile, the master control circuit controls the first ADC circuit to enable, so that the first ADC circuit converts an analog signal into a digital signal and transmits the digital signal to the master control circuit;
and the main control circuit receives the digital signal and transmits the digital signal to an upper computer.
In a third aspect, the present application provides an EEG sensor apparatus that employs the following technical solution:
an EEG sensor device comprising an EEG sensor circuit as described in the first aspect.
In summary, the present application includes at least one of the following beneficial technical effects:
1. the front-stage analog circuit is used for collecting signals and carrying out filtering amplification processing on the signals, then the switching circuit transmits the signals to the first ADC circuit under the control of the main control circuit, and the first ADC circuit converts the signals into digital signals and transmits the digital signals to the upper computer. The setting that utilizes switching circuit and the cooperation of first ADC circuit can be a plurality of preceding stage analog circuit and be connected with first ADC circuit in proper order to reduce the setting of first ADC circuit, thereby reduce cost.
Drawings
Fig. 1 is a connection block diagram of the whole of the embodiment of the present application.
Fig. 2 is a schematic diagram of a master control circuit according to an embodiment of the present application.
Fig. 3 is a schematic diagram of a preceding stage analog circuit according to an embodiment of the present application.
Fig. 4 is a schematic diagram of a switching circuit according to an embodiment of the present application.
Fig. 5 is a schematic diagram of a first ADC circuit according to an embodiment of the present application.
Fig. 6 is a schematic diagram of a second ADC circuit according to an embodiment of the present application.
Fig. 7 is a schematic diagram of an interface J1 according to an embodiment of the present application.
Description of reference numerals: 1. a switching circuit; 2. a first ADC circuit; 3. a master control circuit; 4. a preceding stage analog circuit; 5. a second ADC circuit.
Detailed Description
The present application will be described in further detail below with reference to the accompanying fig. 1-7 and examples. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The embodiment of the application discloses an EEG sensor circuit. Referring to fig. 1, an EEG sensor circuit includes a switching circuit 1, a first ADC circuit 2, a main control circuit 3, and a plurality of preceding stage analog circuits 4, where the plurality of preceding stage analog circuits 4 are all connected to the switching circuit 1, the switching circuit 1 is connected to the first ADC circuit 2, and the first ADC circuit 2 is connected to the main control circuit 3.
Referring to fig. 2, the main control circuit 3 includes a main control chip U1, and other components of the main control circuit 3 except for the main control chip U1 are used in cooperation with the main control chip U1, and are not described herein again.
Referring to fig. 2, a pin H23 of the main control chip U1 is connected to a voltage stabilization chip IC3, a pin 1 of the voltage stabilization chip IC3 is an input pin, a pin 2 of the voltage stabilization chip IC3 is an output pin, a pin 3 of the voltage stabilization chip IC3 is connected to a ground terminal, and a pin 2 of the voltage stabilization chip IC3 is connected to a power supply terminal OUT. The AD4 pin of the main control chip U1 is connected with a Bluetooth module T1, and the AD6 pin of the main control chip U1 is also connected with the Bluetooth module T1. The main control chip U1 can control whether the power supply end OUT outputs electric energy to supply power for the Bluetooth module T1, and then controls whether the Bluetooth module T1 works, and the main control chip U1 carries OUT data transmission with the Bluetooth module T1 through an AD4 pin and an AD6 pin, so that data in the main control chip U1 are transmitted to an upper computer when the Bluetooth works. The data here is the acquired signal processed by the main control chip U1.
An EEG sensor circuit further includes a plurality of power terminals including power terminal AVCC _1.5V, power terminal AVCC _3.0V and power terminal DVCC _3V. The AVCC representation supplies the analog portion and the DVCC representation supplies the digital portion, all in a conventional manner, as will be appreciated by those skilled in the art.
The preceding stage analog circuit 4 includes a first preceding stage analog circuit, a second preceding stage analog circuit, a third preceding stage analog circuit, a fourth preceding stage analog circuit, a fifth preceding stage analog circuit, a sixth preceding stage analog circuit, a seventh preceding stage analog circuit, an eighth preceding stage analog circuit, a ninth preceding stage analog circuit, a tenth preceding stage analog circuit, an eleventh preceding stage analog circuit, a twelfth preceding stage analog circuit, a thirteenth preceding stage analog circuit, a fourteenth preceding stage analog circuit, a fifteenth preceding stage analog circuit, and a sixteenth preceding stage analog circuit. The sixteen preceding-stage analog circuits have the same composition, and the first preceding-stage analog circuit is taken as an example for description in this embodiment.
Referring to fig. 3, the first preceding stage analog circuit includes an analog ic U2, a capacitor C1 is connected to pin 1 of the analog ic U2, the other end of the capacitor C1 is connected to pin 20 of the analog ic U2, pin 2 of the analog ic U2 is connected to a resistor R1, the other end of the resistor R1 is connected to a connection terminal LA, pin 3 of the analog ic U2 is connected to a resistor R2, the other end of the resistor R2 is connected to a connection terminal RA, pin 4 of the analog ic U2 is connected to a capacitor C2, the other end of the capacitor C2 is connected to a connection terminal RL, pin 4 of the analog ic U2 is further connected to a resistor R3, the other end of the resistor R3 is also connected to the connection terminal RL, pin 5 of the analog ic U2 is connected to the connection terminal RL, pin 6 of the analog ic U2 is connected to a capacitor C8, the other end of the capacitor C8 is connected to a power supply terminal AVCC _1.5V, pin 7 of the analog ic U2 is connected to a resistor R5, the other end of the resistor R5 is connected to a resistor R4, the other end of the resistor R4 is connected to the other end of the analog ic 4, the other end of the resistor R10 is connected to a connection terminal R11, the connection terminal of the analog ic 4 is connected to a connection terminal of the capacitor C4, and the analog ic 4 of the analog ic 4, and the analog ic 4 are connected to a connection terminal of the capacitor C10. The 8 pins of the analog integrated chip U2 are connected with a capacitor C3, the other end of the capacitor C3 is connected with the 7 pins of the analog integrated chip U2, the 8 pins of the analog integrated chip U2 are also connected with a power supply terminal AVCC _1.5V, the 9 pins of the analog integrated chip U2 are connected with a resistor R6, the other end of the resistor R6 is connected with the 8 pins of the analog integrated chip U2, the 9 pins of the analog integrated chip U2 are also connected with a resistor R7, the other end of the resistor R7 is connected with the 10 pins of the analog integrated chip U2, and the 10 pins of the analog integrated chip U2 are connected with an output terminal Single _ out _1.
Under the condition of matching with the analog integrated chip U2, the resistor R3 and the capacitor C2 form a driving circuit; the resistor R4, the resistor R5, the capacitor C3, the capacitor C4, the resistor R6 and the resistor R7 form a second-order low-pass filter circuit and an amplifying circuit. The capacitor C1, the capacitor C8, the resistor R10, the resistor R11, and the resistor R12 constitute a second-order high-pass filter circuit. Resistor R8, resistor R9, capacitor C6 and capacitor C7 form a reference input circuit for providing a reference voltage. Connecting end RA, connecting end LA and connecting end RL all are used for connecting the brain to realize gathering EEG signal.
The component composition of the rest fifteen previous-stage analog circuits is the same as that of the first previous-stage analog circuit, except that the names of the output ends are different.
Referring to fig. 4, the switching circuit 1 includes at least one switching chip, in this embodiment, the switching circuit 1 includes two switching chips, which are a switching chip IC1 and a switching chip IC2, respectively, a pin 1 of the switching chip IC1 is connected to a pin a16 of the main control chip U1, a pin 2 of the switching chip IC1 is connected to a pin B17 of the main control chip U1, a pin 8 of the switching chip IC1 is connected to the first ADC circuit, a pin 13 of the switching chip IC1 is connected to the power supply terminal AVCC — 3.0V, a pin 14 of the switching chip IC1 is connected to the ground terminal, a pin 15 of the switching chip IC1 is connected to a pin a14 of the main control chip U1, and a pin 16 of the switching chip IC1 is connected to a pin B15 of the main control chip U1. The 4 pins of the switching chip IC1 are connected to the output terminal Single _ out _1 of the first preceding analog circuit, the 5 pins of the switching chip IC1 are connected to the output terminal Single _ out _2 of the second preceding analog circuit, and the 6 pins of the switching chip IC1 are connected to the output terminal Single _ out _3 of the second preceding analog circuit, which is not described herein again.
The connection of the switch chip IC2 is not described in detail here, see fig. 4.
Referring to fig. 5, the first ADC circuit 2 includes at least one ADC module, in this embodiment, the first ADC circuit 2 includes two ADC modules, namely a first ADC module U3 and a second ADC module U4, and the first ADC module U3 and the second ADC module U4 are connected in a daisy chain manner. Pin 1 of first ADC module U3 is connected in power supply end AVCC _3.0V, pin 2 of first ADC module U3 is short-circuited with pin 1, pin 3 of first ADC module U3 is connected in 8 of switching chip IC1, pin 4 of first ADC module U3 is connected in power supply end AVCC _1.5V, pin 5 of first ADC module U3 is connected in the earthing terminal, pin 6 of first ADC module U3 is connected in AC15 of main control chip U1, pin 7 of first ADC module U3 is connected in AC17 of main control chip U1, pin 8 of first ADC module U3 is connected in AC11 of main control chip U1, pin 9 of first ADC module U3 is connected in pin 7 of second ADC module U4, pin 10 of first ADC module U3 is connected in power supply end DVCC _3V.
The detailed connection manner of the second ADC module U4 is not described herein, and is shown in fig. 5.
The ADC module is an analog-to-digital conversion module and can convert an analog signal into a digital signal.
Referring to fig. 6, the main control circuit 3 is further connected to a second ADC circuit 5, the second ADC circuit 5 includes an analog-to-digital conversion chip U5, a pin 12 of the analog-to-digital conversion chip U5 is connected to a pin AD10 of the main control chip U1, a pin 13 of the analog-to-digital conversion chip U5 is connected to a pin M2 of the main control chip U1, a pin 14 of the analog-to-digital conversion chip U5 is connected to a pin N1 of the main control chip U1, a pin 15 of the analog-to-digital conversion chip U5 is connected to a pin L1 of the main control chip U1, and a pin 16 of the analog-to-digital conversion chip U5 is connected to a pin K2 of the main control chip U1.
The other pin connections of the analog-to-digital conversion chip U5 are not described in detail herein, see fig. 6.
Referring to fig. 7, the main control circuit 3 is further connected to an interface J1, and in this embodiment, the interface J1 is a TYPE-C interface J1. A pin A1 and a pin B1 of the interface J1 are shorted, a pin A1 of the interface J1 is connected to a pin 9 of the analog-to-digital conversion chip U5, a pin A1 A2 and a pin B2 of the interface J1 are shorted, a pin A2 of the interface J1 is connected to a pin AD18 of the main control chip U1, a pin A3 and a pin B3 of the interface J1 are shorted, a pin A3 of the interface J1 is connected to a power supply DVCC _1.5V, a pin A4 and a pin A5 of the interface J1 are both empty, a pin A5 and a pin B5 of the interface J1 are shorted, a pin A5 of the interface J1 is connected to a power supply DVCC _3V, a pin A6 and a pin B6 of the interface J1 are shorted, a pin A6 of the interface J1 is connected to a pin AD20 of the main control chip U1, a pin A7 and a pin B7 of the interface J1 are shorted, a pin A7 of the interface J1 is connected to an AC19 of the main control chip U1, a pin A8 and a pin B8 of the interface J1 are connected to a resistor 100V of the other end of the main control chip U1; the pin A9 and the pin B9 of the interface J1 are empty, the pin A10 and the pin B10 of the interface J1 are short-circuited, the pin A10 of the interface J1 is connected to the pin AC24 of the main control chip U1, the pin A11 and the pin B11 of the interface J1 are short-circuited, the pin A11 of the interface J1 is connected to the pin AA24 of the main control chip U1, the pin A12 and the pin B12 of the interface J1 are short-circuited, and the pin A12 of the interface J1 is connected to the ground terminal.
With the interface J1 and the second ADC circuit 5, an expansion may be performed to acquire other physiological signals, such as PPG, RDA, SKT, etc. After receiving other physiological signals at the interface J1, the second ADC circuit 5 is configured to convert the analog signal into a digital signal and transmit the digital signal to the main control chip U1.
The implementation principle of an EEG sensor circuit in the embodiment of the application is as follows: after connecting link LA, link RA and link RL completion, can carry out the collection of EEG signal under drive circuit's effect, eliminate the clutter influence through second order low pass filter circuit and dipolar high pass filter circuit in preceding stage analog circuit 4, then amplifier circuit amplifies the EEG signal of eliminating the clutter to make the EEG signal be in the scope that first ADC circuit 2 can discern.
And, utilize main control chip U1 output control signal to control switching circuit 1 and switch, and then make sixteen preceding stage analog circuits can be single be connected with ADC conversion module. So that the first ADC module U3 or the second ADC module U4 only accepts the analog signal collected by one preceding stage analog circuit 4 at a time, and converts the analog signal into a digital signal to be transmitted to the main control chip U1.
The switching chip IC1 can control the switching from the first previous-stage analog circuit to the eighth previous-stage analog circuit under the control of the main control chip U1, so as to be sequentially communicated with the first ADC module U3. The switching chip IC2 can control the switching from the ninth previous-stage analog circuit to the sixteenth previous-stage analog circuit under the control of the main control chip U1 so as to be sequentially communicated with the second ADC module U4.
By using the switching circuit 1, a plurality of collected signals can be converted without using a multi-channel ADC module, which can reduce the cost compared to a case where a multi-channel ADC module is used without using the switching circuit 1. And preceding stage analog circuit 4 can filter out the clutter when can gathering the EEG signal to reduce the clutter influence, and then improve the accuracy that detects.
By utilizing the matching of the interface J1 and the second ADC circuit 5, the expansion detection can be carried out, other physiological signals can be collected, and the function expansion can be realized.
The embodiment also discloses an EEG sensor circuit control method, which comprises the following steps:
the main control circuit controls the switching circuit to switch so that each preceding-stage analog circuit is communicated with the first ADC circuit in sequence;
meanwhile, the main control circuit controls the first ADC circuit to enable so that the first ADC circuit converts the analog signal into a digital signal and transmits the digital signal to the main control circuit;
the main control circuit receives the digital signal and transmits the digital signal to an upper computer.
After the connecting end RA, the connecting end RL and the connecting end LA in the preceding stage analog circuit are installed, the main control circuit controls the switching circuit, so that each preceding stage analog circuit is sequentially communicated with the first ADC circuit, the first ADC circuit can receive the analog signal of each preceding stage analog circuit, then the first ADC circuit converts the analog signal into a digital signal and transmits the digital signal to the main control circuit, and the main control circuit processes the digital signal and then sends the digital signal to an upper computer.
The embodiment also discloses an EEG sensor device comprising an EEG sensor circuit.
The circuitry in the EEG sensor device is simplified and does not require the use of a multi-channel ADC module, reducing the cost of the EEG sensor device.
The foregoing is a preferred embodiment of the present application and is not intended to limit the scope of the application in any way, and any features disclosed in this specification (including the abstract and drawings) may be replaced by alternative features serving equivalent or similar purposes, unless expressly stated otherwise. That is, unless expressly stated otherwise, each feature is only an example of a generic series of equivalent or similar features.
Claims (6)
1. An EEG sensor circuit, characterized by: the analog-to-digital converter comprises a switching circuit (1), a first ADC circuit (2), a main control circuit (3) and a plurality of preceding-stage analog circuits (4);
each preceding-stage analog circuit (4) is used for filtering and amplifying signals;
the switching circuit is used for switching the connection between the preceding-stage analog circuit (4) and the first ADC circuit (2);
the first ADC circuit (2) is used for converting an analog signal into a digital signal;
and the main control circuit (3) receives the digital signals output by the first ADC circuit (2) and transmits the digital signals to an upper computer.
2. An EEG sensor circuit according to claim 1, characterized in that: the switching circuit (1) comprises at least one switching chip, each input pin of the switching chip is connected with one output end of the preceding stage analog circuit (4) respectively, the output pin of the switching chip is connected with the first ADC circuit (2), and the control pin of the switching chip is connected with the main control circuit (3).
3. An EEG sensor circuit according to claim 1 or 2, characterized in that: the first ADC circuit (2) comprises at least one ADC module, an input pin of the ADC module is connected to the switching circuit (1), an output pin of the ADC module is connected to the main control circuit (3), and the ADC module is of a single-channel type.
4. An EEG sensor circuit according to claim 1, characterized in that: preceding stage analog circuit (4) include filter circuit, amplifier circuit and drive circuit, drive circuit is used for connecting the people brain in order to gather the signal, filter circuit is arranged in filtering clutter in the signal, amplifier circuit is arranged in amplifying the signal so that first ADC circuit (2) can discern.
5. A method of controlling an EEG sensor circuit, comprising: applied to an EEG sensor circuit as claimed in any one of claims 1 to 4;
the main control circuit controls the switching circuit to switch so that each preceding-stage analog circuit is communicated with the first ADC circuit in sequence;
meanwhile, the master control circuit controls the first ADC circuit to enable so that the first ADC circuit converts an analog signal into a digital signal and transmits the digital signal to the master control circuit;
and the main control circuit receives the digital signal and transmits the digital signal to an upper computer.
6. An EEG sensor apparatus, characterized by: an EEG sensor circuit comprising an EEG sensor circuit as claimed in any one of claims 1 to 4.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211668705.1A CN115813406A (en) | 2022-12-24 | 2022-12-24 | EEG sensor circuit, method and device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211668705.1A CN115813406A (en) | 2022-12-24 | 2022-12-24 | EEG sensor circuit, method and device |
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| CN113951849A (en) * | 2021-11-02 | 2022-01-21 | 华润微电子控股有限公司 | Biological signal acquisition circuit and mouse |
| CN114362754A (en) * | 2022-03-21 | 2022-04-15 | 成都凯天电子股份有限公司 | Multichannel analog signal acquisition and processing system |
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2022
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101088457A (en) * | 2006-06-13 | 2007-12-19 | 上海诺诚电气有限公司 | Electrocerebral detecting device with combined hardware and software |
| CN105744263A (en) * | 2015-12-18 | 2016-07-06 | 北京伽略电子股份有限公司 | CCD driving time sequence and system testing integrated circuit and use method thereof |
| CN206659802U (en) * | 2016-11-30 | 2017-11-24 | 深圳创达云睿智能科技有限公司 | Eeg signal acquisition system |
| CN113391127A (en) * | 2021-06-11 | 2021-09-14 | 北京脑陆科技有限公司 | Contact impedance detection circuit for EEG signal acquisition |
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