CN115802873A - ALD Josephson junction preparation method based on metal mask etching - Google Patents

ALD Josephson junction preparation method based on metal mask etching Download PDF

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CN115802873A
CN115802873A CN202211302053.XA CN202211302053A CN115802873A CN 115802873 A CN115802873 A CN 115802873A CN 202211302053 A CN202211302053 A CN 202211302053A CN 115802873 A CN115802873 A CN 115802873A
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metal mask
layer
josephson junction
metal
ald
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单征
穆清
王淑亚
李中祥
刘福东
孙回回
张琴
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Information Engineering University of PLA Strategic Support Force
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    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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Abstract

The invention relates to an ALD Josephson junction preparation method based on metal mask etching. The method comprises the following steps: defining a lower metal mask pattern on a substrate, and depositing a metal film to obtain a lower metal layer; transferring the bottom metal mask pattern to a lower metal layer to form a lower metal mask; removing the natural oxide layer on the surface of the lower metal mask; in-situ transmitting the device in vacuum to a film growth chamber to grow a bottom layer Al electrode and ALD Al in one step 2 O 3 Barrier layer, top Al electrode to form Al/Al 2 O 3 a/Al Josephson junction; defining an upper metal mask pattern, and depositing a metal film to obtain an upper metal layer; transferring the upper metal mask pattern to the upper metal layer to form an upper metal mask, selectively etching to form a lower metal mask/Josephson junction (Al/Al) 2 O 3 /Al)/upper metal mask. The Josephson junction prepared by the method has better resistance uniformity.

Description

ALD Josephson junction preparation method based on metal mask etching
Technical Field
The invention belongs to the technical field of superconducting qubits, and particularly relates to an ALD Josephson junction preparation method based on metal mask etching.
Background
The Josephson junction is a superconductive tunnel junction of a superconductor-insulator-superconductor structure, the working principle of the Josephson junction is based on the tunneling effect of a Cooper pair formed by electrons at extremely low temperature, and the organization and uniformity of bottom and top electrodes largely determine the performance of the whole Josephson junction system.
The prior art generally employs a two-step lift-off process to prepare josephson junctions. Since the sample cannot carry the photoresist into the ALD chamber, the shape and size of the josephson junction top and bottom electrodes must be defined in a two-step lift-off manner under vacuum breaking conditions.
However, when the bottom electrode is prepared, a natural oxide layer is inevitably formed on the surface of the electrode because the electrode is under a non-vacuum condition. Although the RPC technology is used to clean the natural oxide layer on the surface of the electrode, the RPC technology still damages the surface of the bottom electrode, and affects the quality of the Josephson junction to a certain extent.
In addition, because the upper electrode, the lower electrode and the barrier layer of the Josephson junction are prepared by lift-off technology, in the three-layer structure of the Josephson junction, the steps of gluing, degumming and the like are involved for a plurality of times for the lower electrode, the barrier layer and the upper electrode, so that not only is the complexity of operation increased, but also the photoresist removal is not clean, and the possibility of impurities existing in the three-layer structure of the Josephson junction is increased.
Disclosure of Invention
The invention provides an ALD (atomic layer deposition) Josephson junction preparation method based on metal mask etching, aiming at solving the problems of impurities and low quality in the Josephson junction prepared by the existing process.
The preparation method of the ALD Josephson junction based on metal mask etching comprises the following steps:
a, step a: defining a lower metal mask pattern on a substrate, and then depositing a metal film to obtain a lower metal layer; specifically, photoresist is spin-coated on a substrate, a lower metal mask pattern is defined by utilizing a photoetching technology, and then a metal film is deposited by adopting a magnetron sputtering mode.
Step b: transferring the lower metal mask pattern to a lower metal layer to form a lower metal mask; specifically, a lift-off process is used to transfer the underlying metal mask pattern to the underlying metal layer.
Step c: and removing the natural oxide layer on the surface of the lower metal mask. Specifically, a reactive pre-cleaning (RPC) technique is used to remove a native oxide layer on the surface of the underlying metal mask.
Step d: and then in-situ transmitting the device obtained in the step c to a film growth chamber in vacuum to grow a bottom layer Al electrode and ALD Al in one step 2 O 3 Barrier layer, top Al electrode to form three-layer structure Al/Al 2 O 3 a/Al Josephson junction. Wherein, the thickness of the bottom layer Al electrode is 30nm 2 O 3 The thickness of the barrier layer is less than 2nm, and the thickness of the top layer Al electrode is 30nm.
Step e: defining an upper metal mask pattern, and then depositing a metal film to obtain an upper metal layer; specifically, the upper metal mask pattern is defined in the same manner as the lower metal mask pattern, and the deposited metal film is also formed by magnetron sputtering.
Step f: and transferring the upper metal mask pattern to the upper metal layer to form an upper metal mask. Specifically, a lift-off process is used to transfer the upper metal mask pattern to the upper metal layer.
Step g: selectively etching the structure of the lower metal mask and the structure of the upper metal mask which are not protected, wherein the required part is protected by the metal mask and is not etched; forming a five-layer structure: lower metal mask/josephson junction (Al/Al) 2 O 3 /Al)/upper metal mask.
In the above method, the substrate may be a Si substrate.
The metal film is a Ti metal film, and the natural oxide layer on the surface of the lower metal mask in the step c is TiOx.
The beneficial effects of the invention are as follows:
the invention prepares Al/Al with three-layer structure by a metal mask mode 2 O 3 In the process of the/Al Josephson junction, steps of gluing, removing glue and the like are not involved, and the defect that a sample in an ALD (atomic layer deposition) chamber cannot carry photoresist to pattern a metal structure is overcome. The method realizes the in-situ one-step preparation of the ALD Josephson junction with the three-layer structure, reduces the impurity content in the three-layer structure of the Josephson junction, improves the process cleanliness degree, and greatly improves the process control, thereby being capable of preparing the high-quality Josephson junction.
Drawings
FIG. 1 shows a method for preparing an ALD Josephson junction based on metal mask etching. a) preparing a lower metal layer, b) preparing a lower metal mask, c) removing a native oxide layer, d) forming a three-layered Al/Al structure 2 O 3 Al Josephson junction, e) preparing upper metal layer, f) preparing upper metal mask, g) selectively etching redundant metal structure, h) forming five-layer structure: lower metal mask/josephson junction (Al/Al) 2 O 3 /Al)/upper metal mask.
FIG. 2 is a left image of a TEM electron micrograph of a five-layer structure prepared by the present invention. The right image is an enlarged view of the box area of the left image. AlO in the figure x Represents Al 2 O 3
FIG. 3 is a flow chart of a process for preparing a Josephson junction using a two-step lift-off process in comparative example 1. Preparing a lower metal layer, (b) preparing a bottom Ti electrode, (c) removing a natural oxide layer, and (d) growing Al 2 O 3 Barrier layer, (e) preparing upper metal layer, (f) forming Ti/Al with three-layer structure 2 O 3 a/Ti Josephson junction.
FIG. 4 is a view showing Ti/Al of three-layer structure prepared in comparative example 1 2 O 3 TEM micrograph of/Ti Josephson junction. AlO in the figure x Represents Al 2 O 3
Detailed Description
The present invention will be described in more detail with reference to the following embodiments for understanding the technical solutions of the present invention, but the present invention is not limited to the scope of the present invention.
Example 1
By adopting the ALD Josephson junction preparation method based on metal mask etching, the prepared junction areas are respectively 0.09 mu m 2 、0.25μm 2 Josephson junctions.
As shown in FIG. 1, the preparation method comprises the following steps:
step a: spin-coating a photoresist on a Si substrate, and defining a lower metal mask pattern in the middle of the photoresist by utilizing a photoetching technology, wherein the lower metal mask pattern is rectangular; and then depositing a Ti metal film by adopting a magnetron sputtering mode to obtain a lower metal layer.
Wherein the spin-on photoresist comprises the following steps: MMA was uniformly dropped on the surface of the substrate with a pipette gun, then the substrate was spun at 6000r/s with glue, and then the substrate was transferred onto a hot plate and baked at 180 ℃ for 5min. After baking is finished, cooling the substrate to room temperature, uniformly dripping PMMA on the surface of the substrate, rotating at the speed of 6000r/s, spin-coating glue on the surface of the substrate, transferring the substrate onto a hot plate, and baking at 180 ℃ for 5min.
The relevant technical parameters of the electron beam lithography are as follows:
acceleration voltage: 125kV, electron beam diameter: 2nm, electron beam current: 500pA, electron gun vacuum: 2X 10 -7 Pa, electron gun vacuum degree: 6X 10 -5 Pa。
Materials used in magnetron sputtering: ti metal, chamber environment: vacuum degree of 1.23X 10 -7 Torr, susceptor temperature: at 25 ℃. The method specifically comprises the following steps: in the first step, gas (Ar) is introduced, and in the second step, voltage is started to ionize the gas to form plasma. The third step starts deposition, and the fourth step removes voltage.
Step b: and transferring the lower metal mask pattern to the lower metal layer by using a stripping process to form a rectangular lower Ti metal mask. According to the test chart of fig. 2, the thickness of the underlying Ti metal mask is about 60nm.
Wherein the stripping process is specifically operative to: and (3) putting the device into a glass dish containing acetone, cleaning the device for 5min in an ultrasonic cleaning pot, transferring the device into the glass dish containing isopropanol, and continuously cleaning for 5min.
Step c: and removing the natural oxide layer on the surface of the lower Ti metal mask by adopting an RPC (remote position control) technology.
Wherein, the RPC technology is specifically operated as follows: the device was placed in a 300 degree chamber with an instrument power of 1000W and mixed particles (5%H) 2 And 95% He) bombarding the device surface, removing the native oxide layer.
Step d: in-situ transmitting the device prepared in the step c to a film growth chamber in vacuum, and sequentially growing lower Al and ALD Al 2 O 3 Barrier layer, upper layer Al, forming Al/Al 2 O 3 a/Al Josephson junction structure. In this example, the thickness of the obtained bottom layer Al electrode was 30nm 2 O 3 The barrier layer thickness was 1.59nm (as shown in fig. 2), and the top Al electrode thickness was 30nm.
Step e: and defining an upper layer metal mask pattern in the same manner as the lower layer metal mask pattern. Specifically, a photoresist is spin-coated on the device prepared in the step d, and an upper metal mask pattern is defined in the middle of the photoresist by using a photolithography technique, wherein the upper metal mask pattern is also rectangular, and the upper metal mask pattern is perpendicular to the lower metal mask pattern.
And c, depositing a Ti metal film by adopting the same magnetron sputtering mode as the step a to obtain an upper metal layer.
Step f: and transferring the upper metal mask pattern to the upper metal layer by using a stripping process to form a rectangular upper Ti metal mask vertical to the lower Ti metal mask. According to the test chart of fig. 2, the thickness of the upper Ti metal mask was 94nm.
Wherein the stripping process is the same as step b.
Step g: selectingThe structure of the lower metal mask and the structure of the upper metal mask which are not protected are etched in a nature etching way, and the needed part is protected by the metal mask and is not etched; forming a five-layer structure: lower metal mask/josephson junction (Al/Al) 2 O 3 a/Al)/upper metal mask, i.e. Ti/Al 2 O 3 /Al/Ti。
Wherein, the etching mode is dry etching, and the etching gas (proportion): ar 50sccm, BCl 3 100sccm, gas pressure: 10mTorr, power: 400w, etching time: 30s +30s (two steps).
And c, when the photoetching is carried out in the step a, the size of a laser particle bombardment area of the electron beam photoetching machine is controlled, so that the change of the Josephson junction area can be controlled. In this embodiment, the junction areas of 0.09 μm are obtained by controlling the size of the laser particle bombardment region of the electron beam lithography machine 2 、0.25μm 2 Josephson junctions.
The junction areas are respectively 0.09 μm by experimental measurement 2 、0.25μm 2 The Josephson junction has the resistance values of 1.322K omega and 0.875K omega respectively, the RSD (relative standard deviation) values of the resistors are 9.22 percent and 17 percent respectively, the uniformity of the resistors is greatly improved, and the quality of the prepared junction is higher.
Comparative example 1
As shown in fig. 3, a two-step lift-off process was used to prepare josephson junctions, comprising the following steps:
step a: spin-coating a photoresist on a Si substrate, and defining a bottom metal pattern in the middle of the photoresist by utilizing a photoetching technology, wherein the bottom metal pattern is rectangular; then, a Ti metal film is deposited at the speed of 0.28nm/s by adopting a magnetron sputtering mode to form a lower metal layer. The thickness of the resulting underlying metal layer was about 30nm.
Wherein the spin-on photoresist comprises the following steps: MMA was uniformly dropped on the surface of the substrate with a pipette gun, then the substrate was spun at 6000r/s with glue, and then the substrate was transferred onto a hot plate and baked at 180 ℃ for 5min. After baking is finished, cooling the substrate to room temperature, uniformly dripping PMMA on the surface of the substrate, rotating at the speed of 6000r/s, spin-coating glue on the surface of the substrate, transferring the substrate onto a hot plate, and baking at 180 ℃ for 5min.
The relevant technical parameters of the electron beam lithography are as follows:
acceleration voltage: 125kV, electron beam diameter: 2nm, electron beam current: 500pA, electron gun vacuum: 2X 10 -7 Pa, electron gun vacuum degree: 6X 10 -5 Pa。
Materials used in magnetron sputtering: ti metal, chamber environment: vacuum degree of 1.23X 10 -7 Torr, susceptor temperature: at 25 ℃. The method specifically comprises the following steps: the first step is to introduce gas (Ar) and the second step is to turn on the voltage. The gas is ionized to form plasma. The third step starts deposition, and the fourth step removes voltage.
Step b: and transferring the bottom metal pattern to the lower metal layer by using a stripping process to form a bottom Ti electrode, wherein the thickness of the bottom Ti electrode is 30nm.
Wherein the stripping process is specifically operative to: and (3) putting the device into a glass dish containing acetone, cleaning the device for 5min in an ultrasonic cleaning pot, transferring the device into the glass dish containing isopropanol, and continuously cleaning for 5min.
Step c: and removing a natural oxide layer on the surface of the bottom Ti electrode by using a reactive pre-cleaning (RPC) technology.
Wherein, the RPC technology is specifically operated as: the device was placed in a 300 ℃ chamber with an instrument power of 1000W and mixed particles (5%H) 2 And 95% He) bombarding the device surface, removing the native oxide layer.
Step d: c, in-situ transmitting the device obtained in the step c to a film growth chamber in vacuum, and then growing Al on the surface of the bottom Ti electrode by adopting an ALD (atomic layer deposition) mode 2 O 3 A barrier layer. The Al is 2 O 3 The thickness of the barrier layer was 1.4nm.
Step e: and defining a top metal pattern in the same manner as the bottom metal pattern. Specifically, a photoresist is spin-coated on the device prepared in step d, a top metal pattern is defined in the middle of the photoresist by using a photolithography technique, the top metal pattern is also rectangular, and the top metal pattern and the bottom metal pattern are arranged vertically.
And c, depositing a Ti metal film by adopting the same magnetron sputtering mode as the step a to obtain an upper metal layer.
Step f: and transferring the top metal pattern to the upper metal layer by using a stripping process to form a rectangular top Ti electrode which is perpendicular to the bottom Ti electrode. The thickness of the top Ti electrode was about 30nm.
Wherein the stripping process is the same as step b.
After stripping, the metal lines of the top Ti electrode and the bottom Ti electrode are vertically intersected to form a complete Ti/Al three-layer structure 2 O 3 a/Ti Josephson junction.
And c, when the photoetching is carried out in the step a, the size of a laser particle bombardment area of the electron beam photoetching machine is controlled, so that the change of the Josephson junction area can be controlled. The comparative example obtains the junction areas of 0.09 μm by controlling the size of the laser particle bombardment area of the electron beam lithography machine 2 、0.25μm 2 Josephson junctions.
The junction areas prepared by the method are respectively 0.09 mu m 2 、0.25μm 2 The Josephson junction (2) has resistance values of 12.9 K.OMEGA.and 6.55 K.OMEGA.respectively. RSD (relative standard deviation) values of the resistances were 27% and 21%, and the resistance uniformity was poor.
The above-described embodiments are merely preferred embodiments of the present invention, and not intended to limit the scope of the invention, so that equivalent changes or modifications in the structure, features and principles described in the present invention should be included in the claims of the present invention.

Claims (9)

1. The preparation method of the ALD Josephson junction based on metal mask etching is characterized by comprising the following steps:
step a: defining a lower metal mask pattern on a substrate, and then depositing a metal film to obtain a lower metal layer;
step b: transferring the lower metal mask pattern to a lower metal layer to form a lower metal mask;
step c: removing the natural oxide layer on the surface of the lower metal mask;
step d: and then in-situ transmitting the device obtained in the step c to a film growth chamber in vacuum to grow a bottom layer Al electrode and ALD Al in one step 2 O 3 Barrier layer, top Al electrode to form three-layer structure Al/Al 2 O 3 a/Al Josephson junction;
step e: defining an upper metal mask pattern, and then depositing a metal film to obtain an upper metal layer;
step f: transferring the upper metal mask pattern to the upper metal layer to form an upper metal mask;
step g: etching the structure of the lower metal mask and the structure of the upper metal mask which are not protected to form a five-layer structure: lower metal mask/josephson junction (Al/Al) 2 O 3 /Al)/upper metal mask.
2. The method of claim 1, wherein in step a, a photoresist is spin-coated on the substrate, a pattern of the underlying metal mask is defined by photolithography, and then a metal film is deposited by magnetron sputtering.
3. The metal mask etch based ALD josephson junction fabrication method of claim 1, wherein the substrate is a Si substrate.
4. The metal mask etch based ALD josephson junction preparation method of claim 1, wherein said metal thin film is a Ti metal thin film.
5. The metal mask etch based ALD josephson junction preparation method of claim 1, wherein in step b, an underlying metal mask pattern is transferred to an underlying metal layer using a lift-off process.
6. The metal mask etch-based ALD josephson junction preparation method of claim 1, wherein in step c, a reactive preclean technique is used to remove the native oxide layer on the surface of the underlying metal mask.
7. The metal mask etch-based ALD Josephson junction fabrication process of claim 1, wherein in step d, the thickness of the underlying Al electrode is 30nm and Al is added 2 O 3 The thickness of the barrier layer is less than 2nm, and the thickness of the top layer Al electrode is 30nm.
8. The method of claim 1, wherein in step e, the upper metal mask pattern is defined in the same manner as the lower metal mask pattern, and the deposited metal film is formed by magnetron sputtering.
9. The metal mask etch based ALD josephson junction fabrication method of claim 1, wherein in step f, an upper metal mask pattern is transferred to the upper metal layer using a lift-off process.
CN202211302053.XA 2022-10-24 2022-10-24 ALD Josephson junction preparation method based on metal mask etching Pending CN115802873A (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0341502A2 (en) * 1988-05-07 1989-11-15 Fujitsu Limited A cryoelectronic device including a ceramic superconductor
CN102437281A (en) * 2011-12-08 2012-05-02 南京大学 Superconduction tunnel junction and preparation method thereof
WO2013180780A2 (en) * 2012-03-08 2013-12-05 D-Wave Systems Inc. Systems and methods for fabrication of superconducting integrated circuits
CN112670401A (en) * 2020-12-21 2021-04-16 中国科学院上海微系统与信息技术研究所 Josephson junction and superconducting device and preparation method thereof
CN115115054A (en) * 2022-06-28 2022-09-27 合肥本源量子计算科技有限责任公司 Circuit structure, quantum chip and quantum computer
CN115148890A (en) * 2022-05-17 2022-10-04 南京大学 Preparation method of niobium-aluminum Josephson junction based on metal mask
CN115188878A (en) * 2022-07-13 2022-10-14 中国人民解放军战略支援部队信息工程大学 Preparation method of Josephson junction
CN115207202A (en) * 2022-05-16 2022-10-18 南京大学 Preparation method of novel niobium-based Josephson junction

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0341502A2 (en) * 1988-05-07 1989-11-15 Fujitsu Limited A cryoelectronic device including a ceramic superconductor
CN102437281A (en) * 2011-12-08 2012-05-02 南京大学 Superconduction tunnel junction and preparation method thereof
WO2013180780A2 (en) * 2012-03-08 2013-12-05 D-Wave Systems Inc. Systems and methods for fabrication of superconducting integrated circuits
CN112670401A (en) * 2020-12-21 2021-04-16 中国科学院上海微系统与信息技术研究所 Josephson junction and superconducting device and preparation method thereof
CN115207202A (en) * 2022-05-16 2022-10-18 南京大学 Preparation method of novel niobium-based Josephson junction
CN115148890A (en) * 2022-05-17 2022-10-04 南京大学 Preparation method of niobium-aluminum Josephson junction based on metal mask
CN115115054A (en) * 2022-06-28 2022-09-27 合肥本源量子计算科技有限责任公司 Circuit structure, quantum chip and quantum computer
CN115188878A (en) * 2022-07-13 2022-10-14 中国人民解放军战略支援部队信息工程大学 Preparation method of Josephson junction

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
李中祥等: ""原子级控制的约瑟夫森结中Al2O3势垒层制备工艺"", 《物理学报》, vol. 71, no. 21, 15 July 2022 (2022-07-15), pages 218102 *

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