CN115800977B - PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof - Google Patents
PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof Download PDFInfo
- Publication number
- CN115800977B CN115800977B CN202310077657.7A CN202310077657A CN115800977B CN 115800977 B CN115800977 B CN 115800977B CN 202310077657 A CN202310077657 A CN 202310077657A CN 115800977 B CN115800977 B CN 115800977B
- Authority
- CN
- China
- Prior art keywords
- power
- circuit
- speed
- pmos
- filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention discloses a PMOS (P-channel metal oxide semiconductor) heavy-current high-speed power-on and power-off circuit and a power-supply switch filter circuit thereof, which comprise a double NOT gate U1 for realizing level conversion and logic conversion, a transistor Q1 for realizing level switch control and voltage input and output, a bipolar junction type triode Q2 for realizing a bleeder circuit, a chip resistor R2 for realizing current limiting, chip resistors R1 and R2 for assisting the Q2 to realize the bleeder circuit and the current limiting, a filter capacitor C1 for inputting power supply filtering and a capacitor C2 for outputting the power supply filtering. Through the circuit design, the maximum load current of the circuit can realize the output of +5V/3A, and the power-on and power-off time can be less than 60ns. The PMOS-based high-current high-speed power-on and power-off circuit can be widely applied to a high-speed power-on and power-off circuit of a radio frequency amplifier and a high-speed power-on and power-off circuit of a VCO (voltage controlled oscillator), and has a wide application prospect.
Description
Technical Field
The invention belongs to the technical field of power management in the microwave radio frequency direction, and particularly relates to a PMOS (P-channel metal oxide semiconductor) large-current high-speed power-on and power-off circuit and a power supply switch filter circuit thereof.
Background
With the further development of electronic technology, the response speed of the equipment is required to be faster and faster for the radio frequency receiver, the radio frequency transmitter, the agile frequency synthesizer, the radio frequency front end and the like. The high-speed power-on and power-off circuit with large current can realize the quick response of small devices and large module assemblies to a certain extent. Meanwhile, the high-speed power-up and power-down circuit can power up and power down the needed and unneeded devices and module assemblies in real time, reduce self interference to the maximum extent and reduce internal crosstalk. The high-speed power-on and power-off circuit of heavy current can also reduce the power consumption of module components and avoid unnecessary energy loss.
Firstly, the power-on and power-off functions in a common application scene are realized by controlling the power-on and power-off of the module through the enabling of the voltage stabilizing block. The voltage stabilizing block has the main function of power-on and power-off, and the power-on and power-off functions belong to additional functions, so the power-on and power-off functions have certain disadvantages. The voltage stabilizing block is powered on and powered off mainly in low speed or no requirement for response speed, and cannot realize high speed response.
Secondly, another power-on and power-off chip is realized through an analog switch, and the analog switch is generally applied to the application occasions of low current and high speed communication. But because the load current is extremely small, the speed is fast and the method is widely applied to the links of high-speed and low-current control circuits.
However, in some special environments, such as an agile frequency synthesizer module, in order to realize high-speed frequency switching, the frequency synthesizer design adopts a direct frequency synthesis technology. Then the subsequent signal conditioning part is required to perform the switching filter processing on the signal. In order to obtain signals with high performance indexes, the isolation between the signals is reduced. An amplifier needs to be connected in series between each path of switch filter to improve the signal-to-noise ratio of the signal, so as to improve the filtering effect of the filter. In practice, however, a particular frequency will correspond to only a single filter-selective channel, which means that the amplifiers of the other channels can be turned off. The response time to power up and power down of the amplifier is particularly fast since the agile frequency synthesizer generally requires fast response. Secondly, because the current of the amplifier is large and generally ranges from 50 to 200mA, the power-on and power-off circuits are required to have enough load capacity.
Disclosure of Invention
The invention aims to provide a PMOS (P-channel metal oxide semiconductor) heavy-current high-speed power-up and power-down circuit and a power supply switch filter circuit thereof, which mainly solve the problems that the existing power-up and power-down circuit is slow in response and cannot meet heavy-current load.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
a high-speed power-on and power-off circuit based on PMOS (P-channel metal oxide semiconductor) heavy current comprises a double NOT gate U1 for realizing level conversion and logic conversion, a transistor Q1 with a grid connected with a pin 4 of the double NOT gate U1 through a resistor R2 for realizing level switch control and voltage input and output, a bipolar junction type triode Q2 with a base connected with a pin 6 of the double NOT gate U1 through a resistor R3 for realizing a discharge loop, a resistor R1 connected between a drain electrode of the transistor Q1 and a collector electrode of the triode Q2, a filter capacitor C1 with one end connected with a source electrode of the transistor Q1 and the other end grounded for inputting power supply filtering, and a filter capacitor C2 with one end connected with the drain electrode of the transistor Q1 and the other end grounded for outputting power supply filtering; the source electrode of the transistor Q1 is used as a power supply input end, the drain electrode of the transistor Q1 is used as a power supply output end, and the emitting electrode of the triode Q2 is grounded; the 1 st pin and the 3 rd pin of the double NOT gate U1 are connected as a control input end.
Further, in the invention, the double not gate U1 adopts a high-speed, double-channel double not gate.
Further, in the present invention, the transistor Q1 is a P-channel, high-speed, high-current MOSFET.
Further, in the present invention, the transistor Q2 employs a high-speed switching NPN BJT.
Further, in the present invention, the resistor R1, the resistor R2, and the resistor R3 are chip resistors, and 0603 is adopted to package chip thick film resistors.
Further, in the present invention, the filter capacitor C1 and the filter capacitor C2 are ceramic capacitors packaged by 0603.
Further, the invention also provides a switch filter circuit, which comprises a single-pole multi-throw switch U4 with a fixed end connected with the input end of a switch filter group, a multi-way switch filter group connected with the free end of the single-pole multi-throw switch U4 to realize different point frequency, and a single-pole multi-throw switch U2 with a free end connected with the other end of the multi-way switch filter group, wherein the fixed end of the single-pole multi-throw switch U2 is connected with the output end of the switch filter group; the switch filter bank is composed of a first band-pass filter, an amplifier, a second band-pass filter and an upper and lower power supply circuit for supplying power to the amplifier, wherein the input end of the first band-pass filter is connected to the free end of the single-pole multi-throw switch U4, the output end of the second band-pass filter is connected to the free end of the single-pole multi-throw switch U2, and the upper and lower power supply circuit is connected to the power supply input end of the amplifier.
Compared with the prior art, the invention has the following beneficial effects:
(1) According to the invention, through the input of a control signal, the switch output of the PMOS is realized by utilizing the inversion of the double NOT gates, and the power-on and power-off functions of a large-current load-carrying occasion can be met. Meanwhile, the PMOS is used as a core device for switching on and off the power, the ns-level power-on function can be mainly realized, and the requirement on the power-off speed is not high or the application on occasions is not required. And an NPN type triode is adopted, and the conduction characteristic of the NPN type triode ns is utilized to assist the PMOS to be powered down, so that the power-down function of the PMOS ns level is realized.
(2) The invention realizes a high-current high-speed up-down circuit by simple circuit combination of the triode, the MOS tube, the double NOT gate, the resistor and the capacitor with low price, has wide application scene and strong practicability and can be widely popularized.
Drawings
Fig. 1 is a schematic structural diagram of upper and lower circuits in embodiment 1 of the present invention.
Fig. 2 is a schematic structural diagram of a switch filter circuit according to embodiment 2 of the present invention.
Detailed Description
The present invention will be further described with reference to the following description and examples, which include but are not limited to the following examples.
Example 1
As shown in fig. 1, the high-speed power-on and power-off circuit based on PMOS heavy current disclosed by the present invention includes a double not gate U1 for implementing level conversion and logic conversion, a transistor Q1 whose gate is connected to a 4 th pin of the double not gate U1 through a resistor R2 for implementing level switch control and voltage input and output, a bipolar junction triode Q2 whose base is connected to a 6 th pin of the double not gate U1 through a resistor R3 for implementing a bleeder circuit, a resistor R1 connected between a drain of the transistor Q1 and a collector of the triode Q2, a filter capacitor C1 whose one end is connected to a source of the transistor Q1 and whose other end is grounded for inputting power filter, and a filter capacitor C2 whose one end is connected to a drain of the transistor Q1 and whose other end is grounded for outputting power filter; the source electrode of the transistor Q1 is used as a power supply input end, the drain electrode of the transistor Q1 is used as a power supply output end, and the emitting electrode of the triode Q2 is grounded; the 1 st pin and the 3 rd pin of the double NOT gate U1 are connected as control input ends. Firstly, a source electrode 'Vin' of a PMOS (P-channel metal oxide semiconductor) tube is controlled to be connected with +5V power supply, a drain electrode of the PMOS tube is a voltage output end 'Vout', and 'CTRL' is a level control input end.
When the control input end 'CTRL' of the double NOT gate U1 is connected with a +5V high level, the output of the No. 4 pin and the No. 5 pin of the double NOT gate are both low level 0V due to the characteristic of the double NOT gate; the level of a No. 4 pin of the double NOT gate is input to the grid electrode of the PMOS tube, the source voltage of the PMOS tube is 5V at the moment, therefore VGS forms reverse bias, the PMOS tube is conducted, and the voltage of the Vout position of the output end is +5V at the moment; the 0V level of the pin No. 5 of the dual NOT gate is input to the base electrode of an NPN type triode, the emitter of the triode is grounded at the moment, the voltage is 0V, the PN junction triode works in a cut-off region, IC = (1 + beta) IB =0 at the moment, and therefore the emitter (ground) of the triode collector electrode presents a high-impedance state. The final output of "Vout" is +5V.
When CTRL is switched in a high level of 0V, the output of the No. 4 pin and the No. 5 pin of the double NOT gate are both low level +5V due to the characteristic of the double NOT gate; the +5V level of the No. 4 pin of the double NOT gate is input to the grid electrode of the PMOS tube, the source voltage of the PMOS tube is +5V at the moment, therefore VGS =0V, the PMOS tube is not conducted, and the voltage at the 'Vout' position of the output end is 0V at the moment; the +5V level of the No. 5 pin of the double NOT gate is input to the base electrode of the NPN type triode, the emitter of the triode is grounded at the moment, the voltage is 0V, the triode works in a saturation region, and the final output of Vout is +0V.
In the embodiment, a dual-channel dual not gate U1 with model number NC7WZU04 is used for implementing a level conversion function, and it inverts and outputs the input 0V/+5V level signal to implement the logic of the link.
In this embodiment, the PMOS transistor Q1, model IRLML6401TRPBF, is used to implement a large current switching function, the maximum load current can be as high as 3.4A, and the high-speed power-on function is implemented through a control link formed with a dual not gate.
In this embodiment, the NPN transistor Q2, of which the model is MMBT2222ALT1G, is configured to implement a PMOS transistor output voltage bleeding function, and when the control input is switched at a high speed, a link formed by the transistors plays a role in accelerating discharging when powering on without affecting speed and powering off. When the CTRL level is from 0V to +5V, the triode is transited from a saturation region to a cut-off region, and the normal power-on speed of the PMOS is not influenced; when the CTRL level is from +5V to 0V, the cut-off region of the triode is transited to the amplification region to complete the rapid power-off function of the output voltage, and then the cut-off region is transited.
In this embodiment, 0603 packaged chip type thick film resistors are used as the resistor R1, the resistor R2, and the resistor R3. The resistance value of R1 is 51 omega, and the current limiting device is used for adjusting the discharge speed and simultaneously has the current limiting function when an NPN type triode is amplified; the resistance value of R2 is 510 omega, and the resistor is used for limiting current and preventing devices such as double non-gate-level devices, PMOS devices and the like from being damaged due to overlarge current; the resistance value of R3 is 510 omega, and the resistor is also used for the current limiting function, so that the devices such as a double NOT gate and a triode are prevented from being damaged by overlarge current.
In this embodiment, the filter capacitors C1 and C2 are sheet ceramic capacitors packaged 0603. The capacitance value of the filter capacitor C1 is 1uF and is used for the input voltage filtering function; the capacitance value of the filter capacitor C2 is 10pF, and is used for filtering the output voltage, and the value does not influence the power-on and power-off time.
Through the design, the high-speed power-on and power-off function of large current can be realized. Specific charging and discharging times are shown in table 1. Table 2 shows the comparison of the advantages and disadvantages of the present invention with the prior art. The invention realizes high-speed power-on and power-off functions on the premise of realizing heavy current load, solves the problem of high-speed control, and has wide practical prospect and numerous application fields.
TABLE 1 Power-on/off time of the circuit of this example
TABLE 2 comparison of the advantages and disadvantages of the present invention with the prior art
Example 2
The invention discloses a PMOS (P-channel metal oxide semiconductor) -based high-current high-speed up-down circuit which can be seamlessly used with a switch filter link, wherein the combined circuit comprises a single-pole multi-throw switch U4, a plurality of paths of switch filter banks and a single-pole multi-throw switch U2, wherein the fixed end of the single-pole multi-throw switch U2 is connected with the input end of a switch filter bank; the switch filter bank is composed of a first band-pass filter, an amplifier, a second band-pass filter and an upper and lower power supply circuit for supplying power to the amplifier, wherein the input end of the first band-pass filter is connected to the free end of the single-pole multi-throw switch U4, the output end of the second band-pass filter is connected to the free end of the single-pole multi-throw switch U2, and the upper and lower power supply circuit is connected to the power supply input end of the amplifier.
As shown in fig. 2, the switch filter bank in the figure has 3 channels, the frequencies are respectively 10GHz, 11GHz, and 12GHz dot-frequency frequencies, and the corresponding frequency-selective output is realized by the frequency-selective control function of the switch filter bank. The single channel is provided with two stages of filters which are connected in series to realize filtering frequency selection, and an amplifier is added between the filters to improve the frequency selection effect. The circuit of the invention can realize high-speed power-on and power-off of large current of the amplifier, the maximum load current can reach 3A, the power-on and power-off time is less than 60ns, the power-on and power-off time of the amplifier is equivalent to the switching time of the switch, and the high isolation and high quality of frequency selection are realized. When the circuit is not introduced, the amplifier is always in a working state, and the switch filter bank can only gate one path at each moment. Therefore, extra power consumption waste is caused, and the difficulty of heat dissipation treatment is increased. Meanwhile, due to the normal work of the unselected channel amplifier, the unselected channel amplifier can amplify the frequency-selected signal by the amplifier, so that the isolation and the signal quality are reduced. The amplifiers of the switch filter bank work simultaneously, and the self-excitation risk is increased. In conclusion, the high-isolation, high-quality and high-speed frequency selection of the switch filtering group can be realized by adding the frequency selection device.
The above-mentioned embodiment is only one of the preferred embodiments of the present invention, and should not be used to limit the scope of the present invention, and any insubstantial modifications or changes made in the spirit and the spirit of the main design of the present invention, which still solves the technical problems consistent with the present invention, should be included in the scope of the present invention.
Claims (7)
1. A high-speed power-on and power-off circuit based on PMOS (P-channel metal oxide semiconductor) heavy current is characterized by comprising a double not gate U1 for realizing level conversion and logic conversion, a transistor Q1, a bipolar junction type triode Q2, a resistor R1, a filter capacitor C1 and a filter capacitor C2, wherein the grid of the transistor Q1 is connected with a pin 4 of the double not gate U1 through a resistor R2 for realizing level switch control and voltage input and output, the base of the transistor Q1 is connected with a pin 6 of the double not gate U1 through a resistor R3 for realizing a discharge loop, the resistor R1 is connected between the drain of the transistor Q1 and the collector of the triode Q2, one end of the filter capacitor C1 is connected with the source of the transistor Q1, the other end of the filter capacitor C1 is grounded and is used for outputting power supply filtering; the source electrode of the transistor Q1 is used as a power supply input end, the drain electrode of the transistor Q1 is used as a power supply output end, and the emitting electrode of the triode Q2 is grounded; the 1 st pin and the 3 rd pin of the double NOT gate U1 are connected as control input ends.
2. The PMOS high-current high-speed power-on and power-off circuit as claimed in claim 1, wherein said dual NOT gate U1 is a high-speed, dual-channel dual NOT gate.
3. The PMOS high current high speed power-up and power-down circuit as claimed in claim 2, wherein said transistor Q1 is a P-channel, high speed, high current MOSFET.
4. The PMOS large current high-speed power-on and power-off circuit as claimed in claim 3, wherein said transistor Q2 is a high-speed switching NPN BJT.
5. A high-speed power-on and power-off circuit based on a PMOS (P-channel metal oxide semiconductor) large current as claimed in claim 4, wherein the resistor R1, the resistor R2 and the resistor R3 are chip resistors, and 0603 packaging chip thick film resistors are adopted.
6. The PMOS-based high-current high-speed power-on and power-off circuit as claimed in claim 5, wherein the filter capacitors C1 and C2 are ceramic capacitors packaged by 0603.
7. A switch filter circuit is characterized by comprising a single-pole multi-throw switch U4 with a fixed end connected with the input end of a switch filter group, a multi-way switch filter group connected with the free end of the single-pole multi-throw switch U4 to realize different point frequency, and a single-pole multi-throw switch U2 with a free end connected with the other end of the multi-way switch filter group, wherein the fixed end of the single-pole multi-throw switch U2 is connected with the output end of the switch filter group; the switch filter bank is composed of a first band-pass filter, an amplifier, a second band-pass filter and an up-down circuit as claimed in claim 6, wherein the first band-pass filter, the amplifier, the second band-pass filter and the up-down circuit are connected in sequence, the input end of the first band-pass filter is connected to the free end of a single-pole multi-throw switch U4, the output end of the second band-pass filter is connected to the free end of a single-pole multi-throw switch U2, and the up-down circuit is connected to the power supply input end of the amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310077657.7A CN115800977B (en) | 2023-02-08 | 2023-02-08 | PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310077657.7A CN115800977B (en) | 2023-02-08 | 2023-02-08 | PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115800977A CN115800977A (en) | 2023-03-14 |
| CN115800977B true CN115800977B (en) | 2023-04-14 |
Family
ID=85430374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310077657.7A Active CN115800977B (en) | 2023-02-08 | 2023-02-08 | PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115800977B (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001320264A (en) * | 2000-05-11 | 2001-11-16 | Yazaki Corp | Power supply controller |
| JP2006054756A (en) * | 2004-08-13 | 2006-02-23 | Sony Corp | Output drive circuit and method for controlling the same |
| CN202841084U (en) * | 2012-10-11 | 2013-03-27 | 华自科技股份有限公司 | Switching value output module |
| CN104753326A (en) * | 2015-04-09 | 2015-07-01 | 广东工业大学 | AC-DC (alternating current-direct current) drive output filter capacitor quick active leakage circuit |
| CN105281422A (en) * | 2015-10-09 | 2016-01-27 | 中国科学院声学研究所 | Method and circuit for automatically switching off power supply switch |
| CN106067800A (en) * | 2016-06-29 | 2016-11-02 | 浙江桃园科技有限公司 | NMOS tube high voltage high-speed driving circuit |
| CN108880521A (en) * | 2018-05-03 | 2018-11-23 | 许继电源有限公司 | A kind of switch mosfet driving circuit |
| CN208971480U (en) * | 2018-10-23 | 2019-06-11 | 深圳市海勤科技有限公司 | The DC power supply switch circuit that can be rapidly switched off and the electronic equipment using it |
| JP2020170915A (en) * | 2019-04-02 | 2020-10-15 | 株式会社デンソー | Drive circuit |
| CN212518917U (en) * | 2020-07-27 | 2021-02-09 | 成都世源频控技术股份有限公司 | Passive frequency multiplier circuit based on transistor |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9397658B2 (en) * | 2014-06-25 | 2016-07-19 | Freescale Semiconductor, Inc. | Gate drive circuit and a method for controlling a power transistor |
| DK3343763T3 (en) * | 2016-12-29 | 2020-01-27 | Gn Hearing As | OUTPUT DRIVER INCLUDING MOS CONTACTS WITH ADJUSTABLE BACK GATE Bias |
| JPWO2021117821A1 (en) * | 2019-12-12 | 2021-06-17 | ||
| CN111884512A (en) * | 2020-03-18 | 2020-11-03 | 深圳市航嘉驰源电气股份有限公司 | Switching power supply, power adapter and charger |
-
2023
- 2023-02-08 CN CN202310077657.7A patent/CN115800977B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001320264A (en) * | 2000-05-11 | 2001-11-16 | Yazaki Corp | Power supply controller |
| JP2006054756A (en) * | 2004-08-13 | 2006-02-23 | Sony Corp | Output drive circuit and method for controlling the same |
| CN202841084U (en) * | 2012-10-11 | 2013-03-27 | 华自科技股份有限公司 | Switching value output module |
| CN104753326A (en) * | 2015-04-09 | 2015-07-01 | 广东工业大学 | AC-DC (alternating current-direct current) drive output filter capacitor quick active leakage circuit |
| CN105281422A (en) * | 2015-10-09 | 2016-01-27 | 中国科学院声学研究所 | Method and circuit for automatically switching off power supply switch |
| CN106067800A (en) * | 2016-06-29 | 2016-11-02 | 浙江桃园科技有限公司 | NMOS tube high voltage high-speed driving circuit |
| CN108880521A (en) * | 2018-05-03 | 2018-11-23 | 许继电源有限公司 | A kind of switch mosfet driving circuit |
| CN208971480U (en) * | 2018-10-23 | 2019-06-11 | 深圳市海勤科技有限公司 | The DC power supply switch circuit that can be rapidly switched off and the electronic equipment using it |
| JP2020170915A (en) * | 2019-04-02 | 2020-10-15 | 株式会社デンソー | Drive circuit |
| CN212518917U (en) * | 2020-07-27 | 2021-02-09 | 成都世源频控技术股份有限公司 | Passive frequency multiplier circuit based on transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115800977A (en) | 2023-03-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6730953B2 (en) | Apparatus, methods and articles of manufacture for a low control voltage switch | |
| US20040051395A1 (en) | Apparatus, methods, and articles of manufacture for a switch having sharpened control voltage | |
| US7667541B2 (en) | Amplifier circuit and wireless communication device | |
| US20020113656A1 (en) | Amplifier | |
| TWI516021B (en) | Radio frequency power amplifier with no reference voltage for biasing and electronic system | |
| CN203261299U (en) | Gain adjusting circuit of radio frequency power amplifier | |
| CN109194291A (en) | A kind of one chip low-noise amplifier of the high-gain High Linear with bypass functionality | |
| Do et al. | A 60 GHz SiGe-HBT power amplifier with 20% PAE at 15 dBm output power | |
| JP5313970B2 (en) | High frequency power amplifier | |
| CN115800977B (en) | PMOS (P-channel metal oxide semiconductor) -based high-current high-speed power-on and power-off circuit and power supply switch filter circuit thereof | |
| JPH07245536A (en) | Amplifier circuit with output control function | |
| CN104135238A (en) | RF power amplifier and electronic system | |
| CN109327194A (en) | A kind of one chip low-noise amplifier of the broadband High Linear with bypass functionality | |
| TW201824740A (en) | Amplifier circuit | |
| Issakov et al. | Low-voltage flip-flop-based frequency divider up to 92-GHz in 130-nm SiGe BiCMOS technology | |
| Lee et al. | An adaptively biased stacked power amplifier without output matching network in 90-nm CMOS | |
| CN211744347U (en) | 5G radio frequency front end power switching chip compatible with APT and ET modes | |
| Santana et al. | CMOS RF Class-E power amplifier with power control | |
| CN110611486A (en) | Control circuit and low noise amplifier | |
| CN220798228U (en) | Power amplifier drain voltage switching circuit | |
| CN219740359U (en) | Radio frequency front end switch module, radio frequency front end chip, transmitter, transceiver and signal processing equipment | |
| TWI672903B (en) | Amplifier circuit | |
| CN114785290B (en) | Envelope tracking power modulator, chip and radio frequency amplification system | |
| CN217469952U (en) | Power supply circuit of radio frequency electronic change-over switch and radio frequency circuit | |
| JP2000004149A (en) | Spdt switch semiconductor integrated circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |