CN115800736A - Dynamic high-voltage signal transmission switch circuit suitable for thin gate oxide layer process - Google Patents
Dynamic high-voltage signal transmission switch circuit suitable for thin gate oxide layer process Download PDFInfo
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Abstract
The invention discloses a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which comprises the following components: the symmetrical double-NMOS transistor switch comprises two N-type transistors, wherein the grid electrodes and the source electrodes of the two N-type transistors are respectively connected, and the drain electrodes of the two N-type transistors are respectively used as the input ends of high-voltage signals; the floating power supply rail generation module is connected with the source electrodes of the two N-type transistors in the symmetrical double NMOS tube switches and used for tracking the amplitude of the dynamic high-voltage signal to generate a floating power supply rail; and the levelShift level conversion module is connected with the floating power supply rail generation module and the grids of the two N-type transistors in the symmetrical double NMOS tube switches and is used for converting the input digital control signals corresponding to the low power supply rail from 0V to 5V into analog control signals corresponding to the floating power supply rail so as to control the on and off of the symmetrical double NMOS tube switches. The invention ensures that the thin gate oxide layer MOS tube switch is in a safe voltage withstanding range when transmitting dynamic high-voltage signals.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process.
Background
Almost all mixed signal chips need switches, and the implementation modes are various, such as transmission gates, single-tube switches, combinational logic switches and the like.
The switch is controlled by the switch tube grid digital logic signal, in the low voltage circuit, as long as the amplitude of the digital logic signal reaches the power rail swing amplitude and meets the grid source voltage withstand requirement in the low voltage process. However, some high-voltage processes are still thin gate oxide layer processes, and symmetric logic MOS tubes without thick gate oxide layers have the process characteristics that the source and drain of the MOS tubes can resist high voltage, and the withstand voltage of a gate-source port is still low. When a high-voltage signal is transmitted, a boosting level shift circuit is used for generating a fixed high-voltage control signal to control whether a switch tube is conducted or not under the condition that the signal amplitude is determined.
However, when the high voltage signal has a large swing change, the switching tube still breaks down and damages the transistor due to the circuit structure, so that the requirement for constructing a dynamic high voltage signal transmission switch cannot be met when designing the high voltage circuit by using the MOS tube and the high voltage switch design scheme thereof.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a dynamic high voltage signal transmission switch circuit suitable for a thin gate oxide process. The technical problem to be solved by the invention is realized by the following technical scheme:
the embodiment of the invention provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which comprises the following steps: a symmetrical double NMOS tube switch, a levelShift level conversion module and a floating power rail generation module, wherein,
the symmetrical double-NMOS transistor switch comprises two N-type transistors, wherein grid electrodes and source electrodes of the two N-type transistors are respectively connected, and drain electrodes of the two N-type transistors are respectively used as input ends of dynamic high-voltage signals;
the floating power supply rail generation module is connected with the source electrodes of two N-type transistors in the symmetrical double NMOS tube switch and used for tracking the amplitude of the dynamic high-voltage signal to generate a floating power supply rail;
the LevelShift level conversion module is connected with the floating power supply rail generation module and the grids of two N-type transistors in the symmetrical double NMOS tube switches, and is used for converting input digital control signals corresponding to low power supply rails of 0V-5V into analog control signals corresponding to the floating power supply rails so as to control the on and off of the symmetrical double NMOS tube switches.
In an embodiment of the present invention, the symmetric double NMOS transistor switch further includes a diode D connected between the gates and the sources of the two N-type transistors.
In one embodiment of the present invention, the floating power rail generation module comprises an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2, a floating power rail voltage output circuit, wherein,
the positive phase input end of the operational amplifier A is connected with the symmetrical double NMOS tube switch, the negative phase input end of the operational amplifier A is connected with the drain electrode of the N-type transistor N2, the floating power supply rail voltage output circuit and the first output end of the floating power supply rail generation module, the output end of the operational amplifier A is connected with the floating power supply rail voltage output circuit and the second output end of the floating power supply rail generation module, the source electrode of the N-type transistor N2 and the source electrode of the N-type transistor N1 are connected with a power supply HVEE, the grid electrode of the N-type transistor N2 is connected with the grid electrode of the N-type transistor N1, the drain electrode of the N-type transistor N1 and the output end of the current source S, and the input end of the current source DD is connected with the power supply HVEE.
In one embodiment of the present invention, the floating power rail voltage output circuit includes N-type transistors N3, N being an integer greater than 0; the source electrodes and the drain electrodes of the N N-type transistors N3 are sequentially connected in series, and the grid electrode of each N-type transistor N3 is connected with the drain electrode of the N-type transistor N3; the drain of the first N-type transistor N3 is further connected to the second output terminal of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected to the first output terminal of the floating power rail generation module.
In an embodiment of the present invention, the value of N is determined by the maximum breakdown voltage supported between the gate and the source of the two N-type transistors in the symmetric dual NMOS transistor switch.
In an embodiment of the present invention, the LevelShift level conversion module includes a LevelShift step-down level conversion module, and the LevelShift step-down level conversion module is configured to convert an input digital control signal corresponding to 0V to 5V of the low power rail into an analog control signal corresponding to the floating power rail through step-down.
In an embodiment of the present invention, the LevelShift level conversion module includes a LevelShift boost level conversion module, and the LevelShift boost level conversion module is configured to convert input digital control signals corresponding to low power supply rails 0V to 5V into analog control signals corresponding to the floating power supply rail through boost.
In an embodiment of the present invention, the LevelShift level conversion module includes a LevelShift step-down level conversion module and a LevelShift step-up level conversion module, wherein,
the LevelShift step-down level conversion module converts the input digital control signal corresponding to the low power supply rail of 0V-5V into an analog control signal corresponding to the lowest negative power supply rail of the system through step-down;
and the levelShift boost level conversion module is used for converting the analog control signal corresponding to the lowest negative power supply rail of the system into the analog control signal corresponding to the floating power supply rail through boosting.
In one embodiment of the present invention, the LevelShift buck level shift module includes N-type transistors M11 to M26, wherein,
the source of the N-type transistor M11, the source of the N-type transistor M12 are connected to VDD, the gate of the N-type transistor M11 is connected to the first input terminal of the LevelShift buck level shift module, the gate of the N-type transistor M12 is connected to the first input terminal of the LevelShift buck level shift module, the drain of the N-type transistor M11 is connected to the drain of the N-type transistor M13, the drain of the N-type transistor M12 is connected to the drain of the N-type transistor M14, the gate of the N-type transistor M13, the gate of the N-type transistor M14, the source of the N-type transistor M15, the source of the N-type transistor M16, the source of the N-type transistor M19, the source of the N-type transistor M20, the source of the N-type transistor M23, and the source of the N-type transistor M24 are connected to HVEE + M, the source of the N-type transistor M13 is connected to the drain of the N-type transistor M15, the drain of the N-type transistor M17, the gate of the N-type transistor M19, the gate of the N-type transistor M21, the gate of the N-type transistor M16 and the gate of the N-type transistor M18, the source of the N-type transistor M14 is connected to the gate of the N-type transistor M15, the gate of the N-type transistor M17, the drain of the N-type transistor M16, the drain of the N-type transistor M18, the gate of the N-type transistor M23 and the gate of the N-type transistor M25, the source of the N-type transistor M17, the source of the N-type transistor M18, the source of the N-type transistor M21, the source of the N-type transistor M22, the source of the N-type transistor M25 and the source of the N-type transistor M26 are connected to HVEE, the drain of the N-type transistor M19 is connected to the drain of the N-type transistor M21, the gate of the N-type transistor M20, the gate of the N-type transistor M22 is connected, the drain of the N-type transistor M20 is connected to the drain of the N-type transistor M22 and the first output terminal of the LevelShift step-down level conversion module, the drain of the N-type transistor M23 is connected to the drain of the N-type transistor M25, the gate of the N-type transistor M24 and the gate of the N-type transistor M26, and the drain of the N-type transistor M24 is connected to the drain of the N-type transistor M26 and the second output terminal of the LevelShift step-down level conversion module; wherein m represents the maximum breakdown voltage supported between the gates and the sources of the two N-type transistors in the symmetric dual NMOS transistor switch.
In one embodiment of the invention, the LevelShift boost level conversion module comprises N-type transistors N11 to N26, wherein,
a source of the N-type transistor N11, a source of the N-type transistor N12 are connected to HVEE, a gate of the N-type transistor N11 is connected to a first input terminal of the levelShift boost level conversion module, a gate of the N-type transistor N12 is connected to a second input terminal of the levelShift boost level conversion module, a drain of the N-type transistor N11 is connected to a drain of the N-type transistor N13, a drain of the N-type transistor N12 is connected to a drain of the N-type transistor N14, a gate of the N-type transistor N13, a gate of the N-type transistor N14, a source of the N-type transistor N15, a source of the N-type transistor N16, a source of the N-type transistor N19, a source of the N-type transistor N20, a source of the N23, and a source of the N24 are connected to VX, the source of the N-type transistor N13 is connected to the drain of the N-type transistor N15, the drain of the N-type transistor N17, the gate of the N-type transistor N19, the gate of the N-type transistor N21, the gate of the N-type transistor N16, and the gate of the N-type transistor N18, the source of the N-type transistor N14 is connected to the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23, and the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N21, the source of the N22, the source of the N25, and the source of the N26 are connected to VX + m, the drain of the N19 is connected to the drain of the N-type transistor N21, the gate of the N20, and the gate of the N25 are connected to VX + m, the gate of the N-type transistor N22 is connected, the drain of the N-type transistor N20 is connected to the drain of the N-type transistor N22 and the first output terminal of the LevelShift boost level conversion module, the drain of the N-type transistor N23 is connected to the drain of the N-type transistor N25, the gate of the N-type transistor N24 and the gate of the N-type transistor N26, and the drain of the N-type transistor N24 is connected to the drain of the N-type transistor N26 and the second output terminal of the LevelShift boost level conversion module; wherein m represents the maximum breakdown voltage supported between the gates and the sources of the two N-type transistors in the symmetric dual NMOS transistor switch.
The invention has the beneficial effects that:
the invention provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which adopts a symmetrical double-NMOS tube switch structure, a floating power rail generation module samples source electrodes of two NMOS tubes to generate a floating power rail based on dynamic high-voltage signal amplitude, a levelShift level conversion module is used for converting a digital control signal corresponding to a low power rail into an analog control signal corresponding to the floating power rail, and the analog control signal is connected to grid electrodes of the two NMOS tubes to control the on-off of the symmetrical double-NMOS tube switch. Therefore, the amplitude of the source electrode high-voltage signal of the symmetrical NMOS tube switch is detected, the source electrode high-voltage signal acts on the LevelShift level conversion module in a floating power supply rail generating mode and is fed back to the grid electrode of the symmetrical double NMOS tube switch, a loop is formed to ensure that the thin gate oxide layer MOS tube switch is in a safe voltage withstanding range when transmitting dynamic high-voltage signals, control logic is effective and high in accuracy, the problem that the logic switch cannot be constructed in a dynamic high-voltage signal transmission path due to low gate source voltage of the MOS tube in the thin gate oxide layer process is innovatively solved, process limitation is reduced on the circuit design level, the design difficulty of a high-voltage circuit under the thin gate oxide layer process is reduced to the greatest extent, and a new circuit structure and design thought are provided for high-voltage circuit design.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic structural diagram of a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a specific circuit structure of a floating power rail generation module according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a LevelShift level conversion module according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another LevelShift level conversion module according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another LevelShift level conversion module according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a specific circuit structure of a LevelShift step-down level shift module according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a specific circuit structure of a LevelShift boost level conversion module according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide process according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Referring to fig. 1, an embodiment of the present invention provides a dynamic high voltage signal transmission switch circuit suitable for a thin gate oxide layer process, including: a symmetrical double NMOS tube switch, a levelShift level conversion module and a floating power rail generation module, wherein,
the symmetrical double-NMOS transistor switch comprises two N-type transistors, wherein grid electrodes and source electrodes of the two N-type transistors are respectively connected, and drain electrodes of the two N-type transistors are respectively used as input ends of dynamic high-voltage signals; the floating power supply rail generation module is connected with the drain electrodes of the two N-type transistors in the symmetrical double NMOS tube switches and used for tracking the amplitude of the dynamic high-voltage signal to generate a floating power supply rail; and the levelShift level conversion module is connected with the floating power supply rail generation module and the grids of the two N-type transistors in the symmetrical double NMOS tube switches and is used for converting the input digital control signals corresponding to the low power supply rail of 0V-5V into analog control signals corresponding to the floating power supply rail so as to control the on and off of the symmetrical double NMOS tube switches.
The embodiment of the invention provides a symmetrical double-NMOS tube structure, a floating power supply rail generation module samples source electrodes of two NMOS tubes to generate a floating power supply rail based on dynamic high-voltage signal amplitude, a levelShift level conversion module is used for converting digital control signals corresponding to 0V-5V of a low power supply rail into analog control signals corresponding to the floating power supply rail, and the analog control signals are connected to grid electrodes of symmetrical double-NMOS tube switches to control the on and off of the symmetrical double-NMOS tube switches. Therefore, the amplitude of the source electrode high-voltage signal of the symmetrical NMOS tube switch is detected, the source electrode high-voltage signal acts on the LevelShift level conversion module in a floating power supply rail generating mode and is fed back to the grid electrode of the symmetrical double NMOS tube switch, a loop is formed to ensure that the thin gate oxide layer MOS tube switch is in a safe voltage withstanding range when transmitting dynamic high-voltage signals, control logic is effective and high in accuracy, the problem that the logic switch cannot be constructed in a dynamic high-voltage signal transmission path due to low gate source voltage of the MOS tube in the thin gate oxide layer process is innovatively solved, process limitation is reduced on the circuit design level, the design difficulty of a high-voltage circuit under the thin gate oxide layer process is reduced to the greatest extent, and a new circuit structure and design thought are provided for high-voltage circuit design.
Next, a circuit design example of each part will be described in detail.
Referring to fig. 1, in the embodiment of the present invention, a symmetric dual MOS transistor switch is used as a transmission control structure of a dynamic high voltage signal in a circuit to perform a switching function, and specifically, the symmetric dual NMOS transistor switch includes an N-type transistor M1 and an N-type transistor M2, a gate of the N-type transistor M1 is connected to a gate of the N-type transistor M2 and a LevelShift level conversion module, a source of the N-type transistor M1 is connected to a source of the N-type transistor M2 and a floating power rail generation module, and drains of the N-type transistor M1 and the N-type transistor M2 are respectively used as input ends of the high voltage signal. Due to the process limitation of the thin gate oxide layer, the voltage withstand requirements of the transistor during bidirectional dynamic high-voltage signal transmission cannot be met by the parallel switch and the single-tube switch of the transmission gate structure, and the bidirectional transmission of the dynamic high-voltage signals VA and VB under a group of control logic signals can be realized by the interconnection of the source electrodes of the symmetrical double NMOS tube switches provided by the embodiment of the invention.
Referring to fig. 2, the floating power rail generation module in the embodiment of the invention includes an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2, and a floating power rail voltage output circuit, wherein,
the positive phase input end of the operational amplifier A is connected with the symmetrical double NMOS tube switch, the negative phase input end of the operational amplifier A is connected with the drain electrode of the N-type transistor N2, the floating power rail voltage output circuit and the first output end of the floating power rail generation module, the output end of the operational amplifier A is connected with the floating power rail voltage output circuit and the second output end of the floating power rail generation module, the source electrode of the N-type transistor N2 and the source electrode of the N-type transistor N1 are both connected with a power HVEE (the lowest negative voltage of the system power rail, such as-35V), the grid electrode of the N-type transistor N2 is connected with the grid electrode of the N-type transistor N1, the drain electrode of the N-type transistor N1 and the output end of the current source S, and the input end of the current source S is connected with a power HVDD (the highest positive voltage of the system power rail, such as 35V). In the embodiment of the invention, the floating power supply rail voltage output circuit comprises N N-type transistors N3, wherein N is an integer greater than 0; the source electrodes and the drain electrodes of the N N-type transistors N3 are sequentially connected in series, and the grid electrode of each N-type transistor N3 is connected with the drain electrode of the N-type transistor N3; the drain of the first N-type transistor N3 is further connected to the second output terminal of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected to the first output terminal of the floating power rail generation module.
The N N-type transistors N3 in the floating power rail voltage output circuit clamp the voltage VX at the source electrode of the symmetrical double NMOS tube switch to generate the floating power rails VX-VX + m corresponding to the VX. In the embodiment of the present invention, the value of N is determined by the maximum breakdown voltage m supported between the gates and the sources of the two N-type transistors in the symmetric dual NMOS transistor switch, that is, the requirement of the withstand voltage between the gates and the sources of the two N-type transistors, for example, m =5V, and the following illustration and the example are illustrated by using m = 5V.
For a LevelShift level conversion module, the embodiment of the present invention provides three alternatives, which are specifically as follows:
referring to fig. 3, in a first alternative provided by the embodiment of the present invention, the LevelShift Level conversion module includes a LevelShift step-down Level conversion module, which is marked as Level-Shift-down in fig. 3, and the LevelShift step-down Level conversion module is configured to convert an input digital control signal corresponding to a low power rail 0V to 5V into an analog control signal corresponding to a floating power rail through step-down.
Referring to fig. 4, in two alternative solutions provided in the embodiment of the present invention, the LevelShift Level conversion module includes a LevelShift boost Level conversion module, which is marked as Level-Shift-up in fig. 4, and the LevelShift boost Level conversion module is configured to convert input digital control signals corresponding to low power rails 0V to 5V into analog control signals corresponding to floating power rails through boost.
Referring to fig. 5, in a third alternative scheme provided in the embodiment of the present invention, the LevelShift level conversion module includes a LevelShift buck level conversion module and a LevelShift boost level conversion module, where,
the level Shift step-down level conversion module converts input digital control signals corresponding to low power supply rails of 0V-5V into analog control signals corresponding to the lowest negative power supply rail of the system through step-down; and the levelShift boost level conversion module is used for converting the analog control signal corresponding to the lowest negative power supply rail of the system into the analog control signal corresponding to the floating power supply rail through boosting. Here, for example, if the lowest negative voltage HVEE of the system power rail is-35V, the corresponding analog control signals are HVEE-HVEE +5, i.e., -35V-30V.
The three options of the specific LevelShift level conversion module are determined according to the highest voltage and the lowest voltage of a system power supply rail in an actual scene.
For example, the highest and lowest voltages of the system power rails are both positive power voltages, for example, 15V to 35V, and the input digital control signals corresponding to 0V to 5V of the low power rail, for example, VDD is shown in the figure as 5V, gnd is 0V, and the high-voltage signal to be transmitted is 20V, that is, VX is 20V, then the LevelShift level conversion module can be implemented only by the LevelShift boost level conversion module, and the digital control signals corresponding to 0V to 5V of the low power rail are converted into analog control signals corresponding to 20V to 25V of the floating power rail through boost, that is, the VC power rail is 20V to 25V, so that the voltage difference between the gate voltage VC and the source voltage VX is ensured to be within the 5V withstand voltage range.
For example, the highest voltage and the lowest voltage of the system power rail are both negative power voltage, such as-30V to-15V, digital control signals corresponding to 0V to 5V of the low power rail are input, the high-voltage signal to be transmitted is-20V, namely VX is-20V, the LevelShift level conversion module can be realized only by the LevelShift buck level conversion module, the digital control signals corresponding to 0V to 5V of the low power rail are converted into analog control signals corresponding to-20V to-15V of the floating power rail through buck, namely VC power rail is-20V to-15V, and the voltage difference between the gate voltage VC and the source voltage VX is ensured to be within the 5V withstand voltage range.
For another example, the highest voltage of the system power rail is a positive power voltage, the lowest voltage is a negative power voltage, the input digital control signal corresponding to the low power rail 0V to 5V is a dynamic high voltage signal, which is any one of-35V to 35V, and a positive value and a negative value appear together, for example, the dynamic high voltage signal is 20V, the digital control signal corresponding to the low power rail 0 to 5V needs to be converted into an analog control signal corresponding to the floating power rail 20V to 25V, in this process, the high voltage signal dynamically changes to-20V, the digital control signal corresponding to the low power rail 0 to 5V needs to be converted into an analog control signal corresponding to the floating power rail-20V to-15V, and in this case, only a LevelShift buck level conversion module or LevelShift boost level conversion module is designed to be unable to cope with the amplitude crossing of the positive value and the negative value appearing in the input high voltage signal. Aiming at the situation, the digital control signals corresponding to the low power rails 0-5V are firstly reduced to the analog control signals HVEE-HVEE + 5 corresponding to the lowest negative power rail of the system, then the boosting is carried out, so that the analog control signals corresponding to all the floating power rails can be traversed, or the situation that the input dynamic high-voltage signal has 20V dynamic change to-20V is taken as an example, when the dynamic high-voltage signal is 20V, the analog control signals HVEE-HVEE + 5 based on the lowest negative power rail of the system, such as-35V-30V analog control signals corresponding to-35V, are firstly generated, then the analog control signals corresponding to-35V-30V are boosted to the analog control signals corresponding to the floating power rails 20V-25V from-35V-30V, when the dynamic high-voltage signal is-20V, the analog control signals corresponding to-35V-30V are still firstly reduced, and then the analog control signals corresponding to the floating power rails-15V-20V from the analog control signals corresponding to-30V-35V are boosted.
It can be seen that the three schemes all have their own advantages, and the first scheme and the second scheme can respectively and quickly cope with the situation that voltage domains contained in a high-voltage power supply rail in a circuit are both positive values or both negative values, but cannot cope with the situation that the voltage domains contained in the high-voltage power supply rail are not both positive values or negative values any more, but the high-voltage power supply voltage is a positive value, and the low-voltage power supply voltage is a negative value; the third solution can deal with the situation that the dynamic high-voltage signal is greater than 0V or less than 0V at the same time, but means that the analog control signals HVEE-HVEE + 5 corresponding to the lowest negative power rail of the system need to be stepped down each time, and the switching response speed is slightly lower than that of the first and second solutions.
Referring to fig. 6, in the embodiment of the present invention, the LevelShift step-down level shift module includes N-type transistors M11 to M26, wherein,
the source of the N-type transistor M11, the source of the N-type transistor M12 and the gate of the N-type transistor M11 are connected to VDD, the gate of the N-type transistor M11 is connected to the first input terminal of the LevelShift buck level shift module, the gate of the N-type transistor M1 is connected to the first input terminal of the LevelShift buck level shift module, the drain of the N-type transistor M11 is connected to the drain of the N-type transistor M13, the drain of the N-type transistor M12 is connected to the drain of the N-type transistor M14, the gate of the N-type transistor M13, the gate of the N-type transistor M14, the source of the N-type transistor M15, the source of the N-type transistor M16, the source of the N-type transistor M19, the source of the N-type transistor M20, the source of the N-type transistor M23, the source of the N-type transistor M24 are connected to HVEE + M, the source of the N-type transistor M13 and the drain of the N-type transistor M15, the drain of the N-type transistor M17, the gate of the N-type transistor M19, the gate of the N-type transistor M21, the gate of the N-type transistor M16 and the gate of the N-type transistor M18 are connected, the source of the N-type transistor M14 is connected to the gate of the N-type transistor M15, the gate of the N-type transistor M17, the drain of the N-type transistor M16, the drain of the N-type transistor M18, the gate of the N-type transistor M23, and the gate of the N-type transistor M25, the source of the N-type transistor M17, the source of the N-type transistor M18, the source of the N-type transistor M21, the source of the N-type transistor M22, the source of the N-type transistor M25, and the source of the N-type transistor M26 are connected to HVEE, the drain of the N-type transistor M19 is connected to the drain of the N-type transistor M21, the gate of the N-type transistor M20, and the gate of the N-type transistor M22, the drain of the N-type transistor M20 is connected to the drain of the N-type transistor M22 and the first output terminal of the LevelShift step-down level shift conversion module, and the drain of the N-type transistor M23 is connected to the drain of the N-type transistor M25, the gate of the N-type transistor M24, the grid electrode of the N-type transistor M26 is connected, and the drain electrode of the N-type transistor M24 is connected with the drain electrode of the N-type transistor M26 and the second output end of the LevelShift step-down level conversion module.
It can be seen that in the LevelShift step-down level shift module, the gate connections HVEE + M of the N-type transistors M13 and M14 are used to isolate the signal protection low-voltage MOSFETs in the high-voltage domain and the low-voltage domain. HVEE-HVEE + m are analog control signals corresponding to the lowest negative power supply rail of the system, and the differential pressure is m V. In the stage of converting the first input end VD of the levelShift step-down level conversion module from GND to VDD, the N-type transistor M11 is turned off, the N-type transistor M12 is turned on, the drain of the N-type transistor M14 is pulled up to VDD, the second output end VD1_ inv of the levelShift step-down level conversion module is pulled up to HVEE + M, and the first output end VD1 of the levelShift step-down level conversion module is pulled down to HVEE. Similarly, in the stage of the conversion from VDD to GND of the first input end VD of the LevelShift step-down level conversion module, the N-type transistor M11 is turned on, the N-type transistor M12 is turned off, the drain of the N-type transistor M13 is pulled up to VDD, the first output end VD1 of the LevelShift step-down level conversion module is inverted to HVEE + M, and the second output end VD1_ inv of the LevelShift step-down level conversion module is inverted to HVEE. In this process, the pull-up capability of the N-type transistor M14 is greater than the pull-down capability of the N-type transistor M18, and the pull-up capability of the N-type transistor M13 is greater than the pull-down capability of the N-type transistor M17, so as to ensure that the node voltage is inverted correctly. The transmission delay of the LevelShift step-down level conversion module is mainly determined by the discharge speed of the pull-down current of the N-type transistor M17 and the pull-down current of the N-type transistor M18 to the drain node of the N-type transistor M, and a back-to-back inverter structure consisting of the N-type transistors M15-M18 has a positive feedback effect and accelerates the signal turning speed. Meanwhile, the existence of the N-type transistor M15 and the N-type transistor M16 in the LevelShift step-down level conversion module can realize higher dv/dt (voltage change speed along with time) anti-interference capability, only dynamic loss exists in the overturning process, and no static loss exists after the inversion is finished.
Referring to fig. 7, the LevelShift boost level conversion module in the embodiment of the present invention includes N-type transistors N11 to N-type transistor N26, wherein,
a source of the N-type transistor N11, a source of the N-type transistor N12 connected to the HVEE, a gate of the N-type transistor N11 connected to a first input terminal of the levelShift boost level shift module, a gate of the N-type transistor N12 connected to a second input terminal of the levelShift boost level shift module, a drain of the N-type transistor N11 connected to a drain of the N-type transistor N13, a drain of the N-type transistor N12 connected to a drain of the N-type transistor N14, a gate of the N-type transistor N13, a gate of the N-type transistor N14, a source of the N-type transistor N15, a source of the N-type transistor N16, a source of the N-type transistor N19, a source of the N-type transistor N20, a source of the N-type transistor N23, a source of the N24 connected to VX, a source of the N13 connected to a drain of the N-type transistor N15, a drain of the N17, a gate of the N-type transistor N19, a gate of the N21, a gate of the N16, and a gate of the N18, the source of the N-type transistor N14 is connected with the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23 and the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N-type transistor N21, the source of the N-type transistor N22, the source of the N-type transistor N25 and the source of the N-type transistor N26 are connected with VX + m, the drain of the N-type transistor N19 is connected with the drain of the N-type transistor N21, the gate of the N-type transistor N20 and the gate of the N-type transistor N22, the drain of the N20 is connected with the drain of the LevelShift boost level conversion module, the drain of the N23 is connected with the drain of the N-type transistor N25, the gate of the N24 and the gate of the N25, the grid electrode of the N-type transistor N26 is connected, and the drain electrode of the N-type transistor N24 is connected with the drain electrode of the N-type transistor N26 and the second output end of the LevelShift boost level conversion module.
Here, the LevelShift boost level conversion block is implemented similarly to the LevelShift buck level conversion block. In the stage of converting the first input end VD1 of the LevelShift boost level conversion module from HVEE + M to HVEE, the N-type transistor N11 is turned off, the N-type transistor N12 is turned on, the drain electrode of the N-type transistor M14 is pulled down to HVEE, the second output end VC _ inv of the LevelShift boost level conversion module is pulled down to VX, the first output end VC of the LevelShift boost level conversion module is pulled up to VX + M, VX-VX + M are high-voltage floating power supply rails brought by an internal bootstrap circuit, the floating power supply rail generation module generates the high-voltage floating power supply rail, and the voltage difference is M V. Similarly, in the stage of converting the first input end VD1 of the LevelShift boost level conversion module from HVEE to HVEE + m, the N-type transistor N11 is turned on, the N-type transistor N12 is turned off, the drain of the N-type transistor N13 is pulled down to HVEE, the first output end VC of the LevelShift boost level conversion module is inverted to VX, and the second output end VC _ inv of the LevelShift boost level conversion module is inverted to VX +5. In the process, the pull-down capability of the N-type transistor N14 is required to be larger than the pull-up capability of the N-type transistor N18, and the pull-down capability of the N-type transistor N13 is required to be larger than the pull-up capability of the N-type transistor N17, so that the node voltage is ensured to be inverted correctly. The LevelShift boost level conversion module is mainly determined by the discharge speed of pull-up currents of an N-type transistor N17 and an N-type transistor N18 to drain nodes of the N-type transistor respectively, and a back-to-back inverter structure consisting of the N-type transistors N15-N18 has a positive feedback effect and accelerates the signal turning speed. Meanwhile, the existence of the N-type transistor N15 and the N-type transistor N16 in the LevelShift boost level conversion module can realize higher dv/dt anti-interference capability, only dynamic loss exists in the overturning process, and no static loss exists after the overturning is finished.
Further, referring to fig. 8, in the embodiment of the invention, the symmetric dual NMOS transistor switch further includes a diode D, and the diode D is connected between the gates and the sources of the two N-type transistors. The dynamic high-voltage signal transmission switching circuit has the functions of preventing breakdown and protecting of a dynamic transistor and a static transistor. The dynamic protection is that the grid control potential of the symmetrical NMOS tube switch can change along with real-time change when the high-voltage signal changes in real time by sampling the source electrode and generating a high-voltage control logic signal on the basis of the sampling, so that the symmetrical NMOS tube switch is not in the risk of being broken down; the static protection is realized by using a diode D, in order to prevent the breakdown risk of the symmetrical NMOS tube switch caused by the error of the floating power supply rail generation module and the levelShift level conversion module, the diode is connected between the source electrode and the grid electrode of the symmetrical NMOS tube switch for protection, when the potential difference between the grid electrode potential VC and the source electrode potential VX of the symmetrical NMOS tube switch exceeds the withstand voltage value of the thin grid oxide layer process NMOS tube, the diode between nodes is conducted, and the grid oxide layer is prevented from breaking down to damage the transistor. Here, the diode D may be a zener diode.
The dynamic high-voltage signal transmission switch circuit suitable for the thin gate oxide layer process can support large-amplitude dynamic high-voltage signal transmission in the range of an analog control signal HVEE-HVEE +5 (negative power supply voltage HVEE) corresponding to the lowest negative power supply rail of the system from the lowest to the highest, for example, an input digital control signal corresponding to a low power supply rail 0V-5V, the control signal of the dynamic high-voltage signal transmission switch circuit is converted into an analog control signal HVEE-HVEE + 5 corresponding to the lowest negative power supply rail of the system through a LevelShift step-down level conversion module and then into an analog control signal corresponding to a floating power supply rail VX-VX +5, and the switching control signal of the dynamic high-voltage signal transmission across a positive power supply voltage domain and a negative power supply voltage domain can be realized. The high-gain operational amplifier A of the floating power rail generation module and the quick overturning capability of the levelShift level conversion module can ensure that high-voltage analog control signals (VX-VX + 5) of the symmetrical NMOS tube switches can make quick response to large-amplitude dynamic high-voltage signals, reduce the influence of the symmetrical NMOS tube switches on the transmission of the high signals and ensure the normal work of a main circuit.
It should be noted that, in the embodiments of the present invention, the power rail includes a power minimum voltage and a power maximum voltage, for example, the low power rail is 0V to 5V, which means that the minimum voltage corresponding to the low power rail is 0V, the maximum voltage is 5V, and other power rails are similar.
In the description of the present invention, it is to be understood that the terms "first", "second", and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to imply that the number of technical features indicated are in fact significant. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
While the invention has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a review of the specification and its drawings. In the specification, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. The mere fact that certain measures are recited in mutually different examples does not indicate that these measures cannot be combined to good effect.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process is characterized by comprising a symmetrical double NMOS transistor switch, a levelShift level conversion module and a floating power supply rail generation module, wherein,
the symmetrical double-NMOS transistor switch comprises two N-type transistors, wherein grid electrodes and source electrodes of the two N-type transistors are respectively connected, and drain electrodes of the two N-type transistors are respectively used as input ends of dynamic high-voltage signals;
the floating power supply rail generation module is connected with the source electrodes of two N-type transistors in the symmetrical double NMOS tube switch and used for tracking the amplitude of the dynamic high-voltage signal to generate a floating power supply rail;
the LevelShift level conversion module is connected with the floating power supply rail generation module and the grids of two N-type transistors in the symmetrical double NMOS tube switches, and is used for converting input digital control signals corresponding to low power supply rails of 0V-5V into analog control signals corresponding to the floating power supply rails so as to control the on and off of the symmetrical double NMOS tube switches.
2. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process of claim 1, wherein the symmetric dual NMOS transistor switch further comprises a diode D connected between the gate and source of two N-type transistors.
3. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process of claim 1, wherein the floating power rail generation module comprises an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2, a floating power rail voltage output circuit,
the positive phase input end of the operational amplifier A is connected with the symmetrical double NMOS tube switch, the negative phase input end of the operational amplifier A is connected with the drain electrode of the N-type transistor N2, the floating power supply rail voltage output circuit and the first output end of the floating power supply rail generation module, the output end of the operational amplifier A is connected with the floating power supply rail voltage output circuit and the second output end of the floating power supply rail generation module, the source electrode of the N-type transistor N2 and the source electrode of the N-type transistor N1 are connected with a power supply HVEE, the grid electrode of the N-type transistor N2 is connected with the grid electrode of the N-type transistor N1, the drain electrode of the N-type transistor N1 and the output end of the current source S, and the input end of the current source DD is connected with the power supply HVEE.
4. The dynamic high-voltage signal transmission switch circuit applicable to the thin gate oxide layer process as claimed in claim 3, wherein the floating power rail voltage output circuit comprises N-type transistors N3, N being an integer greater than 0; the source electrodes and the drain electrodes of the N N-type transistors N3 are sequentially connected in series, and the grid electrode of each N-type transistor N3 is connected with the drain electrode of the N-type transistor N3; the drain of the first N-type transistor N3 is further connected to the second output terminal of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected to the first output terminal of the floating power rail generation module.
5. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process of claim 4, wherein the value of N is determined by the maximum breakdown voltage supported between the gate and the source of two N-type transistors in said symmetric dual NMOS transistor switch.
6. The dynamic high-voltage signal transmission switch circuit suitable for the thin gate oxide layer process of claim 1, wherein the LevelShift level conversion module comprises a LevelShift step-down level conversion module, and the LevelShift step-down level conversion module is configured to convert an input digital control signal corresponding to a low power rail from 0V to 5V into an analog control signal corresponding to the floating power rail through step-down.
7. The dynamic high-voltage signal transmission switch circuit suitable for the thin gate oxide layer process as claimed in claim 1, wherein the LevelShift level conversion module comprises a LevelShift boost level conversion module, and the LevelShift boost level conversion module is configured to convert an input digital control signal corresponding to a low power rail from 0V to 5V into an analog control signal corresponding to the floating power rail through boost.
8. The dynamic high-voltage signal transmission switch circuit applicable to the thin gate oxide layer process of claim 6, wherein the LevelShift level conversion module comprises a LevelShift buck level conversion module and a LevelShift boost level conversion module, wherein,
the LevelShift step-down level conversion module converts the input digital control signal corresponding to the low power supply rail of 0V-5V into an analog control signal corresponding to the lowest negative power supply rail of the system through step-down;
and the levelShift boost level conversion module is used for converting the analog control signal corresponding to the lowest negative power supply rail of the system into the analog control signal corresponding to the floating power supply rail through boosting.
9. The dynamic high-voltage signal transmission switch circuit applicable to the thin gate oxide layer process as claimed in claim 6 or 8, wherein the LevelShift step-down level shift module comprises N-type transistors M11 to M26, wherein,
the source of the N-type transistor M11, the source of the N-type transistor M12 are connected to VDD, the gate of the N-type transistor M11 is connected to the first input terminal of the LevelShift buck level shift module, the gate of the N-type transistor M12 is connected to the first input terminal of the LevelShift buck level shift module, the drain of the N-type transistor M11 is connected to the drain of the N-type transistor M13, the drain of the N-type transistor M12 is connected to the drain of the N-type transistor M14, the gate of the N-type transistor M13, the gate of the N-type transistor M14, the source of the N-type transistor M15, the source of the N-type transistor M16, the source of the N-type transistor M19, the source of the N-type transistor M20, the source of the N-type transistor M23, and the source of the N-type transistor M24 are connected to HVEE + M, the source of the N-type transistor M13 is connected to the drain of the N-type transistor M15, the drain of the N-type transistor M17, the gate of the N-type transistor M19, the gate of the N-type transistor M21, the gate of the N-type transistor M16 and the gate of the N-type transistor M18, the source of the N-type transistor M14 is connected to the gate of the N-type transistor M15, the gate of the N-type transistor M17, the drain of the N-type transistor M16, the drain of the N-type transistor M18, the gate of the N-type transistor M23 and the gate of the N-type transistor M25, the source of the N-type transistor M17, the source of the N-type transistor M18, the source of the N-type transistor M21, the source of the N-type transistor M22, the source of the N-type transistor M25 and the source of the N-type transistor M26 are connected to HVEE, the drain of the N-type transistor M19 is connected to the drain of the N-type transistor M21, the gate of the N-type transistor M20, the gate of the N-type transistor M22 is connected, the drain of the N-type transistor M20 is connected to the drain of the N-type transistor M22 and the first output terminal of the LevelShift step-down level conversion module, the drain of the N-type transistor M23 is connected to the drain of the N-type transistor M25, the gate of the N-type transistor M24 and the gate of the N-type transistor M26, and the drain of the N-type transistor M24 is connected to the drain of the N-type transistor M26 and the second output terminal of the LevelShift step-down level conversion module; wherein m represents the maximum breakdown voltage supported between the gates and sources of the two N-type transistors in the symmetric dual NMOS transistor switch.
10. The dynamic high-voltage signal transmission switch circuit suitable for the thin gate oxide layer process as claimed in claim 7 or 8, wherein the LevelShift boost level conversion module comprises N-type transistors N11 to N-type transistors N26, wherein,
a source of the N-type transistor N11 and a source of the N-type transistor N12 are connected to HVEE, a gate of the N-type transistor N11 is connected to a first input terminal of the levelShift boost level conversion module, a gate of the N-type transistor N12 is connected to a second input terminal of the levelShift boost level conversion module, a drain of the N-type transistor N11 is connected to a drain of the N-type transistor N13, a drain of the N-type transistor N12 is connected to a drain of the N-type transistor N14, a gate of the N-type transistor N13, a gate of the N-type transistor N14, a source of the N-type transistor N15, a source of the N-type transistor N16, a source of the N-type transistor N19, a source of the N-type transistor N20, a source of the N-type transistor N23, and a source of the N-type transistor N24 are connected to VX, the source of the N-type transistor N13 is connected to the drain of the N-type transistor N15, the drain of an N-type transistor N17, the gate of the N-type transistor N19, the gate of the N-type transistor N21, the gate of the N-type transistor N16 and the gate of the N-type transistor N18, the source of the N-type transistor N14 is connected to the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23 and the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N-type transistor N21, the source of the N-type transistor N22, the source of the N25 and the source of the N-type transistor N26 are connected to VX + m, the drain of the N-type transistor N19, the drain of the N21 and the gate of the N20 are connected to VX + m, the gate of the N-type transistor N22 is connected, the drain of the N-type transistor N20 is connected to the drain of the N-type transistor N22 and the first output terminal of the LevelShift boost level conversion module, the drain of the N-type transistor N23 is connected to the drain of the N-type transistor N25, the gate of the N-type transistor N24 and the gate of the N-type transistor N26, and the drain of the N-type transistor N24 is connected to the drain of the N-type transistor N26 and the second output terminal of the LevelShift boost level conversion module; wherein m represents the maximum breakdown voltage supported between the gates and sources of the two N-type transistors in the symmetric dual NMOS transistor switch.
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| CN117713788A (en) * | 2024-02-05 | 2024-03-15 | 江苏润石科技有限公司 | Control circuit of high-voltage switch based on thin gate oxide layer process |
| CN117713788B (en) * | 2024-02-05 | 2024-04-23 | 江苏润石科技有限公司 | Control circuit of high-voltage switch based on thin gate oxide layer process |
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