CN115733394A - Common mode noise suppression circuit and circuit substrate - Google Patents
Common mode noise suppression circuit and circuit substrate Download PDFInfo
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- CN115733394A CN115733394A CN202211444875.1A CN202211444875A CN115733394A CN 115733394 A CN115733394 A CN 115733394A CN 202211444875 A CN202211444875 A CN 202211444875A CN 115733394 A CN115733394 A CN 115733394A
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Abstract
The invention discloses a common mode noise suppression circuit and a circuit substrate, and relates to the technical field of common mode noise suppression circuits, wherein the common mode noise suppression circuit is built by utilizing the low impedance characteristic of a capacitor to high-frequency noise, meanwhile, the common mode noise is transmitted to a substrate mounting unit shell CASE by utilizing a conductor structure, the common mode noise of a power port is reduced, the EMI characteristic of a controller and the stability of an electronic control unit are effectively improved, and a conductor part CON is formed between a first capacitor C1 and a second capacitor C2, so that even if the common mode noise is transmitted to the substrate mounting unit, the common mode noise is transmitted to the conductor part CON, the first capacitor C1, the second capacitor C2, a substrate positive connecting part CN + and a substrate negative connecting part CN & lt- & gt from the substrate mounting unit, a ring smaller than that is formed when the conductor part CON does not exist is formed.
Description
Technical Field
The invention relates to the technical field of common mode noise suppression circuits, in particular to a common mode noise suppression circuit and a circuit substrate.
Background
The operation of the motor in the electric power steering system generates common mode noise, which increases EMI of the electronic control unit and may also cause circuit stability of the electronic control unit. In the electronic control unit of the electric power steering system known at present, the work mode noise is suppressed by the common mode inductance.
The main defects are as follows:
1. the common mode coil is generally large in size and is not beneficial to miniaturization of the electronic control unit;
2. the cost of the jig coil is high.
On the other hand, the common mode noise cannot be effectively reduced if the common mode coil is not used.
Disclosure of Invention
The invention aims to solve the technical problem of providing a common mode noise suppression circuit and a circuit substrate aiming at the defects of the background technology, wherein the common mode noise suppression circuit is built by utilizing the low impedance characteristic of a capacitor to high-frequency noise, and meanwhile, the common mode noise is transmitted to a substrate mounting unit shell CASE by utilizing a conductor structure, so that the common mode noise of a power port is reduced, and the EMI characteristic of a controller and the stability of an electronic control unit are effectively improved.
The invention adopts the following technical scheme for solving the technical problems:
a common mode noise suppression circuit comprises an electronic control unit, an inverter circuit and a motor, wherein the electronic control unit controls the motor through the inverter circuit;
the inverter circuit comprises an inverter circuit INV1 and an inverter circuit INV2;
the inverter circuit INV1 includes a field effect transistor FET1, a field effect transistor FET2, a field effect transistor FET3, a field effect transistor FET4, a field effect transistor FET5, a field effect transistor FET6;
the inverter circuit INV2 includes a field effect transistor FET7, a field effect transistor FET8, a field effect transistor FET9, a field effect transistor FET10, a field effect transistor FET11, a field effect transistor FET12, and the inverter circuit INV2 is redundant to the inverter circuit INV 1;
the field effect transistors FET1, FET2, FET3, FET4, FET5, FET6, FET7, FET8, FET9, FET10, FET11, FET12 are connected between the positive line of potential B + connected to the positive connection part CN + of the substrate and the negative line of potential B-connected to the negative connection part CN-;
the field effect transistor FET1 and the field effect transistor FET2 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET1 and FET2 supply the U1-phase current to the U1-phase winding of the motor;
the shunt resistor R1 is connected in series with the field effect transistor FET1 and the field effect transistor FET2 between the field effect transistor FET2 and the negative pole line;
detecting a current flowing through the shunt resistor R1 by a current sensor for detecting a U1 phase current;
the field effect transistor FET3 and the field effect transistor FET4 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET3 and FET4 supply the V-phase current to the V1-phase winding of the motor;
the shunt resistor R2 is connected in series with the field effect transistor FET3 and the field effect transistor FET4 between the field effect transistor FET4 and the negative pole line;
detecting a current flowing through the shunt resistor R2 by a current sensor for detecting a V-phase current;
the field effect transistor FET5 and the field effect transistor FET6 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET5 and FET6 supply the W-phase current to the W1-phase winding of the motor;
the shunt resistor R3 is connected in series with the field effect transistor FET5 and the field effect transistor FET6 between the field effect transistor FET6 and the negative electrode line;
detecting a current flowing through the shunt resistor R3 by a current sensor for detecting the W1 phase current;
the field effect transistor FET7 and the field effect transistor FET8 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET7 and FET8 supply the U2-phase current to the U2-phase winding of the motor;
the shunt resistor R4 is connected in series with the field effect transistor FET7 and the field effect transistor FET8 between the field effect transistor FET8 and the negative pole line;
detecting a current flowing through the shunt resistor R4 by a current sensor for detecting the U2 phase current;
the field effect transistor FET9 and the field effect transistor FET10 are connected in series between the positive line and the negative line;
the field effect transistor FET9 and the field effect transistor FET10 supply the V2 phase current to the V2 phase winding of the motor;
the shunt resistor R5 is connected in series with the field effect transistor FET9 and the field effect transistor FET10 between the field effect transistor FET10 and the negative electrode line;
detecting a current flowing through the shunt resistor R5 by a current sensor for detecting a V2 phase current;
the field effect transistor FET11 and the field effect transistor FET12 are connected in series between the positive line and the negative line;
the field effect transistor FET11 and the field effect transistor FET12 supply the W2-phase current to the W2-phase winding of the motor;
the shunt resistor R6 is connected in series with the field effect transistor FET11 and the field effect transistor FET12 between the field effect transistor FET12 and the negative electrode line;
the current flowing through the shunt resistor R6 is detected by a current sensor for detecting the W2 phase current.
As a further preferable aspect of the common mode noise suppression circuit of the present invention, a field effect capacitor C10 is connected in parallel with the inverter circuit INV1 and the inverter circuit INV2 between the positive electrode line and the negative electrode line.
As a further preferable embodiment of the common mode noise suppressing circuit of the present invention, the electrolytic capacitor C10 smoothes a difference between the potential B + and the potential B-, which are power supply voltages.
In a further preferred embodiment of the common mode noise suppression circuit according to the present invention, the field effect transistors FET1, FET2, FET3, FET4, FET5, and FET6 are PWM-controlled to supply the U1 phase current, the V1 phase current, and the W1 phase current to the motor.
In a further preferred embodiment of the common mode noise suppression circuit according to the present invention, the field effect transistors FET7, FET8, FET9, FET10, FET11, and FET12 are PWM-controlled to supply the U2 phase current, V2 phase current, and W2 phase current to the motor.
As a further preferable scheme of the common mode noise suppression circuit of the present invention, the electronic control unit includes a normal mode filter NF and a common mode filter CF;
wherein the normal state filter NF is provided at a front stage of the field effect transistor FET10 and the field effect transistor FET 11;
the normal state filter NF includes a coil CL1 and a capacitor C11;
the coil CL1 is connected between the FET10 and the substrate positive connection CN +;
a capacitor C11 is connected in parallel with the electric field capacitor C10 between the positive electrode line and the negative electrode line;
the normal state filter NF can reduce normal state noise superimposed on the positive electrode line.
As a further preferable aspect of the common mode noise suppression circuit of the present invention, the common mode filter CF is located at a front stage of the normal mode filter, and the first capacitor C1 and the second capacitor C2 of the common mode filter CF are connected in parallel to the electrolytic capacitor C10; the first capacitor C1 and the second capacitor C2 are connected in series between the positive line and the negative line;
the common mode filter CF is connected between the positive connecting part CN + of the substrate and the negative connecting part CN-, and one end of the first capacitor C1 is connected with the positive connecting part CN + of the substrate through a positive wire; one end of the second capacitor C2 is connected to the substrate negative connection portion CN-via a negative line; the other end of the first capacitor C1 and the other end of the second capacitor C2 are connected to the conductor portion CON.
As a further preferable aspect of the common mode noise suppressing circuit of the present invention, the conductor part CON is a material through which a current caused by the common mode noise can flow, and the conductor part CON is a conductive metal screw; the conductor part is formed on the surface of the substrate and is connected with the shell CASE, and the conductor part CON is in a fastening state; the conductor part CON is electrically connected to the other end of the first capacitor C1 and to the other end of the second capacitor C2; in the conductor part CON, a current may flow between the first and second capacitors C1 and C2, and a current may flow between the first and second capacitors C1 and C2 and the CASE.
A circuit substrate comprises a circuit substrate, wherein the circuit substrate is of a six-layer structure and comprises an L1 layer, an L2 layer, an L3 layer, an L4 layer, an L5 layer and an L6 layer; stacking the layers in the order of L6 layer, L5 layer, L4 layer, L3 layer, L2 layer, and L1 layer from the substrate mounting unit side; the L1 layer is arranged on the cover unit side; the L6 layer is disposed on the substrate mounting unit side.
As a further preferable aspect of the circuit board of the present invention, the first capacitor C1 and the second capacitor C2 are formed on the surface of the L1 layer on the cover unit side; one end of the first capacitor C1 is connected to one end of the second capacitor and is connected to the local conductive network of layers L2 to L6 through conductive vias in the substrate; the other end of the first capacitor C1 is electrically connected with the positive terminal T +, and the other end of the second capacitor C2 is electrically connected with the negative single-chip T-; the first capacitor C1 is electrically connected to the conductor pattern; the local conductive network of the L6 layer is mounted with conductor sections CON.
Compared with the prior art, the invention adopting the technical scheme has the following technical effects:
1. the invention relates to a common mode noise suppression circuit, which comprises an electronic control unit, an inverter circuit and a motor, wherein the electronic control unit controls the motor through the inverter circuit; the inverter circuit includes an inverter circuit INV1 and an inverter circuit INV2; the inverter circuit INV2 is a redundancy of the inverter circuit INV 1; the common mode rejection circuit is built by using the low impedance characteristic of the capacitor to the high-frequency noise, and meanwhile, the common mode noise is transmitted to the substrate mounting unit shell CASE by using the conductor structure, so that the common mode noise of a power port is reduced, and the EMI characteristic of the controller and the stability of the electronic control unit are effectively improved;
2. the field effect capacitor C10 of the invention is connected in parallel with the inverter circuit INV1 and the inverter circuit INV2 between the positive electrode line and the negative electrode line, and effectively smoothes the power voltage, namely the difference between the potential B + and the potential B-;
3. the field effect transistors FET1, FET2, FET3, FET4, FET5 and FET6 are respectively PWM-controlled to provide the U1 phase current, the V1 phase current and the W1 phase current to the motor, and the field effect transistors FET7, FET8, FET9, FET10, FET11 and FET12 are respectively PWM-controlled to provide the U2 phase current, the V2 phase current and the W2 phase current to the motor, so that the common mode noise of a power port is effectively reduced, and the EMI characteristic of a controller and the stability of an electronic control unit are effectively improved;
4. the present invention is the electronic control unit according to the present embodiment, in which the conductor part CON electrically connects the common ends of the first capacitor C1 and the second capacitor C2 in a fastened state, and thus, a current caused by noise generated when the motor is driven can be made to flow to GND via the conductor part CON, and a reduction in common mode noise can be facilitated by the circuit board;
5. the present invention forms a loop smaller than a loop without the conductor part CON by forming the conductor part CON between the first capacitor C1 and the second capacitor C2, thereby allowing the common mode noise to be transferred from the substrate mounting unit to the conductor part CON, the first capacitor C1 and the second capacitor C2, the substrate positive connection part CN + and the substrate negative connection part CN —; since the common mode noise contains a large AC component, the first capacitor C1 and the second capacitor C2 having lower impedance than the vehicle body and the like flow in. Thus, according to the circuit board, the loop of the common mode noise can be reduced as compared with the case where the conductor part CON is not provided, and the common mode noise can be reduced;
6. according to the circuit board of the present invention, when the conductor part CON is provided on the board, the common mode noise can be reduced without adding a new process only by the process of screwing the circuit board and the board mounting unit.
Drawings
FIG. 1 is a circuit diagram of a common mode noise rejection circuit of the present invention;
fig. 2 is a top view of the conductor part CON in the circuit substrate according to the invention;
fig. 3 is a cross-sectional view of an internal structure of the conductor part CON in the circuit substrate according to the present invention;
FIG. 4 shows the cover unit side of the L1 layer of the present invention.
Detailed Description
The technical scheme of the invention is further explained in detail by combining the attached drawings:
the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, a common mode noise suppression circuit includes an electronic control unit, an inverter circuit, and a motor, the electronic control unit controlling the motor through the inverter circuit;
the inverter circuit comprises an inverter circuit INV1 and an inverter circuit INV2;
the inverter circuit INV1 includes a field effect transistor FET1, a field effect transistor FET2, a field effect transistor FET3, a field effect transistor FET4, a field effect transistor FET5, a field effect transistor FET6;
the inverter circuit INV2 includes a field effect transistor FET7, a field effect transistor FET8, a field effect transistor FET9, a field effect transistor FET10, a field effect transistor FET11, a field effect transistor FET12, and the inverter circuit INV2 is redundant to the inverter circuit INV 1;
the field effect transistors FET1, FET2, FET3, FET4, FET5, FET6, FET7, FET8, FET9, FET10, FET11, FET12 are connected between the positive line of potential B + connected to the positive connection part CN + of the substrate and the negative line of potential B-connected to the negative connection part CN-;
wherein the field effect capacitor C10 is connected in parallel with the inverter circuit INV1 and the inverter circuit INV2 between the positive electrode line and the negative electrode line;
the electrolytic capacitor C10 smoothes the difference between the power supply voltage, i.e., the potential B + and the potential B-;
the field effect transistor FET1 and the field effect transistor FET2 are connected in series between the positive line and the negative line;
the field effect transistor FET1 and the field effect transistor FET2 supply the U1-phase current to the U1-phase winding of the motor;
the shunt resistor R1 is connected in series with the field effect transistor FET1 and the field effect transistor FET2 between the field effect transistor FET2 and the negative pole line;
detecting a current flowing through the shunt resistor R1 by a current sensor for detecting a U1 phase current;
the field effect transistor FET3 and the field effect transistor FET4 are connected in series between the positive line and the negative line;
the field effect transistor FET3 and the field effect transistor FET4 supply the V-phase current to the V1-phase winding of the motor;
the shunt resistor R2 is connected in series with the field effect transistor FET3 and the field effect transistor FET4 between the field effect transistor FET4 and the negative pole line;
detecting a current flowing through the shunt resistor R2 by a current sensor for detecting a V-phase current;
the field effect transistor FET5 and the field effect transistor FET6 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET5 and FET6 supply the W-phase current to the W1-phase winding of the motor;
the shunt resistor R3 is connected in series with the field effect transistor FET5 and the field effect transistor FET6 between the field effect transistor FET6 and the negative electrode line;
detecting a current flowing through the shunt resistor R3 by a current sensor for detecting the W1 phase current;
the field effect transistor FET7 and the field effect transistor FET8 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET7 and FET8 supply the U2-phase current to the U2-phase winding of the motor;
the shunt resistor R4 is connected in series with the field effect transistor FET7 and the field effect transistor FET8 between the field effect transistor FET8 and the negative pole line;
detecting a current flowing through the shunt resistor R4 by a current sensor for detecting the U2 phase current;
the field effect transistor FET9 and the field effect transistor FET10 are connected in series between the positive line and the negative line;
the field effect transistors FET9 and FET10 supply the V2 phase current to the V2 phase winding of the motor;
the shunt resistor R5 is connected in series with the field effect transistor FET9 and the field effect transistor FET10 between the field effect transistor FET10 and the negative electrode line;
detecting a current flowing through the shunt resistor R5 by a current sensor for detecting a V2 phase current;
the field effect transistor FET11 and the field effect transistor FET12 are connected in series between the positive line and the negative line;
the field effect transistor FET11 and the field effect transistor FET12 supply the W2-phase current to the W2-phase winding of the motor;
the shunt resistor R6 is connected in series with the field effect transistor FET11 and the field effect transistor FET12 between the field effect transistor FET12 and the negative electrode line;
detecting a current flowing through the shunt resistor R6 by a current sensor for detecting the W2 phase current;
the field effect transistors FET1, FET2, FET3, FET4, FET5, and FET6 are PWM-controlled to supply the U1 phase current, the V1 phase current, and the W1 phase current to the motor, respectively;
the field effect transistors FET7, FET8, FET9, FET10, FET11, and FET12 are PWM-controlled to supply the U2 phase current, V2 phase current, and W2 phase current to the motor.
The electronic control unit comprises a normal filter NF and a common mode filter CF;
wherein the normal state filter NF is provided at a front stage of the field effect transistor FET10 and the field effect transistor FET 11;
the normal state filter NF includes a coil CL1 and a capacitor C11;
the coil CL1 is connected between the FET10 and the substrate positive connection CN +;
a capacitor C11 is connected in parallel with the electric field capacitor C10 between the positive electrode line and the negative electrode line;
the normal state filter NF can reduce normal state noise superimposed on the positive electrode line.
The common mode filter CF is positioned at the front stage of the normal mode filter, and a first capacitor C1 and a second capacitor C2 of the common mode filter CF are connected with an electrolytic capacitor C10 in parallel; the first capacitor C1 and the second capacitor C2 are connected in series between the positive line and the negative line;
the common mode filter CF is connected between the positive connecting part CN + of the substrate and the negative connecting part CN-, and one end of the first capacitor C1 is connected with the positive connecting part CN + of the substrate through a positive wire; one end of the second capacitor C2 is connected to the substrate negative connection portion CN-via a negative line; the other end of the first capacitor C1 and the other end of the second capacitor C2 are connected to the conductor portion CON.
The conductor part CON is a material through which current caused by common mode noise can flow, and the conductor part CON is a conductive metal screw; the conductor part is formed on the surface of the substrate and is connected with the shell CASE, and the conductor part CON is in a fastening state; the conductor part CON is electrically connected to the other end of the first capacitor C1 and to the other end of the second capacitor C2; in the conductor part CON, a current may flow between the first and second capacitors C1 and C2, and a current may flow between the first and second capacitors C1 and C2 and the CASE.
Fig. 2 is a plan view illustrating the conductor part CON in the circuit substrate 200. Fig. 3 is a cross-sectional view of the internal structure of the conductor part CON in the circuit substrate 200.
As shown in fig. 3, the circuit substrate 200 is formed in a six-layer structure. That is, the circuit board 200 includes, for example, an L1 layer 200A, an L2 layer 200B, an L3 layer 200C, an L4 layer 200D, an L5 layer 200E, and an L6 layer 200F. The L6 layer 200F, the L5 layer 200E, the L4 layer 200D, the L3 layer 200C, the L2 layer 200B, and the L1 layer 200A are laminated in this order from the substrate mounting unit 300 side. The L1 layer 200A is disposed on the cover unit 100 side. The L6 layer 200 is disposed on the substrate mounting unit 300 side.
As shown in fig. 4, a first capacitor C1 and a second capacitor C2 are formed on a surface of the L1 layer 200A on the cover unit 100 side (hereinafter referred to as a 1 st surface 200A). One end of the first capacitor C1 is connected to one end of the second capacitor and is connected to the local conductive network of the L2 to L6 layers through conductive vias in the substrate. The other end of the first capacitor C1 is electrically connected to the positive terminal T +, and the other end of the second capacitor C2 is electrically connected to the negative single T-. The first capacitor C1 is electrically connected to the conductor pattern 220 a. The local conductive network of the L6 layer is mounted with conductor sections CON.
As described above, in the electronic control unit 32 of the present embodiment, the conductor part CON electrically connects the common ends of the first capacitor C1 and the second capacitor C2 in a fastened state, and thus, a current caused by noise generated when the motor is driven can be caused to flow to GND via the conductor part CON. As a result, the circuit board 200 can contribute to reduction of common mode noise.
The common mode noise is alternating current (current containing a large amount of AC component) generated due to variation in voltage applied to the coil of the motor 33; the common mode noise is transmitted to the board mounting unit 300 via the parasitic capacitance of the coil of the motor 33, and is transmitted from the board mounting unit 300 to the negative terminal T-of the battery 51 via the GND conductor such as the vehicle body. This causes the potential (GND potential) at the negative terminal T-to fluctuate. If there is no conductor part CON, the common mode noise is transmitted to the substrate negative connection part CN "through the substrate mounting unit 300, the vehicle body, and the negative terminal T", forming a large loop.
In contrast, by forming the conductor part CON between the first capacitor C1 and the second capacitor C2 as in the present embodiment, even if the common mode noise is transmitted to the substrate mounting unit 300, it is transmitted from the substrate mounting unit 300 to the conductor part CON, the first capacitor C1 and the second capacitor C2, the substrate positive connection part CN + and the substrate negative connection part CN —, thereby forming a ring smaller than that when there is no conductor part CON. Further, since the common mode noise contains a large amount of AC components, the first capacitor C1 and the second capacitor C2 having lower impedance than the vehicle body and the like flow in. Thus, according to the circuit board 200, the loop of the common mode noise can be reduced as compared with the case where the conductor part CON is not provided, and the common mode noise can be reduced.
In addition, according to the circuit board 200, when the conductor part CON is provided on the board, the common mode noise can be reduced without adding a new process only by the process of screwing the circuit board 200 and the board mounting unit 300.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The above embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the protection scope of the present invention. While the embodiments of the present invention have been described in detail, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.
Claims (10)
1. A common mode noise rejection circuit, characterized by: the motor control system comprises an electronic control unit, an inverter circuit and a motor, wherein the electronic control unit controls the motor through the inverter circuit;
the inverter circuit comprises an inverter circuit INV1 and an inverter circuit INV2;
the inverter circuit INV1 includes a field effect transistor FET1, a field effect transistor FET2, a field effect transistor FET3, a field effect transistor FET4, a field effect transistor FET5, a field effect transistor FET6;
the inverter circuit INV2 includes a field effect transistor FET7, a field effect transistor FET8, a field effect transistor FET9, a field effect transistor FET10, a field effect transistor FET11, a field effect transistor FET12, and the inverter circuit INV2 is redundant to the inverter circuit INV 1;
the field effect transistors FET1, FET2, FET3, FET4, FET5, FET6, FET7, FET8, FET9, FET10, FET11, FET12 are connected between a positive electrode line of potential B + connected to the positive connection part CN + of the substrate and a negative electrode line of potential B-connected to the negative connection part CN-,
the field effect transistor FET1 and the field effect transistor FET2 are connected in series between the positive line and the negative line;
the field effect transistors FET1 and FET2 supply the U1-phase current to the U1-phase winding of the motor;
the shunt resistor R1 is connected in series with the field effect transistor FET1 and the field effect transistor FET2 between the field effect transistor FET2 and the negative pole line;
detecting a current flowing through the shunt resistor R1 by a current sensor for detecting a U1 phase current;
the field effect transistor FET3 and the field effect transistor FET4 are connected in series between the positive electrode line and the negative electrode line;
the field effect transistors FET3 and FET4 supply the V-phase current to the V1-phase winding of the motor;
the shunt resistor R2 is connected in series with the field effect transistor FET3 and the field effect transistor FET4 between the field effect transistor FET4 and the negative pole line;
detecting a current flowing through the shunt resistor R2 by a current sensor for detecting a V-phase current;
the field effect transistor FET5 and the field effect transistor FET6 are connected in series between the positive line and the negative line;
the field effect transistors FET5 and FET6 supply the W-phase current to the W1-phase winding of the motor;
the shunt resistor R3 is connected in series with the field effect transistor FET5 and the field effect transistor FET6 between the field effect transistor FET6 and the negative electrode line;
detecting a current flowing through the shunt resistor R3 by a current sensor for detecting the W1 phase current;
the field effect transistor FET7 and the field effect transistor FET8 are connected in series between the positive line and the negative line;
the field effect transistors FET7 and FET8 supply the U2-phase current to the U2-phase winding of the motor;
the shunt resistor R4 is connected in series with the field effect transistor FET7 and the field effect transistor FET8 between the field effect transistor FET8 and the negative pole line;
detecting a current flowing through the shunt resistor R4 by a current sensor for detecting a U2 phase current;
the field effect transistor FET9 and the field effect transistor FET10 are connected in series between the positive line and the negative line;
the field effect transistors FET9 and FET10 supply the V2 phase current to the V2 phase winding of the motor;
the shunt resistor R5 is connected in series with the field effect transistor FET9 and the field effect transistor FET10 between the field effect transistor FET10 and the negative electrode line;
detecting a current flowing through the shunt resistor R5 by a current sensor for detecting a V2 phase current;
the field effect transistor FET11 and the field effect transistor FET12 are connected in series between the positive line and the negative line;
the field effect transistor FET11 and the field effect transistor FET12 supply the W2 phase current to the W2 phase winding of the motor;
the shunt resistor R6 is connected in series with the field effect transistor FET11 and the field effect transistor FET12 between the field effect transistor FET12 and the negative electrode line;
the current flowing through the shunt resistor R6 is detected by a current sensor for detecting the W2 phase current.
2. A common-mode noise rejection circuit according to claim 1, wherein: the field effect capacitor C10 is connected in parallel to the inverter circuit INV1 and the inverter circuit INV2 between the positive electrode line and the negative electrode line.
3. A common mode noise rejection circuit according to claim 2, wherein: the electrolytic capacitor C10 smoothes the difference between the power supply voltage, i.e., the potential B + and the potential B-.
4. A common mode noise rejection circuit according to claim 1, wherein: the field effect transistors FET1, FET2, FET3, FET4, FET5, and FET6 are PWM-controlled to supply the U1 phase current, V1 phase current, and W1 phase current to the motor, respectively.
5. A common mode noise rejection circuit according to claim 1, wherein: the field effect transistors FET7, FET8, FET9, FET10, FET11, and FET12 are PWM-controlled to supply the U2 phase current, V2 phase current, and W2 phase current to the motor.
6. A common mode noise rejection circuit according to claim 1, wherein: the electronic control unit comprises a normal filter NF and a common mode filter CF;
wherein the normal state filter NF is provided at a front stage of the field effect transistor FET10 and the field effect transistor FET 11;
the normal state filter NF includes a coil CL1 and a capacitor C11;
the coil CL1 is connected between the FET10 and the substrate positive connection CN +;
a capacitor C11 is connected in parallel with the electric field capacitor C10 between the positive electrode line and the negative electrode line;
the normal state filter NF can reduce normal state noise superimposed on the positive electrode line.
7. A common mode noise rejection circuit according to claim 1, wherein: the common mode filter CF is positioned at the front stage of the normal mode filter, and a first capacitor C1 and a second capacitor C2 of the common mode filter CF are connected with an electrolytic capacitor C10 in parallel; the first capacitor C1 and the second capacitor C2 are connected in series between the positive line and the negative line;
the common mode filter CF is connected between the positive connecting part CN + of the substrate and the negative connecting part CN-, and one end of the first capacitor C1 is connected with the positive connecting part CN + of the substrate through a positive wire; one end of the second capacitor C2 is connected to the substrate negative connection portion CN-via a negative line; the other end of the first capacitor C1 and the other end of the second capacitor C2 are connected to the conductor portion CON.
8. A common mode noise rejection circuit according to claim 7, wherein: the conductor part CON is a material through which current caused by common mode noise can flow, and the conductor part CON is a conductive metal screw; the conductor part is formed on the surface of the substrate and connected with the shell CASE, and the conductor part CON is in a fastening state; the conductor part CON is electrically connected to the other end of the first capacitor C1 and to the other end of the second capacitor C2; in the conductor part CON, a current may flow between the first and second capacitors C1 and C2, and a current may flow between the first and second capacitors C1 and C2 and the CASE.
9. A circuit substrate based on the common mode noise suppression circuit according to any one of claims 1 to 8, wherein: the circuit board comprises a circuit substrate (200), wherein the circuit substrate (200) is of a six-layer structure and comprises an L1 layer (200A), an L2 layer (200B), an L3 layer (200C), an L4 layer (200D), an L5 layer (200E) and an L6 layer (200F);
from the substrate mounting unit (300) side, the layers are laminated in the order of the L6 layer (200F), the L5 layer (200E), the L4 layer (200D), the L3 layer (200C), the L2 layer (200B), and the L1 layer (200A); the L1 layer (200A) is arranged on the cover unit (100) side; the L6 layer (200) is disposed on the substrate mounting unit (300) side.
10. A circuit substrate according to claim 9, wherein: a first capacitor C1 and a second capacitor C2 are formed on the surface of the L1 layer (200A) on the side of the cover unit (100); one end of the first capacitor C1 is connected to one end of the second capacitor and is connected to the local conductive network of the L2 to L6 layers through a conductive via in the substrate; the other end of the first capacitor C1 is electrically connected with the positive terminal T +, and the other end of the second capacitor C2 is electrically connected with the negative single-chip T-; the first capacitor C1 is electrically connected to the conductor pattern (220 a), and the partial conductive network of the L6 layer is mounted with the conductor part CON.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211444875.1A CN115733394A (en) | 2022-11-18 | 2022-11-18 | Common mode noise suppression circuit and circuit substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211444875.1A CN115733394A (en) | 2022-11-18 | 2022-11-18 | Common mode noise suppression circuit and circuit substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115733394A true CN115733394A (en) | 2023-03-03 |
Family
ID=85296468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211444875.1A Pending CN115733394A (en) | 2022-11-18 | 2022-11-18 | Common mode noise suppression circuit and circuit substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115733394A (en) |
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2022
- 2022-11-18 CN CN202211444875.1A patent/CN115733394A/en active Pending
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