CN115731896B - Control method of driving circuit, driving circuit and display device - Google Patents
Control method of driving circuit, driving circuit and display device Download PDFInfo
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Abstract
The application provides a control method of a driving circuit, the driving circuit and a display device. The control method of the driving circuit comprises the following steps: when the display panel starts to be electrified, outputting a first public voltage to the color film substrate through the power module and outputting a second public voltage to the array substrate through the power module; the difference value between the second public voltage and the first public voltage is smaller than a preset voltage threshold value, so that the display panel does not emit light before entering a normal display stage; when the display panel enters a normal display stage, outputting a third common voltage to the array substrate through the power module, and keeping outputting the first common voltage to the color film substrate; wherein the third common voltage is higher than the second common voltage and the first common voltage. Because the difference value between the first public voltage and the second public voltage is smaller than a preset voltage threshold value, the display panel is not driven to emit light before entering a normal display stage, and therefore the problem of power-on screen flashing can be solved.
Description
Technical Field
The present application relates to the field of display panels, and in particular, to a driving circuit control method, a driving circuit, and a display device.
Background
With the continuous development of display technology, consumers have increasingly higher demands on liquid crystal displays (Liquid Crystal Display, LCDs), which have not only higher resolution, color gamut, brightness, and other display effects, but also High refresh rate, freeync (adaptive frequency conversion), HDR (High-Dynamic Range image), and other functions.
In order to meet the requirements of customers for flicker degree of game display and optimizing stability of Freesync function screen, the existing display generally pulls up the common electrode voltage Acom on the Array substrate (Array substrate) side, that is, makes the common electrode voltage higher than the common electrode voltage CFcom on the color film substrate (Colorfilm substrate, CF) side. However, when the display is subjected to incoming material warehouse-in detection or mass production verification experiments, the problem of screen flash during starting up is easy to occur.
Disclosure of Invention
Accordingly, the present application is directed to a driving circuit control method, a driving circuit and a display device, and aims to solve the problem that the conventional lcd is easy to generate a screen flash when turned on.
The application provides a control method of a driving circuit, which is used for driving a display panel to display, wherein the display panel comprises an array substrate and a color film substrate, the driving circuit comprises a power module, and the power module is respectively and electrically connected with the array substrate and the color film substrate. The control method of the driving circuit comprises the following steps: when the display panel starts to be electrified, outputting a first public voltage to the color film substrate through the power module and outputting a second public voltage to the array substrate through the power module; the difference value between the second public voltage and the first public voltage is smaller than a preset voltage threshold value, so that the display panel does not emit light before entering a normal display stage; when the display panel enters a normal display stage, outputting a third common voltage to the array substrate through the power module, and keeping outputting the first common voltage to the color film substrate; wherein the third common voltage is higher than the second common voltage and the first common voltage.
According to the control method of the driving circuit, the power supply module outputs the first public voltage to the color film substrate and outputs the second public voltage to the array substrate when the display panel starts to be electrified, and outputs the third public voltage to the array substrate when the display panel enters a normal display stage, and the difference value between the first public voltage and the second public voltage is smaller than the preset voltage threshold value, so that the display panel is not driven to emit light before entering the normal display stage, and the problem of starting up a flash screen can be solved.
Optionally, the driving circuit further includes a timing control module electrically connected to the display panel, and the control method of the driving circuit further includes: when the display panel enters a normal display stage, a time sequence signal is output through the time sequence control module so as to scan the display panel. The time when the power supply module outputs the third common voltage to the array substrate is the rising edge time of the first time sequence signal output by the time sequence control module.
Optionally, the driving circuit further includes a voltage output control module electrically connected between the power module and the array substrate. The outputting, by the power module, the second common voltage to the array substrate includes: and the voltage output control module enables the power supply module to output a second common voltage to the array substrate. The outputting, by the power module, the third common voltage to the array substrate includes: and the voltage output control module enables the power supply module to output a third common voltage to the array substrate.
Optionally, the voltage output control module is further electrically connected with the timing control module. The enabling, by the voltage output control module, the power supply module to output a second common voltage to the array substrate includes: and outputting a first control signal to the voltage output control module by the time sequence control module when the display panel starts to be powered on so as to control the voltage output control module to output the second common voltage to the array substrate. The enabling, by the voltage output control module, the power supply module to output a third common voltage to the array substrate includes: and outputting a second control signal to the voltage output control module at the rising edge moment of outputting the first time sequence signal through the time sequence control module so as to control the voltage output control module to output the third common voltage to the array substrate.
Optionally, the power module includes a first output terminal for outputting the first common voltage, a second output terminal for outputting the second common voltage, and a third output terminal for outputting the third common voltage. The first output end of the power module is electrically connected with the color film substrate. The voltage output control module comprises a first switching tube electrically connected between a second output end of the power module and the array substrate, and a second switching tube electrically connected between a third output end of the power module and the array substrate, wherein a control end of the first switching tube and a control end of the second switching tube are electrically connected to the time sequence control module. The outputting, by the timing control module, a first control signal to the voltage output control module when the display panel starts to be powered on, so as to control the voltage output control module to output the second common voltage to the array substrate, including: and outputting the first control signal to the first switching tube and the second switching tube of the voltage output control module by the time sequence control module when the display panel starts to be electrified, so that the first switching tube is turned on in response to the first control signal, and the second switching tube is turned off in response to the first control signal, so that the second common voltage output by the second output end is output to the array substrate. The outputting, by the timing control module, a second control signal to the voltage output control module at a rising edge time of outputting the first timing signal, so as to control the voltage output control module to output the third common voltage to the array substrate, including: and outputting a second control signal to the first switching tube and the second switching tube of the voltage output control module at the rising edge moment of outputting a first time sequence signal through the time sequence control module, so that the first switching tube is disconnected in response to the second control signal, and the second switching tube is conducted in response to the second control signal, and therefore a third common voltage output by a third output end of the power supply module is output to the array substrate.
Optionally, the power module includes a first output terminal for outputting the first common voltage and a third output terminal for outputting the third common voltage; the first output end of the power module is electrically connected with the color film substrate. The voltage output control module comprises a first resistor, a second resistor and a third switching tube. The first end of the first resistor is electrically connected with the third output end of the power module, the second end of the first resistor is electrically connected with the array substrate, the second resistor and the third switching tube are connected in series between the second end of the first resistor and the grounding end, and the control end of the third switching tube is electrically connected with the time sequence control module. The outputting, by the timing control module, a first control signal to the voltage output control module when the display panel starts to be powered on, so as to control the voltage output control module to output the second common voltage to the array substrate, including: and outputting the first control signal to the third switching tube of the voltage output control module when the display panel starts to be electrified through the time sequence control module, so that the third switching tube is conducted in response to the first control signal, and the first resistor and the second resistor divide the third common voltage output by the third output end of the power supply module, so that the second common voltage is obtained and output to the array substrate. The outputting, by the timing control module, a second control signal to the voltage output control module at a rising edge time of outputting the first timing signal, so as to control the voltage output control module to output the third common voltage to the array substrate, including: and outputting a second control signal to the third switching tube of the voltage output control module at the rising edge moment of outputting a first time sequence signal through the time sequence control module, so that the third switching tube is opened in response to the second control signal, and the voltage output control module outputs a third common voltage output by a third output end of the power supply module to the array substrate.
Optionally, the second common voltage is equal to the first common voltage.
The application also provides a control method of the driving circuit, wherein the driving circuit is used for driving the display panel to display, the display panel comprises an array substrate and a color film substrate, and the driving circuit comprises a power supply module, a time sequence control module, a grid driver and a source driver. The control method of the driving circuit comprises the following steps: when the display panel starts to be powered on, a first public voltage is output to the color film substrate through the power supply module, a third public voltage is output to the array substrate, a time sequence signal is output through the time sequence control module to control the grid driver to scan the display panel, and the time sequence control module controls the source driver to write black insertion data into the display panel, so that the display panel displays black pictures before entering a normal display stage after being powered on. Wherein the third common voltage is higher than the first common voltage.
According to the control method of the driving circuit, when the display panel starts to be electrified, the display panel is scanned, and the driving transistors in the display panel are turned on row by row, so that black inserting data are written into the pixel electrodes of all rows of sub-pixel units, and the display panel always displays black pictures in the initialization stage, and therefore the problem that the existing liquid crystal display panel is easy to turn on and flash is solved.
Optionally, the control method of the driving circuit further includes: after the display panel is powered on, the time sequence control module pauses outputting the time sequence signal; and when the display panel enters a normal display stage, the power supply module keeps outputting a first public voltage to the color film substrate and outputting a third public voltage to the array substrate, the time sequence control module outputs the time sequence signal again to control the grid driver to scan the display panel, and the time sequence control module controls the source driver to output image data to the display panel, so that the display panel is driven to display images normally.
The application further provides a driving circuit, which is used for driving the display panel to display, wherein the display panel comprises an array substrate and a color film substrate, the driving circuit comprises a power module, the power module is respectively and electrically connected with the array substrate and the color film substrate, and the power module is used for outputting a first public voltage to the color film substrate and outputting a second public voltage to the array substrate when the display panel starts to be electrified. The power supply module is further used for outputting a third common voltage to the array substrate when the display panel enters a normal display stage, and keeping outputting the first common voltage to the color film substrate. The difference between the second common voltage and the first common voltage is smaller than a preset voltage threshold value, so that the display panel does not emit light before entering a normal display stage, and the third common voltage is higher than the second common voltage and the first common voltage.
Optionally, the driving circuit further includes a timing control module electrically connected to the display panel, where the timing control module is configured to output a timing signal to scan the display panel when the display panel enters a normal display stage. The time when the power supply module outputs the third common voltage to the array substrate is the rising edge time of the first time sequence signal output by the time sequence control module.
Optionally, the driving circuit further includes a voltage output control module electrically connected between the power module and the array substrate, where the voltage output control module is configured to enable the power module to output the second common voltage or the third common voltage to the array substrate.
Optionally, the voltage output control module is further electrically connected with the timing control module. The time sequence control module is used for outputting a first control signal to the voltage output control module when the display panel starts to be powered on so as to control the voltage output control module to output the second common voltage to the array substrate. The time sequence control module is also used for outputting a time sequence signal when the display panel enters a normal display stage, and outputting a second control signal to the voltage output control module at the rising edge moment of outputting a first time sequence signal so as to control the voltage output control module to output the third common voltage to the array substrate.
Optionally, the power module includes a first output terminal for outputting the first common voltage, a second output terminal for outputting the second common voltage, and a third output terminal for outputting the third common voltage. The first output end of the power module is electrically connected with the color film substrate. The voltage output control module comprises a first switching tube electrically connected between a second output end of the power module and the array substrate, and a second switching tube electrically connected between a third output end of the power module and the array substrate, wherein a control end of the first switching tube and a control end of the second switching tube are electrically connected to the time sequence control module. The first switching tube is turned on in response to the first control signal, so that the second common voltage output by the second output end of the power supply module is output to the array substrate, and the first switching tube is turned off in response to the second control signal. The second switching tube is turned on in response to the second control signal, so that a third common voltage output by a third output end of the power supply module is output to the array substrate, and the second switching tube is turned off in response to the first control signal.
Optionally, the power module includes a first output terminal for outputting the first common voltage and a third output terminal for outputting the third common voltage. The first output end of the power module is electrically connected with the color film substrate. The voltage output control module comprises a first resistor, a second resistor and a third switching tube. The first end of the first resistor is electrically connected with the third output end of the power module, the second end of the first resistor is electrically connected with the array substrate, the second resistor and the third switching tube are connected in series between the second end of the first resistor and the grounding end, and the control end of the third switching tube is electrically connected with the time sequence control module. The third switching tube is conducted in response to the first control signal, so that the first resistor and the second resistor divide the third common voltage output by the third output end of the power module, and the second common voltage is obtained and output to the array substrate. The third switching tube is also opened in response to the second control signal, so that the voltage output control module outputs a third common voltage output by a third output end of the power supply module to the array substrate.
Optionally, the second common voltage is equal to the first common voltage.
The application also provides another driving circuit which is used for driving the display panel to display, wherein the display panel comprises an array substrate and a color film substrate, and the driving circuit comprises a power supply module, a time sequence control module, a grid driver and a source driver. The power supply module is used for outputting a first public voltage to the color film substrate and outputting a third public voltage to the array substrate when the display panel starts to be electrified. The timing control module is used for outputting a timing signal to control the grid driver to scan the display panel when the display panel starts to be powered on, and controlling the source driver to write black insertion data into the display panel when the display panel starts to be powered on, so that the display panel displays a black picture before entering a normal display stage after being powered on. Wherein the third common voltage is higher than the first common voltage.
The application also provides a display device which comprises a display panel and the driving circuit, wherein the driving circuit is electrically connected with the display panel and is used for driving the display panel to display.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
Fig. 1 is a schematic structural diagram of a first display device according to an embodiment of the present application.
Fig. 2 is a schematic circuit structure of a pixel unit according to an embodiment of the present application.
Fig. 3 is a schematic cross-sectional structure of a pixel unit according to an embodiment of the application.
Fig. 4 is a driving timing chart of a conventional display device.
Fig. 5 is a driving timing chart of the display device shown in fig. 1.
Fig. 6 is a flowchart of a control method of a first driving circuit according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of a second display device according to an embodiment of the present application.
Fig. 8 is a driving timing chart of the display device shown in fig. 7.
Fig. 9 is a schematic structural diagram of a third display device according to an embodiment of the present application.
Fig. 10 is a flowchart of a control method of a second driving circuit according to an embodiment of the present application.
Description of main reference numerals:
display device 1, 1'
Drive circuits 2, 2'
Display panel 3
Sub-pixel unit 100
Color film substrate 10
Array substrate 20
Liquid crystal layer 30
Liquid crystal molecules 301
First common electrode 101
Second common electrode 202
Pixel electrode 201
Gate driver 110
Source driver 120
Power supply module 130
Timing control module 140
Level shift module 150
Voltage output control module 160, 160'
First switching tube M1
Second switching tube M2
Third switch tube M3
First resistor R1
Second resistor R2
Scanning line 111
Data line 121
First common voltage line 1011
Second common voltage line 1021
Driving transistor TFT
Liquid crystal capacitor Clc
Storage capacitor Cst
Steps 610-630, 710-720
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be noted that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Referring to fig. 1 to 3 together, fig. 1 is a schematic structural diagram of a first display device according to an embodiment of the application. The display device 1 includes a drive circuit 2 and a display panel 3, the drive circuit 2 being configured to drive the display panel 3 to display. The display panel 3 includes a color film substrate 10, an array substrate 20, and a liquid crystal layer 30 interposed between the color film substrate 10 and the array substrate 20. A plurality of sub-pixel units 100 arranged in an array are defined in the display area of the display panel 3. The driving circuit 2 includes a gate driver 110, a source driver 120, a power supply module 130, a timing control module 140, and a level conversion module 150.
The power module 130 is configured to provide a power voltage to each functional module, for example, a first common voltage V1 is provided to the first common electrode 101 of the display panel 3 (i.e., the common electrode of the color film substrate 10) through a first common voltage line 1011, a third common voltage V3 is provided to the second common electrode 202 of the display panel 3 (i.e., the common electrode of the array substrate 20) through a second common voltage line 1021, and a high level VGH and a low level VGL are provided to the level conversion module 150.
The timing control module 140 is electrically connected to the level shift module 150 and the source driver 120, and the timing control module 140 is configured to provide a timing signal CK to the level shift module 150 and a data control signal Souce to the source driver 120.
The level conversion module 150 generates a GOA timing control signal goa_ck based on the received timing signal CK, the high level VGH, and the low level VGL, and outputs the GOA timing control signal goa_ck to the gate driver 110.
The gate driver 110 is electrically connected to each row of the sub-pixel units 100 through a plurality of scan lines 111, and the gate driver 110 generates a corresponding scan signal for each row of the sub-pixel units 100 based on the received GOA timing control signal goa_ck, so as to scan the display panel 3 row by row.
The Source driver 120 is electrically connected to each column of the sub-pixel units 100 through a plurality of data lines 121, and the Source driver 120 generates a corresponding data signal Vdata for each column of the sub-pixel units 100 based on the received data control signal Source.
Further, as shown in fig. 2, each of the sub-pixel units 100 includes a pixel electrode 201, a driving transistor TFT, a storage capacitor Cst, and a liquid crystal capacitor Clc, wherein a control terminal of the driving transistor TFT is electrically connected to a scanning line 111 of a row where the driving transistor TFT is located, a first terminal of the driving transistor TFT is electrically connected to a data line 121 of a column where the driving transistor TFT is located, and a second terminal of the driving transistor TFT, a first terminal of the storage capacitor Cst, and a first terminal of the liquid crystal capacitor Clc are all electrically connected to the pixel electrode 201. The second end of the storage capacitor Cst is electrically connected to the second common electrode 202, and the second end of the liquid crystal capacitor Clc is electrically connected to the first common electrode 101.
The driving transistor TFT is turned on or off by a scanning signal of a row in which it is controlled. Taking the driving transistor TFT as an NMOS transistor as an example, when the scan signal is at a high level, the driving transistor TFT of the corresponding row is controlled to be turned on, so that the data line 121 can transmit the data signal Vdata to the pixel electrode 201 through the turned-on driving transistor TFT. As shown in fig. 3, when displaying an image, the first common electrode 101 receives the first common voltage V1, and the pixel electrode 201 receives the data signal Vdata, so as to establish an electric field in the liquid crystal layer 30 of the sub-pixel unit 100, thereby controlling the liquid crystal molecules 301 therein to be biased to emit light from the sub-pixel unit 100.
Referring to fig. 4, the display device 1 sequentially operates in an initialization phase T1 and a normal display phase T2 after being powered on. Wherein ACOM represents the voltage of the common electrode of the array substrate 20 (i.e., the second common electrode 202), and CFCOM represents the voltage of the common electrode of the color film substrate 10 (i.e., the first common electrode 101).
To meet customer requirements for flicker level of a game display and optimizing stability of a Freesync function screen, existing displays typically pull the third common voltage V3 high, i.e., such that the voltage of the second common electrode 202 is higher than the voltage of the first common electrode 101, e.g., v1=5.8v, v3=9.7v. Experiments show that the display is easy to generate the problem of screen flash when being started. The reason for causing the power-on splash screen is analyzed as follows: as shown in fig. 4, when the power is turned on, before the timing control module 140 outputs the timing signal CK (i.e., before the pixel electrode 201 receives the data signal Vdata), the voltage difference between the first common electrode 101 and the second common electrode 202 is too large, which causes the liquid crystal molecules 301 to deflect, so that the sub-pixel unit 100 emits light by mistake.
Referring to fig. 1 and fig. 5 together, in order to solve the problem that the conventional lcd is prone to generate power-on splash-screen, in the first display device 1 provided by the present application, the timing control module 140 outputs the timing signal CK to control the gate driver 110 to scan the display panel 3 when the display panel 3 starts to power up, and controls the source driver 120 to write black inserting (black inserting) data into the display panel 3 when the display panel 3 starts to power up, so that the display panel 3 displays a black picture before entering the normal display stage T2 after power up.
In the driving circuit 2 provided in this embodiment, when the display panel 3 starts to be powered on, the display panel 3 is scanned, so that the driving transistors TFT are turned on row by row, and black insertion data is written into the pixel electrodes 201 of the sub-pixel units 100 in each row, so that the display panel always displays a black picture in the initialization stage T1, and thus, the problem that the existing liquid crystal display panel is easy to turn on and flash is solved.
Referring to fig. 6, based on the same inventive concept as the first display device 1, the present application further provides a control method of a first driving circuit, including:
In step 610, when the display panel 3 starts to be powered on, the power module 130 outputs the first common voltage V1 to the color film substrate 10 and outputs the third common voltage V3 to the array substrate 20, and simultaneously, the timing control module 140 outputs the timing signal CK to control the gate driver 110 to scan the display panel 3, and the timing control module 140 controls the source driver 120 to write black insertion data to the display panel 3, so that the display panel 3 displays a black screen before entering the normal display stage T2 after being powered on. Wherein the third common voltage V3 is higher than the first common voltage V1.
Step 620, after the display panel 3 is powered on, the timing control module 140 pauses outputting the timing signal CK. In this way, the black insertion stage and the normal display stage T2 can be separated, preventing the display panel 3 from being affected to normally emit light in the normal display stage T2.
In step 630, when the display panel 3 enters the normal display stage T2, the power module 130 keeps outputting the first common voltage V1 to the color film substrate 10 and outputting the third common voltage V3 to the array substrate 20, the timing control module 140 re-outputs the timing signal CK to control the gate driver 110 to scan the display panel 3, and the timing control module 140 controls the source driver 120 to output image data to the display panel 3, so as to drive the display panel 3 to display images normally. As shown in fig. 5, the data control signal Source output from the timing control module 140 includes a black insertion control signal output in the initialization stage T1 and an image control signal output in the normal display stage T2.
Referring to fig. 7 to 8 together, in order to solve the problem that the conventional lcd is easy to generate a power-on screen, the embodiment of the application further provides a driving circuit 2', wherein the driving circuit 2' is used for driving the display panel 3 to display, the display panel 3 includes an array substrate 20 and a color film substrate 10, the driving circuit 2' includes a power module 130, and the power module 130 is electrically connected with the array substrate 20 and the color film substrate 10 respectively.
The power module 130 is configured to output a first common voltage V1 to the common electrode (i.e., the first common electrode 101) of the color film substrate 10 and output a second common voltage V2 to the common electrode (i.e., the second common electrode 202) of the array substrate 20 when the display panel 3 starts to be powered on. Wherein the difference between the second common voltage V2 and the first common voltage V1 is smaller than a preset voltage threshold value, so that the display panel 3 does not emit light before entering a normal display stage. When the difference between the voltage of the first common electrode 101 and the voltage of the second common electrode 202 is the preset voltage threshold, the gray scale of the sub-pixel unit 100 is not recognized by human eyes, and the preset voltage threshold may be obtained through experiments. For example v1=5.8v, the preset voltage threshold is 0.1V, v2=5.7v to 5.9V. Preferably, v1=v2, so that the gray level of the sub-pixel unit 100 is 0, i.e., black. In this way, in the initialization stage T1, the first common voltage V1 and the second common voltage V2 do not drive the display panel 3 to emit light, so that the problem of power-on screen flashing can be solved.
The power module 130 is further configured to output a third common voltage V3 to the array substrate 20 when the display panel 3 enters the normal display stage T2, and keep outputting the first common voltage V1 to the color film substrate 10. The third common voltage V3 is higher than the second common voltage V2 and the first common voltage V1, for example, v1=v2=5.8v, v3=9.7v. It can be appreciated that, after entering the normal display stage T2, the voltage of the second common electrode 202 is higher than the voltage of the first common electrode 101, so that the requirements of the client on the flicker degree of the game display and the stability of the Freesync function screen can be still satisfied.
Further, the driving circuit 2' further includes a timing control module 140 electrically connected to the display panel 3, and the timing control module 140 is configured to output a timing signal CK to scan the display panel 3 when the display panel 3 enters the normal display phase T2. The timing at which the power module 130 outputs the third common voltage V3 to the array substrate 20 is the rising edge timing of the first timing signal output by the timing control module 140. In this way, the third common voltage V3 can be output to the array substrate 20 in time at the moment of entering the normal display stage T2, so that the display effect can be improved.
Alternatively, as shown in fig. 7, the driving circuit 2' further includes a voltage output control module 160 electrically connected between the power module 130 and the array substrate 20, and the voltage output control module 160 is configured to enable the power module 130 to output the second common voltage V2 or the third common voltage V3 to the array substrate 20.
In an embodiment of the present application, the voltage output control module 160 is further electrically connected to the timing control module 140. The timing control module 140 is configured to output a first control signal S1 to the voltage output control module 160 when the display panel 3 starts to be powered on, so as to control the voltage output control module 160 to output the second common voltage V2 to the array substrate 20. The timing control module 140 is further configured to output a timing signal CK when the display panel 3 enters the normal display stage T2, and output a second control signal S2 to the voltage output control module 160 at a rising edge time of outputting the first timing signal, so as to control the voltage output control module 160 to output the third common voltage V3 to the array substrate 20. In other embodiments, the voltage output control module 160 may be integrated within the power module 130. It should be noted that, in other embodiments, other control modules may be provided to control the voltage output control module 160, that is, the control module is configured to output the first control signal S1 to the voltage output control module 160 when the display panel 3 starts to be powered up, and output the second control signal at the rising edge time when the timing control module 140 outputs the first timing signal.
Further, the power module 130 includes a first output terminal for outputting the first common voltage V1, a second output terminal for outputting the second common voltage V2, and a third output terminal for outputting the third common voltage V3. The first output end of the power module 130 is electrically connected to the color film substrate 10.
The voltage output control module 160 includes a first switching tube M1 electrically connected between the second output end of the power module 130 and the array substrate 20, and a second switching tube M2 electrically connected between the third output end of the power module 130 and the array substrate 20, where the control end of the first switching tube M1 and the control end of the second switching tube M2 are electrically connected to the timing control module 140. The first switching transistor M1 is turned on in response to the first control signal S1, and the second switching transistor M2 is turned off in response to the first control signal S1, thereby outputting the second common voltage V2 to the second common electrode 202 of the array substrate 20. The first switching transistor M1 is turned off in response to the second control signal S2, and the second switching transistor M2 is turned on in response to the second control signal S2, thereby outputting the third common voltage V3 to the second common electrode 202 of the array substrate 20. Illustratively, the first switching transistor M1 adopts a high-level conductive transistor, such as an NMOS transistor, and the second switching transistor M2 adopts a low-level conductive transistor, such as a PMOS transistor, or the first switching transistor M1 adopts a low-level conductive transistor and the second switching transistor M2 adopts a high-level conductive transistor.
Referring to fig. 9, the embodiment of the present application further provides a driving circuit 2", and the driving circuit 2" shown in fig. 9 is similar to the driving circuit 2' shown in fig. 7 in terms of circuit structure and operation principle, and is different in that: the circuit configuration of the voltage output control module 160' in the driving circuit 2″ shown in fig. 9 is different.
Specifically, the voltage output control module 160' includes a first resistor R1, a second resistor R2, and a third switching tube M3. The first end of the first resistor R1 is electrically connected to the third output end of the power module 130, the second end of the first resistor R1 is electrically connected to the array substrate 20, the second resistor R2 and the third switching tube M3 are connected in series between the second end of the first resistor R1 and the ground end, and the control end of the third switching tube M3 is electrically connected to the timing control module 140. Wherein R2/(r1+r2) =v2/V3.
The third switching tube M3 is turned on in response to the first control signal S1, so that the first resistor R1 and the second resistor R2 divide the third common voltage V3 output from the third output end of the power module to obtain the second common voltage V2, and output the second common voltage V2 to the second common electrode 202 of the array substrate 20. The third switching tube is further turned off in response to the second control signal S2, so that the voltage output control module 160 outputs the third common voltage V3 output from the third output terminal of the power module to the second common electrode 202 of the array substrate 20.
Referring to fig. 10, the embodiment of the present application further provides a second control method of a driving circuit, including:
in step 710, when the display panel 3 starts to be powered on, the first common voltage V1 is output to the color film substrate 10 through the power module 130, and the second common voltage V2 is output to the array substrate 20 through the power module 130.
Further, the step 710 further includes: when the display panel 3 enters a normal display stage T2, outputting a timing signal CK to scan the display panel 3 through the timing control module 140; the timing at which the power module 130 outputs the third common voltage V3 to the array substrate 20 is the rising edge timing of the first timing signal output by the timing control module 140.
In step 720, when the display panel 3 enters the normal display stage T2, the third common voltage V3 is output to the array substrate 20 through the power module 130, and the first common voltage V1 is kept output to the color film substrate 10.
In the embodiment of the present application, the driving circuit 2 further includes a voltage output control module 160 electrically connected between the power module 130 and the array substrate 20.
The step 710 specifically includes: the power supply module 130 outputs a second common voltage V2 to the array substrate 20 through the voltage output control module 160.
The step 720 specifically includes: the power supply module 130 outputs a third common voltage V3 to the array substrate 20 through the voltage output control module 160.
Further, the voltage output control module 160 is also electrically connected to the timing control module 140.
The step 710 specifically includes: the timing control module 140 outputs a first control signal S1 to the voltage output control module 160 when the display panel 3 starts to be powered on, so as to control the voltage output control module 160 to output the second common voltage V2 to the array substrate 20.
The step 720 specifically includes: the second control signal S2 is output to the voltage output control module 160 by the timing control module 140 at the rising edge time of the first timing signal to control the voltage output control module 160 to output the third common voltage V3 to the array substrate 20.
Further, the power module 130 includes a first output terminal for outputting the first common voltage V1, a second output terminal for outputting the second common voltage V2, and a third output terminal for outputting the third common voltage V3; the first output end of the power module 130 is electrically connected to the color film substrate 10.
Referring to fig. 7 together, in one embodiment, the voltage output control module 160 includes a first switching tube M1 electrically connected between the second output end of the power module 130 and the array substrate 20, and a second switching tube M2 electrically connected between the third output end of the power module 130 and the array substrate 20, wherein the control end of the first switching tube M1 and the control end of the second switching tube M2 are electrically connected to the timing control module 140.
The step 710 specifically includes: the first switching tube M1 and the second switching tube M2 of the voltage output control module 160 are output with the first control signal S1 by the timing control module 140 when the display panel 3 starts to be powered on, so that the first switching tube M1 is turned on in response to the first control signal S1, and the second switching tube M2 is turned off in response to the first control signal S1, so that the second common voltage V2 output by the second output terminal is output to the array substrate 20.
The step 720 specifically includes: the timing control module 140 outputs a second control signal S2 to the first switching tube M1 and the second switching tube M2 of the voltage output control module 160 at a rising edge time of a first timing signal, so that the first switching tube M1 is turned off in response to the second control signal S2, and the second switching tube M2 is turned on in response to the second control signal S2, thereby outputting a third common voltage V3 output from a third output terminal of the power module to the array substrate 20.
Referring to fig. 9 together, in another embodiment, the voltage output control module 160' includes a first resistor R1, a second resistor R2, and a third switching tube M3. The first end of the first resistor R1 is electrically connected to the third output end of the power module 130, the second end of the second resistor R2 is electrically connected to the array substrate 20, the second resistor R2 and the third switching tube M3 are connected in series between the second end of the first resistor R1 and the ground end, and the control end of the third switching tube M3 is electrically connected to the timing control module 140.
The step 710 specifically includes: the timing control module 140 outputs the first control signal S1 to the third switching tube of the voltage output control module 160 when the display panel 3 starts to be powered on, so that the third switching tube is turned on in response to the first control signal S1, and the first resistor and the second resistor divide the third common voltage V3 output from the third output terminal of the power module into the second common voltage V2 and output the second common voltage V2 to the array substrate 20.
The step 720 specifically includes: the timing control module 140 outputs a second control signal S2 to the third switching tube of the voltage output control module 160 at a rising edge time of outputting a first timing signal, so that the third switching tube is turned off in response to the second control signal S2, and the voltage output control module 160 outputs a third common voltage V3 output from a third output terminal of the power module to the array substrate 20.
According to the driving circuit 2' and the control method thereof provided by the embodiment, the power module 130 outputs the first public voltage V1 to the color film substrate 10 and outputs the second public voltage V2 to the array substrate 20 when the display panel 3 starts to be powered on, and outputs the third public voltage V3 to the array substrate 20 when the display panel 3 enters a normal display stage, and the difference between the first public voltage V1 and the second public voltage V2 is smaller than the preset voltage threshold value, so that the display panel 3 is not driven to emit light in the initialization stage, thereby solving the problem of power-on flash.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the application, the scope of which is defined by the claims and their equivalents.
Claims (18)
1. The control method of the driving circuit, the driving circuit is used for driving the display panel to display, the display panel includes the array base plate, color film base plate, the driving circuit includes the power module, the power module with the array base plate, the color film base plate is electric connection separately, characterized by, the color film base plate includes the first public electrode, the array base plate includes the second public electrode, the control method of the driving circuit includes:
When the display panel starts to be powered on, outputting a first public voltage to a first public electrode in the color film substrate through the power module and outputting a second public voltage to a second public electrode in the array substrate through the power module; the difference value between the second public voltage and the first public voltage is smaller than a preset voltage threshold value, so that the display panel does not emit light before entering a normal display stage; and
when the display panel enters a normal display stage, outputting a third common voltage to a second common electrode in the array substrate through the power supply module, and keeping outputting the first common voltage to a first common electrode in the color film substrate; wherein the third common voltage is higher than the second common voltage and the first common voltage.
2. The method of controlling a driving circuit according to claim 1, wherein the driving circuit further comprises a timing control module electrically connected to the display panel, the method of controlling a driving circuit further comprising:
when the display panel enters a normal display stage, outputting a time sequence signal through the time sequence control module so as to scan the display panel; the time when the power supply module outputs the third common voltage to the second common electrode in the array substrate is the rising edge time of the first time sequence signal output by the time sequence control module.
3. The method of controlling a driving circuit according to claim 2, wherein the driving circuit further comprises a voltage output control module electrically connected between the power supply module and the array substrate;
the outputting, by the power module, a second common voltage to a second common electrode in the array substrate, including:
the voltage output control module enables the power supply module to output a second common voltage to a second common electrode in the array substrate;
the outputting, by the power module, a third common voltage to a second common electrode in the array substrate, including:
and the voltage output control module enables the power supply module to output a third common voltage to the second common electrode in the array substrate.
4. The control method of the driving circuit according to claim 3, wherein the voltage output control module is further electrically connected to the timing control module;
the enabling, by the voltage output control module, the power supply module to output a second common voltage to a second common electrode in the array substrate includes:
outputting a first control signal to the voltage output control module by the time sequence control module when the display panel starts to be powered on so as to control the voltage output control module to output the second common voltage to a second common electrode in the array substrate;
The enabling the power module to output a third common voltage to a second common electrode in the array substrate through the voltage output control module includes:
and outputting a second control signal to the voltage output control module at the rising edge moment of outputting the first time sequence signal through the time sequence control module so as to control the voltage output control module to output the third common voltage to the second common electrode in the array substrate.
5. The control method of the driving circuit according to claim 4, wherein the power supply module includes a first output terminal for outputting the first common voltage, a second output terminal for outputting the second common voltage, and a third output terminal for outputting the third common voltage; the first output end of the power module is electrically connected with the color film substrate;
the voltage output control module comprises a first switching tube electrically connected between a second output end of the power supply module and the array substrate and a second switching tube electrically connected between a third output end of the power supply module and the array substrate, and a control end of the first switching tube and a control end of the second switching tube are electrically connected with the time sequence control module;
The outputting, by the timing control module, a first control signal to the voltage output control module when the display panel starts to be powered on, so as to control the voltage output control module to output the second common voltage to a second common electrode in the array substrate, including:
outputting the first control signal to the first switching tube and the second switching tube of the voltage output control module by the time sequence control module when the display panel starts to be powered on, so that the first switching tube is turned on in response to the first control signal, and the second switching tube is turned off in response to the first control signal, so that the second common voltage output by the second output end is output to the array substrate;
the outputting, by the timing control module, a second control signal to the voltage output control module at a rising edge time of outputting a first timing signal, so as to control the voltage output control module to output the third common voltage to a second common electrode in the array substrate, including:
and outputting a second control signal to the first switching tube and the second switching tube of the voltage output control module at the rising edge moment of outputting a first time sequence signal through the time sequence control module, so that the first switching tube is disconnected in response to the second control signal, and the second switching tube is conducted in response to the second control signal, and therefore a third common voltage output by a third output end of the power supply module is output to the array substrate.
6. The control method of the driving circuit according to claim 4, wherein the power supply module includes a first output terminal for outputting the first common voltage and a third output terminal for outputting the third common voltage; the first output end of the power module is electrically connected with the color film substrate;
the voltage output control module comprises a first resistor, a second resistor and a third switching tube; the first end of the first resistor is electrically connected with the third output end of the power supply module, the second end of the first resistor is electrically connected with the array substrate, the second resistor and the third switching tube are connected in series between the second end of the first resistor and the grounding end, and the control end of the third switching tube is electrically connected with the time sequence control module;
the outputting, by the timing control module, a first control signal to the voltage output control module when the display panel starts to be powered on, so as to control the voltage output control module to output the second common voltage to a second common electrode in the array substrate, including:
outputting the first control signal to the third switching tube of the voltage output control module by the time sequence control module when the display panel starts to be electrified, so that the third switching tube is conducted in response to the first control signal, and the first resistor and the second resistor divide the third common voltage output by the third output end of the power supply module to obtain the second common voltage and output the second common voltage to the array substrate;
The outputting, by the timing control module, a second control signal to the voltage output control module at a rising edge time of outputting a first timing signal, so as to control the voltage output control module to output the third common voltage to a second common electrode in the array substrate, including:
and outputting a second control signal to the third switching tube of the voltage output control module at the rising edge moment of outputting a first time sequence signal through the time sequence control module, so that the third switching tube is opened in response to the second control signal, and the voltage output control module outputs a third common voltage output by a third output end of the power supply module to the array substrate.
7. A control method of a driving circuit according to any one of claims 1 to 6, wherein the second common voltage is equal to the first common voltage.
8. The control method of the driving circuit is used for driving the display panel to display, the display panel comprises an array substrate and a color film substrate, the driving circuit comprises a power supply module, a time sequence control module, a grid driver and a source driver, and the control method of the driving circuit is characterized in that the color film substrate comprises a first common electrode, the array substrate comprises a second common electrode, and the control method of the driving circuit comprises the following steps:
When the display panel starts to be powered on, outputting a first public voltage to a first public electrode in the color film substrate and outputting a third public voltage to a second public electrode in the array substrate through the power supply module, outputting a time sequence signal through the time sequence control module to control the grid driver to scan the display panel, and controlling the source driver to write black insertion data into the display panel through the time sequence control module, so that the display panel displays a black picture before entering a normal display stage after being powered on; wherein the third common voltage is higher than the first common voltage.
9. The control method of a driving circuit according to claim 8, wherein the control method of a driving circuit further comprises:
after the display panel is powered on, the time sequence control module pauses outputting the time sequence signal; and
when the display panel enters a normal display stage, the power supply module keeps outputting a first public voltage to a first public electrode in the color film substrate and outputting a third public voltage to a second public electrode in the array substrate, the time sequence control module outputs the time sequence signal again to control the grid driver to scan the display panel, and the time sequence control module controls the source driver to output image data to the display panel, so that the display panel is driven to display images normally.
10. The driving circuit is used for driving a display panel to display, the display panel comprises an array substrate and a color film substrate, the driving circuit comprises a power module, the power module is electrically connected with the array substrate and the color film substrate respectively, and the driving circuit is characterized in that the color film substrate comprises a first public electrode, the array substrate comprises a second public electrode, and the power module is used for outputting a first public voltage to the first public electrode in the color film substrate and outputting a second public voltage to the second public electrode in the array substrate when the display panel starts to be electrified; the power supply module is further used for outputting a third common voltage to a second common electrode in the array substrate when the display panel enters a normal display stage, and keeping outputting the first common voltage to a first common electrode in the color film substrate; the difference between the second common voltage and the first common voltage is smaller than a preset voltage threshold value, so that the display panel does not emit light before entering a normal display stage, and the third common voltage is higher than the second common voltage and the first common voltage.
11. The drive circuit of claim 10, further comprising a timing control module electrically connected to the display panel, the timing control module for outputting a timing signal to scan the display panel when the display panel enters a normal display phase; the time when the power supply module outputs the third common voltage to the second common electrode in the array substrate is the rising edge time of the first time sequence signal output by the time sequence control module.
12. The drive circuit of claim 11, further comprising a voltage output control module electrically connected between the power supply module and the array substrate, the voltage output control module configured to cause the power supply module to output a second common voltage or the third common voltage to a second common electrode in the array substrate.
13. The drive circuit of claim 12, wherein the voltage output control module is further electrically connected to the timing control module;
the time sequence control module is used for outputting a first control signal to the voltage output control module when the display panel starts to be powered on so as to control the voltage output control module to output the second common voltage to a second common electrode in the array substrate;
The time sequence control module is also used for outputting a time sequence signal when the display panel enters a normal display stage, and outputting a second control signal to the voltage output control module at the rising edge moment of outputting a first time sequence signal so as to control the voltage output control module to output the third common voltage to the second common electrode in the array substrate.
14. The drive circuit of claim 13, wherein the power supply module includes a first output terminal for outputting the first common voltage, a second output terminal for outputting the second common voltage, and a third output terminal for outputting the third common voltage; the first output end of the power module is electrically connected with the color film substrate;
the voltage output control module comprises a first switching tube electrically connected between a second output end of the power supply module and the array substrate and a second switching tube electrically connected between a third output end of the power supply module and the array substrate, and a control end of the first switching tube and a control end of the second switching tube are electrically connected with the time sequence control module; the first switching tube is turned on in response to the first control signal, so that a second common voltage output by a second output end of the power supply module is output to the array substrate, and the first switching tube is turned off in response to the second control signal; the second switching tube is turned on in response to the second control signal, so that a third common voltage output by a third output end of the power supply module is output to the array substrate, and the second switching tube is turned off in response to the first control signal.
15. The drive circuit of claim 13, wherein the power supply module includes a first output terminal for outputting the first common voltage and a third output terminal for outputting the third common voltage; the first output end of the power module is electrically connected with the color film substrate;
the voltage output control module comprises a first resistor, a second resistor and a third switching tube; the first end of the first resistor is electrically connected with the third output end of the power supply module, the second end of the first resistor is electrically connected with the array substrate, the second resistor and the third switching tube are connected in series between the second end of the first resistor and the grounding end, and the control end of the third switching tube is electrically connected with the time sequence control module; the third switching tube is conducted in response to the first control signal, so that the first resistor and the second resistor divide a third common voltage output by a third output end of the power module, and the second common voltage is obtained and output to the array substrate; the third switching tube is also opened in response to the second control signal, so that the voltage output control module outputs a third common voltage output by a third output end of the power supply module to the array substrate.
16. A driving circuit according to any one of claims 10 to 15, wherein the second common voltage is equal to the first common voltage.
17. The driving circuit is used for driving a display panel to display, the display panel comprises an array substrate and a color film substrate, and the driving circuit comprises a power supply module, a time sequence control module, a grid driver and a source driver, and is characterized in that the color film substrate comprises a first public electrode, the array substrate comprises a second public electrode, and the power supply module is used for outputting a first public voltage to the first public electrode in the color film substrate and outputting a third public voltage to the second public electrode in the array substrate when the display panel starts to be powered on;
the timing control module is used for outputting a timing signal to control the grid driver to scan the display panel when the display panel starts to be powered on, and controlling the source driver to write black insertion data into the display panel when the display panel starts to be powered on, so that the display panel displays a black picture before entering a normal display stage after being powered on; wherein the third common voltage is higher than the first common voltage.
18. A display device, comprising:
a display panel; and
a driving circuit according to any one of claims 10 to 16, or claim 17, the driving circuit being electrically connected to the display panel, the driving circuit being for driving the display panel to display.
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| CN118430475B (en) * | 2024-07-04 | 2024-10-22 | 惠科股份有限公司 | Common voltage control circuit, driving method thereof and display device |
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| CN114578602A (en) * | 2022-03-08 | 2022-06-03 | 重庆惠科金渝光电科技有限公司 | Control circuit, data driving chip and liquid crystal display device |
| CN114708840A (en) * | 2022-03-31 | 2022-07-05 | 福州京东方光电科技有限公司 | Display driving method, driving circuit and display device |
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