CN115700903A - 耦合半导体裸片的方法、使用的工具和对应的半导体器件 - Google Patents

耦合半导体裸片的方法、使用的工具和对应的半导体器件 Download PDF

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CN115700903A
CN115700903A CN202210904043.7A CN202210904043A CN115700903A CN 115700903 A CN115700903 A CN 115700903A CN 202210904043 A CN202210904043 A CN 202210904043A CN 115700903 A CN115700903 A CN 115700903A
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die
lds
lds material
substrate
package
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D·维特洛
M·德赖
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STMicroelectronics SRL
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STMicroelectronics SRL
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Abstract

本公开涉及耦合半导体裸片的方法、使用的工具和对应的半导体器件。激光直接成型LDS材料的封装被模制到第一半导体裸片和第二半导体裸片上。第一半导体裸片与第二半导体裸片之间的裸片到裸片的耦合形成件包括：裸片过孔，延伸通过LDS材料以到达第一半导体裸片和第二半导体裸片；以及裸片到裸片的线，在裸片过孔之间封装的表面处延伸。在激光激活和成型针对裸片过孔和裸片到裸片的线的封装的表面的所选位置之后，位置与提供导电路径的电极接触。通过暴露于携带金属阳离子的电解质，金属材料被电解生长到封装的位置上。金属阳离子经由电流被还原为金属材料，电流流过经由电极提供的导电路径。电极然后与在其上电解生长金属材料的位置脱离接触。

Description

耦合半导体裸片的方法、使用的工具和对应的半导体器件
优先权要求
本申请要求于2021年7月30日提交的意大利专利申请号102021000020537的优先权权益，其内容在法律允许的最大范围内通过引用全部并入本文。
技术领域
本说明书涉及半导体器件。
一个或多个实施例可以被应用于包括裸片到裸片的连接的半导体器件。
在一个或多个芯片载体包装中包括多个集成电路的系统级包装(SiP)可以是这种器件的示例。
背景技术
例如，各种类型的半导体器件(诸如功率器件)可以涉及裸片到裸片的耦合。
功率半导体集成电路芯片或裸片(例如氮化镓或GaN)期望被连接至使用BCD(双极CMOS-DMOS)技术制造的驱动器芯片或裸片的器件可以是这种实例的示例。
最近提出了激光直接成型(LDS)技术来替代常规的导线粘合，以在半导体器件中提供裸片到引线的电连接。
在目前执行的激光直接成型技术中，在LDS材料的激光束成型(激活)之后，诸如过孔和轨道(迹线)等形成的导电性经由无电镀金属化和水电镀来促进，以达到金属材料(诸如铜)的几十微米的金属化厚度。
尝试将LDS技术应用于裸片到裸片的耦合的一个问题在于关联的导电图案是电浮动节点。
因此，预期使用电镀来促进经由LDS技术成型的导电形成件(过孔和/或线或轨道)的充分导电性阻碍了将LDS技术的使用从裸片到引线的耦合扩展到裸片到裸片的耦合。
本领域需要为充分处理这种问题做出贡献。
发明内容
一个或多个实施例涉及一种方法。
一个或多个实施例涉及一种对应的工具(电极)。
一个或多个实施例涉及一种对应的半导体集成电路器件。半导体器件(诸如包括多个相互耦合的半导体芯片或裸片的功率器件)可以是这种器件的示例。
一个或多个实施例为在将导电材料(例如金属，诸如铜)生长到激光直接成型(LDS)材料的部分时使用的其他隔离的裸片到裸片的连接提供(临时)电接地，该部分通过应用激光束能量来激活(成型)。
一个或多个实施例可以涉及使用位于LDS框架顶部的不锈钢卷，该不锈钢卷具有(例如弹簧状的)指状物，形成与裸片到裸片的连接图案的电接触。
一个或多个实施例简化了裸片到裸片的耦合，而不需要过程流程的明显改变。
在一个或多个实施例中，裸片到裸片的连接线或轨道可以包括着陆区，以促进形成电接触(例如具有增加的面积)。
一个或多个实施例提供了对利用印刷方法(诸如喷射印刷)获得的裸片到裸片的耦合的有利替代方案。
附图说明
一个或多个实施例现在将参照附属附图仅通过示例描述，其中：
图1是LDS技术可能应用于制造半导体器件的示例，
图2至图6是本描述的实施例中的示例性步骤，
图7是进一步详述图4的步骤的可能实施方式的平面图，以及
图8是沿着图7的线VIII-VIII的截面图。
具体实施方式
除非另有指示，否则不同附图中的对应数字和符号通常指代对应的部分。
附图被绘制以清晰地图示实施例的相关方面，并且不一定按比例绘制。
附图中绘制的特征的边缘不一定指示特征范围的终止。
在随后描述中，各种具体细节被图示，以便提供对根据描述的实施例的各种示例的深入理解。实施例可以在没有一个或多个具体细节的情况下或在具有其他方法、组件、材料等的情况下获得。在其他情况下，已知的结构、材料或操作未被详细图示或描述，使得实施例的各个方面不会被混淆。
在本描述的框架中对“实施例”或“一个实施例”的引用旨在指示关于该实施例描述的特定配置、结构或特点被包括在至少一个实施例中。因此，在本描述的各个点中可能出现的诸如“在实施例中”、“在一个实施例中”等短语不一定恰好指一个相同实施例。此外，特定配置、结构或特点可以在一个或多个实施例中以任何适当的方式组合。
本文使用的标题/引用仅出于便利性提供，因此不限定保护范围或实施例的范围。
图1代表在多个半导体器件的组装流程中提供裸片到引线的耦合时LDS技术的可能应用，这些半导体器件被同时制造并且最终经由分割步骤被分离为单个器件(如图6例示的)。
图1涉及包括引线框的(单个)器件，该引线框具有多个裸片焊盘12A(例如两个裸片焊盘)，相应的半导体集成电路芯片或裸片14被安装(例如经由裸片贴附材料140贴附)到该裸片焊盘12A上，引线阵列12B在裸片焊盘12A和半导体芯片或裸片14周围。
名称“引线框”(或“引线框架”)目前被用于(例如参见美国专利商标局的USPC综合词汇表)指示为集成电路芯片或裸片提供支撑的金属框架以及将裸片或芯片中的集成电路与其他电组件或触点互连的电引线。
本质上，引线框包括导电形成件(引线)阵列，它从轮廓位置沿着半导体芯片或裸片的方向向内延伸，因此从被配置为在其上贴附有至少一个半导体芯片或裸片的裸片焊盘形成导电形成件阵列。这可以经由诸如裸片贴附粘合剂(例如裸片贴附膜(DAF))等常规方式来实现。
在图1中，两个裸片焊盘12A被图示，在其上贴附有相应芯片14。在各种实施例中，多个芯片14可以被安装在单个裸片焊盘12A上：例如两个裸片焊盘12A可以被接合以形成在其上安装有两个芯片的单个裸片焊盘，而不是图1所图示的不同元件。
激光直接成型(LDS)(通常也称为直接铜互连(DCI)技术)是一种基于激光的加工技术，现在已被广泛用于工业和消费电子市场的各个行业，例如用于高性能天线集成，其中天线设计可以被直接形成在模制塑料部分上。在示例性过程中，模制部分可以用包括适合于LDS过程的添加剂的市售树脂生产；广泛的树脂(诸如聚合物树脂，如PC、PC/ABS、ABS、LCP)目前可用于该目的。
在LDS中，激光束可以被用于将期望的导电图案转移到塑料成型件上，然后它进行金属化(例如经由铜或其他金属的无电式电镀)以最终确定期望的导电图案。
诸如美国专利申请公开号2018/0342453、2019/0115287、2020/0203264、2020/0321274、2021/0050226、2021/0050299或2021/0183748(均通过引用并入本文)等文档是将LDS技术应用于制造半导体器件的可能性的示例。例如，LDS技术有助于用通过激光束处理LDS材料然后金属化(例如通过电镀过程生长诸如铜等金属)创建的线/过孔替代导线、夹子或丝带。
仍然参照图1，LDS材料封装16可以被模制到在其上安装有半导体芯片或裸片14的引线框12A、12B上。
导电的裸片到引线的耦合形成件可以被设置在LDS材料16中(以本身已知的方式：例如参见前面引用的已发表的申请)。
如图1所图示的，这些裸片到引线的耦合形成件包括：第一过孔181、第二过孔182和导电线或轨道183。
第一过孔181在封装的顶(前)表面16A(与引线框12A、12B相对)与芯片或裸片14的前表面或顶表面处的导电焊盘(由于比例原因不可见)之间延伸通过LDS封装16。
第二过孔182在封装的顶(前)表面16A与引线框中的对应引线12B之间延伸通过LDS封装16。
导电线或轨道183在封装16的前表面或顶表面16A处延伸，并且将第一过孔181中的所选第一过孔181与第二过孔182中的所选第二过孔182电耦合，以在芯片或裸片14与引线12B之间提供期望的裸片到引线的电连接图案。
提供导电的裸片到引线的形成件(附图标记181、182和183)主要涉及在LDS材料16中成型这些形成件(例如在过孔181、182的期望位置处在其中钻孔)，然后在经由激光束能量激活(成型)的位置处生长导电材料(例如金属，诸如铜)。
例如，前面讨论的关于处理的其他细节可以从前面引用的已发表申请中导出。
将前面讨论的LDS处理的使用扩展到生产裸片到裸片的耦合形成件面临与这些形成件的本质相关的问题。
由图1中的200指示的这种裸片到裸片的耦合形成件应该期望地包括：导电过孔201和导电线或轨道202。
导电过孔201在封装的顶(前)表面16A与要被相互连接的两个芯片或裸片14中的一个和另一个的顶表面或前表面处的裸片焊盘(由于比例原因不可见)之间延伸通过LDS封装16。
导电线或轨道202在封装16的前表面或顶表面16A处的第一过孔201之间以桥状延伸，以完成期望的裸片到裸片的耦合图案。
封装16的LDS材料中的过孔201和线或轨道202的激光束成型(也称为“激活”)可以以与成型用于提供先前讨论的裸片到引线的耦合形成件的过孔181、182和线或轨道183相同的方式执行。
一个关键方面是在结构化位置处生长诸如金属(例如经由电镀)等导电材料，以提供期望的导电性—就像在裸片到引线的耦合形成件的情况下一样。
目前，这种导电材料的生长涉及(除了无电式电镀)电镀，它基于将电解质“浴”EB中所包含的待沉积金属的阳离子还原为金属材料(例如铜)。
如图1示意性地表示的，诸如Cu2+阳离子等阳离子通过从电流中获得电子e而在阴极C处被还原为金属铜，其中A表示包含待沉积金属的阳离子的电解质浴的阳极。
例如(如本领域技术人员已知的)电解质EB可以包含(在铜沉积的情况下)Cu2+阳离子和SO2-4阴离子。
这种过程(即，Cu2+阳离子在阳极处被还原为金属铜以产生导电路径(并且因此，期望在耦合形成件200处生长诸如铜等导电金属))涉及从电流获得电子e，该电流经由由引线框(例如由引线12B)表示的阴极C流动。这种电流根本无法在图1所图示的布置中流动：在此处，形成件200与引线框电隔离(通过芯片14)，使得Cu2+无法被还原为金属(铜)。
要注意的是，至少在原则上，这种问题可以通过仅采用LDS技术来解决，以提供裸片到引线的导电形成件181、182、183，而其他技术被用于提供图1中的200所例示的裸片到裸片的耦合。
常规的导线粘合可以表示考虑裸片到裸片的耦合的首要候选。
被施加到器件粘合部分上的不期望有的高电阻路径和/或应力表示要考虑的(负面)因素。
经由导电浆料提供裸片到裸片的耦合形成件200可能是要考虑的另一选项。
要注意的是，由于浆料粘度，用导电浆料填充在LDS材料16中成型的过孔可能变得不切实际。
在图1中例示的结构内创建牺牲路径可能是要考虑的再一选项。
同样，这种方法也不能避免诸如不期望有的天线效应和可能导致的设计约束(尤其是在器件包括大量输入/输出连接的情况下)等缺点。
本文考虑的一个或多个示例完全利用LDS技术(即，也用于200、201、202处的裸片到裸片的耦合)，而不影响提供裸片到引线的耦合形成件181、182和183。
在整个图2至图8中，与已经结合图1讨论的部分或元件类似的部分或元件用相同的参考符号指示。为了简洁起见，对应的详细描述将不被重复。
图2是多个半导体裸片或芯片14(将在裸片到裸片的连接中彼此耦合)的示例，它被示出为经由裸片贴附材料140被安装在引线框中的一个或多个裸片焊盘12A上。
LDS材料封装16被模制到在其上安装有半导体芯片或裸片14的引线框12A、12B上，其中激光束成型(如图3中的LB指示的)被应用于LDS材料16中的结构(一旦例如经由热固性固结)以提供：裸片到引线的耦合形成件181、182和183以及裸片到裸片的耦合形成件201、202。
为了避免使表示过于繁琐，经由激光束能量LB进行成型的行为和效果在图3中例示，而没有明确引用激光成型的形成件181、182、183和201、202。
图4是电极300的示例，该电极300是导电体，诸如导电材料(例如金属，诸如不锈钢)的卷或带，它面向形成件181、182、182、182、183和201、202已经经由激光束能量LB成型的结构。
如所图示的，电极300包括触点302(通过冲压和弯曲在卷或带中形成的弹簧状层流触点可以是这些触点的示例)，它适用于与裸片到裸片的连接200(过孔201和线或轨道202)已被成型的位置接触。
通过这种方式(如图8例示的)，LDS材料的那些位置将有可能(经由电极300)与电镀过程的阴极电连接。
为电极300选择诸如不锈钢等材料可能是有利的，因为由于其铬(Cr)含量(层)，钢将不会被铜电镀。
由于电极300的存在，诸如铜等金属可以在LDS材料16的前表面或顶表面16A处的激光激活位置处生长，而不仅仅是为了提供电裸片到引线的耦合(过孔181、182和线或轨道183)，还提供电裸片到裸片的耦合(过孔201和线或轨道202)：参见图5，也参照图1。
其他封装材料20(例如这可以是非LDS材料，诸如常规的环氧树脂模塑料)可以被模制到结构上以完成器件封装，并且单独的器件10可以经由常规的分割(例如通过刀片切割)来产生，如图6中的B所例示的。
图7和图8是使用外部卷实施电极300的可能性的示例，一旦电镀过程完成，该外部卷就被去除。
图7和图8是使用单个卷为在带中同时制造的多个器件10以及多个带提供期望的电接触的可能性的示例。
发现与在裸片到裸片的连接中使用的导线粘合相比，本文讨论的示例提供更好的性能，例如由于可以提供具有较低电阻率的连接路径，同时避免被施加到器件粘合焊盘的应力和附加的组装步骤。
与用于裸片到裸片的粘合的导电浆料相比，本文的示例具有避免过孔填充问题以及更重要的是避免附加分配步骤的优点。
与在器件结构内提供牺牲路径相比，本文讨论的一个或多个示例具有避免天线效应和设计约束的优点，尤其是在大量I/O节点的情况下。
附加的优点可能与本文例示的电极300在电极位置配置中提供笔直的电路径(无曲折的布局)的事实相关。
电极300的触点302在连接200处(例如在线或轨道202处)留下的可能标记几乎不引人注意，并且在任何情况下对器件性能都没有负面影响。
在不损害基本原理的情况下，细节和实施例可以相对于仅通过示例描述的内容变化，甚至显著变化，而不脱离保护范围。
权利要求是本文提供的关于实施例的技术教导的集成部分。保护范围由附属权利要求确定。

Claims (16)

1.一种方法，包括：
将第一半导体裸片和第二半导体裸片布置在衬底上；
将激光直接成型LDS材料的封装模制到被布置在所述衬底上的所述第一半导体裸片和所述第二半导体裸片上，所述LDS材料封装具有与所述衬底相对的表面；
在所述第一半导体裸片与所述第二半导体裸片之间提供导电的至少一个裸片到裸片的耦合形成件，所述至少一个裸片到裸片的耦合形成件包括：裸片过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述第一半导体裸片和所述第二半导体裸片中的每个半导体裸片之间延伸通过所述LDS材料；以及裸片到裸片的线，在所述LDS材料封装的与所述衬底相对的所述表面处延伸并且耦合所述裸片过孔；
其中提供导电的所述至少一个裸片到裸片的耦合形成件包括：
将激光束能量施加到所述LDS材料封装的与所述衬底相对的所述表面的所选位置，以激光激活所述LDS材料并且在其中成型所述裸片过孔和所述裸片到裸片的线；
使所述LDS材料封装的与所述衬底相对的所述表面的被激光激活和成型的所述位置与电极接触，其中所述电极提供到所述位置的导电路径；以及
将金属材料电解生长到所述LDS材料封装的所述表面的被激光激活和成型的所述位置上，其中电解生长金属材料包括：将所述位置暴露于携带金属材料的阳离子的电解质，并且经由电流将所述阳离子还原为金属材料，所述电流流过经由所述电极提供的所述导电路径。
2.根据权利要求1所述的方法，包括：使所述电极与在所述位置上电解生长金属材料的所述位置脱离接触。
3.根据权利要求1所述的方法，其中将金属材料电解生长到所述LDS材料封装的所述表面的被激光激活和成型的所述位置上包括：将所述位置暴露于携带铜阳离子的电解质，并且经由电流将所述阳离子还原为金属铜，所述电流流过经由所述电极提供的所述导电路径。
4.根据权利要求3所述的方法，其中所述电解质携带SO2-4阴离子。
5.根据权利要求1所述的方法，其中所述电极包括层状体，所述层状体具有从所述层状体突出的接触构件层状体，并且其中使所述LDS材料封装的所述表面的被激光激活和成型的所述位置与所述电极接触包括：将所述电极的所述层状体布置为面向所述LDS材料封装的所述表面，其中从所述层状体突出的所述接触构件与所述LDS材料封装的所述表面的被激光激活和成型的所述位置接触。
6.根据权利要求5所述的方法，其中响应于与所述LDS材料封装的所述表面的被激光激活和成型的所述位置接触，从所述电极的所述层状体突出的所述接触构件可变形。
7.根据权利要求1所述的方法，包括：
将所述第一半导体裸片和所述第二半导体裸片布置在所述衬底中的至少一个裸片焊盘上，所述衬底包括围绕所述至少一个裸片焊盘的导电引线阵列；以及
将LDS处理应用于所述LDS材料封装以提供裸片到引线的导电形成件，所述裸片到引线的导电形成件将所述第一半导体裸片和第二半导体裸片与所述导电引线阵列中的所述导电引线中的所选导电引线耦合，其中所述裸片到引线的导电形成件包括：
第一过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述第一半导体裸片和所述第二半导体裸片之间延伸通过所述LDS材料；
第二过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述导电引线阵列中的所述导电引线中的所选导电引线之间延伸通过所述LDS材料；以及
导电线，在所述第一过孔中的所选第一过孔与所述第二过孔中的所选第二过孔之间在所述LDS材料封装的与所述衬底相对的所述表面处延伸。
8.一种电极，用于将金属材料电解生长到LDS材料封装的表面的已被激光激活和成型的位置上，以形成裸片过孔与所述裸片过孔之间的裸片到裸片的线，用于连接至隔离的第一半导体裸片和第二半导体裸片，包括：
层状体，具有从所述层状体突出的至少一个接触构件，所述层状体被配置为被布置为面向所述LDS材料封装的所述表面；以及
至少一个接触构件，从所述层状体突出并且被配置为与所述LDS材料封装的所述表面的所述位置接触，其中，响应于与所述LDS材料封装的所述表面的所述位置接触，从所述电极的所述层状体突出的所述至少一个接触构件可变形。
9.一种器件，包括：
衬底；
被布置在所述衬底上的第一半导体裸片；
被布置在所述衬底上的第二半导体裸片；
激光直接成型LDS材料的封装，被模制到所述第一半导体裸片和所述第二半导体裸片上，所述LDS材料封装具有与所述衬底相对的表面；
在所述第一半导体裸片与所述第二半导体裸片之间的导电的至少一个裸片到裸片的耦合形成件，所述至少一个裸片到裸片的耦合形成件包括：裸片过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述第一半导体裸片和所述第二半导体裸片之间通过所述LDS材料激光激活和成型；以及裸片到裸片的线，在所述LDS材料封装的与所述衬底相对的所述表面处激光激活和成型并且耦合所述裸片过孔；以及
金属材料，通过所述LDS材料电解生长到所述裸片过孔上以及所述LDS材料封装的所述表面的所述裸片到裸片的线上。
10.根据权利要求9所述的器件：
其中所述第一半导体裸片和所述第二半导体裸片被布置在所述衬底中的至少一个裸片焊盘上，其中所述衬底包括围绕所述至少一个裸片焊盘的导电引线阵列；
并且还包括：裸片到引线的导电形成件，将所述第一半导体裸片和第二半导体裸片与所述导电引线阵列中的所述导电引线中的所选导电引线耦合，其中所述裸片到引线的导电形成件包括：
第一过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述第一半导体裸片和所述第二半导体裸片中的所述一个半导体裸片和所述另一半导体裸片之间延伸通过所述LDS材料；
第二过孔，在所述LDS材料封装的与所述衬底相对的所述表面与所述导电引线阵列中的所述导电引线中的所选导电引线之间延伸通过所述LDS材料；以及
导电线，在所述第一过孔中的所选第一过孔与所述第二过孔中的所选第二过孔之间在所述LDS材料封装的与所述衬底相对的所述表面处延伸。
11.一种方法，包括：
在第一电路和第二电路上方模制激光直接成型LDS材料的封装，所述LDS材料封装具有上表面；
将激光束能量施加到所述LDS材料封装的所述上表面的所选位置，以激光激活所述LDS材料并且在所述LDS材料中成型第一过孔和第二过孔，所述第一过孔和所述第二过孔分别在所述上表面与所述第一电路和所述第二电路之间延伸通过所述LDS材料；
将激光束能量施加到所述LDS材料封装的所述上表面的所选位置，以激光激活所述LDS材料并且在所述LDS材料中成型连接线，所述连接线在所述上表面处延伸并且耦合所述第一过孔和第二过孔；
使电极与所述LDS材料封装的所述表面的被激光激活和成型的所述所选位置中的至少一个接触，其中所述电极提供到所述所选位置中的所述至少一个的导电路径；以及
将金属材料电解生长到所述LDS材料封装的所述表面的被激光激活和成型的所述所选位置上，其中电解生长金属材料包括：将所述所选位置暴露于携带金属材料的阳离子的电解质，并且经由电流将所述阳离子还原为金属材料，所述电流流过经由所述电极提供的所述导电路径。
12.根据权利要求11所述的方法，其中所述电解质是携带铜阳离子的电解质，并且金属材料是金属铜。
13.根据权利要求12所述的方法，其中所述电解质携带SO2-4阴离子。
14.根据权利要求11所述的方法，其中放置所述电极包括：将多个接触构件放置在所述LDS材料封装的所述表面的被激光激活和成型的所述所选位置处。
15.根据权利要求14所述的方法，其中放置所述多个接触构件包括：响应于与所述所选位置接触，使所述多个接触构件变形。
16.根据权利要求11所述的方法，其中所述第一电路和所述第二电路由包括导电引线阵列的衬底支撑，所述方法还包括：
将激光束能量施加到所述LDS材料封装的所述上表面的所选位置，以激光激活所述LDS材料并且在所述LDS材料中成型第三过孔和第四过孔，所述第三过孔和所述第四过孔在所述上表面与所述导电引线阵列之间延伸通过所述LDS材料；以及
将激光束能量施加到所述LDS材料封装的所述上表面的所选位置，以激光激活所述LDS材料并且在所述LDS材料中成型另一连接线，所述另一连接线在所述上表面处延伸并且耦合所述第三过孔和第四过孔。
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