CN115663475A - FPGA-based method for rapidly reducing antenna beam side lobe in multiple ways - Google Patents
FPGA-based method for rapidly reducing antenna beam side lobe in multiple ways Download PDFInfo
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- CN115663475A CN115663475A CN202211145201.1A CN202211145201A CN115663475A CN 115663475 A CN115663475 A CN 115663475A CN 202211145201 A CN202211145201 A CN 202211145201A CN 115663475 A CN115663475 A CN 115663475A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention provides a method for rapidly reducing antenna beam side lobes in multiple ways based on an FPGA (field programmable gate array), which relates to the technical field of antennas and specifically comprises the following steps: s1, judging whether amplitude and/or phase weighting is needed to be carried out on unweighted amplitude codes and phase codes according to working mode setting; if not, the amplitude code and the phase code are directly sent to the attenuator and the phase shifter of each antenna unit; if weighting is to be performed, then step S2 is entered; s2, selecting a weighting type according to the type set by the working mode; s3, weighting according to the weighting type selected in the step S2; and S4, sending the amplitude codes and the phase codes to attenuators and phase shifters of all the antenna units. The invention can save FPGA resources, reduce FPGA computation time and complexity, improve beam agility time, reduce engineering redesign task and shorten project development period.
Description
Technical Field
The invention relates to the technical field of antennas, in particular to a method for quickly reducing antenna beam side lobes in multiple ways based on an FPGA (field programmable gate array).
Background
The existing phased array antenna mostly adopts a method to realize low sidelobe, if the realization method needs to be changed, the antenna layout needs to be changed, the input excitation signal amplitude of each antenna unit needs to be changed, a power supply control circuit needs to be changed, and the like. Namely, the existing method cannot realize low sidelobe antenna beams under different requirements through fast switching through other paths according to the working mode.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for rapidly reducing antenna beam sidelobe in multiple ways based on FPGA (field programmable gate array). According to different working modes, amplitude weighting, density weighting, phase weighting, amplitude weighting and phase weighting can be selected, so that FPGA resources can be saved, FPGA calculation time and complexity can be reduced, beam agility time can be prolonged, engineering redesign tasks can be reduced, and project development period can be shortened.
The purpose of the invention is realized by the following technical scheme:
the invention provides a method for rapidly reducing antenna beam side lobes in multiple ways based on an FPGA (field programmable gate array), which comprises the following steps of:
s1, judging whether amplitude and/or phase weighting needs to be carried out on unweighted amplitude codes and phase codes according to working mode setting; if not, the amplitude code and the phase code are directly sent to the attenuator and the phase shifter of each antenna unit; if weighting is to be performed, then step S2 is entered;
s2, selecting a weighting type according to the type set by the working mode;
s3, weighting according to the weighting type selected in the step S2;
and S4, sending the amplitude code and the phase code to an attenuator and a phase shifter of each antenna unit.
Alternatively or preferably, the weighting types in step S2 include amplitude weighting, density weighting, phase weighting, amplitude and phase weighting.
Optionally or preferably, for step S3, when the amplitude weighting is selected, taylor distribution weighting is selected, and data lookup is quickly completed by the FPGA after the selection.
Optionally or preferably, for step S3, when the amplitude weighting is selected, hamming distribution weighting is selected, and then data lookup is quickly completed by the FPGA.
Alternatively or preferably, for the step S3, when the density weighting is selected, further comprising:
s31, carrying out Taylor distribution amplitude weighting data lookup and channel weighting coefficient Ai lookup according to the side lobe requirement, wherein Ai is more than 0 and less than or equal to 1;
s32, generating a random number Ri table look-up table uniformly distributed among (0,1) according to a Monte Carlo probability statistical method;
s33, determining whether each antenna unit on the antenna array surface is opened or not according to the layout of the sparse density weighted phased array antenna units, if Ri is less than or equal to Ai, opening the antenna units, and if Ri is more than Ai, closing the antenna units.
Alternatively or preferably, for step S3, when selecting phase weighting, further comprising:
s31, performing phase weighted data table look-up according to the side lobe requirement;
s32, adding the weighted phase codes;
and S32, taking the remainder of the added phase code and 360 degrees, and adding 360 degrees if the remainder is a negative number.
Alternatively or preferably, for step S3, when amplitude and phase weighting is selected, the amplitude code and the phase code are simultaneously amplitude weighted and phase weighted.
Alternatively or preferably, the weighting data is calculated in advance and programmed in FLASH, and the antenna unit is controlled by group whether or not to be turned on for wavefront reconstruction.
Based on the technical scheme, the following technical effects can be generated:
the method for rapidly reducing the antenna beam sidelobe in multiple ways based on the FPGA can select different paths according to different working modes, rapidly realize the low-sidelobe antenna beam, and compared with the prior art, the method can save FPGA resources, improve beam agility time, reduce engineering redesign tasks and shorten project development period.
Drawings
In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the embodiments or technical solutions of the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic flow chart of the present invention.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1:
as shown in fig. 1:
the invention provides a method for rapidly reducing antenna beam side lobes in multiple ways based on an FPGA (field programmable gate array), which comprises the following steps of:
s1, judging whether amplitude and/or phase weighting is needed to be carried out on unweighted amplitude codes and phase codes according to working mode setting; if not, the amplitude code and the phase code are directly sent to the attenuator and the phase shifter of each antenna unit; if weighting is to be performed, then step S2 is entered;
s2, selecting a weighting type according to the type set by the working mode, wherein the weighting type specifically comprises amplitude weighting, density weighting, phase weighting, amplitude weighting and phase weighting;
s3, weighting according to the weighting type selected in the step S2;
and S4, sending the amplitude codes and the phase codes to attenuators and phase shifters of all the antenna units.
In the embodiment, when amplitude weighting is selected, taylor distribution or Hamming distribution weighting is selected, data search is rapidly completed through the FPGA after selection, data search can be completed within 25ns through a single channel, and the computation time of the FPGA is greatly shortened.
In this embodiment, for step S3, when the density weighting is selected, the method further includes:
s31, carrying out Taylor distribution amplitude weighting data lookup and channel weighting coefficient Ai lookup according to the side lobe requirement, wherein Ai is more than 0 and less than or equal to 1;
s32, generating a random number Ri table look-up table uniformly distributed among (0,1) according to a Monte Carlo probability statistical method;
s33, determining whether each antenna unit on the antenna array surface is opened or not according to the layout of the sparse density weighted phased array antenna units, if Ri is less than or equal to Ai, opening the antenna units, and if Ri is more than Ai, closing the antenna units.
In this embodiment, for step S3, when the phase weighting is selected, the method further includes:
s31, performing phase weighted data table look-up according to the side lobe requirement;
s32, adding the weighted phase codes;
and S32, taking the remainder of the added phase code and 360 degrees, and adding 360 degrees if the remainder is a negative number.
In this embodiment, for step S3, when amplitude and phase weighting is selected, the amplitude code and the phase code are simultaneously amplitude weighted and phase weighted, and the simultaneous amplitude and phase weighting can further reduce the antenna beam side lobe, and the simultaneous amplitude and phase weighting can allow the transmitter power amplifiers in the T/R components in each antenna channel to have the same output power level without using power amplifiers having a plurality of output power levels.
In the embodiment, the weighted data is calculated in advance and programmed in the FLASH, and the antenna unit controls whether to open the array plane for reconstruction according to the group, so that FPGA resources are further saved, and the calculation time and the complexity of the FPGA are reduced.
Claims (8)
1. A method for rapidly reducing antenna beam side lobe in multiple ways based on FPGA is characterized in that: the method comprises the following steps:
s1, judging whether amplitude and/or phase weighting is needed to be carried out on unweighted amplitude codes and phase codes according to working mode setting; if not, the amplitude code and the phase code are directly sent to the attenuator and the phase shifter of each antenna unit; if weighting is to be carried out, the step S2 is carried out;
s2, selecting a weighting type according to the type set by the working mode;
s3, weighting according to the weighting type selected in the step S2;
and S4, sending the amplitude codes and the phase codes to attenuators and phase shifters of all the antenna units.
2. The method for rapidly multi-path reduction of antenna beam sidelobe based on FPGA according to claim 1, characterized in that: the weighting types in step S2 include amplitude weighting, density weighting, phase weighting, amplitude and phase weighting.
3. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: and for the step S3, when amplitude weighting is selected, taylor distribution weighting is selected, and data searching is rapidly completed through an FPGA after selection.
4. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: and for the step S3, when amplitude weighting is selected, hamming distribution weighting is selected, and data searching is rapidly completed through the FPGA after selection.
5. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: for step S3, when density weighting is selected, further comprising:
s31, carrying out Taylor distribution amplitude weighting data lookup and channel weighting coefficient Ai lookup according to the side lobe requirement, wherein Ai is more than 0 and less than or equal to 1;
s32, generating a random number Ri table look-up table uniformly distributed among (0,1) according to a Monte Carlo probability statistical method;
s33, determining whether each antenna unit on the antenna array surface is opened or not according to the layout of the sparse density weighted phased array antenna units, if Ri is less than or equal to Ai, opening the antenna units, and if Ri is more than Ai, closing the antenna units.
6. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: for step S3, when phase weighting is selected, further comprising:
s31, performing phase weighted data table look-up according to the side lobe requirement;
s32, adding the unweighted phase codes;
and S32, taking the remainder of the added phase code and 360 degrees, and adding 360 degrees if the remainder is a negative number.
7. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: for step S3, when amplitude and phase weighting is selected, the amplitude code and the phase code are simultaneously amplitude weighted and phase weighted.
8. The FPGA-based fast multi-path antenna beam side lobe reduction method according to claim 1, characterized in that: the weighted data are calculated in advance and written in FLASH, and the antenna unit controls whether to be opened or not according to the group to reconstruct the array surface.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102110884A (en) * | 2010-12-30 | 2011-06-29 | 中国科学院上海微系统与信息技术研究所 | Active phased array antenna adopting passive loading way to control sidelobe level |
| CN102738583A (en) * | 2012-06-06 | 2012-10-17 | 北京航空航天大学 | Phased-array antenna beam control system based on distribution-centralization type beam control mode |
| CN104597433A (en) * | 2015-01-30 | 2015-05-06 | 中国电子科技集团公司第三十八研究所 | Phased-array antenna multi-beam automatic calibration device and method |
| CN105738886A (en) * | 2016-03-08 | 2016-07-06 | 西北工业大学 | Method for forming emission wave beam of underwater acoustic transducer array based on FPGA |
| CN111919393A (en) * | 2018-01-10 | 2020-11-10 | 索尼公司 | Flexible beamforming control |
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- 2022-09-20 CN CN202211145201.1A patent/CN115663475A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102110884A (en) * | 2010-12-30 | 2011-06-29 | 中国科学院上海微系统与信息技术研究所 | Active phased array antenna adopting passive loading way to control sidelobe level |
| CN102738583A (en) * | 2012-06-06 | 2012-10-17 | 北京航空航天大学 | Phased-array antenna beam control system based on distribution-centralization type beam control mode |
| CN104597433A (en) * | 2015-01-30 | 2015-05-06 | 中国电子科技集团公司第三十八研究所 | Phased-array antenna multi-beam automatic calibration device and method |
| CN105738886A (en) * | 2016-03-08 | 2016-07-06 | 西北工业大学 | Method for forming emission wave beam of underwater acoustic transducer array based on FPGA |
| CN111919393A (en) * | 2018-01-10 | 2020-11-10 | 索尼公司 | Flexible beamforming control |
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