CN115618789A - Method and system for automatically eliminating isolated island and micropore of integrated circuit layout - Google Patents

Method and system for automatically eliminating isolated island and micropore of integrated circuit layout Download PDF

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CN115618789A
CN115618789A CN202211633416.8A CN202211633416A CN115618789A CN 115618789 A CN115618789 A CN 115618789A CN 202211633416 A CN202211633416 A CN 202211633416A CN 115618789 A CN115618789 A CN 115618789A
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polygon
copper
clad
layout
hollowed
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CN115618789B (en
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唐章宏
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Beijing Wisechip Simulation Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
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    • G06F2111/04Constraint-based CAD

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Abstract

A system for a method of automatic elimination of islands and microvias in an integrated circuit layout, comprising: converting a part defined as a hole and a part coated with copper in the integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons; identifying boundaries of islands and/or micropores in the unified layout polygon based on the grids, and generating covering polygons for covering the islands and/or micropores based on the boundaries and the grids; re-reading the integrated circuit layout, and generating a new integrated circuit layout together with the generated coverage polygon so as to eliminate isolated islands and/or micropores contained in the initial integrated circuit layout; by automatically eliminating the micropores and/or the islands in the integrated circuit layout, the defects caused by the influence of the micropores and the islands on the reliability of the layout in the integrated circuit layout and the detection and the defect detection of the generated islands and the micropores in the process production are avoided, the integrated circuit preparation cost is reduced, and the production efficiency is improved.

Description

Method and system for automatically eliminating isolated island and micropore of integrated circuit layout
Technical Field
The application relates to the technical field of integrated circuits, in particular to a method and a system for automatically eliminating an isolated island and a micropore of an integrated circuit layout.
Background
The integrated circuit layout is an intermediate link between the integrated circuit schematic diagram and the integrated circuit process realization and is an essential important link. With the development of communication technology, research and development of very large scale integrated circuits have been gradually developed. In order to improve the performance, reduce the size and reduce the cost of electronic devices, transistors, other components and circuits are integrated on a small semiconductor substrate. In order to realize more functions, the ultra-large scale integrated circuit has a structure from several layers to hundreds of layers, each layer of structure is extremely complex, tens of millions of transistors are integrated, and the ultra-large scale integrated circuit has a multi-scale structure from a centimeter level to the latest nanometer level at present. Integrated circuit layouts may hide many microvias and islands that may appear in the integrated circuit through process implementations. These micro-holes and islands present in the produced integrated circuits affect the safety and accuracy of the circuit usage, as shown by the islands and micro-holes in fig. 2 and 3. How to eliminate micropore and island in integrated circuit layout design, avoid micropore and island to cause the design defect to avoid detecting out micropore and island behind the flow sheet or system board and lead to the re-preparation, increase integrated circuit preparation cycle and cost, be the technical problem that field technical staff urgently waited to solve.
Disclosure of Invention
Object of the application
In view of this, the present application aims to provide a method and a system for automatically eliminating islands and micro-holes in an integrated circuit layout, which are used to solve the technical problem of how to eliminate micro-holes and islands in the integrated circuit layout design.
(II) technical scheme
The application discloses a method for automatically eliminating an isolated island and a micropore of an integrated circuit layout, which comprises the following steps:
s1, converting a part defined as a hole and a part coated with copper in an integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons;
s2, identifying boundaries of the islands and/or micropores in the unified layout polygon, and generating a covering polygon for covering the islands and/or micropores on the basis of the boundaries;
s3, defining a part covering the island and covering the polygon as a hole and/or defining a part covering the micropore and covering the polygon as copper cladding;
and S4, reading in the integrated circuit layout again, and generating a new integrated circuit layout together with the generated covering polygon to eliminate the isolated island and/or the micropore.
In one possible embodiment, the converting the portion defined as the hole and the portion covered with copper in the integrated circuit layout into layout polygons and performing boolean operations to form uniform layout polygons includes:
s11, converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part in an integrated circuit layout, in a hole part into a second hollowed polygon, wherein when the hollowed circle, the hollowed ellipse and the hollowed polygon are in the copper-clad part, the second hollowed polygon is a regular polygon, when the hollowed ellipse, the second hollowed polygon is a polygon formed by connecting discrete points in sequence, and when the hollowed polygon is in the copper-clad part, the second hollowed polygon is a polygon defined in the layout;
s12, converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, an end point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed-out polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in a layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to an equal radian of the ellipse under a polar coordinate, and the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the polygon of the second copper clad is a polygon defined in the layout, other parts of the copper clad are converted into a polygon of a third copper clad, when other parts of the copper clad are defined as circles, the polygon of the third copper clad is a regular polygon, when other parts of the copper clad are defined as ellipses, discrete points are taken according to equal radians of the ellipses under polar coordinates, the polygon of the third copper clad is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper clad are defined as polygons, the polygon of the third copper clad is a polygon defined in the layout;
s13, performing Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon;
s14, performing Boolean difference operation on the third new copper-clad polygon, the first hollowed polygon and the second hollowed polygon respectively to form a first new copper-clad polygon;
and S15, performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
In a possible embodiment, the identifying boundaries of islands and/or micro-holes in the unified layout polygon, and the generating a covering polygon for covering the islands and/or micro-holes based on the boundaries includes:
s21, mesh division is carried out on the vertexes of the unified layout polygons according to a Delaunay division rule to form mesh division; s22, constructing a constraint triangular mesh which takes the edges of the uniform layout polygons as constraints based on an edge exchange method;
s23, identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes;
s24, identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed region;
s25, for each island and/or micropore, setting the corresponding side of the triangle of the adjacent triangle without the same number as the boundary of the island and/or micropore;
s26, connecting the corresponding edges of the constrained triangles of the neighboring triangles without the same number in each island and/or micropore end to form a polygon E;
s27, establishing an outer auxiliary polygon E for covering the island and/or the micropore based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 The covering polygons are used for covering the islands and/or the micropores.
In a possible embodiment, the identifying each copper-clad region and/or each hollowed-out region in the unified layout polygon based on the constrained triangular mesh comprises:
s230, initially setting the numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangle filling number of the current hollowed area asfn=0; setting a current peripheral copper-clad grid cell setFront p Is empty; setting a current set of peripheral excavated grid cellsFront n Is empty; set the current process toq=1 polygon;
s231, if q>The number of polygons is entered into step S238, otherwise, if the current processing is the second oneqIf the polygon is a copper-clad polygon, go to step S232, if the current processing is the second oneqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any side of the polygoneStarting from, find the left triangle with this edge associationt1If said left triangle ist1Is unnumbered, and is provided with a trianglet1Is numbered asfpAdd it to the collectionFront p In the polygonFree edgeeIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit set from peripheryFront p Take out a triangletAnd removing it from the collectionFront p If the triangle is removedtIs unnumbered and the common edge is not an edge of any polygon, the triangle is numbered as unnumberedtThe one or more neighboring triangles are added to the peripheral copper-clad grid cell setFront p And adding the newly added peripheral copper-clad grid unit setFront p The triangle of is numbered asfpWherein the common edge refers to the triangletAdjacent triangles and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, go to step S231;
s235, settingfn=fn-1, toqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfnAdd it to the collectionFront n In (2), any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite directions;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd removing it from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighbor trianglestIf the number of the neighbor triangle is that the edge corresponding to the unnumbered neighbor is not the edge of the polygon, the triangle is divided into three partstThe one or more neighbor triangles of (2) join theCollectionFront n And adding a new one to the peripheral excavated grid cell setFront n The triangle of (a) is numbered asfn
S237, judging the peripheral hollowed grid unit setFront n If not, go to step S236, if so, setq=q+1, proceed to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the area sum of the triangular areas corresponding to the numbers, and if the area sum is smaller than a given area threshold value, determining the area corresponding to the numbers as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
In a possible implementation, the creating an outer auxiliary polygon E1 for covering the island and/or the micropore based on the polygon E and the triangular mesh comprises: in a polygonEOut of shape to form a polygonEOuter auxiliary polygon E of 1 And controlling the outer auxiliary polygon and the polygon through a set distance threshold valueEThe distance of (c).
As a second aspect of the present application, there is also disclosed a system for automatic elimination of islanding and microvias in an integrated circuit layout, comprising a layout conversion module, a covered polygon generation module, a covered polygon definition module, and an integrated circuit layout regeneration module; the layout conversion module is used for converting a part defined as a hole and a part coated with copper in the integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons; the coverage polygon generation module is used for identifying the boundaries of the islands and/or micropores in the unified layout polygon and generating a coverage polygon for covering the islands and/or micropores on the basis of the boundaries; the covering polygon definition module is used for defining a part of a covering polygon covering the island as a hole and/or defining a part of a covering polygon covering the micropore as copper cladding; the integrated circuit layout regenerating module is used for reading in the integrated circuit layout again, generating a new integrated circuit layout together with the generated covering polygon and eliminating the isolated island and/or the micropore.
In one possible implementation, the layout conversion module comprises a hole conversion unit, a copper-clad conversion unit, a third new copper-clad polygonal boolean operation unit, a first new copper-clad polygonal boolean operation unit and a unified layout polygonal boolean operation unit;
the hole conversion unit is used for converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part in an integrated circuit layout, in a hole part into a second hollowed polygon, wherein when the hollowed circle, the hollowed ellipse and the hollowed polygon are in the copper-clad part, the second hollowed polygon is a regular polygon, when the hollowed ellipse, the second hollowed polygon is a polygon formed by connecting discrete points in sequence, and when the hollowed polygon is in the copper-clad part, the second hollowed polygon is a polygon defined in the layout;
the copper-clad conversion unit is used for converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, an end point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed-out polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in a layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to an equal radian of the ellipse under a polar coordinate, and the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the polygon of the second copper clad is a polygon defined in the layout, other parts of the copper clad are converted into a polygon of a third copper clad, when other parts of the copper clad are defined as circles, the polygon of the third copper clad is a regular polygon, when other parts of the copper clad are defined as ellipses, discrete points are taken according to equal radians of the ellipses under polar coordinates, the polygon of the third copper clad is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper clad are defined as polygons, the polygon of the third copper clad is a polygon defined in the layout;
the third new copper-clad polygon Boolean operation unit is used for performing Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon;
the first new copper-clad polygon Boolean operation unit is used for performing Boolean difference operation on the third new copper-clad polygon and the first hollowed-out polygon and the second hollowed-out polygon respectively to form a first new copper-clad polygon;
the uniform layout polygon Boolean operation unit is used for performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
In a possible implementation, the overlay polygon generation module includes a first unit, a second unit, a third unit, a fourth unit, a fifth unit, a sixth unit, and a seventh unit; the first unit is used for performing mesh generation on the vertexes of the unified layout polygons according to a Delaunay generation rule to form mesh generation; the second unit is used for constructing a constraint which takes the edges of the uniform layout polygon as the constraint based on an edge exchange methodTriangular meshes; the third unit is used for identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes; the fourth unit is used for identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed-out region; the fifth unit is used for setting the side corresponding to the triangle of the neighbor triangle without the same number as the boundary of each island and/or micropore; the sixth unit is used for connecting the edges corresponding to the constrained triangles of the neighboring triangles without the same number in each island and/or micropore end to form a polygon E; the seventh unit is configured to create an outer auxiliary polygon E for covering the island and/or the micro-hole based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 The covering polygons are used for covering the islands and/or the micropores.
In a possible implementation, the third unit performs the steps including:
s230, initially setting the serial numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangular filling number of the current hollowed area asfn=0; setting a current peripheral copper-clad grid cell setFront p Is empty; setting a current set of peripheral excavated grid cellsFront n Is empty; set the current processing toq=1 polygon;
s231, if q>The number of polygons is entered into step S238, otherwise, if the current processing is the second oneqIf the polygon is a copper-clad polygon, go to step S232, if the current processing is the second oneqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any sides of the polygonseStarting from, find the left triangle with this edge associationt1If said left triangle ist1Is unnumbered, and is provided with a trianglet1Is numbered asfpAdding it to the collectionFront p In, any side of the polygoneIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit assembly from peripheryFront p Take out a triangletAnd removing it from the collectionFront p If the triangle is removedtIs unnumbered and the common edge is not an edge of any polygon, the triangle is numbered as unnumberedtThe one or more neighboring triangles are added to the peripheral copper-clad grid cell setFront p And adding the new peripheral copper-clad grid unit setFront p The triangle of (a) is numbered asfpWherein the common edge refers to the triangletAdjacent triangles and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, go to step S231;
s235, settingfn=fn-1, to the firstqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right triangle ist1Is unnumbered, set up a trianglet1Is numbered asfnAdd it to the collectionFront n In, any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite direction;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighboring trianglestIf the number of the neighbor triangle is that the edge corresponding to the unnumbered neighbor is not the edge of the polygon, the triangle is divided into three partstThe one or more neighbor triangles of (a) join the setFront n To get newAdding the peripheral excavated grid cell setFront n The triangle of is numbered asfn
S237, judging the peripheral hollowed grid unit setFront n If not, go to step S236, if so, setq=q+1, go to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the size of the area of the triangular meshes corresponding to the number, and if the area sum is smaller than a given area threshold, determining the area corresponding to the number as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
In a possible embodiment, the building of the outer auxiliary polygon E1 for covering the island and/or the micro-hole based on the polygon E and the triangular mesh comprises: in a polygonEOut of shape to form a polygonEOuter auxiliary polygon E of 1 And controlling the outer auxiliary polygon and the polygon through a set distance threshold valueEOf the distance of (c).
(III) advantageous effects
This application carries out automatic elimination processing through micropore and/or island to in the integrated circuit territory, has avoided artificial processing, has saved manpower and materials, avoids micropore and island to realize can appearing in integrated circuit through technology simultaneously to avoid detecting discovery defect to the island and the micropore that produce in technology production, reduce integrated circuit preparation cost, promoted production efficiency.
Additional advantages, objects, and features of the application will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the application. The objectives and other advantages of the present application will be realized and attained by the following description.
Drawings
The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining and illustrating the present application and should not be construed as limiting the scope of protection of the present application.
FIG. 1 is a flow chart of a method of the present application;
FIG. 2 is a schematic illustration of a microwell of the present application;
FIG. 3 is a schematic island diagram of the present application;
FIG. 4 is a schematic diagram of the process of generating a triangle mesh constrained by the edge-exchange method according to the present application;
FIG. 5 is a schematic view of a polygon E shown in the present application;
FIG. 6 is a schematic diagram of a triangle mesh with an auxiliary node inserted therein such that each triangle in the triangle mesh has at most one edge coincident with one edge of the polygon E;
FIG. 7 is a polygon E with a point-taking structure on an angular bisector according to the present application 1 Vertex B of 1 A schematic diagram;
FIG. 8 is a system block diagram of the present application;
wherein, 1, a layout conversion module; 2. a coverage polygon generation module; 3. a covering polygon definition module; 4. and the integrated circuit layout regenerating module.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, as generally described and illustrated in the figures herein, could be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the above description of the present application, it should be noted that the terms "one side", "the other side", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, are only used for convenience of description and simplification of description, and do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
As shown in fig. 1, the present embodiment provides a method for rapidly detecting an island in an integrated circuit layout, including the following steps:
s1, converting a part defined as a hole and a part coated with copper in an integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons. The uniform layout polygon formed here can be used for Delaunay to perform triangular mesh subdivision.
In some embodiments, the converting the portion defined as the hole and the portion covered with copper in the integrated circuit layout into layout polygons and performing boolean operations to form unified layout polygons includes:
s11, converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part in an integrated circuit layout, in a hole part into a second hollowed polygon, wherein when the hollowed circle, the hollowed ellipse and the hollowed polygon are in the copper-clad part, the second hollowed polygon is a regular polygon, when the hollowed ellipse, the second hollowed polygon is a polygon formed by connecting discrete points in sequence, and when the hollowed polygon is in the copper-clad part, the second hollowed polygon is a polygon defined in the layout;
s12, converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, a terminating point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in the layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the equal radian of the ellipse under the polar coordinate, the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the second copper-clad polygon is a polygon defined in the layout, other parts of the copper-clad are converted into a third copper-clad polygon, when other parts of the copper-clad are defined as circles, the third copper-clad polygon is a regular polygon, when other parts of the copper-clad are defined as ellipses, discrete points are taken according to the equiradian of the ellipses under polar coordinates, the third copper-clad polygon is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper-clad are defined as polygons, the third copper-clad polygon is a polygon defined in the layout;
s13, performing Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon;
s14, performing Boolean difference operation on the third new copper-clad polygon, the first hollowed-out polygon and the second hollowed-out polygon respectively to form a first new copper-clad polygon;
s15, performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
S2, identifying boundaries of the islands and/or micropores in the unified layout polygon, and generating a covering polygon for covering the islands and/or micropores based on the boundaries.
In some embodiments, the method comprises the steps of:
and S21, mesh division is carried out on the vertexes of the unified layout polygons according to a Delaunay division rule to form mesh division. S22, constructing a constraint triangular mesh which takes the edges of the uniform layout polygons as constraints based on an edge exchange method; the method comprises the steps that triangle mesh dissection is carried out on unified layout polygons through a Delaunay method to form Delaunay mesh dissection, and on the basis of the Delaunay mesh dissection, constraint triangular meshes with the sides of the unified layout polygons as constraints are generated through a side exchange method, namely the sides of any layout polygons are all the sides of the constraint triangles;
s221, collecting all sides of polygons which are not common sides of two triangles in mesh generation, and sequencing according to the side lengths to form a set Lost; s222, taking out the side with the longest side length from the set Lost and removing the side from the set Lost, so that the calculation amount required for restoring the side is the minimum, such as the side in FIG. 4;
s223, starting from one vertex of the side with the longest side length, searching a triangle which comprises the vertex and is provided with other two vertexes positioned at two sides of the side, wherein the side with the longest side length is the side which is taken out and removed in the step S222; from said edge, as in fig. 2
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Is sent, searching for the vertex A included and the vertices C, D are located on the edge
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The triangles delta ACD on the two sides exchange the common edges of the triangle delta ACD and the adjacent triangle delta DCE to obtain a triangle delta ACE and a triangle delta EDA, wherein the adjacent triangle is a triangle with a common edge with the triangle, and the common edges of the triangle and the adjacent triangle are exchanged to obtain two new triangles, wherein the adjacent triangle is a triangle with a common edge with the triangle;
s224, repeating the step S223 until the side with the longest side length is a common side of the two adjacent triangles;
s225, judging whether the set Lost is an empty set, if not, turning to the step S222, and if so, generating a constrained triangular mesh with the hole boundary in the unified layout polygon as constraint; the step of transferring into the step means that the step is continuously executed according to the rule and the sequence of the step after being transferred into the step; the polygon edges are collected without different treatment, and whether the closed hole (polygon) is formed by the copper-clad polygon edges or the edges of the hole-digging polygon is determined by input, so that an end-to-end closed line segment set is formed.
S23, identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes; in some embodiments, the method comprises the steps of:
s230, initially setting the serial numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangle filling number of the current hollowed area asfn=0; setting the current peripheral copper-clad netSet of grid cellsFront p Is empty; setting a current set of peripheral excavated grid cellsFront n Is empty; set the current process toq=1 polygon;
s231, if q>The number of polygons is entered into step S238, otherwise, if the current processing is the second oneqIf the polygon is a copper-clad polygon, go to step S232, if the current processing is the second oneqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any side of the polygoneStarting from, find the left triangle with this edge associationt1If the left trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfpAdd it to the collectionFront p In, any side of the polygoneIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit assembly from peripheryFront p Take out a triangletAnd from the collectionFront p If the triangle is removedtIs unnumbered and the common edge is not an edge of any polygon, the triangle is numbered as unnumberedtThe one or more neighboring triangles are added to the peripheral copper-clad grid cell setFront p And adding the new peripheral copper-clad grid unit setFront p The triangle of (a) is numbered asfpWherein the common edge refers to the triangletAdjacent triangles and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, go to step S231;
s235, settingfn=fn-1, toqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right triangle ist1Of (2)The number is unnumbered, and a triangle is arrangedt1Is numbered asfnAdding it to the collectionFront n In (2), any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite direction;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd removing it from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighboring trianglestIf the number of the neighbor triangle is that the edge corresponding to the unnumbered neighbor is not the edge of the polygon, the triangle is divided into three partstThe one or more neighbor triangles of (2) join the setFront n And adding the new part into the peripheral hollowed grid cell setFront n The triangle of is numbered asfn
S237, judging the peripheral hollowed grid unit setFront n If not, go to step S236, if so, setq=q+1, go to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the area sum of the triangular areas corresponding to the numbers, and if the area sum is smaller than a given area threshold value, determining the area corresponding to the numbers as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
S24, identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed region; and accumulating the areas of the triangular meshes in the copper-clad area and/or the excavated area, and judging that the area sum is smaller than a threshold value to be an island and/or a micropore.
S25, for each island and/or micropore, setting the side corresponding to the triangle of the neighbor triangle without the same number as the boundary of the island and/or micropore.
And S26, connecting the edges corresponding to the constrained triangles of the adjacent triangles without the same number in each island and/or micropore end to form a polygon E.
S27, establishing an outer auxiliary polygon E for covering the island and/or the micropore based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 The covering polygons are used for covering the islands and/or the micropores. In some embodiments, the building of the outer auxiliary polygon E1 for covering the island and/or the micro-hole based on the polygon E and the triangular mesh comprises: forming an outer auxiliary polygon E of the polygon E outside the polygon E 1 And controlling the distance between the outer auxiliary polygon and the polygon E through a set distance threshold value. As shown in fig. 5, the vertices ABCDEFGHIJKLM in the figure form a polygon E, and a triangle mesh T of the vertices of the polygon E is generated; inserting an auxiliary node into the triangular mesh, so that each triangle in the triangular mesh T has at most one edge coinciding with one edge of the polygon E, as shown in fig. 6, where two edges coinciding means that two edges have two same vertices and directions of the two edges are the same or different; calculating the outer auxiliary polygon E one by one according to the information of each edge and vertex of the polygon E 1 The respective vertex information of (2): let two adjacent edges of a vertex B of the polygon E be
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And
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at the adjacent side
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And
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taking point B on the angular bisector 1 The point is outside the polygon E and satisfies
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Whereinl min As a triangle containing vertex BThe minimum side of the shape has a side length as shown in fig. 7. WhereinfactorIs a distance threshold coefficient that is a function of,factor>1, for example, is preferablefactor=2, outer auxiliary polygon E corresponding to other vertex 1 The vertices of (c) can be given in the same way.
In this embodiment, the hollowed-out region and the copper-clad region are different from the hole portion and the copper-clad portion defined by the integrated circuit layout, the hollowed-out region is a region where holes exist in a unified layout polygon, and includes the hole portion and a newly generated hole portion defined in the integrated circuit layout, for example, holes formed between routing wires, and the copper-clad region is a region where copper is present in the unified layout polygon, and includes the copper-clad portion defined in the integrated circuit layout and the newly generated copper-clad portion, for example, an isolated island between via holes.
And S3, defining a part covering the island, which covers the polygon as a hole, and/or defining a part covering the micropore, which covers the polygon as copper.
In some embodiments, for the outer auxiliary polygon E 1 Is defined when the outer auxiliary polygon E 1 When the corresponding boundary is the boundary of the micropore, the outer auxiliary polygon E 1 A portion defined as the copper clad; when the outer auxiliary polygon E 1 When the corresponding boundary is the boundary of an island, the outer auxiliary polygon E 1 A portion defined as the aperture; the outer auxiliary polygon E 1 The covered polygons cover the islands and/or micropores.
S4, reading the integrated circuit layout and the defined file covering the polygon, and generating a new integrated circuit layout to eliminate the isolated island and/or the micropore. In the process of detecting the micropore and the island, all the routing, the bonding pad and the isolation gasket in the original layout design file are converted into polygons and subjected to Boolean operation, so that the polygon is different from the original layout design file, and after the micropore and the island are eliminated, the routing, the bonding pad and the isolation gasket in the original layout design file are not modified, so that the number of the polygons is less than that of the polygons, and the newly added outer auxiliary polygon E is added 1 To form the final layoutAnd (4) designing a file.
Through carrying out automatic elimination processing to micropore and/or island in the integrated circuit territory, avoided the manual handling, saved manpower and materials, avoided micropore and island to pass through the technology realization simultaneously and can appear in integrated circuit to avoid detecting discovery defect to the island and the micropore that produce in technology production, reduce integrated circuit preparation cost, promoted production efficiency.
As shown in fig. 8, as a second aspect of this embodiment, there is provided a system for automatically eliminating islands and microvias in an integrated circuit layout, including a layout conversion module 1, an overlay polygon generation module 2, an overlay polygon definition module 3, and an integrated circuit layout regeneration module 4; the layout conversion module 1 is used for converting a part which is defined as a hole and a part coated with copper in an integrated circuit layout into a layout polygon and performing Boolean operation to form a uniform layout polygon; the covering polygon generation module 2 is used for identifying the boundaries of the islands and/or the micropores in the unified layout polygon, and generating covering polygons for covering the islands and/or the micropores based on the boundaries; the covered polygon defining module 3 is used for defining a part of a covered polygon covering the island as a hole and/or defining a part of a covered polygon covering the micropore as copper cladding; the integrated circuit layout regenerating module 4 is used for reading in the integrated circuit layout and the defined file covering the polygon, and generating a new integrated circuit layout to eliminate the isolated island and/or the micropore.
The layout conversion module 1 comprises a hole conversion unit, a copper-clad conversion unit, a third new copper-clad polygonal Boolean operation unit, a first new copper-clad polygonal Boolean operation unit and a uniform layout polygonal Boolean operation unit; the hole conversion unit is used for converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part, of an integrated circuit layout in a hole into a second hollowed polygon, wherein the second hollowed polygon is a regular polygon when the hollowed circle, the hollowed ellipse and the hollowed polygon are hollowed in the part, defined as the hollowed circle, defined as the copper-clad part, discrete points are taken according to the ellipse at equal radian under polar coordinates when the hollowed polygon is defined as the hollowed ellipse, the second hollowed polygon is a polygon formed by sequentially connecting the discrete points, and the second hollowed polygon is a polygon defined in the layout when the hollowed polygon is defined as the copper-clad part; the copper-clad conversion unit is used for converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, an end point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed-out polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in a layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to an equal radian of the ellipse under a polar coordinate, and the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the second copper-clad polygon is a polygon defined in the layout, other parts of the copper-clad are converted into a third copper-clad polygon, when other parts of the copper-clad are defined as circles, the third copper-clad polygon is a regular polygon, when other parts of the copper-clad are defined as ellipses, discrete points are taken according to the equiradian of the ellipses under polar coordinates, the third copper-clad polygon is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper-clad are defined as polygons, the third copper-clad polygon is a polygon defined in the layout;
the third new copper-clad polygon Boolean operation unit is used for carrying out Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon; the first new copper-clad polygon Boolean operation unit is used for performing Boolean difference operation on the third new copper-clad polygon and the first hollowed-out polygon and the second hollowed-out polygon respectively to form a first new copper-clad polygon; the uniform layout polygon Boolean operation unit is used for performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
The overlay polygon generation module 2 comprises a first unit, a second unit, a third unit, a fourth unit, a fifth unit, a sixth unit and a seventh unit; the first unit is used for mesh division of the vertexes of the unified layout polygons according to a Delaunay division rule to form mesh division; the second unit is used for constructing a constraint triangular mesh which takes the edges of the uniform layout polygons as constraints based on an edge exchange method; the third unit is used for identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes; the fourth unit is used for identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed-out region; the fifth unit is used for setting the corresponding side of the triangle of the adjacent triangle without the same number as the boundary of each island and/or micropore; the sixth unit is used for connecting the edges corresponding to the constraint triangles of the neighbor triangles without the same number in each island and/or micropore end to form a polygon E; the seventh unit is configured to create an outer auxiliary polygon E for covering the island and/or the micro-hole based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 For the covered multilateral for covering the islands and/or microporesAnd (4) shaping.
The third unit performs steps including:
s230, initially setting the numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangle filling number of the current hollowed area asfn=0; setting the current peripheral copper-clad grid unit setFront p Is empty; setting a current set of peripheral excavated grid cellsFront n Is empty; set the current processing toq=1 polygon;
s231, if q>The number of polygons is entered into step S238, otherwise, if the current processing is the second oneqIf the polygon is a copper-clad polygon, go to step S232, if the current processing is the second oneqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any sides of the polygonseStarting from, find the left triangle with this edge associationt1If said left triangle ist1Is unnumbered, and is provided with a trianglet1Is numbered asfpAdd it to the collectionFront p In, any side of the polygoneIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit assembly from peripheryFront p Take out a triangletAnd from the collectionFront p If the triangle is removedtIs unnumbered and the common edge is not an edge of any polygon, the triangle is numberedtThe one or more neighbor triangles of (A) are added to the peripheral copper-clad grid cell setFront p And adding the newly added peripheral copper-clad grid unit setFront p The triangle of (a) is numbered asfpWherein the common edge refers to the triangletAdjacent triangle and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, go to step S231;
s235, settingfn=fn-1, toqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfnAdd it to the collectionFront n In, any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite direction;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighboring trianglestIf the number of the neighbor triangle is that the side corresponding to the unnumbered neighbor is not the polygon side, the triangle is divided into two partstThe one or more neighbor triangles of (a) join the setFront n And adding the new part into the peripheral hollowed grid cell setFront n The triangle of (a) is numbered asfn
S237, judging the peripheral hollowed grid cell setFront n If not, go to step S236, if so, setq=q+1, proceed to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the size of the area of the triangular meshes corresponding to the number, and if the area sum is smaller than a given area threshold, determining the area corresponding to the number as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
The seventh unit performs steps including: in a polygonEOut of shape to form a polygonEOuter auxiliary polygon E of 1 And controlling the outer auxiliary polygon and the outer auxiliary polygon according to a set distance threshold valueEdge shapeEOf the distance of (c). As shown in fig. 5, the vertices ABCDEFGHIJKLM in the figure form a polygon E, and a triangle mesh T of the vertices of the polygon E is generated; inserting an auxiliary node into the triangular mesh, so that each triangle in the triangular mesh T has at most one edge coinciding with one edge of the polygon E, as shown in fig. 6, where two edges coinciding means that two edges have two same vertices and directions of the two edges are the same or different; calculating the outer auxiliary polygon E one by one according to the information of each side and each vertex of the polygon E 1 The respective vertex information of (2): let two adjacent edges of a vertex B of the polygon E be
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And
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at adjacent edges
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And
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get point B on the angle bisector 1 The point is outside the polygon E and satisfies
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Whereinl min Is the side length of the smallest side of the triangle containing vertex B, as shown in fig. 7. WhereinfactorIs a distance threshold coefficient that is a function of,factor>1, for example, is preferablefactor=2, outer auxiliary polygon E corresponding to other vertices 1 The vertices of (c) can be given in the same way.
Finally, although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that they can make modifications and equivalent covers on the technical solutions of the present application without departing from the spirit and scope of the technical solutions of the present application, and all of them should be covered by the claims of the present application.

Claims (10)

1. A method for automatically eliminating islands and micropores in an integrated circuit layout is characterized by comprising the following steps:
s1, converting a part defined as a hole and a part coated with copper in an integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons;
s2, identifying boundaries of the islands and/or micropores in the unified layout polygon, and generating a covering polygon for covering the islands and/or micropores on the basis of the boundaries;
s3, defining a part covering the island and covering the polygon as a hole and/or defining a part covering the micropore and covering the polygon as copper cladding;
and S4, reading in the integrated circuit layout again, and generating a new integrated circuit layout together with the generated covering polygon to eliminate the isolated island and/or the micropore.
2. The method according to claim 1, wherein the step of converting the hole-defining part and the copper-clad part of the integrated circuit layout into layout polygons and performing boolean operations to form uniform layout polygons comprises:
s11, converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part in an integrated circuit layout, in a hole part into a second hollowed polygon, wherein when the hollowed circle, the hollowed ellipse and the hollowed polygon are in the copper-clad part, the second hollowed polygon is a regular polygon, when the hollowed ellipse, the second hollowed polygon is a polygon formed by connecting discrete points in sequence, and when the hollowed polygon is in the copper-clad part, the second hollowed polygon is a polygon defined in the layout;
s12, converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, an end point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed-out polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in a layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to an equal radian of the ellipse under a polar coordinate, and the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the polygon of the second copper clad is a polygon defined in the layout, other parts of the copper clad are converted into a polygon of a third copper clad, when other parts of the copper clad are defined as circles, the polygon of the third copper clad is a regular polygon, when other parts of the copper clad are defined as ellipses, discrete points are taken according to equal radians of the ellipses under polar coordinates, the polygon of the third copper clad is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper clad are defined as polygons, the polygon of the third copper clad is a polygon defined in the layout;
s13, performing Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon;
s14, performing Boolean difference operation on the third new copper-clad polygon, the first hollowed-out polygon and the second hollowed-out polygon respectively to form a first new copper-clad polygon;
and S15, performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
3. The method of claim 2, wherein the identifying boundaries of islands and/or microvias in the unified layout polygon and the generating a coverage polygon for covering the islands and/or microvias based on the boundaries comprises:
s21, mesh division is carried out on the vertexes of the unified layout polygons according to a Delaunay division rule to form mesh division; s22, constructing a constraint triangular mesh which takes the edges of the uniform layout polygons as constraints based on an edge exchange method;
s23, identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes;
s24, identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed region;
s25, for each island and/or micropore, setting the side corresponding to the constraint triangle of the neighbor triangle without the same number as the boundary of the island and/or micropore;
s26, connecting the corresponding edges of the constrained triangles of the neighboring triangles without the same number in each island and/or micropore end to form a polygon E;
s27, establishing an outer auxiliary polygon E for covering the island and/or the micropore based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 The covering polygons are used for covering the islands and/or the micropores.
4. The method according to claim 3, wherein the identifying each copper-clad area and/or each hollowed-out area in the unified layout polygon based on the constrained triangular mesh comprises:
s230, initially setting the numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangle filling number of the current hollowed area asfn=0; setting a current peripheral copper-clad grid cell setFront p Is empty; setting a current set of peripheral excavated grid cellsFront n Is empty; set the current process toq=1 polygon;
s231, if q>Number of polygons, go to step S238, otherwise, if the current process is the second oneqIf each polygon is a copper-clad polygon, go to step S232, if the current polygon is the second polygonqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any sides of the polygonseStarting from, find the left triangle with this edge associationt1If the left trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfpAdding it to the collectionFront p In (2), any side of the polygoneIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit assembly from peripheryFront p Take out a triangletAnd from the collectionFront p If the triangle is removedtIs unnumbered and the common edge is not an edge of any polygon, the triangle is numbered as unnumberedtThe one or more neighboring triangles are added to the peripheral copper-clad grid cell setFront p And adding the new peripheral copper-clad grid unit setFront p The triangle of (a) is numbered asfpWherein the common edge refers to the triangletAdjacent triangles and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, proceed to step S231;
s235, settingfn=fn-1, toqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfnAdding it to the collectionFront n In, any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite direction;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd removing it from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighboring trianglestIf the number of the neighbor triangle is that the edge corresponding to the unnumbered neighbor is not the edge of the polygon, the triangle is divided into three partstThe one or more neighbor triangles of (a) join the setFront n And adding the new part into the peripheral hollowed grid cell setFront n The triangle of (a) is numbered asfn
S237, judging the peripheral hollowed grid cell setFront n If not, go to step S236, if so, setq=q+1, go to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the size of the area of the triangular meshes corresponding to the number, and if the area sum is smaller than a given area threshold, determining the area corresponding to the number as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
5. An integration according to claim 4Method for automatically eliminating circuit layout islands and micropores, characterized in that an outer auxiliary polygon E for covering the islands and/or micropores is established based on the polygon E and triangular meshes 1 The method comprises the following steps: in a polygonEOut of shape to form a polygonEOuter auxiliary polygon E of 1 And controlling the outer auxiliary polygon and the polygon through a set distance threshold valueEThe distance of (c).
6. A system for automatically eliminating isolated islands and micropores of an integrated circuit layout is characterized by comprising a layout conversion module, a covering polygon generation module, a covering polygon definition module and an integrated circuit layout regeneration module; the layout conversion module is used for converting a part defined as a hole and a part coated with copper in the integrated circuit layout into layout polygons and performing Boolean operation to form uniform layout polygons; the coverage polygon generation module is used for identifying the boundaries of the islands and/or micropores in the unified layout polygon and generating a coverage polygon for covering the islands and/or micropores on the basis of the boundaries; the covering polygon definition module is used for defining a part, covering the island, of a covering polygon as a hole and/or defining a part, covering the micropore, of a covering polygon as a copper cladding; the integrated circuit layout regenerating module is used for reading in the integrated circuit layout again, generating a new integrated circuit layout together with the generated covering polygon and eliminating the isolated island and/or the micropore.
7. The system for automatically eliminating the isolated islands and the micropores of the integrated circuit layout according to claim 6, wherein the layout conversion module comprises a hole conversion unit, a copper-clad conversion unit, a third new copper-clad polygonal Boolean operation unit, a first new copper-clad polygonal Boolean operation unit and a unified layout polygonal Boolean operation unit;
the hole conversion unit is used for converting a part defined as a hole in the integrated circuit layout into a hollowed polygon; the method comprises the steps that a spacer caused by a via hole in a hole part is converted into a first hollowed polygon, when the shape of the spacer caused by the via hole is defined as a circle in a layout of an integrated circuit, the first hollowed polygon is a regular polygon, when the shape of the spacer caused by the via hole is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to the ellipse under polar coordinates with equal radian, the first hollowed polygon is a polygon formed by sequentially connecting the discrete points, and when the shape of the spacer caused by the via hole is defined as a polygon in the layout of the integrated circuit, the first hollowed polygon is a polygon defined in the layout; converting a hollowed circle, a hollowed ellipse and a hollowed polygon in a part, defined as a copper-clad part in an integrated circuit layout, in a hole part into a second hollowed polygon, wherein when the hollowed circle, the hollowed ellipse and the hollowed polygon are in the copper-clad part, the second hollowed polygon is a regular polygon, when the hollowed ellipse, the second hollowed polygon is a polygon formed by connecting discrete points in sequence, and when the hollowed polygon is in the copper-clad part, the second hollowed polygon is a polygon defined in the layout;
the copper-clad conversion unit is used for converting a part defined as copper-clad in the integrated circuit layout into a polygon coated with copper; wherein, the routing in the copper-clad part is converted into a first copper-clad polygon according to a starting point, an end point and a width, the first copper-clad polygon is a rectangle, a pad caused by a via hole in the copper-clad part is converted into a second copper-clad polygon, the second copper-clad polygon is in a hollowed-out polygon converted by the isolation gasket, when the shape of the pad is defined as a circle in a layout of the integrated circuit, the second copper-clad polygon is a regular polygon, when the shape of the pad is defined as an ellipse in the layout of the integrated circuit, discrete points are taken according to an equal radian of the ellipse under a polar coordinate, and the second copper-clad polygon is a polygon formed by sequentially connecting the discrete points, when the shape of the bonding pad is defined as a polygon in a layout of the integrated circuit, the polygon of the second copper clad is a polygon defined in the layout, other parts of the copper clad are converted into a polygon of a third copper clad, when other parts of the copper clad are defined as circles, the polygon of the third copper clad is a regular polygon, when other parts of the copper clad are defined as ellipses, discrete points are taken according to equal radians of the ellipses under polar coordinates, the polygon of the third copper clad is a polygon formed by sequentially connecting the discrete points, and when other parts of the copper clad are defined as polygons, the polygon of the third copper clad is a polygon defined in the layout;
the third new copper-clad polygon Boolean operation unit is used for performing Boolean operation on the first copper-clad polygon and the third copper-clad polygon to form a third new copper-clad polygon;
the first new copper-clad polygon Boolean operation unit is used for respectively carrying out Boolean operation on the third new copper-clad polygon, the first hollowed polygon and the second hollowed polygon to form a first new copper-clad polygon;
the uniform layout polygon Boolean operation unit is used for performing Boolean operation on the first new copper-clad polygon and the second copper-clad polygon to form a uniform layout polygon.
8. The system according to claim 7, wherein the overlay polygon generation module comprises a first unit, a second unit, a third unit, a fourth unit, a fifth unit, a sixth unit, and a seventh unit; the first unit is used for mesh division of the vertexes of the unified layout polygons according to a Delaunay division rule to form mesh division; the second unit is used for constructing a constraint triangular mesh which takes the edges of the uniform layout polygons as constraints based on an edge exchange method; the third unit is used for identifying each copper-clad area and/or each hollowed area in the unified layout polygon based on the constraint triangular meshes; the fourth unit is used for identifying an island based on the area size of each copper-clad region and/or identifying a micropore based on the area size of each hollowed-out region; the fifth unit is used for setting the corresponding side of the triangle of the adjacent triangle without the same number as the side of each island and/or microporeThe boundaries of the islands and/or micropores; the sixth unit is used for connecting the edges corresponding to the constrained triangles of the neighboring triangles without the same number in each island and/or micropore end to form a polygon E; the seventh unit is configured to create an outer auxiliary polygon E for covering the island and/or the micro-hole based on the polygon E and the triangular mesh 1 (ii) a The outer auxiliary polygon E 1 The covering polygons are used for covering the islands and/or the micropores.
9. A system for automatic elimination of integrated circuit layout islands and microvias as defined in claim 8, wherein said third unit performs steps comprising: s230, initially setting the serial numbers of all triangles as unnumbered numbers; the triangle filling number of the current copper-clad area is set asfp=0; set the triangle filling number of the current hollowed area asfn=0; setting the current peripheral copper-clad grid unit setFront p Is empty; setting a current peripheral excavated grid cell setFront n Is empty; set the current process toq=1 polygon;
s231, if q>The number of polygons is entered into step S238, otherwise, if the current processing is the second oneqIf the polygon is a copper-clad polygon, go to step S232, if the current processing is the second oneqEach polygon is a hollowed polygon, and the step S235 is executed; s232, settingfp=fp+1, to the secondqA plurality of copper-clad polygons formed from any sides of the polygonseStarting from, find the left triangle with this edge associationt1If said left triangle ist1Is unnumbered, set up a trianglet1Is numbered asfpAdd it to the collectionFront p In, any side of the polygoneIs a left triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles with the same direction;
s233, covering copper grid unit set from peripheryFront p Take out a triangletAnd from the collectionFront p If the triangle is removedtThree neighbor trianglesAny one or more neighbor triangles in a shape are numbered unnumbered and the common edge is not an edge of any polygon, then the triangle is numberedtThe one or more neighboring triangles are added to the peripheral copper-clad grid cell setFront p And adding the new peripheral copper-clad grid unit setFront p The triangle of (a) is numbered asfpWherein the common edge refers to the triangletAdjacent triangle and said triangletA common edge of (a);
s234, judging the peripheral copper-clad grid unit setFront p If not, go to step S233, if yes, setq=q+1, go to step S231;
s235, settingfn=fn-1, to the firstqA plurality of hollowed-out polygons formed from any side of the polygoneFrom this, the right triangle associated with this edge is foundt1If said right trianglet1Is unnumbered, and is provided with a trianglet1Is numbered asfnAdd it to the collectionFront n In (2), any side of the polygoneIs a right triangle including the sideeAnd the triangle sideeDirection and polygonal side ofeTriangles of opposite directions;
s236, hollowing out the grid cell set from the peripheryFront n Take out a triangletAnd from the collectionFront n If the triangle is removedtIs unnumbered, and the triangle is numbered with any one or more of the three neighbor trianglestIf the number of the neighbor triangle is that the edge corresponding to the unnumbered neighbor is not the edge of the polygon, the triangle is divided into three partstThe one or more neighbor triangles of (2) join the setFront n And adding a new one to the peripheral excavated grid cell setFront n The triangle of (a) is numbered asfn
S237, judging the peripheral hollowed grid cell setFront n If not, go to step S236, if so, setq=q+1, go to step S231;
and S238, accumulating the areas of the triangles with the same number based on the number filling results of the triangular meshes, judging the island and/or the micropores according to the size of the area of the triangular meshes corresponding to the number, and if the area sum is smaller than a given area threshold, determining the area corresponding to the number as the island and/or the micropore, wherein the area number of the island is positive and/or the area number of the micropore is negative.
10. A system for automatic elimination of integrated circuit layout islands and microvias as defined in claim 9, wherein: the establishing of the outer auxiliary polygon E1 for covering the islands and/or micropores based on the polygon E and the triangular mesh comprises: in a polygonEOut of shape to form a polygonEOuter auxiliary polygon E of 1 And controlling the outer auxiliary polygon and the polygon through a set distance threshold valueEThe distance of (c).
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5450331A (en) * 1992-01-24 1995-09-12 Vlsi Technology, Inc. Method for verifying circuit layout design
CN110674615A (en) * 2019-12-06 2020-01-10 北京唯智佳辰科技发展有限责任公司 Integrated circuit layout polygon self-adaptive simplifying processing method and device
CN110675502A (en) * 2019-11-26 2020-01-10 北京唯智佳辰科技发展有限责任公司 Multi-layer integrated circuit layout polygon alignment and simplification processing method and device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5450331A (en) * 1992-01-24 1995-09-12 Vlsi Technology, Inc. Method for verifying circuit layout design
CN110675502A (en) * 2019-11-26 2020-01-10 北京唯智佳辰科技发展有限责任公司 Multi-layer integrated circuit layout polygon alignment and simplification processing method and device
CN110674615A (en) * 2019-12-06 2020-01-10 北京唯智佳辰科技发展有限责任公司 Integrated circuit layout polygon self-adaptive simplifying processing method and device

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