CN115586827A - Power supply system and method of Wi-Fi chip and readable storage medium - Google Patents

Power supply system and method of Wi-Fi chip and readable storage medium Download PDF

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Publication number
CN115586827A
CN115586827A CN202211256996.3A CN202211256996A CN115586827A CN 115586827 A CN115586827 A CN 115586827A CN 202211256996 A CN202211256996 A CN 202211256996A CN 115586827 A CN115586827 A CN 115586827A
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module
power supply
control signal
power
low
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何飞
赵修齐
向兴富
贺久义
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Shandong Zhaotong Microelectronics Co ltd
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Shandong Zhaotong Microelectronics Co ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

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Abstract

The invention discloses a power supply system, a power supply method and a readable storage medium of a Wi-Fi chip, which relate to the technical field of integrated circuits and comprise the following steps: the system ON area power supply module is used for supplying power to the system ON area when the system is powered ON; the voltage switching module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area by utilizing the first low-dropout linear voltage stabilizing module when the system is powered on; when the first low dropout linear voltage stabilizing module supplies power to the radio frequency analog module stably, the second low dropout linear voltage stabilizing module or the voltage reducing module is used for supplying power to the radio frequency analog module and a system OFF area power supply module; and the system OFF area power supply module is used for supplying power to the system OFF area when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable. The invention ensures the power supply stability of the Wi-Fi chip, improves the performance of the Wi-Fi chip and prolongs the service life of the Wi-Fi chip.

Description

Power supply system and method of Wi-Fi chip and readable storage medium
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a power supply system and method of a Wi-Fi chip and a computer readable storage medium.
Background
Wi-Fi is applied to all aspects of our lives at present, and the wide application of Wi-Fi cannot be achieved without a Wi-Fi chip. In the Wi-Fi chip, the power supply of the system is very important, and directly determines whether the Wi-Fi chip can work normally.
The existing power supply mode of the Wi-Fi chip is mainly to directly and synchronously supply power to all modules and subsystems in the Wi-Fi chip, so that the power supply of the Wi-Fi chip is unstable, the performance of the Wi-Fi chip is influenced, and the service life of the Wi-Fi chip is short.
In summary, how to effectively solve the problems of unstable power supply of the Wi-Fi chip, influence on the performance of the Wi-Fi chip, low service life of the Wi-Fi chip, and the like is a problem that needs to be solved urgently by a person skilled in the art at present.
Disclosure of Invention
The invention aims to provide a power supply system of a Wi-Fi chip, which ensures the power supply stability of the Wi-Fi chip, improves the performance of the Wi-Fi chip and prolongs the service life of the Wi-Fi chip; another object of the present invention is to provide a power supply device, an apparatus and a computer-readable storage medium for a Wi-Fi chip.
In order to solve the technical problems, the invention provides the following technical scheme:
a power supply system for a Wi-Fi chip, comprising:
the system ON area power supply module is used for supplying power to the system ON area when the system is powered ON;
the voltage switching module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area by utilizing the first low-voltage-difference linear voltage stabilizing module when the system is powered on; when the first low-dropout linear voltage stabilizing module supplies power to the radio frequency analog module stably, a second low-dropout linear voltage stabilizing module or a voltage reducing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
and the system OFF area power supply module is used for supplying power to the system OFF area when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable.
In a specific embodiment of the present invention, the voltage switching module is specifically configured to, when a system is powered on, perform signal control through a logic gate circuit, so as to utilize the first low dropout linear regulator module to supply power to the radio frequency analog module and the system OFF area power supply module; and when the power supply of the first low-dropout linear voltage stabilizing module is stable, the second low-dropout linear voltage stabilizing module or the voltage reducing module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area through the control of a logic gate circuit signal.
In a specific embodiment of the present invention, the voltage switching module is specifically configured to, when a system is powered on, perform level control on a first control signal, a second control signal, and a third control signal, so as to use the first low dropout linear regulator module to supply power to the radio frequency analog module and the power supply module in the system OFF area; when the power supply of the first low dropout linear voltage regulator module is stable, the second low dropout linear voltage regulator module or the voltage reduction module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module by performing level control on a second control signal, a third control signal and a fourth control signal.
In a specific embodiment of the present invention, the voltage switching module is specifically configured to set a first control signal to an enable bit and set a second control signal and a third control signal to a low level when a system is powered on, so as to utilize the first low dropout linear regulator module to supply power to the radio frequency analog module and the system OFF area power supply module; when the power supply of the first low dropout linear voltage stabilizing module is stable, the second control signal is set to be at a low level, and the third control signal and the fourth control signal are set to be at a high level, so that the second low dropout linear voltage stabilizing module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area.
In a specific embodiment of the present invention, the voltage switching module is specifically configured to set a first control signal to an enable bit and set a second control signal and a third control signal to a low level when a system is powered on, so as to utilize the first low dropout linear regulator module to supply power to the radio frequency analog module and the system OFF area power supply module; when the power supply of the first low dropout linear voltage regulator module is stable, the second control signal is set to be at a high level, and the third control signal and the fourth control signal are set to be at a low level, so that the radio frequency analog module and the system OFF area power supply module are powered by the voltage reduction module.
In one embodiment of the present invention, the method further comprises:
the power supply detection module is used for acquiring a first level control feedback signal corresponding to the first control signal, the second control signal and the third control signal; performing power supply detection on the first low dropout linear regulator module according to the first level control feedback signal, the first control signal, the second control signal, the third control signal and a system state machine; acquiring second level control feedback signals corresponding to the second control signal, the third control signal and the fourth control signal; and performing power supply detection on the second low-dropout linear regulator module and the voltage reduction module according to the second level control feedback signal, the second control signal, the third control signal, the fourth control signal and the system state machine.
In a specific embodiment of the present invention, the power supply detection module is specifically configured to perform power supply detection on the first low dropout linear regulator module, the second low dropout linear regulator module, and the voltage reduction module by using an assertion manner, so as to perform alarm prompt when power supply abnormality is detected.
In an embodiment of the present invention, the method further comprises:
and the low-power-consumption mode control module is used for carrying out power ON-OFF control ON the system OFF area power supply module, the system ON area power supply module, the radio frequency analog module and the system clock module according to the received low-power-consumption power supply mode selection instruction so as to enable the system to operate in the low-power-consumption power supply mode of the corresponding category.
A power supply method of a Wi-Fi chip comprises the following steps:
when the system is powered ON, supplying power to the system ON area;
when the system is powered on, the first low-voltage difference linear voltage stabilizing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
when the power supply of the first low dropout linear regulator is stable, a second low dropout linear regulator module or a voltage reduction module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
and when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply is carried out on the OFF area of the system.
A computer-readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the method of powering a Wi-Fi chip as described above.
The power supply system of the Wi-Fi chip provided by the invention comprises: the system ON area power supply module is used for supplying power to the system ON area when the system is powered ON; the voltage switching module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area by utilizing the first low-voltage-difference linear voltage stabilizing module when the system is powered on; when the first low dropout linear voltage stabilizing module supplies power to the radio frequency analog module stably, the second low dropout linear voltage stabilizing module or the voltage reducing module is used for supplying power to the radio frequency analog module and a system OFF area power supply module; and the system OFF area power supply module is used for supplying power to the system OFF area when the power supply of the second low dropout linear voltage stabilizing module or the voltage reducing module is stable.
According to the technical scheme, the power supply system has the beneficial effects that the first low-dropout linear voltage stabilizing module is used for supplying power to the system when the system is just started, so that the stability of the power-on process is ensured. The power supply system is provided with two selectable power supply modes of the second low-dropout linear voltage stabilizing module and the voltage reducing module and is used for supplying power under a normal working mode. When the first low-dropout linear voltage stabilizing module stably supplies power to the radio frequency analog module, the second low-dropout linear voltage stabilizing module or the voltage reducing module is selected according to the power supply requirement to supply power to the Wi-Fi chip in the normal working mode. When the power supply of the second low dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply module of the system OFF area is used for supplying power to the system OFF area. Therefore, each module in the Wi-Fi chip is powered in stages, the power supply stability of the Wi-Fi chip is guaranteed, the performance of the Wi-Fi chip is improved, and the service life of the Wi-Fi chip is prolonged.
Correspondingly, the invention also provides a power supply device, equipment and a computer readable storage medium of the Wi-Fi chip, which correspond to the power supply method of the Wi-Fi chip, and the power supply device, the equipment and the computer readable storage medium have the technical effects, and are not described again.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a block diagram of a power supply system of a Wi-Fi chip according to an embodiment of the present invention;
FIG. 2 is a block diagram of another power supply system for a Wi-Fi chip according to an embodiment of the present invention;
FIG. 3 is a block diagram of an internal structure of a power management module in a Wi-Fi chip according to an embodiment of the present invention;
FIG. 4 is a timing diagram of a Wi-Fi chip powered by a second low dropout linear regulator module according to an embodiment of the present invention;
FIG. 5 is a timing diagram illustrating power supply to a Wi-Fi chip by a voltage-dropping module according to an embodiment of the present invention;
FIG. 6 is a flowchart of an implementation of a method for powering a Wi-Fi chip according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a block diagram of a power supply system of a Wi-Fi chip in an embodiment of the present invention, where the system may include:
the system ON area power supply module 1 is used for supplying power to the system ON area when the system is powered ON;
the voltage switching module 2 is used for supplying power to the radio frequency analog module and the power supply module 3 of the system OFF area by utilizing the first low dropout linear voltage stabilizing module when the system is powered on; when the first low dropout linear voltage stabilizing module supplies power to the radio frequency analog module stably, the second low dropout linear voltage stabilizing module or the voltage reducing module is used for supplying power to the radio frequency analog module and the power supply module 3 in the system OFF area;
and the system OFF area power supply module 3 is used for supplying power to the system OFF area when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable.
Referring to fig. 2, fig. 2 is a block diagram of another power supply system of a Wi-Fi chip according to an embodiment of the present invention. The schematic diagram of the whole system is shown in fig. 2, and includes a power management module (PMU) and other subsystems or modules, such as a radio frequency analog module (RFA), a radio frequency control module (RFC), a one-time programmable memory module (EFUSE), a USB physical layer module (USB phy), a CPU subsystem, a system ON area (SDIO ON area module, SDIO _ ON), a WI-FI data processing physical layer module (phy), a WI-FI data processing MAC layer Module (MACCORE), a general purpose I/O interface (GPIO), a USB MAC layer module (USB OFF area module), a system OFF area (SDIO OFF area module, SDIO _ OFF).
The top (CHIPTOP) of the whole system chip is supplied with power by external 3.3V, and the power management module divides four power supplies, namely VO15P/VD11H/VD11D/VD25E, into the input 3.3V power supply for supplying power to other modules of the system. The 1.5V power supply VO15P is used for supplying power to the radio frequency analog module; the 1.1V VD11H is used for supplying power to the whole system ON area and is responsible for supplying power to modules such as a radio frequency analog module, a radio frequency control module, a one-time programmable storage module, the system ON area, a universal I/O interface, a USB MAC layer module and the like; the power supply signal VD11D of the OFF area of 1.1V is used for supplying power to the OFF area of the whole system and is responsible for supplying power to modules such as a radio frequency analog module, a radio frequency control module, a physical layer module of a USB, a CPU, a physical layer module for processing WI-FI data, an MAC layer module for processing WI-FI data, a system OFF area and the like; the VD25E of 2.5V is used for supplying power when the one-time programmable storage module is programmed.
As shown in fig. 1, the power supply system of the Wi-Fi chip provided by the embodiment of the present invention includes a system ON area power supply module 1 (HLDO), a voltage switching module 2 (DCDC), and a system OFF area power supply module 3 (CLDO). When the system is powered ON, the power supply module 1 of the system ON area supplies power to the system ON area. When the system is powered on, the radio frequency analog module (RFA) and the system OFF area power supply module 3 are powered by the first low-dropout linear regulator module (SLDO) in the voltage switching module 2. When the first low dropout linear regulator module supplies power to the radio frequency analog module for stability, the second low dropout linear regulator module (LDO mode) or the BUCK module (BUCK mode) is used for supplying power to the radio frequency analog module and the system OFF area power supply module 3. And when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply module 3 of the system OFF area is utilized to supply power to the system OFF area. The first low-dropout linear voltage stabilizing module is used for providing the starting current when the system is started, so that the stable power-on process is ensured. When the system normally works, the second low-dropout linear voltage stabilizing module or the voltage reducing module is selected to supply power according to scene needs, so that the requirements of different working scenes are met, the stability advantage of the second low-dropout linear voltage stabilizing module and the advantages of high conversion rate and less heat generation of the voltage reducing module are fully utilized, and the purpose of reducing power consumption in a normal working mode is achieved.
According to the technical scheme, the first low-dropout linear voltage stabilizing module supplies power to the system when the system is just started, so that the stability of the power-on process is ensured. The power supply system is provided with two selectable power supply modes of the second low-dropout linear voltage stabilizing module and the voltage reducing module and is used for supplying power under a normal working mode. When the first low-dropout linear voltage stabilizing module stably supplies power to the radio frequency analog module, the second low-dropout linear voltage stabilizing module or the voltage reducing module is selected according to the power supply requirement to supply power to the Wi-Fi chip in the normal working mode. When the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply module of the system OFF area is used for supplying power to the system OFF area. Therefore, each module in the Wi-Fi chip is powered in stages, the power supply stability of the Wi-Fi chip is guaranteed, the performance of the Wi-Fi chip is improved, and the service life of the Wi-Fi chip is prolonged.
It should be noted that, based on the above embodiments, the embodiments of the present invention also provide corresponding improvements. In the following embodiments, steps that are the same as or correspond to those in the above embodiments may be referred to one another, and corresponding advantageous effects may also be referred to one another, which is not described in detail in the following modified embodiments.
In a specific embodiment of the present invention, the voltage switching module 2 is specifically configured to, when the system is powered on, perform signal control through a logic gate circuit, so as to utilize the first low dropout linear regulator module to supply power to the radio frequency analog module and the power supply module 3 in the system OFF area; when the power supply of the first low dropout linear voltage regulator module is stable, the second low dropout linear voltage regulator module or the voltage reduction module is utilized to supply power to the radio frequency analog module and the power supply module 3 of the system OFF area through the signal control of the logic gate circuit.
When the system is powered on, the voltage switching module 2 controls signals of the logic gate circuit and utilizes the first low-voltage difference linear voltage stabilizing module to supply power to the radio frequency analog module and the system OFF area power supply module 3. When the first low dropout linear voltage regulator module supplies power stably, the second low dropout linear voltage regulator module or the voltage reduction module is used for supplying power to the radio frequency analog module and the system OFF area power supply module 3 by controlling the logic gate circuit signal. Therefore, the logic gate circuit signal control has the advantages of low power supply requirement, low heat loss and the like.
In an embodiment of the present invention, the voltage switching module 2 is specifically configured to, when the system is powered on, perform level control on the first control signal, the second control signal, and the third control signal to supply power to the radio frequency analog module and the system OFF area power supply module 3 by using the first low dropout linear regulator module; when the first low dropout linear voltage regulator module supplies power stably, the second control signal, the third control signal and the fourth control signal are subjected to level control, so that the second low dropout linear voltage regulator module or the voltage reduction module is used for supplying power to the radio frequency analog module and the system OFF area power supply module 3.
When the system is powered on, the voltage switching module 2 performs level control on the first control signal (pow _ ldo 14), the second control signal (pow _ sw) and the third control signal (pow _ ldo 15), so that the first low-dropout linear regulator module is used for supplying power to the radio frequency analog module and the system OFF area power supply module 3; when the first low dropout linear regulator module supplies power stably, the second low dropout linear regulator module or the voltage reduction module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module 3 by performing level control on the second control signal, the third control signal and the fourth control signal (anaplacsw _ mac [46 ]). The power supply switching control from the system starting stage to the normal working stage is realized by controlling each control signal in the logic gate circuit.
In an embodiment of the present invention, the voltage switching module 2 is specifically configured to set the first control signal to an enable bit and set the second control signal and the third control signal to a low level when the system is powered on, so as to utilize the first low-dropout linear regulator module to supply power to the radio frequency analog module and the system OFF area power supply module 3; when the first low dropout linear voltage regulator module supplies power stably, the second control signal is set to be at a low level, and the third control signal and the fourth control signal are set to be at a high level, so that the second low dropout linear voltage regulator module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module 3.
Referring to fig. 3, fig. 3 is a block diagram of an internal structure of a power management module in a Wi-Fi chip according to an embodiment of the present invention. The power supply is supplied by a 3.3V power supply, and comprises five modules, namely a voltage switching module 2 (DCDC), a system OFF area power supply module 3 (CLDO), a system ON area power supply module 1 (HLDO), an one-time programmable storage power supply module (ELDO) and a 32K clock output signal (OSC _ CLK _ 32K), which are respectively described below.
The voltage switching module 2 inputs 3.3V, outputs 1.5V power VO15P, be used for the power supply of radio frequency analog module and system OFF district power module 3, voltage switching module 2 includes first low dropout linear voltage regulator module (SLDO), the linear voltage regulator module of second low dropout (LDO mode), step-down module (BUCK mode) and some control logic, the linear voltage regulator module of first low dropout is used for providing the starting current when the system just started, ensure that the process of electrifying is steady, the linear voltage regulator module of second low dropout and step-down module are two kinds of optional power supply modes when the system normally works.
The system OFF area power supply module 3 (CLDO) inputs a 1.5V power VO15 and outputs a 1.1V power VD11D for supplying power to the system OFF area power supply module, and the output of the power supply can be controlled to be enabled through an OFF area power-on control signal (anapar _ ldo [12 ]).
The power supply module 1 (HLDO) of the system ON area inputs 3.3V and outputs a 1.1V power VD11H, and is used for supplying power to the module of the system ON area.
The programming storage power supply module (ELDO) inputs 3.3V and outputs a 2.5V power supply VD25P, and is used for supplying power when the one-time programmable storage module (EFUSE) is programmed, and the power supply output is provided with a switch and is controlled by a register one-time programmable storage module power supply enabling signal (r _ SYM _ LDOE25_ EN).
OSC _ CLK _32K is a 32K clock calibration block for low power scenarios with 3.3V power, with the enable controlled by the 32K clock enable signal (r _ WL _32K _EN).
When the system is powered on, the voltage switching module 2 sets the first control signal to be the enable bit, that is, the switch at the position of the first low dropout linear regulator module in fig. 3 is closed, and sets the second control signal and the third control signal to be the low level, that is, the 0 level bit. At this time, no matter the fourth control signal is in a high level or a low level, the third control signal and the fourth control signal both obtain 0 through AND logic operation, and then the result and the potential of the second control signal 0 are subjected to OR logic operation to finally obtain 0, so that the first low-dropout linear voltage stabilizing module is selected to supply power to the radio frequency analog module and the power supply module 3 of the system OFF area. When the power supply of the first low-dropout linear voltage stabilizing module is stable, the second control signal is set to be a low level, namely, a level 0 position, namely, a switch at the position of the radio frequency analog module is switched OFF, the third control signal and the fourth control signal are set to be a high level, namely, a level 1 position, the third control signal and the fourth control signal both obtain 1 through AND logic operation, then the result and the level 0 of the second control signal are subjected to OR logic operation, and finally 1 is obtained, so that the second low-dropout linear voltage stabilizing module can be selected to supply power to the radio frequency analog module and the power supply module 3 of the system OFF area no matter the first control signal is the high level or the low level.
In an embodiment of the present invention, the voltage switching module 2 is specifically configured to set the first control signal to an enable bit and set the second control signal and the third control signal to a low level when the system is powered on, so as to utilize the first low-dropout linear regulator module to supply power to the radio frequency analog module and the system OFF area power supply module 3; when the first low dropout linear voltage regulator module is stable in power supply, the second control signal is set to be at a high level, and the third control signal and the fourth control signal are set to be at a low level, so that the voltage reduction module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module 3.
As shown in fig. 3, when the system is powered on, the voltage switching module 2 sets the first control signal to be the enable bit, that is, by closing the switch at the position of the first low dropout linear regulator module in fig. 3, and sets the second control signal and the third control signal to be the low level, that is, the 0 level bit. At this time, no matter the fourth control signal is at a high level or a low level, the third control signal and the fourth control signal both obtain 0 through and logic operation, and then the result and the potential of the second control signal 0 are subjected to or logic operation to finally obtain 0, so that the first low-dropout linear voltage stabilizing module is selected to supply power to the radio frequency analog module and the power supply module 3 of the system OFF area. When the first low-dropout linear voltage stabilizing module supplies power stably, the second control signal is set to be at a high level, namely, 1 level, the switch at the position of the radio frequency analog module is closed, the third control signal and the fourth control signal are set to be at a low level, namely, 0 level, the third control signal and the fourth control signal both obtain 0 through AND logic operation, and then the result and the potential of the second control signal 1 are subjected to OR logic operation to finally obtain 1, so that no matter the first control signal is at the high level or the low level, the voltage reducing module is finally selected to supply power to the radio frequency analog module and the power supply module 3 of the system OFF area.
As shown in table 1, table 1 is a control logic table of three power supply modes in the voltage switching module 2.
TABLE 1 control logic table for three power supply modes in voltage switching module 2
Figure 589422DEST_PATH_IMAGE001
The logic circuit controls the following functions:
the first low dropout linear regulator module (SLDO) provides a starting low current at the initial power-on stage, so that the stable power-on process is ensured;
the second low dropout linear regulator module (LDO mode) and the BUCK module (BUCK mode) are mutually exclusive, and one of the second LDO mode and the BUCK module is selected as the BUCK mode by default;
no matter the second low dropout linear regulator module (LDO mode) or the BUCK module (BUCK mode) is positioned, at the moment, the first low dropout linear regulator module (SLDO) is not output no matter whether the first low dropout linear regulator module (SLDO) is opened or not.
Referring to fig. 4 and 5, fig. 4 is a timing diagram of supplying power to a Wi-Fi chip by using a second low dropout linear regulator module in the embodiment of the present invention, and fig. 5 is a timing diagram of supplying power to a Wi-Fi chip by using a voltage reduction module in the embodiment of the present invention. T1 is the time for waiting for the first low dropout linear regulator module (SLDO) to supply power stably, T2 is the time for waiting for the second low dropout linear regulator module (LDO mode) or the BUCK module (BUCK mode) to supply power stably, and T3 is the time for waiting for the system OFF area power supply module 3 (CLDO) to supply power stably.
In an embodiment of the present invention, the system may further include:
the power supply detection module is used for acquiring a first level control feedback signal corresponding to the first control signal, the second control signal and the third control signal; performing power supply detection on the first low dropout linear regulator module according to the first level control feedback signal, the first control signal, the second control signal, the third control signal and a system state machine; acquiring a second level control feedback signal corresponding to the second control signal, the third control signal and the fourth control signal; and performing power supply detection on the second low-dropout linear voltage stabilizing module and the voltage reducing module according to the second level control feedback signal, the second control signal, the third control signal, the fourth control signal and the system state machine.
The power supply system of the Wi-Fi chip provided by the implementation of the invention also comprises a power supply detection module. The power supply detection module is used for obtaining a first level control feedback signal corresponding to the first control signal, the second control signal and the third control signal, and performing power supply detection on the first low-dropout linear voltage stabilizing module according to the first level control feedback signal, the first control signal, the second control signal, the third control signal and the system state machine. And acquiring a second level control feedback signal corresponding to the second control signal, the third control signal and the fourth control signal through the power supply detection module, and performing power supply detection on the second low-dropout linear voltage stabilizing module and the voltage reducing module according to the second level control feedback signal, the second control signal, the third control signal, the fourth control signal and the system state machine. In the power-on process of the whole system, the control signal of the power management module is controlled by the system state machine, so that the purpose of controlling the power-on of the whole system is achieved. The Wi-Fi chip power supply system is detected, so that the reliability of the Wi-Fi chip power supply system is improved.
The specific implementation of detecting the starting current of the first low dropout linear regulator module (SLDO):
the control signal for the turn-on of the SLDO enable current is the first control signal (pow _ ldo 14), and the idea of detecting is to check whether the signal arrives under a specific state machine, and the specific implementation is as follows:
the following code is used to detect the PON _ SCFG state machine:
sequence s_sys_pmc_state_PON_SCFG;
sys_pmc_state == PON_SCFG;
endsequence
the following code is used to detect the arrival of pow _ ldo 14:
sequence s_rose_pow_ldo14;
@(posedge ck12m) ($rose(pow_ldo14),$display(“signal pow_ldo14 arrived at %t\n”,$time));
endsequence
the following code is used to detect the arrival of pow ldo14 in the PON _ SCFG state machine:
property p_power_on_pow_ldo14;
@(posedge ck12m) s_sys_pmc_state_PON_SCFG |=> s_rose_pow_ldo14;
endproperty
the following code is a specific implementation of an assertion:
a_power_on_pow_ldo14: assert property(p_power_on_pow_ldo14);
the specific implementation of detecting the LDO mode or the BUCK mode is as follows:
detecting the specific implementation of the LDO mode:
in LDO mode, the control signals of the PMU are a third control signal (pow _ LDO 15), a fourth control signal (anaplacsw _ mac [46 ]), and a second control signal (pow _ sw), which have values of 1, and 0, respectively, and are implemented as follows:
1. obtaining conditions for LDO mode detection
wire ldo_assert_disable;
The following code is a condition for obtaining LDO mode:
assign ldo_assert_disable = spsldo_sel;
2. check pow _ ldo15 and anaplacsw _ mac [46]
The following code is used to detect the PON _ LDO15 state machine:
sequence s_sys_pmc_state_PON_LDO15;
sys_pmc_state == PON_LDO15;
endsequence
the following codes were used to detect the arrival of pow _ ldo15 and anaplacsw _ mac 46:
sequence s_pow_ldo15_and_anaparsw_mac46;
pow_ldo15 && anaparsw_mac[46];
endsequence
property p_power_on_ldo_pow_ldo15_anaparsw_mac46;
@(posedge ck12m) disable iff (ldo_assert_disable);
s_sys_pmc_state_PON_LDO15 |-> s_pow_ldo15_and_anaparsw_mac46;
endproperty
the following code is a specific implementation of an assertion:
a_power_on_ldo_pow_ldo15_anaparsw_mac46: assert property (p_power_on_ldo_pow_ldo15_anaparsw_mac46);
3. check pow _ sw
The following code is used to detect the PON _ SWEN state machine:
sequence s_sys_pmc_state_PON_SWEN;
sys_pmc_state == PON_SWEN;
endsequence
the following code is used to detect the arrival of pow _ sw:
sequence s_pow_sw;
pow_sw;
endsequence
property p_power_on_ldo_pow_sw;
@(posedge ck12m) disable iff (ldo_assert_disable);
s_sys_pmc_state_PON_SWEN |-> not s_pow_sw;
endproperty
the following code is a specific implementation of an assertion:
a_power_on_ldo_pow_sw:assert property (p_power_on_ldo_pow_sw);
detecting the concrete implementation of the BUCK mode:
in LDO mode, the control signals of the PMU are a third control signal (pow _ LDO 15), a fourth control signal (anaplacsw _ mac [46 ]), and a second control signal (pow _ sw), whose values are 0, and 1, respectively, which are implemented as follows:
1. obtaining detection condition of BUCK
The following codes are conditions for acquiring BUCK:
wire buck_assert_disable;
assign buck_assert_disable = !spsldo_sel;
2. check pow _ ldo15 and anaplacsw _ mac [46]
The following codes were used to detect pow _ ldo15 and anaplacsw _ mac46 as 0
sequence s_pow_ldo15_or_anaparsw_mac46;
pow_ldo15 || anaparsw_mac[46];
endsequence
property p_power_on_buck_pow_ldo15_anaparsw_mac46;
@(posedge ck12m) disable iff (ldo_assert_disable);
s_sys_pmc_state_PON_LDO15 |-> not s_pow_ldo15_or_anaparsw_mac46;
endproperty
The following code is a specific implementation of an assertion:
a_power_on_buck_pow_ldo15_anaparsw_mac46: assert property (p_power_on_buck_pow_ldo15_anaparsw_mac46);
3. check pow _ sw
The following code is used to detect the arrival of pow _ sw:
sequence s_rose_pow_sw;
@(posedge ck12m) ($rose(pow_sw),$display(“signal pow_sw arrived at %t\n”,$time));
endsequence
property p_power_on_buck_pow_sw;
@(posedge ck12m) disable iff (ldo_assert_disable);
s_sys_pmc_state_PON_SWEN |-> s_rose_pow_sw;
endproperty
the following code is a specific implementation of an assertion:
a_power_on_buck_pow_sw: assert property (p_power_on_buck_pow_sw);
detection system OFF zone power supply module 3 (CLDO):
the control signal of the power CLDO of the system OFF area is anapar _ ldo [12], and whether the signal arrives under a specific state machine is detected, which is specifically realized as follows:
the following code is used to detect the PON LDEN state machine:
sequence s_sys_pmc_state_PON_LDEN;
sys_pmc_state == PON_LDEN;
endsequence
the following code is used to detect the arrival of anapar _ ldo [12 ]:
sequence s_rose_anapar_ldo12;
@(posedge ck12m) ($rose(anapar_ldo[12]),$display(“signal anapar_ldo[12] arrived at %t\n”,$time));
endsequence
the following code is used to detect the arrival of anapar ldo [12] in the PON _ LDEN state machine:
property p_power_on_ anapar_ldo12;
@(posedge ck12m) s_sys_pmc_state_PON_LDEN |=> s_rose_anapar_ldo12;
endproperty
the following code is a specific implementation of an assertion:
a_power_on_anapar_ldo12:assert property(p_power_on_anapar_ldo12);
in a specific embodiment of the present invention, the power supply detection module is specifically configured to perform power supply detection on the first low dropout linear voltage regulator module, the second low dropout linear voltage regulator module, and the voltage reduction module in an assertion manner, so as to perform an alarm prompt when a power supply abnormality is detected, thereby implementing an automatic alarm when the power supply abnormality is detected.
The power supply detection module is used for detecting power supply of the first low-dropout linear voltage stabilizing module, the second low-dropout linear voltage stabilizing module and the voltage reducing module in an assertion mode so as to give an alarm when power supply abnormity is detected. By adopting an assertion mode, the key signals in the power-on process are detected, and the problems in the power-on process can be quickly found and positioned. By adopting a detection mechanism of the whole power-on process, whether each power supply supplies power normally or not can be detected in the power-on process, and if the power supply is abnormal, a corresponding alarm is sent out.
In an embodiment of the present invention, the system may further include:
and the low-power-consumption mode control module is used for carrying out power ON-OFF control ON the system OFF area power supply module 3, the system ON area power supply module 1, the radio frequency analog module and the system clock module according to the received low-power-consumption power supply mode selection instruction so as to enable the system to operate in the low-power-consumption power supply mode of the corresponding category.
And the low-power-consumption mode control module is used for receiving a low-power-consumption power supply mode selection instruction, and performing power ON-OFF control ON the system OFF area power supply module 3, the system ON area power supply module 1, the radio frequency analog module and the system clock module according to the received low-power-consumption power supply mode selection instruction, so that the system runs in the low-power-consumption power supply mode of the corresponding category. By adopting the power supply scheme of turning off part of the clock and the power supply, the power supply of the Wi-Fi chip in different low power consumption modes is realized, the power consumption is further reduced, and the energy is saved.
The POWER supply conditions of the Wi-Fi chip in different low POWER consumption modes are shown in Table 2, wherein ACTIVE represents a normal working scene, and LPS, RFOFF, SUSPEND and POWER _ DOWN are four different low POWER consumption modes when the Wi-Fi chip works.
Table 2. Power supply state table of Wi-Fi chip under different low power consumption modes
Figure 515789DEST_PATH_IMAGE002
The timed wake-up mode (LPS mode) of a Wi-Fi chip requires fast wake-up, in which power is not turned off, power consumption is reduced mainly by turning off clocks of respective modules, and OSC _ CLK _32K is mainly used to provide a low-power consumption clock of 32K in the LPS mode.
The RF analog block power supply off mode (RFOFF mode) achieves a reduction in power consumption by turning off the power supply to the RF block RF, here mainly turning off the power supply VO15P.
The power supply shutdown mode (SUSPEND mode) of the RF analog module and the system OFF area power supply module 3 achieves the purpose of further reducing power consumption by shutting down the power supply VO15P of the RF module RF and shutting down the power supply VD11H of the OFF area.
The POWER consumption of the chip is lowest in the standby mode (POWER _ DOWN mode) of the chip, and meanwhile, the VD11D in the ON area, the VD11H in the OFF area and the V015P for RF POWER supply are closed, and only GPIO and partial POWER supply of the core area are reserved for external awakening.
Corresponding to the above system embodiment, the present invention further provides a power supply method for a Wi-Fi chip, and the power supply method for a Wi-Fi chip described below and the power supply system for a Wi-Fi chip described above may be referred to in correspondence.
Referring to fig. 6, fig. 6 is a flowchart of an implementation of a method for supplying power to a Wi-Fi chip in an embodiment of the present invention, where the method may include the following steps:
s601: when the system is powered ON, the power is supplied to the system ON area.
S602: when the system is powered on, the first low-dropout linear voltage stabilizing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area.
S603: and when the power supply of the first low dropout regulator is stable, the second low dropout regulator module or the voltage reduction module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area.
S604: and when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply is carried out on the OFF area of the system.
According to the technical scheme, the first low dropout linear voltage stabilizing module supplies power to the system when the system is just started, so that the stability of the power-on process is ensured. The power supply system is provided with two selectable power supply modes of the second low-dropout linear voltage stabilizing module and the voltage reducing module and is used for supplying power under a normal working mode. When the first low-dropout linear voltage stabilizing module stably supplies power to the radio frequency analog module, the second low-dropout linear voltage stabilizing module or the voltage reducing module is selected according to the power supply requirement to supply power to the Wi-Fi chip in the normal working mode. When the power supply of the second low dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply module of the system OFF area is used for supplying power to the system OFF area. Therefore, each module in the Wi-Fi chip is powered in stages, the power supply stability of the Wi-Fi chip is guaranteed, the performance of the Wi-Fi chip is improved, and the service life of the Wi-Fi chip is prolonged.
In an embodiment of the present invention, step S602 may include the following steps:
when the system is powered on, the power supply module supplies power to the radio frequency analog module and the power supply module of the system OFF area by using the first low-dropout linear voltage stabilizing module through the signal control of the logic gate circuit;
accordingly, step S603 may include the steps of:
when the first low dropout linear voltage stabilizing module supplies power stably, the second low dropout linear voltage stabilizing module or the voltage reducing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area under the control of the logic gate circuit signal.
In an embodiment of the present invention, when the system is powered on, the logic gate circuit signal controls to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low dropout linear regulator module, and the method may include the following steps:
when the system is powered on, the first low dropout linear voltage stabilizing module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area by carrying out level control on the first control signal, the second control signal and the third control signal;
correspondingly, when the power supply of the first low dropout linear regulator module is stable, the power supply of the radio frequency analog module and the power supply module of the OFF area of the system can be supplied by the second low dropout linear regulator module or the voltage reduction module under the control of the logic gate circuit signal, and the method can comprise the following steps:
when the first low dropout linear voltage regulator module supplies power stably, the second low dropout linear voltage regulator module or the voltage reduction module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area by carrying out level control on the second control signal, the third control signal and the fourth control signal.
In an embodiment of the present invention, when the system is powered on, the level control is performed on the first control signal, the second control signal, and the third control signal, so as to supply power to the radio frequency analog module and the power supply module in the system OFF area by using the first low dropout linear regulator module, which may include the following steps:
and setting the first control signal as an enable bit, and setting the second control signal and the third control signal as low levels so as to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low-dropout linear voltage regulator module.
Correspondingly, when the first low dropout linear regulator module supplies power stably, the level control is performed on the second control signal, the third control signal and the fourth control signal, so that the second low dropout linear regulator module or the voltage reduction module is used for supplying power to the radio frequency analog module and the power supply module in the system OFF area, and the method may include the following steps:
when the first low dropout linear voltage regulator module supplies power stably, the second control signal is set to be at a low level, and the third control signal and the fourth control signal are set to be at a high level, so that the second low dropout linear voltage regulator module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area.
In an embodiment of the present invention, when the system is powered on, the level control is performed on the first control signal, the second control signal, and the third control signal to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low dropout linear regulator module, which may include the following steps:
when the system is powered on, the first control signal is set as an enable bit, and the second control signal and the third control signal are set as low levels, so that the first low-voltage-difference linear voltage stabilizing module is used for supplying power to the radio frequency analog module and the system OFF area power supply module;
correspondingly, when the first low dropout linear regulator module supplies power stably, the level control is performed on the second control signal, the third control signal and the fourth control signal, so that the second low dropout linear regulator module or the voltage reduction module is used for supplying power to the radio frequency analog module and the power supply module in the system OFF area, and the method may include the following steps:
when the power supply of the first low dropout linear voltage stabilizing module is stable, the second control signal is set to be at a high level, and the third control signal and the fourth control signal are set to be at a low level, so that the voltage reducing module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area.
In one embodiment of the present invention, the method may further comprise the steps of:
acquiring a first level control feedback signal corresponding to the first control signal, the second control signal and the third control signal;
performing power supply detection on the first low dropout linear regulator module according to the first level control feedback signal, the first control signal, the second control signal, the third control signal and a system state machine;
acquiring a second level control feedback signal corresponding to the second control signal, the third control signal and the fourth control signal; and performing power supply detection on the second low dropout linear voltage stabilizing module and the voltage reducing module according to the second level control feedback signal, the second control signal, the third control signal, the fourth control signal and the system state machine.
In an embodiment of the present invention, the power supply detection of the first low dropout regulator module may include the following steps:
performing power supply detection on the first low dropout linear regulator module by adopting an assertion mode so as to perform alarm prompt when power supply abnormity is detected;
the power supply detection of the second low dropout linear regulator module and the voltage reduction module may include the following steps:
and adopting an assertion mode to carry out power supply detection on the second low-dropout linear voltage stabilizing module and the voltage reducing module so as to carry out alarm prompt when abnormal power supply is detected.
In one embodiment of the present invention, the method may further comprise the steps of:
and according to the received low-power-consumption power supply mode selection instruction, performing power ON and power OFF control ON a system OFF area power supply module, a system ON area power supply module, a radio frequency analog module and a system clock module so as to enable the system to operate in the low-power-consumption power supply mode of the corresponding category.
Corresponding to the above method embodiment, the present invention further provides a computer-readable storage medium having a computer program stored thereon, the computer program, when executed by a processor, implementing the steps of:
when the system is powered ON, supplying power to the system ON area; when the system is powered on, the first low-dropout linear voltage stabilizing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area; when the power supply of the first low dropout linear regulator is stable, a second low dropout linear regulator module or a voltage reduction module is used for supplying power to a radio frequency analog module and a system OFF area power supply module; and when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply is carried out on the OFF area of the system.
The computer-readable storage medium may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
For the introduction of the computer-readable storage medium provided by the present invention, please refer to the above method embodiments, which are not described herein again.
In the present specification, the embodiments are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same or similar parts between the embodiments are referred to each other. The method and the computer-readable storage medium disclosed in the embodiments correspond to the system disclosed in the embodiments, so that the description is simple, and the relevant points can be referred to the system part for description.
The principle and the embodiment of the present invention are explained by applying specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, it is possible to make various improvements and modifications to the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.

Claims (10)

1. A power supply system for a Wi-Fi chip, comprising:
the system ON area power supply module is used for supplying power to the system ON area when the system is powered ON;
the voltage switching module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area by utilizing the first low-voltage-difference linear voltage stabilizing module when the system is powered on; when the first low-dropout linear voltage stabilizing module supplies power to the radio frequency analog module stably, a second low-dropout linear voltage stabilizing module or a voltage reducing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
and the system OFF area power supply module is used for supplying power to the system OFF area when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable.
2. The Wi-Fi chip power supply system according to claim 1, wherein the voltage switching module is specifically configured to, when the system is powered on, perform signal control via a logic gate circuit, so as to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low dropout linear regulator module; and when the power supply of the first low-dropout linear voltage stabilizing module is stable, the second low-dropout linear voltage stabilizing module or the voltage reducing module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area through the control of a logic gate circuit signal.
3. The power supply system of the Wi-Fi chip according to claim 2, wherein the voltage switching module is specifically configured to, when the system is powered on, perform level control on a first control signal, a second control signal, and a third control signal, so as to use the first low dropout linear regulator module to supply power to the radio frequency analog module and the power supply module in the OFF area of the system; when the power supply of the first low dropout linear voltage regulator module is stable, the second low dropout linear voltage regulator module or the voltage reduction module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module by performing level control on a second control signal, a third control signal and a fourth control signal.
4. The power supply system of the Wi-Fi chip according to claim 3, wherein the voltage switching module is specifically configured to set a first control signal to an enable bit and set a second control signal and a third control signal to a low level when the system is powered on, so as to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low dropout linear regulator module; when the power supply of the first low dropout linear voltage regulator module is stable, the second control signal is set to be low level, and the third control signal and the fourth control signal are set to be high level, so that the second low dropout linear voltage regulator module is utilized to supply power to the radio frequency analog module and the system OFF area power supply module.
5. The power supply system of the Wi-Fi chip according to claim 3, wherein the voltage switching module is specifically configured to set a first control signal to an enable bit and set a second control signal and a third control signal to a low level when the system is powered on, so as to supply power to the radio frequency analog module and the system OFF area power supply module by using the first low dropout linear regulator module; when the first low dropout linear voltage regulator module is stable in power supply, the second control signal is set to be at a high level, and the third control signal and the fourth control signal are set to be at a low level, so that the voltage reduction module is utilized to supply power to the radio frequency analog module and the power supply module of the system OFF area.
6. The Wi-Fi chip power supply system of claim 3, further comprising:
the power supply detection module is used for acquiring a first level control feedback signal corresponding to the first control signal, the second control signal and the third control signal; performing power supply detection on the first low dropout linear regulator module according to the first level control feedback signal, the first control signal, the second control signal, the third control signal and a system state machine; acquiring second level control feedback signals corresponding to the second control signal, the third control signal and the fourth control signal; and performing power supply detection on the second low dropout linear regulator module and the voltage reduction module according to the second level control feedback signal, the second control signal, the third control signal, the fourth control signal and the system state machine.
7. The power supply system of the Wi-Fi chip according to claim 6, wherein the power supply detection module is specifically configured to perform power supply detection on the first low dropout linear regulator module, the second low dropout linear regulator module, and the voltage reduction module in an assertion manner, so as to perform an alarm prompt when a power supply abnormality is detected.
8. The Wi-Fi chip power supply system according to any one of claims 1 to 7, further comprising:
and the low-power-consumption mode control module is used for carrying out power ON-OFF control ON the system OFF area power supply module, the system ON area power supply module, the radio frequency simulation module and the system clock module according to the received low-power-consumption power supply mode selection instruction so as to enable the system to operate in a corresponding type of low-power-consumption power supply mode.
9. A power supply method of a Wi-Fi chip is characterized by comprising the following steps:
when the system is powered ON, supplying power to the system ON area;
when the system is powered on, the first low-dropout linear voltage stabilizing module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
when the power supply of the first low dropout linear regulator is stable, a second low dropout linear regulator module or a voltage reduction module is used for supplying power to the radio frequency analog module and the power supply module of the system OFF area;
and when the power supply of the second low-dropout linear voltage stabilizing module or the voltage reducing module is stable, the power supply is carried out on the OFF area of the system.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of the method for powering a Wi-Fi chip of claim 9.
CN202211256996.3A 2022-10-14 2022-10-14 Power supply system and method of Wi-Fi chip and readable storage medium Pending CN115586827A (en)

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