CN115548122A - 一种浅槽mosfet的器件结构及其制造方法 - Google Patents

一种浅槽mosfet的器件结构及其制造方法 Download PDF

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CN115548122A
CN115548122A CN202211290097.5A CN202211290097A CN115548122A CN 115548122 A CN115548122 A CN 115548122A CN 202211290097 A CN202211290097 A CN 202211290097A CN 115548122 A CN115548122 A CN 115548122A
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杨超
陈铭阳
陈志阳
徐彩云
丁浩宸
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Wuxi Huixin Semiconductor Co ltd
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Abstract

本发明公开了一种浅槽MOSFET的器件结构及其制造方法,属于半导体集成电路制造技术领域,包括N型衬底;位于衬底上方的N型外延层,形成于N型外延层中并填充多晶硅的沟槽;位于沟槽两侧外延层中的Source区;位于Source区上方到外延层表面的Body区域;位于外延层上方的氧化隔离层;穿过氧化隔离层的N+接触孔和N+金属层;穿过氧化隔离层的栅极接触孔和栅极金属;位于金属层上方的钝化保护层。结构清晰,性能优越,实现方法简单,可以有效降低栅源漏电并避免栅源失效,提升沟槽Mosfet的栅源耐压能力。

Description

一种浅槽MOSFET的器件结构及其制造方法
技术领域
本发明属于半导体集成电路制造技术领域,具体是一种浅槽MOSFET的平坦化处理方法。
背景技术
硅基Mosfet目前是非常广泛的中低功率应用中的关键组件。在2022年,其市场价值80亿美元,且还在以3.8%的比例逐年增加,这就意味着到2026年,MOSFET市场规模将达到接近100亿美元的关口。其中大部分收入来自消费者和汽车市场。
作为该器件的核心部分,Mos栅极的工作原理就是通过控制MOS的势阱——使栅绝缘层的下方半导体表面产生反型层(导电沟道)来实现的。使反型层产生或者消失时的栅极电压,我们一般称之为阈值电压或开启电压Vth。栅极电压可以认为是MOS器件的一个开关,而衡量这个开关的性能,业界都是以一定栅源电压下的栅源漏电流来判断。在芯片制造过程中,随着各种各样的工艺层被刻蚀成图形,芯片表面变得高低不平。而这样的表面会影响后续的图形化加工工艺,严重的还会引起器件漏电增大和失效。
发明内容
发明目的:一种浅槽MOSFET的器件结构及其,以解决现有技术存在的上述问题。
技术方案:一种浅槽MOSFET的器件结构,包括终端区和元胞区,所述终端区和元胞区结构相同,分别包括N型衬底,设置在所述N型衬底上的N型外延层,设置在所述N型外延层上的沟槽;
所述沟槽通过沟槽光刻而成;
设置在所述沟槽表面的氧化层,所述沟槽内填多晶硅;
其特征在于:设置在所述多晶硅上旋涂或淀积一层有机薄膜,设置在所述N型外延层上的Body区域,设置在所述Body区域上方的并且通过在所述Body区域注入N型离子并退火形成的Source区,淀积在所述Source区上方的氧化隔离层,淀积在所述氧化隔离层上层的金属层,淀积在所述金属层上方的钝化层。
在进一步实施例中,还设置有栅极接触孔和源极接触孔。
在进一步实施例中,所述机薄膜厚度800~1200A。
在进一步实施例中,所述沟槽穿过所述Body区域,底部位于所述N型外延层上。
在进一步实施例中,所述氧化层的厚度范围150A~350A。
在进一步实施例中,所述栅极接触孔和源极接触孔结构相同;
所述栅极接触孔和源极接触孔刻蚀为圆台型。
在进一步实施例中,一种浅槽MOSFET的器件结构的制造方法,包括如下步骤;
步骤1、选取N型衬底,在衬底上形成N型外延层,通过沟槽光刻,在外延层内部形成沟槽;
步骤2、通过热氧化工艺,在沟槽表面形成氧化层;
步骤3、在沟槽内部及外延层表面填充多晶硅;
步骤4、在多晶硅表面旋涂或淀积一层有机薄膜;
步骤5、将所述机薄膜和所述多晶硅一起刻蚀,直至所述外延层表面的多晶硅刻蚀干净;
步骤6、通过对外延层注入P型离子并退火形成Body区域;
步骤7、通过源区光刻,在Body区上方注入N型离子并退火形成Source区;
步骤8、通过淀积氧化隔离层和CT光刻,形成栅和源接触孔;
步骤9、通过淀积金属层和对金属层进行光刻,形成栅电极和源电极;
步骤10、通过淀积钝化层和钝化光刻,进而保护芯片内部电路。
在进一步实施例中,所述步骤4进一步为,通过旋涂设备进行作业。
在进一步实施例中,所述Body区域注入P型离子。
在进一步实施例中,所述Source区注入N型离子。
有益效果:本发明公开了一种浅槽MOSFET的器件结构及其制造方法,包括N型衬底;位于衬底上方的N型外延层,形成于N型外延层中并填充多晶硅的沟槽;位于沟槽两侧外延层中的Source区;位于Source区上方到外延层表面的Body区域;位于外延层上方的氧化隔离层;穿过氧化隔离层的N+接触孔和N+金属层;穿过氧化隔离层的栅极接触孔和栅极金属;位于金属层上方的钝化保护层。结构清晰,性能优越,实现方法简单,可以有效降低栅源漏电并避免栅源失效,提升沟槽Mosfet的栅源耐压能力。
附图说明
图1为本发明的结构剖面图;
图2为本发明的传统结构的剖面图1;
图3为本发明的传统结构的剖面图2;
图4为本发明的结构剖面图1;
图5为本发明的结构剖面图2;
图6为本发明的元胞区的剖面图;
图7为本发明的终端区的剖面图。
附图说明:101、N型衬底;102、N型外延层;103、Body区域;104、Source区;105、氧化隔离层;106、金属层;107、钝化层;200、沟槽;201、氧化层;202、多晶硅;203、接触孔。
具体实施方式
在下文的描述中,给出了大量具体的细节以便提供对本发明更为彻底的理解。然而,对于本领域技术人员而言显而易见的是,本发明实施例中可以无需一个或多个这些细节而得以实施。在其他的例子中,为了避免与本发明实施例中发生混淆,对于本领域公知的一些技术特征未进行描述。
在本发明的描述中,需要理解的是,术语“上”、“下”、“前”、“后”、“左”、“右”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
下面通过实施例,并结合附图对本方案做进一步具体说明。
一种浅槽MOSFET的器件结构,包括包括终端区和元胞区,所述终端区和元胞区结构相同,包括N型衬底101,设置在所述N型衬底101上的N型外延层102,设置在所述N型外延层102上的沟槽200;所述沟槽200通过沟槽200光刻而成;设置在所述沟槽200表面的氧化层201,所述沟槽200内填多晶硅202;设置在所述多晶硅202上旋涂或淀积一层有机薄膜,设置在所述N型外延层102上的Body区域103,设置在所述Body区域103上方的并且通过在所述Body区域103注入N型离子并退火形成的Source区104,淀积在所述Source区104上方的氧化隔离层105,淀积在所述氧化隔离层105上层的金属层106,淀积在所述金属层106上方的钝化层107。
具体的,还设置有栅极接触孔和源极接触孔。
具体的,所述机薄膜厚度800~1200A。
具体的,所述沟槽200穿过所述Body区域103,底部位于所述N型外延层102上。
具体的,所述氧化层201的厚度范围150A~350A。
具体的,所述栅极接触孔和源极接触孔结构相同;
所述栅极接触孔和源极接触孔刻蚀为圆台型。
现有技术中,如图2和图3所述,Trench沟槽200形成后,先通过炉管做栅氧氧化,再通过LPCVD方法淀积多晶硅202。因器件原理,需要将沟槽200内部完全填充满多晶硅202,这就使得外延层表面也会淀积上一层多晶薄膜。由于沟槽200的深坑形貌,其上方填充后的多晶平面会低于外延层表面上的多晶平面。
浅沟槽200产品(1.5um或以下)在多晶淀积后两个多晶平面的高度差异不是很大,现有产品设计都是直接做多晶回刻来去除表面多晶,这就使得回刻后的多晶形貌呈“V”字形。其底部尖端处再经过CT刻蚀后,容易在“V”底部形成缝隙。再经金属淀积,缝隙内的填充金属离底部栅氧距离明显缩短,这就使得GS漏电偏大甚至是失效。过程简单,但易受制程波动导致GS漏电大甚至失效。
本发明通过在淀积后的多晶层表面通过涂覆或淀积一层有机薄膜约1200A±200A对芯片表面做平坦化(用来填补沟槽200刻蚀带来的“凹”坑)。填平后的芯片表面平整且无高度差。然后薄膜和Poly一起回刻,使得Poly形貌平滑,有效改善了回刻后的“V”字形貌。从而可以保障GS之间的安全距离。降低Ig漏电流并避免因Poly回刻异常导致的失效。如图4和图5所示,整个过程仅增加了一层有机薄膜和回刻菜单的优化,无其他光刻等复杂工艺过程增加。简洁明了,成本可控。
作为一个优选案例,一种浅槽MOSFET的器件结构的制造方法,包括如下步骤;
步骤1、选取N型衬底101,在衬底上形成N型外延层102,通过沟槽200光刻,在外延层内部形成沟槽200;
步骤2、通过热氧化工艺,在沟槽200表面形成氧化层201;
步骤3、在沟槽200内部及外延层表面填充多晶硅202;
步骤4、在多晶硅202表面旋涂或淀积一层有机薄膜;
步骤5、将所述机薄膜和所述多晶硅202一起刻蚀,直至所述外延层表面的多晶硅202刻蚀干净;
步骤6、通过对外延层注入P型离子并退火形成Body区域103;
步骤7、通过源区光刻,在Body区上方注入N型离子并退火形成Source区104;
步骤8、通过淀积氧化隔离层105和CT光刻,形成栅和源接触孔;
步骤9、通过淀积金属层106和对金属层106进行光刻,形成栅电极和源电极;
步骤10、通过淀积钝化层107和钝化光刻,进而保护芯片内部电路。
具体的,所述步骤4进一步为,通过旋涂设备进行作业。
具体的,所述Body区域103注入P型离子。
具体的,所述Source区104注入N型离子。
以上结合附图详细描述了本发明的优选实施方式,但是,本发明并不限于上述实施方式中的具体细节,在本发明的技术构思范围内,可以对本发明的技术方案进行多种等同变换,这些等同变换均属于本发明的保护范围。

Claims (10)

1.一种浅槽MOSFET的器件结构,包括终端区和元胞区,所述终端区和元胞区结构相同,分别包括N型衬底,设置在所述N型衬底上的N型外延层,设置在所述N型外延层上的沟槽;
所述沟槽通过沟槽光刻而成;
设置在所述沟槽表面的氧化层,所述沟槽内填多晶硅;
其特征在于:设置在所述多晶硅上旋涂或淀积一层有机薄膜,设置在所述N型外延层上的Body区域,设置在所述Body区域上方的并且通过在所述Body区域注入N型离子并退火形成的Source区,淀积在所述Source区上方的氧化隔离层,淀积在所述氧化隔离层上层的金属层,淀积在所述金属层上方的钝化层。
2.根据权利要求1所述的一种浅槽MOSFET的器件结构,其特征在于:还设置有栅极接触孔和源极接触孔。
3.根据权利要求1所述的一种浅槽MOSFET的器件结构,其特征在于:所述机薄膜厚度800~1200A。
4.根据权利要求1所述的一种浅槽MOSFET的器件结构,其特征在于:所述沟槽穿过所述Body区域,底部位于所述N型外延层上。
5.根据权利要求1所述的一种浅槽MOSFET的器件结构,其特征在于:所述氧化层的厚度范围150A~350A。
6.根据权利要求2所述的一种浅槽MOSFET的器件结构,其特征在于:所述栅极接触孔和源极接触孔结构相同;
所述栅极接触孔和源极接触孔刻蚀为圆台型。
7.根据权利要求1所述的一种浅槽MOSFET的器件结构的制造方法,其特征在于:包括如下步骤;
步骤1、选取N型衬底,在衬底上形成N型外延层,通过沟槽光刻,在外延层内部形成沟槽;
步骤2、通过热氧化工艺,在沟槽表面形成氧化层;
步骤3、在沟槽内部及外延层表面填充多晶硅;
步骤4、在多晶硅表面旋涂或淀积一层有机薄膜;
步骤5、将所述机薄膜和所述多晶硅一起刻蚀,直至所述外延层表面的多晶硅刻蚀干净;
步骤6、通过对外延层注入P型离子并退火形成Body区域;
步骤7、通过源区光刻,在Body区上方注入N型离子并退火形成Source区;
步骤8、通过淀积氧化隔离层和CT光刻,形成栅和源接触孔;
步骤9、通过淀积金属层和对金属层进行光刻,形成栅电极和源电极;
步骤10、通过淀积钝化层和钝化光刻,进而保护芯片内部电路。
8.根据权利要求7所述的一种浅槽MOSFET的器件结构的制造方法,其特征在于:所述步骤4进一步为,通过旋涂设备进行作业。
9.根据权利要求7所述的一种浅槽MOSFET的器件结构的制造方法,其特征在于:所述Body区域注入P型离子。
10.根据权利要求7所述的一种浅槽MOSFET的器件结构的制造方法,其特征在于:所述Source区注入N型离子。
CN202211290097.5A 2022-10-21 2022-10-21 一种浅槽mosfet的器件结构及其制造方法 Pending CN115548122A (zh)

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