CN115548010A - Electrostatic protection structure and electrostatic protection circuit - Google Patents

Electrostatic protection structure and electrostatic protection circuit Download PDF

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Publication number
CN115548010A
CN115548010A CN202110731911.1A CN202110731911A CN115548010A CN 115548010 A CN115548010 A CN 115548010A CN 202110731911 A CN202110731911 A CN 202110731911A CN 115548010 A CN115548010 A CN 115548010A
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conductivity type
doped region
voltage
region
type
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CN202110731911.1A
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Chinese (zh)
Inventor
张英韬
毛盼
刘俊杰
朱玲欣
宋彬
许杞安
吴铁将
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Changxin Memory Technologies Inc
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Changxin Memory Technologies Inc
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Priority to CN202110731911.1A priority Critical patent/CN115548010A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H01L27/0262Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H01L27/0281Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements field effect transistors in a "Darlington-like" configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps

Abstract

The invention relates to an electrostatic protection structure and an electrostatic protection circuit, wherein the electrostatic protection structure comprises: the semiconductor device comprises a well region of a first conductivity type, a well region of a second conductivity type, a first doped region of the first conductivity type, a second doped region of the first conductivity type, a first doped region of the second conductivity type, a second doped region of the second conductivity type, a third doped region of the first conductivity type, a grid and a detection resistor. The second doping area of the second conduction type, the first doping area of the first conduction type and the detection resistor in the electrostatic protection structure form a voltage detection circuit, trigger of lower voltage can be achieved, better ESD protection is achieved, and meanwhile excessive layout area cannot be wasted.

Description

Electrostatic protection structure and electrostatic protection circuit
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to an electrostatic protection structure and an electrostatic protection circuit.
Background
Performance and reliability are problematic issues in the development of integrated circuits. At present, the development of the integrated circuit industry in China can realize the manufacture of application products with better performance, but the reliability of the integrated circuit is still in the starting stage, the gap between the integrated circuit and foreign products is larger, the protection method used by a large number of products in most companies in China is still lagged behind in the irreversible damage protection mainly based on electrostatic discharge, and the electrostatic discharge event is difficult to be well protected.
Meanwhile, with the continuous improvement of the integrated circuit process, the size of the device is gradually reduced, the thickness of the gate oxide layer is gradually reduced, the bearable voltage of the integrated circuit is also gradually reduced, the trigger voltage of the traditional LVTSCR (low threshold voltage silicon controlled rectifier) device is already gradually higher than the upper limit of an ESD (electrostatic discharge) design window, and the traditional LVTSCR (low threshold voltage silicon controlled rectifier) device is difficult to apply to the integrated circuit under the advanced process at present, so that the further reduction of the trigger voltage of the ESD protection under the advanced process is an important direction for the research of the SCR device.
Disclosure of Invention
Accordingly, there is a need for an electrostatic protection structure and an electrostatic protection circuit that solve the above-mentioned problems in the prior art.
In order to achieve the above object, in one aspect, the present application provides an electrostatic protection structure including:
a well region of a first conductivity type located within a substrate of a second conductivity type;
a well region of a second conductivity type located within the substrate of the second conductivity type and contiguous with the well region of the first conductivity type;
a first doped region of a first conductivity type located within the well region of the first conductivity type;
a second doped region of the first conductivity type extending from the well region of the first conductivity type to the well region of the second conductivity type and having a spacing from the first doped region of the first conductivity type;
a first doped region of a second conductivity type located in the well region of the first conductivity type and having a spacing from both the first doped region of the first conductivity type and the second doped region of the first conductivity type;
the second doping area of the second conduction type is positioned in the well area of the first conduction type, positioned on one side, far away from the first doping area of the second conduction type, of the first doping area of the first conduction type and adjacent to the first doping area of the first conduction type;
a third doped region of the second conductivity type located within the well region of the second conductivity type and having a spacing from the second doped region of the first conductivity type;
a third doped region of the first conductivity type located within the well region of the second conductivity type and having a spacing from both the third doped region of the second conductivity type and the second doped region of the first conductivity type;
the grid electrode is positioned on the surface of the substrate of the second conduction type and is positioned between the second doping area of the first conduction type and the third doping area of the first conduction type;
and the detection resistor is connected with the second doped region of the second conductivity type and the grid at one end, and is connected with the third doped region of the first conductivity type and the third doped region of the second conductivity type at the other end.
In one embodiment, the first doped region of the first conductivity type, the second doped region of the first conductivity type, the third doped region of the first conductivity type, the first doped region of the second conductivity type, the second doped region of the second conductivity type, and the third doped region of the second conductivity type are all heavily doped regions; the well region of the first conductivity type and the well region of the second conductivity type are both lightly doped regions.
In one embodiment, the device further includes a plurality of shallow trench isolation structures, which are respectively located on a side of the second doped region of the second conductivity type away from the first doped region of the first conductivity type, between the first doped region of the first conductivity type and the first doped region of the second conductivity type, between the first doped region of the second conductivity type and the second doped region of the first conductivity type, and between the third doped region of the first conductivity type and the third doped region of the second conductivity type.
In one embodiment, the depth of the first doped region of the first conductivity type, the depth of the second doped region of the first conductivity type, the depth of the third doped region of the first conductivity type, the depth of the first doped region of the second conductivity type, the depth of the second doped region of the second conductivity type, and the depth of the third doped region of the second conductivity type are all less than the depth of the shallow trench isolation structure.
In one of the embodiments, the first and second parts of the device,
the first doped region of the first conductivity type and the first doped region of the second conductivity type are electrically connected with an anode;
one end of the detection resistor, which is far away from the second doping area of the second conduction type, the third doping area of the first conduction type and the third doping area of the second conduction type are electrically connected with a cathode.
In one embodiment, the substrate of the second conductivity type includes a silicon substrate or a germanium substrate of the second conductivity type.
In one embodiment, the first doped region of the first conductivity type and the second doped region of the second conductivity type constitute a diode.
In one embodiment, the first conductivity type comprises N-type and the second conductivity type comprises P-type.
The present application also provides an electrostatic protection circuit, including:
a Darlington structure comprising a first end, a second end, a third end, and a fourth end; the first end of the Darlington structure is connected with a first voltage, and the second end of the Darlington structure is connected with a second voltage;
a voltage detection circuit, one end of which is connected with the first voltage and the other end of which is connected with the second voltage;
the switch tube comprises a control end, a first end and a second end; the control end of the switch tube is connected with the voltage detection circuit, the first end of the switch tube is connected with the third end of the Darlington structure, and the second end of the switch tube is connected with the second voltage.
In one embodiment, the darlington structure comprises a first triode and a second triode; first triode includes PNP type triode, the second triode includes NPN type triode, the transmitting pole of first triode is very the first end of darlington structure, the transmitting pole of second triode is very the second end of darlington structure, the base of first triode with regard as jointly behind the collecting electrode short circuit of second triode the third end of darlington structure, the collecting electrode of first triode with regard as jointly behind the base short circuit of second triode the fourth end of darlington structure.
In one embodiment, the darlington structure further comprises:
one end of the first parasitic resistor is connected with the fourth end of the Darlington structure, and the other end of the first parasitic resistor is connected with the second voltage;
and one end of the second parasitic resistor is connected with the third end of the Darlington structure, and the other end of the second parasitic resistor is connected with the first voltage.
In one embodiment, the switch tube comprises a transistor.
In one embodiment, the switch tube includes an NMOS tube, a gate of the NMOS tube is a control end of the switch tube, a drain of the NMOS tube is connected to a third end of the darlington structure, and a source of the NMOS tube is connected to the second voltage.
In one embodiment, the first voltage is greater than the second voltage.
In one embodiment, the voltage detection circuit includes:
the cathode of the diode is connected with the first voltage, and the anode of the diode is connected with the control end of the switching tube;
and one end of the detection resistor is connected with the control end of the switch tube, and the other end of the detection resistor is connected with the second voltage.
The second doping area of the second conduction type, the first doping area of the first conduction type and the detection resistor in the electrostatic protection structure form a voltage detection circuit, so that lower-voltage triggering can be realized, better ESD protection can be realized, and excessive layout area cannot be wasted.
According to the electrostatic protection circuit, the voltage detection circuit is arranged, so that lower voltage triggering can be realized, better ESD protection can be realized, and excessive layout area cannot be wasted.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic cross-sectional structure diagram of an electrostatic protection structure provided in an embodiment of the present application;
FIG. 2 is a current-voltage simulation curve of the electrostatic protection structure of the present application with a conventional low threshold voltage SCR device; wherein, curve (1) in fig. 2 is a current-voltage simulation curve of the electrostatic protection structure of the present application, and curve (2) in fig. 2 is a current-voltage simulation curve of the conventional low-threshold voltage silicon controlled rectifier device;
FIG. 3 is a current leakage simulation curve of the ESD protection structure of the present application with a conventional low threshold voltage SCR device; wherein, a curve (1) in fig. 3 is a leakage simulation curve of the electrostatic protection structure of the present application, and a curve (2) in fig. 3 is a leakage simulation curve of the conventional low threshold voltage silicon controlled rectifier device;
fig. 4 is a circuit diagram of an electrostatic protection circuit provided in another embodiment of the present application.
Description of the reference numerals:
110-substrate of second conductivity type, 120-well region of first conductivity type, 130-well region of second conductivity type, 121-second doped region of second conductivity type, 122-first doped region of first conductivity type, 123-first doped region of second conductivity type, 131-third doped region of first conductivity type, 132-third doped region of second conductivity type, 141-second doped region of first conductivity type, 151-gate, 160-shallow trench isolation structure, 210-darlington structure, 211-voltage detection circuit.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first power supply input may be referred to as a second power supply input, and similarly, a second power supply input may be referred to as a first power supply input, without departing from the scope of the present application. The first power supply input and the second power supply input are both power supply inputs, but they are not the same power supply input.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
Referring to fig. 1, the present invention provides an electrostatic protection structure, which includes: a well region 120 of a first conductivity type, the well region 120 of the first conductivity type being located within the substrate 110 of a second conductivity type; a well region 130 of the second conductivity type, the well region 130 of the second conductivity type being located within the substrate 110 of the second conductivity type and adjoining the well region 120 of the first conductivity type; a first doped region 122 of the first conductivity type, the first doped region 122 of the first conductivity type being located in the well region 120 of the first conductivity type; a second doped region 141 of the first conductivity type, the second doped region 141 of the first conductivity type extending from the well region 120 of the first conductivity type to the well region 130 of the second conductivity type and having a distance with the first doped region 122 of the first conductivity type; a first doped region 123 of the second conductivity type, the first doped region 123 of the second conductivity type being located in the well region 120 of the first conductivity type, and being located between the first doped region 122 of the first conductivity type and the second doped region 141 of the first conductivity type, and having a distance from both the first doped region 122 of the first conductivity type and the second doped region 141 of the first conductivity type; a second doped region 121 of the second conductivity type, the second doped region 121 of the second conductivity type being located in the well region 120 of the first conductivity type, located on a side of the first doped region 122 of the first conductivity type far away from the first doped region 123 of the second conductivity type, and adjacent to the first doped region 122 of the first conductivity type; a third doped region 132 of the second conductivity type, the third doped region 132 of the second conductivity type being located in the well region 130 of the second conductivity type and having a distance with the second doped region 141 of the first conductivity type; a third doped region 131 of the first conductivity type, the third doped region 131 of the first conductivity type being located in the well region 130 of the second conductivity type and being located between the third doped region 132 of the second conductivity type and the second doped region 141 of the first conductivity type, and having a distance from both the third doped region 132 of the second conductivity type and the second doped region 141 of the first conductivity type; a gate 151, the gate 151 being located on the surface of the substrate 110 of the second conductivity type and located between the second doped region 141 of the first conductivity type and the third doped region 131 of the first conductivity type; a sensing resistor R1, wherein one end of the sensing resistor R1 is connected to the second conductive type second doped region 121 and the gate 151, and the other end is connected to the first conductive type third doped region 131 and the second conductive type third doped region 132.
The second doped region 121 of the second conductivity type, the first doped region 122 of the first conductivity type, and the detection resistor R1 in the electrostatic protection structure form a voltage detection circuit, which can implement triggering at a lower voltage, implement better ESD protection, and simultaneously not waste too much layout area.
In one example, the first doping region 122 of the first conductivity type, the second doping region 141 of the first conductivity type, the third doping region 131 of the first conductivity type, the first doping region 123 of the second conductivity type, the second doping region 121 of the second conductivity type, and the third doping region 132 of the second conductivity type are all heavily doped regions; the well region 120 of the first conductivity type and the well region 130 of the second conductivity type are both lightly doped regions; the substrate 110 of the second conductive type may also be a lightly doped region.
Specifically, the second conductive type substrate 110 may include, but is not limited to, a silicon substrate or a germanium substrate.
In one example, the electrostatic protection structure further includes a plurality of shallow trench isolation structures 160, the plurality of shallow trench isolation structures 160 are respectively located on a side of the second doped region 121 of the second conductivity type away from the first doped region 122 of the first conductivity type, between the first doped region 122 of the first conductivity type and the first doped region 123 of the second conductivity type, between the first doped region 123 of the second conductivity type and the second doped region 141 of the first conductivity type, and between the third doped region 131 of the first conductivity type and the third doped region 132 of the second conductivity type.
Specifically, the longitudinal cross-sectional shape of the shallow trench isolation structure 160 may be rectangular, inverted trapezoid, or semi-ellipse, and the bottom of the shallow trench isolation structure 160 is higher than the bottom of the first conductivity type well region 120 and the bottom of the second conductivity type well region 130.
In one example, the depth of the first conductive-type first doping region 122, the depth of the first conductive-type second doping region 141, the depth of the first conductive-type third doping region 131, the depth of the second conductive-type first doping region 123, the depth of the second conductive-type second doping region 121, and the depth of the second conductive-type third doping region 130 are all less than the depth of the shallow trench isolation structure.
In one example, the first doping region 122 of the first conductive type and the first doping region 123 of the second conductive type are electrically connected to the anode; one end of the detection resistor R1, which is far away from the second doped region 121 of the second conductivity type, the third doped region 131 of the first conductivity type and the third doped region 132 of the second conductivity type are electrically connected to the cathode. Here, the anode and the cathode are the anode and the cathode of the electrostatic protection circuit of the present application.
Specifically, the first doped region 122 of the first conductivity type and the second doped region 121 of the second conductivity type constitute a diode. More specifically, the diode is a zener diode.
In one example, the first conductive type may include an N-type, and the second conductive type may include a P-type. Of course, in other examples, the first conductivity type may include P-type and the second conductivity type may include N-type.
Taking the first conductivity type may include an N-type, and the second conductivity type may include a P-type as an example, when a forward ESD pulse signal is applied to the anode (cathode is grounded), the PN junction formed by the first doped region 122 of the first conductivity type and the second doped region 121 of the second conductivity type is reversely biased, the temperature rises, the reverse bias current increases, a voltage drop is formed on the detection resistor R1, since the gate 151 is connected to the second doped region 121 of the second conductivity type, when the voltage drop on the detection resistor R1 increases, a channel of the first conductivity type is formed below the gate 151, an NMOS transistor is turned on by the second doped region 141 of the first conductivity type, the gate 151, the third doped region 131 of the first conductivity type, and the well region 130 of the second conductivity type, so that the NPN transistor formed by the well region 120 of the first conductivity type, the well region 130 of the second conductivity type, and the well region 131 of the first conductivity type is turned on, and a parasitic PNP transistor formed by the first doped region 123 of the second conductivity type, the well region 120 of the first conductivity type and the SCR 130, and the parasitic current drain path of the PNP transistor is formed. When the ESD pulse passes, the reverse bias current is reduced, and the NMOS tube is closed.
In this embodiment, on the basis of the conventional LVTSCR device, a new voltage detection circuit is configured by additionally providing a second doped region 121 of the second conductivity type and an additional resistor (detection resistor R1), the voltage detection circuit effectively avoids the waste of the layout area by using the heavily doped region of the original device, and meanwhile, through TCAD simulation, the voltage detection circuit can more effectively reduce the trigger voltage of the SCR device and improve the ESD protection capability of the device, as shown in fig. 2, the trigger voltage of the conventional LVTSCR device is about 10.5V, and the trigger voltage of the improved LVTSCR device provided by this embodiment is about 4.2V; meanwhile, TCAD simulation is carried out on the leakage situations of the LVTSCR and the LVTSCR, the influence of an additionally arranged voltage detection circuit on the leakage is small, the leakage current of the traditional LVTSCR is in the magnitude of 2.5E-9, the leakage current of the improved LVTSCR provided by the embodiment is in the magnitude of 2.5E-9 when the operating voltage is smaller than 0.5V, the leakage current of the improved LVTSCR is below 1.4V and in the magnitude of 1.5E-8 when the operating voltage is larger than 0.5V, and the leakage current is in an acceptable range as shown in figure 3.
Referring to fig. 4, the present application further provides an electrostatic protection circuit, including: a darlington structure 210, the darlington structure 210 including a first end, a second end, a third end, and a fourth end; a first terminal of the darlington structure 210 is connected to a first voltage (applied on the anode in fig. 4), and a second terminal of the darlington structure is connected to a second voltage (applied on the cathode); the voltage detection circuit 211 is provided, one end of the voltage detection circuit 211 is connected with a first voltage, and the other end of the voltage detection circuit 211 is connected with a second voltage; the switching tube M1, the switching tube M1 includes control end, first end and second end; the control end of the switch tube M1 is connected to the voltage detection circuit 211, the first end of the switch tube M1 is connected to the third end of the darlington structure 210, and the second end of the switch tube M1 is connected to the second voltage.
By arranging the voltage detection circuit 211 in the electrostatic protection circuit, triggering of lower voltage can be realized, better ESD protection can be realized, and excessive layout area cannot be wasted.
In one example, the darlington structure 210 includes a first transistor Q1 and a second transistor Q2; first triode Q1 includes PNP type triode, and second triode Q2 includes NPN type triode, the first end of darlington structure 210 is regarded as to first triode Q1's emission pole, and the second end of darlington structure 210 is regarded as to second triode Q2's emission pole, and the third end of darlington structure 210 is regarded as jointly behind first triode Q1's the base and second triode Q2's the collecting electrode short circuit, and the fourth end of darlington structure 210 is regarded as jointly behind first triode Q1's the collecting electrode and second triode Q2's the base short circuit.
In one example, the darlington structure 210 further comprises: one end of the first parasitic resistor Rpw is connected to the fourth end of the darlington structure 210, and the other end of the first parasitic resistor Rpw is connected to the second voltage; and one end of the second parasitic resistor Rnw is connected with the third end of the darlington structure 210, and the other end of the second parasitic resistor Rnw is connected with the first voltage.
In one example, the switching tube M1 may include a transistor.
Specifically, the switching tube M1 may include an NMOS tube, a gate of the NMOS tube is a control end of the switching tube M1, a drain of the NMOS tube is connected to the third end of the darlington structure 210, and a source of the NMOS tube is connected to the second voltage.
In one example, the first voltage is greater than the second voltage.
In one example, the voltage detection circuit 211 may include: the cathode of the diode D1 is connected with a first voltage, and the anode of the diode D1 is connected with the control end of the switch tube M1; and one end of the detection resistor R1 is connected with the control end of the switch tube M1, and the other end of the detection resistor R1 is connected with a second voltage.
Specifically, the esd protection circuit in fig. 4 may be an equivalent circuit of the esd protection structure in fig. 1, wherein the second doped region 141 of the first conductivity type, the gate 151, the third doped region 131 of the first conductivity type and the well 130 of the second conductivity type in fig. 1 constitute the switching tube M1 in fig. 4; the well region 120 of the first conductivity type, the well region 130 of the second conductivity type and the third doped region 131 of the first conductivity type in fig. 1 constitute a second transistor Q2 in fig. 4; the first doping region 123 of the second conductivity type, the well region 120 of the first conductivity type, and the well region 130 of the second conductivity type in fig. 1 constitute a first transistor Q1 in fig. 4; the first and second doping regions 122 and 121 of the first and second conductivity types of fig. 1 constitute the diode D1 of fig. 4; the detection resistor R1 in fig. 1 is the detection resistor R1 in fig. 4.
In the description herein, reference to the description of "one of the embodiments," "the other embodiments," or the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
Various technical features of the above embodiments may be combined arbitrarily, and for brevity, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction between the combinations of these technical features, the ranges described in the present specification should be considered.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent should be subject to the appended claims.

Claims (15)

1. An electrostatic protection structure, comprising:
a well region of a first conductivity type located within a substrate of a second conductivity type;
a well region of a second conductivity type located within the substrate of the second conductivity type and contiguous with the well region of the first conductivity type;
the first doping area of the first conduction type is positioned in the well area of the first conduction type;
a second doped region of a first conductivity type extending from the well region of the first conductivity type to the well region of the second conductivity type and having a spacing from the first doped region of the first conductivity type;
a first doped region of a second conductivity type located in the well region of the first conductivity type and having a spacing from both the first doped region of the first conductivity type and the second doped region of the first conductivity type;
the second doped region of the second conductivity type is positioned in the well region of the first conductivity type, positioned on one side of the first doped region of the first conductivity type, far away from the first doped region of the second conductivity type, and adjacent to the first doped region of the first conductivity type;
a third doped region of the second conductivity type located within the well region of the second conductivity type and having a spacing from the second doped region of the first conductivity type;
a third doped region of the first conductivity type located within the well region of the second conductivity type and having a spacing from both the third doped region of the second conductivity type and the second doped region of the first conductivity type;
the grid electrode is positioned on the surface of the substrate of the second conduction type and is positioned between the second doping area of the first conduction type and the third doping area of the first conduction type;
and the detection resistor is connected with the second doped region of the second conductivity type and the grid at one end, and is connected with the third doped region of the first conductivity type and the third doped region of the second conductivity type at the other end.
2. The electrostatic protection structure of claim 1, wherein the first doped region of the first conductivity type, the second doped region of the first conductivity type, the third doped region of the first conductivity type, the first doped region of the second conductivity type, the second doped region of the second conductivity type, and the third doped region of the second conductivity type are heavily doped regions; the well region of the first conductivity type and the well region of the second conductivity type are both lightly doped regions.
3. The ESD protection structure of claim 1 further comprising a plurality of shallow trench isolation structures respectively located on a side of the second doped region of the second conductivity type away from the first doped region of the first conductivity type, between the first doped region of the first conductivity type and the first doped region of the second conductivity type, between the first doped region of the second conductivity type and the second doped region of the first conductivity type, and between the third doped region of the first conductivity type and the third doped region of the second conductivity type.
4. The electrostatic protection structure of claim 3, wherein a depth of the first doped region of the first conductivity type, a depth of the second doped region of the first conductivity type, a depth of the third doped region of the first conductivity type, a depth of the first doped region of the second conductivity type, a depth of the second doped region of the second conductivity type, and a depth of the third doped region of the second conductivity type are all less than a depth of the shallow trench isolation structure.
5. The electrostatic protection structure of claim 1,
the first doped region of the first conductivity type and the first doped region of the second conductivity type are electrically connected with an anode;
one end of the detection resistor, which is far away from the second doped region of the second conductivity type, the third doped region of the first conductivity type and the third doped region of the second conductivity type are electrically connected with a cathode.
6. The electrostatic protection structure of claim 1, wherein the substrate of the second conductivity type comprises a silicon substrate or a germanium substrate of the second conductivity type.
7. The ESD structure of claim 1 wherein the first doped region of the first conductivity type and the second doped region of the second conductivity type form a diode.
8. The ESD protection structure of any of claims 1-7 wherein the first conductivity type comprises N-type and the second conductivity type comprises P-type.
9. An electrostatic protection circuit, comprising:
a Darlington structure comprising a first end, a second end, a third end, and a fourth end; a first end of the Darlington structure is connected with a first voltage, and a second end of the Darlington structure is connected with a second voltage;
a voltage detection circuit, one end of which is connected with the first voltage and the other end of which is connected with the second voltage;
the switch tube comprises a control end, a first end and a second end; the control end of the switch tube is connected with the voltage detection circuit, the first end of the switch tube is connected with the third end of the Darlington structure, and the second end of the switch tube is connected with the second voltage.
10. The esd protection circuit of claim 9, wherein the darlington structure comprises a first transistor and a second transistor; first triode includes PNP type triode, the second triode includes NPN type triode, the transmitting pole of first triode is very the first end of darlington structure, the transmitting pole of second triode is very the second end of darlington structure, the base of first triode with regard as jointly behind the collecting electrode short circuit of second triode the third end of darlington structure, the collecting electrode of first triode with regard as jointly behind the base short circuit of second triode the fourth end of darlington structure.
11. The electrostatic protection circuit of claim 10, wherein the darlington structure further comprises:
one end of the first parasitic resistor is connected with the fourth end of the Darlington structure, and the other end of the first parasitic resistor is connected with the second voltage;
and one end of the second parasitic resistor is connected with the third end of the Darlington structure, and the other end of the second parasitic resistor is connected with the first voltage.
12. The esd protection circuit of claim 9, wherein the switch tube comprises a transistor.
13. The esd protection circuit of claim 12, wherein the switch transistor comprises an NMOS transistor, a gate of the NMOS transistor is a control terminal of the switch transistor, a drain of the NMOS transistor is connected to the third terminal of the darlington structure, and a source of the NMOS transistor is connected to the second voltage.
14. The esd protection circuit of claim 9, wherein the first voltage is greater than the second voltage.
15. The electrostatic protection circuit according to any one of claims 9 to 14, wherein the voltage detection circuit includes:
the cathode of the diode is connected with the first voltage, and the anode of the diode is connected with the control end of the switching tube;
and one end of the detection resistor is connected with the control end of the switch tube, and the other end of the detection resistor is connected with the second voltage.
CN202110731911.1A 2021-06-29 2021-06-29 Electrostatic protection structure and electrostatic protection circuit Pending CN115548010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110731911.1A CN115548010A (en) 2021-06-29 2021-06-29 Electrostatic protection structure and electrostatic protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110731911.1A CN115548010A (en) 2021-06-29 2021-06-29 Electrostatic protection structure and electrostatic protection circuit

Publications (1)

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