CN115390616A - Biasing device - Google Patents
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- CN115390616A CN115390616A CN202211306863.2A CN202211306863A CN115390616A CN 115390616 A CN115390616 A CN 115390616A CN 202211306863 A CN202211306863 A CN 202211306863A CN 115390616 A CN115390616 A CN 115390616A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Abstract
The application provides a biasing device, and relates to the technical field of integrated circuits. The biasing apparatus includes: a temperature sensor, a bias module; collecting temperature information of a chip in a circuit to be corrected during working by using a temperature sensor, and converting the collected temperature information into a temperature control code word; the temperature sensor transmits the temperature control code word to the bias module; meanwhile, a reference device is arranged in the bias module, the process angle of the reference device is the same as the process angle of a chip in the circuit to be corrected, the bias module generates a reference current according to the threshold voltage under the process angle of the reference device, the bias module generates a bias current according to the temperature control code word and the reference current, and the bias module is insensitive to the change of the power supply voltage. Therefore, the bias current can be used for correcting the influence of the PVT deviation on the performance of a circuit to be corrected, so that the problem that the PVT deviation cannot be introduced simultaneously in the prior art is solved.
Description
Technical Field
The present application relates to the field of integrated circuit technology, and more particularly, to a biasing apparatus.
Background
In general, there is a certain process variation in the manufacture of chips between different wafers and different batches, so that the power supply system often has a certain voltage fluctuation when the chips are used. In addition, the Temperature of the operating environment of the chip varies greatly, and these process corner, voltage and Temperature (PVT) deviations will cause parameters such as carrier mobility, threshold Voltage, noise, etc. of the transistor to vary greatly, so the PVT deviations have a great influence on the performance of the integrated circuit, especially on the analog radio frequency integrated circuit.
Currently, in order to reduce the influence of PVT bias, the chip usually employs the following conventional bias circuits to correct PVT bias: the constant transconductance biasing circuit, the biasing circuit of threshold reference, the band gap reference biasing circuit. The constant transconductance biasing circuit has the advantages of simple circuit structure and insensitivity to power supply voltage change, and the problem of temperature and process angle deviation introduction cannot be solved when the resistor is realized in a chip; (2) The bias circuit of the threshold reference is similar to the constant transconductance bias circuit, and can only solve the influence caused by voltage deviation and cannot simultaneously solve the influence caused by process angle and temperature deviation; (3) Although the bandgap reference bias circuit is a bias which is not affected by power voltage and temperature deviation, the transistor parameters of the circuit to be corrected also change with temperature, so that the bandgap reference bias circuit cannot solve the influence caused by temperature change, and in addition, the effect of the bandgap reference bias circuit on suppressing the influence of process angle deviation is poor.
Therefore, it is desirable to provide a new bias circuit structure to solve the above problems of the conventional bias circuits that cannot simultaneously solve the PVT bias introduction problem.
Disclosure of Invention
The present application is directed to provide a bias apparatus for overcoming the effect of three process corner, voltage and temperature (PVT) deviations on the performance of a circuit to be corrected.
In order to achieve the above purpose, the embodiments of the present application adopt the following technical solutions:
an embodiment of the present application provides a biasing apparatus, the apparatus includes: the temperature sensor is arranged in a circuit to be corrected, and a chip is arranged in the circuit to be corrected;
the temperature sensor is used for acquiring temperature information of the circuit to be corrected when the chip works and converting the temperature information into a temperature control code word;
the output end of the temperature sensor is connected with the input end of the offset module, and the temperature sensor is also used for transmitting the temperature control code word to the offset module;
a reference device is arranged in the bias module, and the process angle of the reference device is the same as the process angle of the chip in the circuit to be corrected;
the bias module is used for generating a reference current according to a preset voltage of the reference device under the process corner, generating a bias current of the circuit to be corrected according to the temperature control code word and the reference current, and outputting the bias current to the circuit to be corrected through an output end of the bias module.
Optionally, the biasing module comprises: the device comprises a first generator module, a second generator module and a current synthesizer module;
the input end of the first generator module is used for being connected with a power supply end, a reference device is arranged in the first generator module, the first generator module is used for generating a first reference current according to a preset voltage of the reference device under the process corner, and the first reference current is a reference current with a negative temperature coefficient;
the input end of the second generator module is used for being connected with a power supply end, the second generator module is used for generating a second reference current according to the actual working parameters of each device in the second generator module, and the second reference current is a reference current with a positive temperature coefficient;
the input end of the current synthesizer module is respectively connected with the output end of the first generator module, the output end of the second generator module and the output end of the temperature sensor;
the current synthesizer module is configured to perform weighting processing on the first reference current output by the first generator module and the second reference current output by the second generator module according to the temperature control codeword output by the temperature sensor, so as to generate the bias current.
Optionally, the first generator module comprises: the circuit comprises a first current mirror, a second current mirror, a first transistor and a first resistor, wherein the first transistor is the reference device;
the first end of the first current mirror is connected with a power supply end; the second end of the first current mirror is connected with one end of the second current mirror, and the third end of the first current mirror is connected with the input end of the current synthesizer module;
the other end of the second current mirror is respectively connected with the first end of the first transistor, the second end of the first transistor and one end of the first resistor;
and the third end of the first transistor and the other end of the first resistor are both connected with a grounding end.
Optionally, the first current mirror comprises: a second transistor and a third transistor; the second current mirror includes: a fourth transistor and a fifth transistor;
the first end of the second transistor and the first end of the third transistor are both the first end of the first current mirror, the third end of the second transistor and the third end of the third transistor are both the second end of the first current mirror, and the second end of the third transistor is the third end of the first current mirror;
a first end of the fourth transistor and a first end of the fifth transistor are both ends of the second current mirror, and a third end of the fourth transistor and a third end of the fifth transistor are both ends of the second current mirror;
a first end of the second transistor and a first end of the third transistor are respectively connected with the power supply end; a second terminal of the second transistor is connected to a second terminal of the third transistor; the third end of the second transistor is connected with the first end of the fourth transistor;
a third end of the third transistor is connected with a second end of the third transistor and a first end of the fifth transistor respectively; the second end of the third transistor is also connected with the input end of the current synthesizer module;
a first end of the fourth transistor is connected with a second end of the fourth transistor; a second terminal of the fourth transistor is connected with a second terminal of the fifth transistor; the third end of the fourth transistor is connected with the first end of the first transistor;
and the third end of the fifth transistor is respectively connected with the second end of the first transistor and one end of the first resistor.
Optionally, the second generator module comprises: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a second resistor;
a first end of the sixth transistor and a first end of the seventh transistor are respectively connected with a power supply terminal, and a second end of the sixth transistor is respectively connected with a second end of the seventh transistor and a third end of the sixth transistor; a third end of the sixth transistor is connected with a first end of the eighth transistor and an input end of the current synthesizer module respectively;
a second end of the eighth transistor is connected with a second end of the ninth transistor, a first end of the ninth transistor is connected with a second end of the ninth transistor, and a third end of the ninth transistor is connected with a ground terminal;
and a third end of the eighth transistor is connected with one end of the second resistor, and the other end of the second resistor is connected with the grounding end.
Optionally, wherein the temperature control codeword is a binary codeword;
the current synthesizer module includes: a tenth transistor forming a current mirror pair with the third transistor, at least one set of switch arrays forming a current mirror pair with the sixth transistor; each group of switch arrays comprises a current mirror transistor and a switch transistor;
a first end of a switch transistor in the switch array is connected with the power supply end, a second end of the switch transistor in the switch array is connected with a temperature control code word signal line corresponding to the binary code word, and a third end of the switch transistor in the switch array is connected with a first end of a current mirror transistor in the second group of switch arrays;
a second end of a current mirror transistor in the switch array is respectively connected with a second end of a sixth transistor in the second generator module and a third end of the sixth transistor, and the third end of the current mirror transistor in the switch array is connected with a third end of the tenth transistor;
a first terminal of the tenth transistor is connected to the power supply terminal, and a second terminal of the tenth transistor is connected to a second terminal of a third transistor in the first generator module and a third terminal of the third transistor, respectively.
Optionally, the bias module further comprises: a current-voltage conversion module;
the input end of the current-voltage conversion module is connected with the output end of the current synthesizer module, and the current-voltage conversion module is used for converting the bias current generated by the current synthesizer module into bias voltage;
and the output end of the current-voltage conversion module is connected with the output end of the circuit to be corrected.
Optionally, the current-voltage conversion module includes: an eleventh transistor, a third resistor;
a first end of the eleventh transistor is connected with a second end of the eleventh transistor, a third end of a tenth transistor in the current synthesizer module, and an output end of the circuit to be corrected respectively;
one end of the third resistor is connected to the third end of the eleventh transistor, and the other end of the third resistor is connected to a ground terminal.
Optionally, the bias module further comprises: a start-up module for preventing the bias module from operating in a dead zone;
the output end of the starting module is connected with the output end of a second generator module in the offset module.
Optionally, the starting module includes: a twelfth transistor, a thirteenth transistor, and a fourth resistor;
a first end of the twelfth transistor is connected with a third end of a sixth transistor in the second generator module;
one end of the fourth resistor is connected to the power supply terminal, and the other end of the fourth resistor is connected to the second end of the twelfth transistor and the first end of the thirteenth transistor respectively;
a second end of the thirteenth transistor is respectively connected with a second end of a ninth transistor in the second generator module and a first end of the ninth transistor;
and the third end of the thirteenth transistor is connected with the grounding end.
The beneficial effect of this application is:
the embodiment of the present application provides a new biasing apparatus, which includes: a temperature sensor, a bias module; the temperature sensor is arranged in the circuit to be corrected, and a chip is arranged in the circuit to be corrected; collecting temperature information of a chip in a circuit to be corrected during working by using a temperature sensor, and converting the collected temperature information into a temperature control code word; the output end of the temperature sensor is connected with the input end of the offset module, and the temperature sensor transmits the temperature control code word to the offset module; meanwhile, a reference device is arranged in the bias module, the process corner of the reference device is the same as the process corner of a chip in the circuit to be corrected, namely the bias module generates a reference current according to the threshold voltage under the process corner of the reference device, the bias module generates a bias current (the bias current has the process corner and the temperature compensation effect) aiming at the circuit to be corrected according to the temperature control code word and the reference current, the bias current is output to the circuit to be corrected through the output end of the bias module, and the bias module is insensitive to the change of the power supply voltage, so that the bias current can be used for correcting the influence of the PVT deviation on the performance of the circuit to be corrected, the output current (or the output voltage) of the output end of the circuit to be corrected is stabilized, and the problem that the PVT deviation cannot be introduced in the prior art is effectively solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a biasing apparatus according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a biasing module in a biasing apparatus according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a first generator module in a bias module according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a current synthesizer module in a bias module according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a second generator module in an offset module according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of another bias module provided in the embodiment of the present application;
fig. 7 is a schematic structural diagram of a current-to-voltage conversion module in a bias module according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of another bias module provided in the embodiment of the present application;
fig. 9 is a schematic structural diagram of a starting module in a bias module according to an embodiment of the present disclosure.
Icon: 100-a biasing means; 101-a temperature sensor; 102-a bias module; 201-a first generator module; 202-a second generator module; 203-a current synthesizer module; 301-a first current mirror; 302-a second current mirror; 501-a first set of switch arrays; 502-a second set of switch arrays; 601-a current voltage conversion module; 801-start-up module.
Detailed Description
In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it should be understood that the drawings in the present application are for illustrative and descriptive purposes only and are not used to limit the scope of protection of the present application. Additionally, it should be understood that the schematic drawings are not necessarily drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of the present application. It should be understood that the operations of the flow diagrams may be performed out of order, and that steps without logical context may be reversed in order or performed concurrently. One skilled in the art, under the guidance of this application, may add one or more other operations to, or remove one or more operations from, the flowchart.
In addition, the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that in the embodiments of the present application, the term "comprising" is used to indicate the presence of the features stated hereinafter, but does not exclude the addition of further features.
First, before the technical solutions provided in the present application are explained in detail, the related background related to the present application will be briefly explained.
At present, in order to reduce the influence of PVT bias, the chip usually employs the following conventional bias circuits to correct PVT bias: the constant transconductance biasing circuit, the biasing circuit of threshold reference, the band gap reference biasing circuit. The constant transconductance biasing circuit has the advantages of simple circuit structure and insensitivity to power supply voltage change, and the problem of temperature and process angle deviation introduction cannot be solved when the resistor is realized in a chip; (2) The bias circuit of the threshold reference is similar to the constant transconductance bias circuit, and can only solve the influence caused by voltage deviation and cannot solve the influence caused by process angle and temperature deviation; (3) Although the bandgap reference bias circuit is not biased by the power voltage and temperature deviation, the transistor parameters of the circuit to be corrected also change with the temperature, so that the bandgap reference bias circuit cannot solve the influence caused by the temperature change, and the effect of the bandgap reference bias circuit on suppressing the influence of the process corner deviation is poor.
In order to solve the technical problems in the prior art, the present application proposes a new biasing apparatus structure, which includes: a temperature sensor, a bias module; the temperature sensor is arranged in the circuit to be corrected, and a chip is arranged in the circuit to be corrected; collecting temperature information of a chip in a circuit to be corrected during working by using a temperature sensor, and converting the collected temperature information into a temperature control code word; the output end of the temperature sensor is connected with the input end of the offset module, and the temperature sensor transmits the temperature control code word to the offset module; meanwhile, a reference device is arranged in the bias module, the process corner of the reference device is the same as the process corner of a chip in the circuit to be corrected, namely the bias module generates a reference current according to the threshold voltage under the process corner of the reference device, the bias module generates a bias current (the bias current has the process corner and the temperature compensation effect) aiming at the circuit to be corrected according to the temperature control code word and the reference current, the bias current is output to the circuit to be corrected through the output end of the bias module, and the bias module is insensitive to the change of the power supply voltage, so that the bias current can be used for correcting the influence of the PVT deviation on the performance of the circuit to be corrected, the output current (or the output voltage) of the output end of the circuit to be corrected is stabilized, and the problem that the PVT deviation cannot be introduced in the prior art is effectively solved.
The specific structure and the corresponding advantageous effects of the biasing device provided in the present application will be described below by way of several embodiments.
Referring to fig. 1, a bias apparatus 100 according to the present application is provided, in which the bias apparatus 100 can be used to correct the influence of PVT deviations on the performance of a circuit to be corrected, so as to improve the reliability and stability of the operation of the circuit to be corrected.
Wherein, this biasing means 100 includes: the calibration circuit comprises a temperature sensor 101 and a bias module 102, wherein the temperature sensor 101 is arranged in a circuit to be calibrated, and a chip is arranged in the circuit to be calibrated. Illustratively, the circuit to be corrected may be a radio frequency amplifier.
The temperature sensor 101 is used for collecting temperature information of a chip in the circuit to be corrected during working and converting the temperature information into a temperature control code word. For example, the temperature information acquired by the temperature sensor 101 when the chip in the radio frequency amplifier works is 10 ℃, and the temperature control code word obtained after the temperature sensor 101 converts the temperature information by 10 ℃ is S0S1 … Sn. Namely, the temperature sensor 101 can be used to detect the working temperature of the chip in real time and generate a real-time temperature control code word, so as to monitor the temperature change condition of the chip during working in real time.
The output terminal of the temperature sensor 101 is connected to the input terminal of the offset module 102, and the temperature sensor 101 is further configured to transmit the temperature control codeword to the offset module 102.
Meanwhile, a reference device is arranged in the bias module, and the process angle of the reference device is the same as the process angle of the chip in the circuit to be corrected. It should be understood that the above-mentioned reference devices are components manufactured in the same batch as the chip in the circuit to be corrected, i.e. the deviations of the process corners of both are almost the same.
The bias module is used for generating reference current according to the preset intrinsic threshold voltage of the reference device under the process angle, adjusting the reference current proportion according to the control code word obtained by the ambient temperature, generating bias current of the circuit to be corrected, and outputting the bias current to the circuit to be corrected through the output end of the bias module.
Illustratively, the process corner characterization quantity is a transistor threshold voltageV TH . For example, the reference device is a transistor (or a diode, a triode, etc.), and the process angle of the reference device is different, which may further cause the threshold voltage of the reference deviceV TH And also different.
In this embodiment, the bias module is configured to bias the threshold voltage according to the process corner of the reference deviceV TH Generating a reference current, and generating a bias current together according to the temperature control code word and the reference current, i.e. the bias current has a process angle and a temperature complementThe effect is compensated, and meanwhile, the bias module is insensitive to the change of the power supply voltage; finally, the bias current is output to the circuit to be corrected through the output end of the bias module, so that the influence of PVT deviation on the performance of the circuit to be corrected is corrected by utilizing the bias current, the effect of stabilizing the output current (or output voltage) of the output end of the circuit to be corrected is achieved, and the problem that PVT deviation cannot be introduced simultaneously in the prior art is effectively solved.
In summary, the present application provides a novel biasing apparatus, which includes: a temperature sensor, a bias module; the temperature sensor is arranged in the circuit to be corrected, and a chip is arranged in the circuit to be corrected; collecting temperature information of a chip in a circuit to be corrected during working by using a temperature sensor, and converting the collected temperature information into a temperature control code word; the output end of the temperature sensor is connected with the input end of the offset module, and the temperature sensor transmits the temperature control code word to the offset module; meanwhile, a reference device is arranged in the bias module, the process corner of the reference device is the same as the process corner of a chip in the circuit to be corrected, namely the bias module generates a reference current according to the threshold voltage under the process corner of the reference device, the bias module generates a bias current (the bias current has the process corner and the temperature compensation effect) aiming at the circuit to be corrected according to the temperature control code word and the reference current, the bias current is output to the circuit to be corrected through the output end of the bias module, and the bias module is insensitive to the change of the power supply voltage, so that the bias current can be used for correcting the influence of the PVT deviation on the performance of the circuit to be corrected, the output current (or the output voltage) of the output end of the circuit to be corrected is stabilized, and the problem that the PVT deviation cannot be introduced in the prior art is effectively solved.
The structure of the bias module in fig. 1 will be described in detail by the following embodiments.
Referring to fig. 2, the bias module 102 includes: a first generator module 201, a second generator module 202, a current synthesizer module 203. Illustratively, for example, the first generator module 201 may be an inverse Absolute Temperature (CTAT) current generator, and the second generator module 202 may be a Proportional Absolute Temperature (PTAT) current generator.
The input end of the first generator module 201 is used for connecting a power supply end, a reference device is arranged in the first generator module 201, the first generator module 201 is used for generating a first reference current according to a preset voltage of the reference device under a process corner, and the first reference current is a reference current with a negative temperature coefficient. The power supply end is a power supply end in the bias module.
In this embodiment, the first generator module 201 may set the threshold voltage according to the process corner at which the reference device is locatedV TH Generating a threshold voltage with reference deviceV TH A first reference current I1 in direct proportional relationship, and a threshold voltageV TH Is a parameter with a negative temperature coefficient, i.e. the first reference current I1 generated by the first generator module 201 is a current with a negative temperature coefficient.
The input terminal of the second generator module 202 is used for connecting a power supply terminal, and the second generator module 202 is used for generating a second reference current according to actual operating parameters of each device in the second generator module 202, where the second reference current is a reference current with a positive temperature coefficient.
In this embodiment, for example, the second generator module 202 may be a constant transconductance circuit, and the output current of the output terminal of the second generator module 202 and the electron mobility μ of the transistor in the second generator module 202 n Inversely proportional, and the electron mobility μ n ∝T -1.5 (T is temperature), that is, the second generator module 202 can generate a second reference current I2 with a positive temperature coefficient according to the actual operating parameters of the devices inside the second generator module 202.
The input terminals of the current synthesizer module 203 are connected to the output terminal of the first generator module 201, the output terminal of the second generator module 202, and the output terminal of the temperature sensor 101, respectively.
And the current synthesizer module 203 is configured to perform weighting processing on the first reference current output by the first generator module 201 and the second reference current output by the second generator module 202 according to the temperature control code word output by the temperature sensor 101, so as to generate the bias current.
In this embodiment, in order to enable the bias current generated by the current synthesizer module 203 to have the effect of compensating the process corner and the temperature deviation, that is, the output terminal of the first generator module 201, the output terminal of the second generator module 202, and the output terminal of the temperature sensor 101 are all connected to the input terminal of the current synthesizer module 203, the current synthesizer module 203 may perform weighting processing on the first reference current output by the first generator module 201 and the second reference current output by the second generator module 202 according to the temperature control code word output by the temperature sensor 101 to generate a bias current having the effect of compensating the process corner and the temperature, and the bias module is insensitive to the supply voltage variation. Therefore, the bias current can be used for correcting the influence of PVT deviation on the performance of the circuit to be corrected, and the stability of the output current (or the output voltage) of the output end of the circuit to be corrected is improved.
The first generator module structure in fig. 2 will be described in detail by the following embodiments.
Referring to fig. 3, the first generator module 201 includes: the circuit comprises a first current mirror 301, a second current mirror 302, a first transistor M1 and a first resistor R1. The first transistor M1 is a reference device.
In this embodiment, in order to avoid the complexity of the structure of the bias module proposed in the present application, the selected reference device is an MOS transistor (for example, a PMOS type transistor or an NMOS type transistor), and other components may also be selected as the reference device according to actual situations.
The first end 301 of the first current mirror is connected with a power supply end; the second terminal of the first current mirror 301 is connected to one terminal of the second current mirror 302, and the third terminal of the first current mirror 301 is connected to the input terminal of the current synthesizer module 203.
The other end of the second current mirror 302 is connected to the first end of the first transistor M1, the second end of the first transistor M1, and one end of the first resistor R1. The first end of the first transistor M1 is a drain, the second end of the first transistor M1 is a gate, and the third end of the first transistor M1 is a source.
The third end of the first transistor M1 and the other end of the first resistor R1 are both connected to the ground terminal.
Optionally, with continued reference to fig. 3, the first current mirror 301 comprises: a second transistor M2, a third transistor M3; the second current mirror includes: a fourth transistor M4, a fifth transistor M5.
The first end of the second transistor M2 and the first end of the third transistor M3 are both the first end of the first current mirror 301, the third end of the second transistor M2 and the third end of the third transistor M3 are both the second end of the first current mirror 301, and the second end of the third transistor M3 is the third end of the first current mirror 301.
The first end of the second transistor M2 is a source, the second end of the second transistor M2 is a gate, and the third end of the second transistor M2 is a drain; the first terminal of the third transistor M3 is a source, the second terminal of the third transistor M3 is a gate, and the third terminal of the third transistor M3 is a drain. I.e. the gate of the third transistor M3 is connected to the input of the current synthesizer module 203.
The first end of the fourth transistor M4 and the first end of the fifth transistor M5 are both ends of the second current mirror 302, and the third end of the fourth transistor M4 and the third end of the fifth transistor M5 are both ends of the second current mirror 302.
The first end of the fourth transistor M4 is a drain, the second end of the fourth transistor M4 is a gate, and the third end of the fourth transistor M4 is a source; a first end of the fifth transistor M5 is a drain, a second end of the fifth transistor M5 is a gate, and a third end of the fifth transistor M5 is a source.
In this embodiment, specifically, the first terminal of the second transistor M2 and the first terminal of the third transistor M3 are respectively connected to the power supply terminal VDD; a second terminal of the second transistor M2 is connected to a second terminal of the third transistor M3; the third terminal of the second transistor M2 is connected to the first terminal of the fourth transistor M4.
The third end of the third transistor M3 is connected to the second end of the third transistor M3 and the first end of the fifth transistor M5, respectively; the second terminal of the third transistor M3 is further connected to the input terminal of the current synthesizer module 203 to transmit the first reference current I1 generated by the first generator module 201 to the current synthesizer module 203 for processing by the current synthesizer module 203.
A first terminal of the fourth transistor M4 is connected to a second terminal of the fourth transistor M4; the second end M4 of the fourth transistor is connected with the second end of the fifth transistor M5; the third terminal of the fourth transistor M4 is connected to the first terminal of the first transistor M1.
The third end of the fifth transistor M5 is connected to the second end of the first transistor M1 and one end of the first resistor R1, respectively, and the other end of the first resistor R1 and the source of the first transistor M1 are both connected to the ground terminal.
Here, it should be noted that the circuit structure of the first generator module shown in fig. 3 is based on the improvement of a threshold reference circuit, in which the current flowing through the resistor R1 is equal to the threshold voltage of the transistor M1V TH The proportional relationship, and the threshold voltage of transistor M1 has a negative temperature coefficient, so the threshold reference circuit is a negative temperature coefficient circuit. The current drains on two sides in the conventional threshold reference are loaded differently, and the drain voltages thereof are different, so that the currents on two sides have slight mismatch due to the influence of channel modulation effect. Therefore, the clamp transistor M4 can be added to the circuit structure of the first generator module, so that the loads of current leakage are close to the same, the current mismatch condition of the threshold reference circuit is improved, and the influence of process angle deviation on the performance of the circuit to be corrected can be greatly inhibited.
In this embodiment, after the clamp transistor M4 is added to the circuit structure of the first generator module, the first reference current I1 generated by the first generator module is shown in the following formula (1):
wherein the content of the first and second substances,
i.e. the first generator module is based on the threshold voltage of the collecting transistor M1V TH By way of example, the first reference current I1 is generated, and the first reference current I1 is the threshold voltage of the transistor M1V TH A current in direct proportion. The first reference current I1 can be used to characterize a process corner of the transistor M1, i.e. the first reference current I1 can also characterize a process corner of a chip in the circuit to be corrected. The addition of the clamp transistor M4 compared to a conventional threshold reference circuit reduces the channel modulation effect and makes its output impedance larger.
The second generator module structure in fig. 2 will be described in detail by the following embodiments.
Referring to fig. 4, the second generator module 202 in fig. 2 may include: a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, and a second resistor R2.
The first end of the sixth transistor M6 is a source, the second end of the sixth transistor M6 is a gate, and the third end of the sixth transistor M6 is a drain; the first terminal of the seventh transistor M7 is a source, the second terminal of the seventh transistor M7 is a gate, and the third terminal of the seventh transistor M7 is a drain.
A first end of the eighth transistor M8 is a drain, a second end of the eighth transistor M8 is a gate, and a third end of the eighth transistor M8 is a source; the first terminal of the ninth transistor M9 is a drain, the second terminal of the ninth transistor M9 is a gate, and the third terminal of the ninth transistor M9 is a source.
In this embodiment, specifically, a first terminal of the sixth transistor M6 and a first terminal of the seventh transistor M7 are respectively connected to the power supply terminal VDD, and a second terminal of the sixth transistor M6 is respectively connected to a second terminal of the seventh transistor M6 and a third terminal of the sixth transistor M6; the third terminal of the sixth transistor M6 is connected to the first terminal of the eighth transistor M8 and the input terminal of the current synthesizer module 203, respectively.
A second terminal of the eighth transistor M8 is connected to a second terminal of the ninth transistor M9, a first terminal of the ninth transistor M9 is connected to a second terminal of the ninth transistor M9, and a third terminal of the ninth transistor M9 is connected to the ground terminal;
the third terminal of the eighth transistor M8 is connected to one terminal of the second resistor R2, and the other terminal of the second resistor R2 is connected to the ground terminal.
It should be noted that the second generator module is a constant transconductance circuit, that is, the second reference current I2 generated by the second generator module is shown in the following formula (2):
wherein, the first and the second end of the pipe are connected with each other,
i.e. the second reference current I2 generated by the second generator module is inversely proportional to the electron mobility μ n of the transistor M8, and μ n ∈ T -1.5 (T is temperature), the second reference current I2 has a positive temperature coefficient.
In this embodiment, a second reference current I2 with a positive temperature coefficient may be generated by the second generator module.
The current synthesizer module structure in fig. 2 will be described in detail by the following embodiments.
Referring to fig. 5, the temperature control code word is a binary code word.
The current synthesizer module 203 includes: the tenth transistor M10 and the third transistor M3 form a current mirror pair, and the sixth transistor M6 form at least one switch array of the current mirror pair, where each switch array includes one current mirror transistor and one switch transistor.
Referring to fig. 5, in the present embodiment, for example, taking any one set of switch arrays as an example, the first set of switch arrays 501 includes: a current mirror transistor Mc1 and a switching transistor Ms1; for another example, the second switch array 502 includes: a current mirror transistor Mc2 and a switching transistor Ms2; and the nth switch array includes: one current mirror transistor Mcn and one switch transistor Msn. Illustratively, current mirror transistor Mcn and switch transistor Msn may both be PMOS transistors.
The switch transistors in each group of switch arrays may include a single P-type transistor, a transmission gate, or other forms of switch circuits.
With continued reference to fig. 5, a first terminal of the switch transistor Ms1 in the first switch array 501 is connected to the power supply terminal VDD, a second terminal of the switch transistor Ms1 in the first switch array 501 is connected to the signal line S1 corresponding to the binary code word, and a third terminal of the switch transistor Ms1 in the first switch array 501 is connected to a first terminal of the current mirror transistor Mc1 in the first switch array 501.
The first end of the switch transistor Ms1 in the first switch array is a source, the second end of the switch transistor Ms1 is a gate, and the third end of the switch transistor Ms1 is a drain.
The first end of the current mirror transistor Mc1 in the first group of switch arrays is a source, the second end of the current mirror transistor Mc1 is a gate, and the third end of the current mirror transistor Mc1 is a drain.
In the present embodiment, the sources of the switch transistors (e.g. Ms1, ms2, …, msn) in each switch array are connected to the power source terminals, and the gates thereof are respectively connected to the N-bit external binary codeword S1S2 … Sn signal lines; that is, ms1 and Ms2 … Msn are switches formed of PMOS transistors, and other types of switch circuits may be used instead.
The second terminal of the current mirror transistor Mc1 in the first switch array 501 is connected to the second terminal of the sixth transistor M6 in the second generator module and the third terminal of the sixth transistor M6, respectively, and the third terminal of the current mirror transistor Mc1 in the first switch array 501 is connected to the third terminal of the tenth transistor M10.
A first terminal of the tenth transistor M10 is connected to the power source terminal VDD, and a second terminal of the tenth transistor M10 is connected to a second terminal of the third transistor M3 in the first generator module.
In the present embodiment, the current mirror transistors (Mc 1, mc2, …, mcn) in each switch array, for example, and the third transistor M3 in the first generator module constitute N current mirrors, the gates thereof are connected to the gate of the third transistor M3, the drains thereof are connected to the drain of the tenth transistor M10, and the sources thereof are respectively connected to the drains of the transistors (e.g., ms1, ms2 … Msn) in the switch array.
The operation principle of the current synthesizer module 203 shown in fig. 5 is specifically: binary code words S1S2 … Sn output by the temperature sensors can control the on or off states of the switch transistors (such as Ms1, ms2 and … Msn) in each group of switch arrays, wherein '0' represents that the branch is connected, and '1' represents that the branch is disconnected; the current mirror transistor (such as Mc1, mc2, … Mcn) in each group of switch array and the sixth transistor M6 in the second generator module form a current mirror, so that the second reference current I2 generated in the second generator module can be copied according to the state of the binary code word; the tenth transistor M10 in the current synthesizer module 203 and the third transistor M3 in the first generator module form a current mirror, so as to copy the first reference current I1 generated by the first generator module (i.e. the first reference current follows the process corner variation generated by the threshold reference source, so that the process corner characteristic can be characterized); meanwhile, the drain of the tenth transistor M10 in the current synthesizer module 203 is connected to the drains of the transistors Mc1 to Mcn in the second switch array, so that the two currents are synthesized according to the binary code word to generate the bias current with the process corner and the temperature compensation effect.
Another bias module provided in the present application will be specifically explained by the following embodiments.
Optionally, as shown in fig. 6, the bias module 102 further includes: the current-voltage conversion module 601.
The input end of the current-voltage conversion module 601 is connected with the output end of the current synthesizer module 203, and the current-voltage conversion module 601 is configured to convert the bias current generated by the current synthesizer module 203 into a bias voltage; the output end of the current-voltage conversion module 601 is connected with the output end of the circuit to be corrected.
In this embodiment, the current-voltage conversion module 601 may be used to perform conversion processing on the bias current generated by the current synthesizer module 203 to obtain a bias current or a bias voltage for correcting PVT deviation in the circuit to be corrected.
Alternatively, referring to fig. 7, for a specific circuit structure of the current-voltage conversion module shown in fig. 6, the current-voltage conversion module may include: an eleventh transistor M11 and a third resistor R3.
A first terminal of the eleventh transistor M11 is connected to the second terminal of the eleventh transistor M11, the third terminal of the tenth transistor M10 in the current synthesizer module 203, and the output terminal of the circuit to be corrected, respectively.
One end of the third resistor R3 is connected to the third end of the eleventh transistor M11, and the other end of the third resistor R3 is connected to the ground terminal.
In the present embodiment, the bias current generated by the current synthesizer module forms a voltage at the gate of the eleventh transistor M11 in the current-voltage converter, that is, the bias voltage having the process corner and temperature compensation effects.
The following embodiments will specifically explain yet another bias module provided in the present application.
Optionally, as shown in fig. 8, the bias module 102 further includes: a starting module 801, wherein the starting module 801 is used for preventing the bias module from working in a dead zone; the output of the start-up block 801 is connected to the output of the second generator block 202 in the bias block.
Alternatively, referring to fig. 9, for a specific circuit structure of the starting module shown in fig. 8, the starting module may include: a twelfth transistor M12, a thirteenth transistor M13, and a fourth resistor R4.
A first end of the twelfth transistor M12 is a drain, a second end of the twelfth transistor M12 is a gate, and a third end of the twelfth transistor M12 is a source; the first terminal of the thirteenth transistor M13 is a drain, the second terminal of the thirteenth transistor M13 is a gate, and the third terminal of the thirteenth transistor M13 is a source.
With continued reference to fig. 9, the first terminal of the twelfth transistor M12 is connected to the third terminal of the sixth transistor M6 in the second generator module;
one end of the fourth resistor R4 is connected to the power supply terminal VDD, and the other end of the fourth resistor R4 is connected to the second end of the twelfth transistor M12 and the first end of the thirteenth transistor M13, respectively.
A second end of the thirteenth transistor M13 is connected to a second end of a ninth transistor M9 in the second generator module and a first end of the ninth transistor M9, respectively;
the third terminal of the thirteenth transistor M13 is connected to the ground terminal.
In this embodiment, when the bias module operates in the dead zone, the second reference current I2 output by the output terminal of the second generator module is zero, the gate voltage of the transistor M8 in the second generator module is zero, the thirteenth transistor M13 in the start module is turned off, so that the drain voltage of the thirteenth transistor M13 is raised to the power supply voltage, and then the twelfth transistor M12 in the start module is turned on to have a current flowing through, so that the second generator module generates a current to leave the dead zone.
When the bias module is operating normally, the thirteenth transistor M13 in the start-up module is in a conducting state (with a weak current), and the drain voltage of the thirteenth transistor M13 in the start-up module is low enough not to turn on the twelfth transistor M13, so that the second reference current I2 generated by the second generator module is not changed.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a pure hardware form, and can also be realized in a form of hardware and a software functional unit.
Claims (10)
1. A biasing apparatus, characterized in that the apparatus comprises: the temperature sensor is arranged in a circuit to be corrected, and a chip is arranged in the circuit to be corrected;
the temperature sensor is used for acquiring temperature information of the circuit to be corrected when the chip works and converting the temperature information into a temperature control code word;
the output end of the temperature sensor is connected with the input end of the offset module, and the temperature sensor is also used for transmitting the temperature control code word to the offset module;
a reference device is arranged in the bias module, and the process angle of the reference device is the same as the process angle of the chip in the circuit to be corrected;
the bias module is used for generating a reference current according to the preset voltage of the reference device under the process angle, generating a bias current of the circuit to be corrected according to the temperature control code word and the reference current, and outputting the bias current to the circuit to be corrected through an output end of the bias module.
2. The apparatus of claim 1, wherein the biasing module comprises: the device comprises a first generator module, a second generator module and a current synthesizer module;
the input end of the first generator module is used for being connected with a power supply end, a reference device is arranged in the first generator module, the first generator module is used for generating a first reference current according to a preset voltage of the reference device under the process corner, and the first reference current is a reference current with a negative temperature coefficient;
the input end of the second generator module is used for being connected with a power supply end, the second generator module is used for generating a second reference current according to the actual working parameters of each device in the second generator module, and the second reference current is a reference current with a positive temperature coefficient;
the input end of the current synthesizer module is respectively connected with the output end of the first generator module, the output end of the second generator module and the output end of the temperature sensor;
the current synthesizer module is configured to perform weighting processing on the first reference current output by the first generator module and the second reference current output by the second generator module according to the temperature control codeword output by the temperature sensor, so as to generate the bias current.
3. The apparatus of claim 2, wherein the first generator module comprises: the circuit comprises a first current mirror, a second current mirror, a first transistor and a first resistor, wherein the first transistor is the reference device;
the first end of the first current mirror is connected with a power supply end; the second end of the first current mirror is connected with one end of the second current mirror, and the third end of the first current mirror is connected with the input end of the current synthesizer module;
the other end of the second current mirror is respectively connected with the first end of the first transistor, the second end of the first transistor and one end of the first resistor;
and the third end of the first transistor and the other end of the first resistor are both connected with a grounding end.
4. The apparatus of claim 3, wherein the first current mirror comprises: a second transistor and a third transistor; the second current mirror includes: a fourth transistor and a fifth transistor;
the first end of the second transistor and the first end of the third transistor are both the first end of the first current mirror, the third end of the second transistor and the third end of the third transistor are both the second end of the first current mirror, and the second end of the third transistor is the third end of the first current mirror;
a first end of the fourth transistor and a first end of the fifth transistor are both ends of the second current mirror, and a third end of the fourth transistor and a third end of the fifth transistor are both ends of the second current mirror;
a first end of the second transistor and a first end of the third transistor are connected to the power supply terminals respectively; a second terminal of the second transistor is connected to a second terminal of the third transistor; the third end of the second transistor is connected with the first end of the fourth transistor;
a third end of the third transistor is connected with a second end of the third transistor and a first end of the fifth transistor respectively; the second end of the third transistor is also connected with the input end of the current synthesizer module;
a first terminal of the fourth transistor is connected with a second terminal of the fourth transistor; a second terminal of the fourth transistor is connected with a second terminal of the fifth transistor; the third end of the fourth transistor is connected with the first end of the first transistor;
and the third end of the fifth transistor is respectively connected with the second end of the first transistor and one end of the first resistor.
5. The apparatus of claim 2, wherein the second generator module comprises: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a second resistor;
a first end of the sixth transistor and a first end of the seventh transistor are respectively connected with a power supply terminal, and a second end of the sixth transistor is respectively connected with a second end of the seventh transistor and a third end of the sixth transistor; a third end of the sixth transistor is connected with a first end of the eighth transistor and an input end of the current synthesizer module respectively;
a second end of the eighth transistor is connected with a second end of the ninth transistor, a first end of the ninth transistor is connected with a second end of the ninth transistor, and a third end of the ninth transistor is connected with a ground terminal;
and a third end of the eighth transistor is connected with one end of the second resistor, and the other end of the second resistor is connected with the grounding end.
6. The apparatus of claim 4 or 5, wherein the temperature control codeword is a binary codeword;
the current synthesizer module includes: a tenth transistor forming a current mirror pair with the third transistor, at least one set of switch arrays forming a current mirror pair with the sixth transistor; each group of switch arrays comprises a current mirror transistor and a switch transistor;
a first end of a switch transistor in the switch array is connected with the power supply end, a second end of the switch transistor in the switch array is connected with a temperature control code word signal line corresponding to the binary code word, and a third end of the switch transistor in the switch array is connected with a first end of a current mirror transistor in the switch array;
a second terminal of a current mirror transistor in the switch array is respectively connected with a second terminal of a sixth transistor in the second generator module and a third terminal of the sixth transistor, and the third terminal of the current mirror transistor in the switch array is connected with a third terminal of the tenth transistor;
a first terminal of the tenth transistor is connected to the power supply terminal, and a second terminal of the tenth transistor is connected to a second terminal of a third transistor in the first generator module and a third terminal of the third transistor, respectively.
7. The apparatus of claim 2, wherein the biasing module further comprises: a current-voltage conversion module;
the input end of the current-voltage conversion module is connected with the output end of the current synthesizer module, and the current-voltage conversion module is used for converting the bias current generated by the current synthesizer module into bias voltage;
and the output end of the current-voltage conversion module is connected with the output end of the circuit to be corrected.
8. The apparatus of claim 7, wherein the current-to-voltage conversion module comprises: an eleventh transistor, a third resistor;
a first end of the eleventh transistor is connected with a second end of the eleventh transistor, a third end of a tenth transistor in the current synthesizer module, and an output end of the circuit to be corrected respectively;
one end of the third resistor is connected with the third end of the eleventh transistor, and the other end of the third resistor is connected with a ground terminal.
9. The apparatus of claim 8, wherein the biasing module further comprises: a start-up module to prevent the bias module from operating in a dead zone;
and the output end of the starting module is connected with the output end of a second generator module in the offset module.
10. The apparatus of claim 9, wherein the activation module comprises: a twelfth transistor, a thirteenth transistor, and a fourth resistor;
a first end of the twelfth transistor is connected with a third end of a sixth transistor in the second generator module;
one end of the fourth resistor is connected to the power supply terminal, and the other end of the fourth resistor is connected to the second end of the twelfth transistor and the first end of the thirteenth transistor respectively;
a second end of the thirteenth transistor is respectively connected with a second end of a ninth transistor in the second generator module and a first end of the ninth transistor;
and the third end of the thirteenth transistor is connected with the grounding end.
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