CN115379065B - Circuit architecture for realizing self-excitation heating of information hiding - Google Patents
Circuit architecture for realizing self-excitation heating of information hiding Download PDFInfo
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- CN115379065B CN115379065B CN202210885651.8A CN202210885651A CN115379065B CN 115379065 B CN115379065 B CN 115379065B CN 202210885651 A CN202210885651 A CN 202210885651A CN 115379065 B CN115379065 B CN 115379065B
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- 238000010438 heat treatment Methods 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000004891 communication Methods 0.000 claims abstract description 12
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 238000003384 imaging method Methods 0.000 abstract description 3
- 239000000284 extract Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/32—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
- H04N1/32101—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title
- H04N1/32144—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title embedded in the image data, i.e. enclosed or integrated in the image, e.g. watermark, super-imposed logo or stamp
- H04N1/32149—Methods relating to embedding, encoding, decoding, detection or retrieval operations
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/48—Thermography; Techniques using wholly visual means
- G01J5/485—Temperature profile
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Storage Device Security (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention belongs to the technical field of information hiding, and discloses a self-heating circuit architecture for realizing information hiding, which comprises the following components: FPGA and communication interface, RO module, shield circuit and processor module based on FPGA. The invention is based on FPGA, the circuit architecture realizing self-heating of information hiding can be applied, the circuit architecture can effectively realize shielding and expression of hidden information, starting from the information hiding method, a single-stage ring oscillator is utilized to have efficient heating characteristic, the single-stage ring oscillator is laid out to a specific position and is integrated with a circuit working on a surface, when the hidden information is represented, the power consumption of the surface circuit is reduced, hot spots are formed in the area where the ring oscillator circuit is located, namely, the specific hot spot distribution is realized, so that the expression of the hidden information is realized, the FPGA realizes a corresponding circuit after configuration file configuration, realizes a specific thermal distribution imaging function, and further extracts real hidden information from a thermal distribution map, and realizes the hidden transmission of the information.
Description
Technical Field
The invention belongs to the technical field of information hiding, and particularly relates to a circuit architecture for realizing self-excitation heating of information hiding.
Background
With the continuous development of digital media technology and computer networks, people are increasingly conscious of information security, and how to ensure secure transmission of data is beginning to draw great attention. As a more advanced and effective data security protection technique, information steganography has become an important research topic in the field of information security. The principle of the information hiding technology is to hide hidden information in a carrier, and the traditional information hiding technology comprises the steps of hiding data in an image by using low-order data of information, hiding information by using punctuation marks and the like. The traditional information hiding technology is mostly single information hiding, and the difficulty of cracking is limited.
Disclosure of Invention
The present invention is directed to a circuit architecture for realizing self-heating of information hiding, so as to solve the problems in the prior art set forth in the background art.
In order to achieve the above purpose, the invention adopts the following technical scheme:
a circuit architecture that implements self-heating of information hiding, comprising:
the system comprises an FPGA, and a communication interface, an RO module, a shield circuit and a processor module based on the FPGA;
the communication interface, the RO module and the shield circuit are all connected with the processor module, and the RO module comprises an RO circuit which is embedded in the shield circuit.
Further, the processor module is connected with the upper computer through a communication interface, and the FPGA is connected with the thermal imager.
Further, after receiving the command from the upper computer, the processor module controls the sleep of the shielding circuit and enables the RO circuit to work, the RO area can efficiently work to form a hot spot, and hidden information is obtained according to the information representation method of the self-defined single hot spot distribution.
Furthermore, in the initial state, the protection circuit works and the RO circuit is dormant, so that an attacker is difficult to crack the circuit to acquire hidden information;
the receiver of the information can control the circuit according to the agreed operation method, so that the shield circuit is dormant and the RO circuit works, thereby obtaining the information corresponding to the heat distribution.
Furthermore, the shield circuit is a general arithmetic circuit such as an ALU and the like, is realized in an FPGA together with the RO circuit, and is controlled by a processor.
Further, a ring oscillator module is also included, the ring oscillator module includes a ring oscillator, the ring oscillator performs information representation through the position of the hot spot, and the ring oscillator is laid out to a specified position to realize information representation.
Furthermore, the ring oscillator realizes an inverter by utilizing LUT resources of the FPGA, and takes output signals and enabling signals of the ring oscillator as input of the inverter after being processed by an AND gate, so that the ring oscillator is connected to form a ring.
The invention has the technical effects and advantages that: compared with the prior art, the circuit architecture for realizing self-excitation heating for information hiding has the following advantages:
the invention is based on FPGA, the circuit architecture realizing self-heating of information hiding can be applied, the circuit architecture can effectively realize shielding and expression of hidden information, starting from the information hiding method, a single-stage ring oscillator is utilized to have efficient heating characteristic, the single-stage ring oscillator is laid out to a specific position and is integrated with a circuit working on a surface, when the hidden information is represented, the power consumption of the surface circuit is reduced, hot spots are formed in the area where the ring oscillator circuit is located, namely, the specific hot spot distribution is realized, so that the expression of the hidden information is realized, the FPGA realizes a corresponding circuit after configuration file configuration, realizes a specific thermal distribution imaging function, and further extracts real hidden information from a thermal distribution map, and realizes the hidden transmission of the information.
Drawings
FIG. 1 is a schematic diagram of a circuit architecture for implementing self-heating for information hiding according to the present invention;
FIG. 2 is a schematic diagram of a circuit layout of the present invention implementing self-heating of information hiding;
FIG. 3 is a schematic diagram of the self-heating generic circuit architecture of the present invention;
FIG. 4 is a schematic diagram of the RO circuit of the present invention;
FIG. 5 is a schematic diagram of a layout structure of a ring oscillator according to the present invention;
FIG. 6 is a thermal profile of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
An embodiment of the present invention provides a circuit architecture for implementing self-heating for information hiding, which is illustrated in fig. 1-4 and includes: the system comprises an FPGA, and a communication interface, an RO module, a shield circuit and a processor module based on the FPGA; the communication interface, the RO module and the shield circuit are all connected with the processor module, and the RO module comprises an RO circuit which is embedded in the shield circuit.
In particular, a ring oscillator module capable of self-heating is laid out with a normal circuit module, and the ring oscillator is hidden to a specific area of the circuit.
The whole circuit is in the initial normal working state, the enabling state of the ring oscillator is controlled to enable the ring oscillator not to generate self-excitation heat, and the circuit responsible for 'shielding' always keeps the working state, so that the position of the ring oscillator module is effectively hidden from being detected.
When the hidden information is needed, the 'shield' circuit module is dormant, and meanwhile, the ring oscillator circuit is enabled, so that the temperature of a local area where the ring oscillator is located can be effectively different from other areas, and the information can be effectively transferred according to the heat distribution of the circuit by encoding the information representation of the local area.
The single-stage ring oscillator is utilized to have high-efficiency heating characteristic, is distributed to a specific position, is integrated with a circuit of the bright surface work, reduces the power consumption of the bright surface circuit when the hidden information is represented, and enables the region where the ring oscillator circuit is located to form a hot spot, namely, special heat distribution imaging, thereby realizing the expression of the hidden information and the application of the information hiding method based on the FPGA.
The processor module is connected with the upper computer through the communication interface, and the FPGA is connected with the thermal imager. After receiving the command from the upper computer, the processor module controls the sleep of the shielding circuit and enables the RO circuit to work, the RO area can efficiently work to form a hot spot, and hidden information is obtained according to the information representation method of the self-defined single hot spot distribution. The processor soft core is used as a control unit, and a command from an upper computer is received through a communication interface, so that real-time control of the shield circuit and the RO module is realized.
The RO circuit is embedded into a shielding circuit to realize hiding, the shielding circuit is a general operation circuit such as an ALU and the like, and is realized in an FPGA together with the RO circuit, and is controlled by a processor, so that the RO circuit is hidden by the disordered circuit. When the protection circuit works in the initial state and the RO circuit is dormant, for an attacker, the circuit is difficult to crack and hidden information is acquired; the receiver of the information can control the circuit according to the agreed operation method, so that the shield circuit is dormant and the RO circuit works, thereby obtaining the information corresponding to the heat distribution.
The circuit architecture adopts a processor soft core as a control unit, receives a command from an upper computer through a communication interface, and realizes real-time control of the shield circuit and the RO module. When the ring oscillator is realized, the invention utilizes LUT resources of the FPGA to realize the inverter, and takes output signals and enabling signals of the output signals and the enabling signals as input of the inverter after being processed by the AND gate, so that the output signals and the enabling signals are connected to form a ring, as shown in figure 4. In order to generate sufficient power consumption so that the heat of a local area can be distinguished from other areas (1 deg.c difference), a sufficient number of ring oscillators need to be placed in the corresponding area, and the present invention lays out 100 ring oscillators within a constrained area. When the RO circuit is laid out, the information is represented by an information representing method based on FPGA single-hot-spot distribution, namely, the information is represented by the positions of hot spots, and the RO circuit is laid out to a specified position to realize the information representation.
In fig. 5, an example of an implementation of eight information (8 'b00000001-8' b 10000000) is presented. The FPGA device is segmented according to the physical position, 4 multiplied by 2 area division is carried out on the physical space of the FPGA device for realizing eight information representations, and independent thermal coding is carried out on the area, namely each hot spot represents corresponding 1-bit data, and the space layout is schematically shown in the following figure. According to the codes of the partitioned areas, a self-heating circuit structure is arranged in a physical area matched with the target information so that a temperature difference is generated between the self-heating circuit structure and other areas when the self-heating circuit structure works, and then the temperature distribution of the FPGA is detected through a thermal imager, so that the represented information is obtained.
When the processor receives a command from the upper computer, the shielding circuit is controlled to sleep and enables the RO circuit to work, the RO area can efficiently work to form a 'hot spot', hidden information is obtained according to a self-defined single-hot-spot distribution information representation method, the circuit information is converted into a bit stream file by using a comprehensive tool, after the bit stream file is configured into an FPGA, the temperature of an FPGA chip before and after the command is sent by the upper computer is detected by a thermal imager to obtain a corresponding thermal distribution diagram, a result is obtained, the left side of the diagram is the circuit thermal distribution under the hiding, the right side of the diagram is the circuit thermal distribution under the information representation, and the circuit architecture can be seen to effectively realize information hiding and acquisition based on the FPGA thermal distribution.
The self-heating circuit architecture provided by the invention realizes the information hiding method based on the FPGA for the first time, fills the blank of the application of the information hiding method based on the FPGA, realizes the expression of hidden information and realizes the application of the information hiding method based on the FPGA.
In addition, the circuit architecture for realizing self-heating of information hiding based on the FPGA, which is provided in the embodiment, is based on a ring oscillator to realize the representation of hidden information. The method for realizing information hiding based on the FPGA is a secondary information hiding technology which takes an FPGA configuration file as a first carrier and takes a heat distribution image of the FPGA after configuration of the configuration file as a second carrier. The invention starts from the information hiding method, utilizes the efficient heating characteristic of the single-stage ring oscillator, lays out the single-stage ring oscillator to a specific position, and is integrated with a circuit working on the surface, when the hidden information is represented, the power consumption of the surface circuit is reduced, so that the region where the ring oscillator circuit is located forms hot spots, namely the specific hot spot distribution, thereby realizing the expression of the hidden information. The invention is based on FPGA, and is applied to the circuit architecture for realizing self-heating of information hiding, and the circuit architecture can effectively realize shielding and expression of hidden information.
Finally, it should be noted that: the foregoing description is only illustrative of the preferred embodiments of the present invention, and although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described, or equivalents may be substituted for elements thereof, and any modifications, equivalents, improvements or changes may be made without departing from the spirit and principles of the present invention.
Claims (6)
1. A circuit architecture for implementing self-heating for information hiding, comprising:
the device comprises an FPGA, a communication interface based on the FPGA, a ring oscillator RO module, a shield circuit and a processor module;
the communication interface, the RO module and the shielding circuit are all connected with the processor module, the RO module comprises an RO circuit, and the RO circuit is embedded in the shielding circuit;
when the protection circuit works in the initial state and the RO circuit is dormant, for an attacker, the circuit is difficult to crack and hidden information is acquired;
the receiver of the information controls the circuit according to the agreed operation method, so that the shield circuit is dormant and the RO circuit works, thereby obtaining the information corresponding to the heat distribution.
2. A circuit architecture for implementing self-heating for information hiding as claimed in claim 1, wherein: the processor module is connected with the upper computer through the communication interface, and the FPGA is connected with the thermal imager.
3. A circuit architecture for implementing self-heating for information hiding as claimed in claim 2, wherein: after receiving the command from the upper computer, the processor module controls the sleep of the shielding circuit and enables the RO circuit to work, the RO area can efficiently work to form a hot spot, and hidden information is obtained according to the information representation method of the self-defined single hot spot distribution.
4. A circuit architecture for implementing self-heating for information hiding as claimed in claim 3, wherein: the shielding circuit is an ALU and is realized in an FPGA together with the RO circuit, and is controlled by a processor.
5. A circuit architecture for implementing self-heating for information hiding as claimed in claim 4, wherein: the RO circuit includes a ring oscillator that represents information by the location of a hotspot, which is laid out to a prescribed location to achieve the representation of the information.
6. A circuit architecture for achieving self-heating of information hiding according to claim 5, characterized by: the ring oscillator utilizes LUT resources of the FPGA to realize an inverter, and an output signal and an enabling signal of the ring oscillator are processed by an AND gate and then serve as input of the inverter, so that the ring oscillator is connected to form a ring.
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