CN115376887A - Method for processing wafer with gentle slope type protection ring - Google Patents

Method for processing wafer with gentle slope type protection ring Download PDF

Info

Publication number
CN115376887A
CN115376887A CN202211009795.3A CN202211009795A CN115376887A CN 115376887 A CN115376887 A CN 115376887A CN 202211009795 A CN202211009795 A CN 202211009795A CN 115376887 A CN115376887 A CN 115376887A
Authority
CN
China
Prior art keywords
wafer
etching
carrier plate
gentle slope
slope type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211009795.3A
Other languages
Chinese (zh)
Inventor
严立巍
刘文杰
马晴
朱亦峰
林春慧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang Tongxinqi Technology Co ltd
Zhongsheng Kunpeng Optoelectronic Semiconductor Co ltd
Original Assignee
Zhejiang Tongxinqi Technology Co ltd
Zhongsheng Kunpeng Optoelectronic Semiconductor Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang Tongxinqi Technology Co ltd, Zhongsheng Kunpeng Optoelectronic Semiconductor Co ltd filed Critical Zhejiang Tongxinqi Technology Co ltd
Priority to CN202211009795.3A priority Critical patent/CN115376887A/en
Publication of CN115376887A publication Critical patent/CN115376887A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02016—Backside treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02021—Edge treatment, chamfering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates

Abstract

The invention discloses a method for processing a wafer with a gentle slope type protection ring, and belongs to the field of semiconductors. A processing method of a wafer with a gentle slope type protection ring comprises the following steps: attaching a grinding adhesive tape to the front surface of the wafer; grinding the back of the wafer, and then removing the grinding adhesive tape; an annular protective film is attached to the outer edge of the back surface of the wafer, so that etching can be hindered or slowed down; etching the back surface of the wafer by using etching equipment, and then removing the protective film to obtain the wafer with the gentle slope type protective ring.

Description

Method for processing wafer with gentle slope type protection ring
Technical Field
The invention relates to the field of semiconductors, in particular to a method for processing a wafer with a gentle slope type protection ring.
Background
The original material of the wafer is silicon, silicon dioxide ore is refined by an electric arc furnace, chloridized by hydrochloric acid, and distilled to prepare high-purity polysilicon, after the crystal is thinned, a plurality of post-processes are required, how to move the wafer thinned to 50-100 microns, one current method is to mechanically grind the wafer to generate a wafer with the thickness of 50-200 microns at the bottom of the wafer and a frame ring with the edge of 3-8 mm, then the back is processed by a dry/wet etching way to improve the stress and poor coarseness caused by mechanical grinding, and then the subsequent wafer production process is started, the circular structure generated by the mechanical grinding way is formed, the bottom and the frame ring of the wafer form a structure almost 90 degrees, although the requirements of the subsequent partial production process of the thin wafer can be met, the following defects are caused: the photoresist spin coating process cannot be performed in the yellow light process, because of the angle structure, the coated photoresist fails due to the splash back of the edge, and the proximity type yellow light process cannot be applied, because the mask plate of the proximity type yellow light process needs to be very close to the wafer but is blocked by the frame ring, and the process cannot be performed in a general simple manner, so that the double-sided simultaneous metal deposition process of the thin wafer cannot be applied.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a method for processing a wafer with a gentle slope type protection ring.
The purpose of the invention can be realized by the following technical scheme:
a method for processing a wafer with a gentle slope type protection ring comprises the following steps:
the front surface of the wafer is fixedly attached to the carrier plate, and a protective layer is formed at the outer edge of the wafer;
etching the back surface of the wafer by using etching equipment, and then removing the protective film to obtain the wafer with the gentle slope type protective ring, wherein the etching mixed liquid comprises: the buffer is used for alleviating or reducing the etching of the protective layer by the etchant.
Optionally, the etchant comprises hydrogen fluoride.
Optionally, the oxidizing agent comprises nitric acid.
Optionally, the buffer comprises one or more of ammonium fluoride or acetic acid.
Optionally, the protective layer has a width of 3 to 10 mm.
Optionally, the method for attaching and fixing the front surface of the wafer and the carrier plate includes: coating an adhesive on the carrier plate, and fixing the wafer on the carrier plate; or after the back surface of the wafer is attached to the carrier plate, coating an edge seal at the joint of the wafer and the carrier plate.
Optionally, the edge sealing portion extends to the outer edge of the wafer to serve as the protection layer.
The wafer with the gentle slope type protection ring is carried by a carrier plate and is applied to the back process of the wafer.
Optionally, the back side process of the wafer includes an ion implantation process and a metal process.
Optionally, after the back process of the wafer is completed, the carrier plate is separated from the wafer by heating or laser cutting.
The invention has the beneficial effects that:
the wafer structure obtained by the processing method is used for the subsequent ion implantation, yellow light and double-surface simultaneous metal deposition process, and the front surface and the back surface can be simultaneously processed in production. The invention reduces the transmission step in the operation, saves the process time, and reduces the area lost by the edge wafer due to the ultrathin wafer structure of the gentle slope type protection ring. The invention improves the utilization rate of the wafer, reduces the waste of raw materials and improves the yield after improvement.
The invention provides a special etchant for the wet etching of a gentle slope wafer, can further relieve the etching of the etchant to a protective layer on the basis of the protection of the protective layer, and can effectively prevent the protective layer from being separated from the wafer caused by etching.
Drawings
The invention will be further described with reference to the accompanying drawings.
FIGS. 1 and 2 are flow diagrams of some examples of the invention;
FIGS. 3 and 4 are flow diagrams of further examples of the present invention;
fig. 5 is a schematic diagram of the wafer being broken into dies.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In some examples of the invention, a wafer processing process is disclosed, comprising the steps of:
coating adhesive on the carrier plate to fix the wafer on the carrier plate
Performing annular coating on the outer edge of the back surface of the wafer to form a protective layer;
etching the back surface of the wafer by using etching equipment, and then removing the protective film to obtain the wafer with the gentle slope type protective ring, wherein the etching mixed liquid comprises: the buffer is used for relieving or reducing the etching of the protective layer by the etchant.
In other examples of the present invention, a wafer processing process is disclosed, comprising the steps of:
after the back surface of the wafer is attached to the carrier plate, edge sealing is coated at the joint of the wafer and the carrier plate, and the wafer is fixed on the carrier plate through physical limiting. When the edge sealing is coated, the edge sealing part extends to the outer edge of the wafer to serve as the protective layer.
Etching the back surface of the wafer by using etching equipment, and then removing the protective film to obtain the wafer with the gentle slope type protective ring, wherein the etching mixed liquid comprises: the buffer is used for relieving or reducing the etching of the protective layer by the etchant.
Optionally, the etchant comprises hydrogen fluoride.
Optionally, the oxidizing agent comprises nitric acid.
Optionally, the buffer comprises one or more of ammonium fluoride or acetic acid.
In the above embodiment, the oxidizing agent is used to form an oxide layer on the surface of the wafer, and the growing grass is etched by the etchant. Ammonium fluoride and acetic acid act as buffers to mitigate the etching of the wafer guard ring and the protective layer thereon by the etchant.
And after the back process of the wafer is finished, the wafer and the carrier plate are released from being fixed, and the wafer is transferred to the cutting die frame for die cutting.
Specifically, during the die cutting process, the connection between the metal layers may be cut by the laser first, and the wafer is not cut. The wafer at the cutting lines is then destroyed through a wafer laser stealth dicing process, but at this time, the crystal grains are not completely disconnected.
As shown in fig. 5, the cutting mold frame has a deformation capability, and the connection between the cutting lines is broken by the tensile deformation, so that the wafer is broken into dies. And at the moment, the thickness of the wafer is very thin in time, and the support plate is provided with a thick protection ring, so that stable bearing can be provided in the whole process until the wafer cracking process is completed.
Furthermore, the method obtains a wafer in a gentle slope shape, the bonding agent is coated on the front surface of the wafer, the glass carrier plate is attached to the front surface of the wafer, and then the wafer is carried on the glass carrier plate, so that a more stable process structure is obtained. The process structure can be used for subsequent ion implantation, yellow light and double-sided simultaneous metal deposition processes, and front and back processes can be simultaneously carried out in one step during production.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.

Claims (10)

1. A processing method of a wafer with a gentle slope type protection ring is characterized by comprising the following steps:
placing the wafer on a grinding adhesive tape, and grinding the back of the wafer;
attaching and fixing the front surface of the wafer and the carrier plate, and forming a protective layer at the outer edge of the wafer;
etching the back surface of the wafer by using etching equipment, and then removing the protective film to obtain the wafer with the gentle slope type protective ring, wherein the etching mixed liquid comprises: the buffer is used for alleviating or reducing the etching of the protective layer by the etchant.
2. The method of claim 1, wherein the etchant comprises hydrogen fluoride.
3. The method as claimed in claim 1, wherein the oxidizing agent comprises nitric acid.
4. The method as claimed in claim 1, wherein the buffer comprises one or more of ammonium fluoride or acetic acid.
5. The method as claimed in claim 1, wherein the width of the guard ring is 3-10 mm; the thickness of the wafer before etching is 100-300 microns, and the thickness of the central part of the ground wafer is 50-100 microns.
6. The method for processing the wafer with the gentle slope type protection ring according to claim 1, wherein the method for attaching and fixing the front surface of the wafer to the carrier plate comprises the following steps: coating an adhesive on the carrier plate, and fixing the wafer on the carrier plate; or after the back surface of the wafer is attached to the carrier plate, coating and sealing edges at the joint of the wafer and the carrier plate.
7. The method as claimed in claim 1, wherein the edge sealing portion extends to an outer edge of the wafer to serve as the protection layer.
8. The wafer with the gently-sloped protection ring of any one of claims 1-7 is carried by a carrier and applied to a back side process of the wafer.
9. The application of claim 8, wherein the back side process of the wafer comprises an ion implantation process and a metal process.
10. The use of claim 8, wherein the carrier is separated from the wafer by heating or laser cutting after the back side processing of the wafer is completed.
CN202211009795.3A 2022-08-22 2022-08-22 Method for processing wafer with gentle slope type protection ring Pending CN115376887A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211009795.3A CN115376887A (en) 2022-08-22 2022-08-22 Method for processing wafer with gentle slope type protection ring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211009795.3A CN115376887A (en) 2022-08-22 2022-08-22 Method for processing wafer with gentle slope type protection ring

Publications (1)

Publication Number Publication Date
CN115376887A true CN115376887A (en) 2022-11-22

Family

ID=84067360

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211009795.3A Pending CN115376887A (en) 2022-08-22 2022-08-22 Method for processing wafer with gentle slope type protection ring

Country Status (1)

Country Link
CN (1) CN115376887A (en)

Similar Documents

Publication Publication Date Title
JP3612317B2 (en) Manufacturing method of semiconductor device
CN100533660C (en) Bonded wafer manufacturing method and apparatus for grinding outer circumference of bonded wafer
EP0854500B1 (en) Method of manufacturing a bonded substrate
US20080044984A1 (en) Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors
US8435417B2 (en) Method of manufacturing semiconductor device
TW201009920A (en) Method of thinning a semiconductor wafer
JP4277469B2 (en) Method for producing bonded wafer and bonded wafer
EP2530704B1 (en) Method for manufacturing bonded wafer
CN111799178A (en) Double-sided copper-plating thick film process for ultrathin wafer
US20050161808A1 (en) Wafer, intermediate wafer assembly and associated method for fabricating a silicon on insulator wafer having an improved edge profile
CN111446163A (en) Wafer with edge stepped/gentle slope type protection ring and manufacturing method thereof
CN110729178A (en) Processing method of 3D wafer
JP2018182146A (en) Manufacturing method of multilayer film soi wafer and multilayer film soi wafer
CN111441072B (en) Method for producing crystal grains by cutting crystal grains first and then electroplating on two sides
CN115376887A (en) Method for processing wafer with gentle slope type protection ring
JP2001144274A (en) Method for producing semiconductor substrate
JP5466370B2 (en) Manufacturing method of semiconductor chip
JP2008108837A (en) Grinding apparatus of semiconductor wafer and method for manufacturing semiconductor device
TWM615029U (en) Wafer with hierarchical edge
JP3524009B2 (en) SOI wafer and method for manufacturing the same
JPS61280660A (en) Manufacture of semiconductor device
CN111799166A (en) Edge ring removal method
CN104465324A (en) Discrete component manufacturing method
CN110534423B (en) Semiconductor device and method for manufacturing the same
JPH05198671A (en) Dicing method of semiconductor wafer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination