TWM615029U - Wafer with hierarchical edge - Google Patents

Wafer with hierarchical edge Download PDF

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Publication number
TWM615029U
TWM615029U TW110201362U TW110201362U TWM615029U TW M615029 U TWM615029 U TW M615029U TW 110201362 U TW110201362 U TW 110201362U TW 110201362 U TW110201362 U TW 110201362U TW M615029 U TWM615029 U TW M615029U
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ring
wafer
peripheral edge
back surface
edge
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TW110201362U
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Chinese (zh)
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林廷駿
王派湧
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昇陽國際半導體股份有限公司
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Publication of TWM615029U publication Critical patent/TWM615029U/en

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Abstract

本新型係一種具階級狀晶邊的晶圓,晶圓包含有一本體及一保護層。本體為一圓型片體,且具有相對的一元件面及一背面。環側面環繞於背面及元件面之間,環側面的相對二周緣的其中一周緣連接背面的周緣。階級環部連接元件面的周緣及環側面的另一周緣,階級環部具有複數階級面,階級環部與背面的距離由元件面的周緣朝環側面的第二側周緣呈階級狀漸縮。保護層貼附於元件面及階級面。藉此,本體邊緣處與保護層的接觸面積較大,使保護層穩固地附著以及支撐本體,可提高晶圓在進行後續晶背薄化製程的良率。The present invention is a wafer with a step-shaped crystal edge. The wafer includes a body and a protective layer. The main body is a round sheet body, and has an element surface and a back surface opposite to each other. The ring side surface surrounds between the back surface and the component surface, and one of the two opposite peripheral edges of the ring side surface connects the peripheral edge of the back surface. The level ring connects the periphery of the element surface and the other peripheral edge of the ring side. The level ring has a plurality of level surfaces. The distance between the level ring and the back surface gradually decreases from the periphery of the element surface to the second peripheral edge of the ring side. The protective layer is attached to the component surface and the class surface. Thereby, the contact area between the edge of the main body and the protective layer is relatively large, so that the protective layer is firmly attached to and supports the main body, which can improve the yield of the wafer during the subsequent thinning process of the backside of the wafer.

Description

具階級狀晶邊的晶圓Wafers with hierarchical edges

本創作係涉及一種在進行晶背薄化研磨製程前,以雷射加工及切削刀切削形成具階級狀環槽的晶圓、具階級狀晶邊的晶圓。This creation relates to a wafer with a step-shaped ring groove and a step-shaped crystal edge formed by laser processing and cutting with a cutting tool before the crystal back thinning and polishing process.

隨著世界科技的演進,半導體技術應用已完全融入人類的生活中。半導體技術所應用的晶圓包含砷化鎵晶圓、碳化矽晶圓、矽晶圓等。由於晶圓正面的半導體元件由許多不同結構與材料組成,其中異質材料的接面中薄膜沉積製程與材料內應力消除製程為重要議題。現今半導體元件磊晶技術於異質晶圓上,因材料接面應力問題促使磊晶大廠選用不同晶圓面的晶圓進行磊晶元件製程。不同晶圓面的選擇使晶圓邊角形狀具有外圓角(full bullnosed)、稜邊(arris edge)及反斜面(reverse bevel)等各種形式。With the evolution of world technology, the application of semiconductor technology has been completely integrated into human life. The wafers used in semiconductor technology include gallium arsenide wafers, silicon carbide wafers, silicon wafers, and so on. Since the semiconductor components on the front side of the wafer are composed of many different structures and materials, the thin film deposition process and the internal stress relief process in the junction of heterogeneous materials are important issues. Nowadays, semiconductor device epitaxy technology is used on heterogeneous wafers. Due to the material junction stress, large epitaxy manufacturers choose wafers with different wafer faces for the epitaxial device manufacturing process. The selection of different wafer surfaces makes the corner shapes of the wafers have various forms such as full bullnosed, arris edge, and reverse bevel.

為了提高半導體元件的性能,晶圓的製程中包含晶背薄化製程。進行晶背薄化製程時,於晶圓的正面黏貼膠帶或塗佈液態黏著材料以形成保護層,然後以研磨載台支撐晶圓的正面,並以磨輪對晶圓的背面進行研磨以縮減晶圓的厚度。In order to improve the performance of semiconductor devices, the wafer manufacturing process includes a backside thinning process. During the wafer back thinning process, adhesive tape or liquid adhesive material is applied to the front surface of the wafer to form a protective layer, and then the front surface of the wafer is supported by a polishing stage, and the back surface of the wafer is polished with a grinding wheel to reduce the size of the wafer. The thickness of the circle.

然而,目前的晶圓在進行晶背薄化製程時,晶圓邊角處(即晶邊)的保護層無法穩固地附著晶圓表面並支撐晶圓,導致磨輪施力時產生應力分配不均問題,造成晶圓正面元件損傷,進而使晶背薄化製程失敗。其中當晶邊形狀為稜邊或反斜面時,或當晶圓正面的半導體元件材料與矽晶圓不同,屬於異質接面且硬脆之氮化鎵(GaN)材料時,晶背薄化製程失敗率更高。However, in the current wafer thinning process, the protective layer at the corners of the wafer (ie, the edge of the wafer) cannot firmly adhere to the surface of the wafer and support the wafer, resulting in uneven stress distribution when the grinding wheel is applied. The problem caused damage to the components on the front side of the wafer, and the thinning process of the backside of the wafer failed. When the edge shape of the crystal is edge or reverse slope, or when the semiconductor component material on the front side of the wafer is different from the silicon wafer, it is a heterogeneous junction and hard and brittle gallium nitride (GaN) material, the backside thinning process The failure rate is higher.

因此,現有技術的晶圓及其製造方法實有待加以改良。Therefore, the prior art wafer and its manufacturing method need to be improved.

有鑑於前述之現有技術的缺點及不足,本創作提供一種具階級狀晶邊的晶圓,其可藉由階級狀的晶邊改善保護層於晶邊處的支撐效果以提高製程良率。In view of the aforementioned shortcomings and deficiencies of the prior art, the present invention provides a wafer with hierarchical crystal edges, which can improve the supporting effect of the protective layer at the crystal edges by using the hierarchical crystal edges to increase the process yield.

為達到上述的創作目的,本創作所採用的技術手段為設計一種具階級狀晶邊的晶圓,其中包含: 一本體,其為一圓型片體,且具有: 相對的一元件面及一背面,該元件面的直徑小於該背面的直徑,該元件面的周緣為一第一側周緣; 一環側面,其環繞於該背面及該元件面之間;該環側面的相對兩周緣分別為一第二側周緣及一第三側周緣,該第三側周緣連接該背面的周緣; 一階級環部,其連接該元件面的該第一側周緣及該環側面的該第二側周緣;該階級環部具有複數階級面,該等階級面與該元件面朝向相同方向,並且自該元件面的該第一側周緣至該環側面的該第二側周緣依序排列;該階級環部與該背面的距離由該元件面的該第一側周緣朝該環側面的該第二側周緣呈階級狀漸縮; 一保護層,其貼附於該本體的該元件面及該階級環部的該等階級面。 In order to achieve the above creative purposes, the technical means used in this creation is to design a wafer with a hierarchical crystal edge, which includes: A body, which is a round sheet body and has: Opposite an element surface and a back surface, the diameter of the element surface is smaller than the diameter of the back surface, and the peripheral edge of the element surface is a first side peripheral edge; A ring side surface, which surrounds between the back surface and the element surface; two opposite peripheral edges of the ring side surface are a second side peripheral edge and a third side peripheral edge respectively, and the third side peripheral edge is connected to the peripheral edge of the back surface; A step ring portion, which connects the first side periphery of the element surface and the second side periphery of the ring side; The first side peripheral edge of the element surface to the second side peripheral edge of the ring side surface are arranged in sequence; the distance between the step ring portion and the back surface is from the first side peripheral edge of the element surface toward the second side peripheral edge of the ring side surface The side periphery gradually shrinks in a class-like manner; A protective layer attached to the element surface of the main body and the step surface of the step ring.

本創作的優點在於,本體邊緣具有一階級環部而使本體邊緣呈現階梯狀。相較於現有晶圓的斜面或弧面狀邊角形狀,階級環部可增加本體邊緣與保護層的接觸面積,使保護層穩固地附著以及支撐本體。藉此,晶圓在進行後續晶背薄化製程時,磨輪的力量能夠在晶圓上均勻分布,可避免晶圓正面元件損傷並提高晶背薄化製程的良率。The advantage of this creation is that the edge of the body has a step ring, which makes the edge of the body appear stepped. Compared with the bevel or arcuate corner shape of the existing wafer, the step ring can increase the contact area between the edge of the main body and the protective layer, so that the protective layer can be firmly attached and support the main body. In this way, when the wafer is undergoing the subsequent thinning process of the backside of the wafer, the force of the grinding wheel can be evenly distributed on the wafer, which can avoid damage to the components on the front side of the wafer and improve the yield of the backside thinning process.

進一步而言,所述之具階級狀晶邊的晶圓,其中:該階級環部的寬度定義為該環側面與該元件面的該第一側周緣的徑向間隔距離;該階級環部的高度定義為該元件面與該環側面的該第二側周緣於該本體的厚度方向的距離;該階級環部的該寬度大於或等於該階級環部的該高度。Furthermore, for the wafer with step-shaped crystal edges, wherein: the width of the step ring portion is defined as the radial separation distance between the side surface of the ring and the first side peripheral edge of the element surface; The height is defined as the distance between the element surface and the second peripheral edge of the ring side surface in the thickness direction of the body; the width of the step ring portion is greater than or equal to the height of the step ring portion.

進一步而言,所述之具階級狀晶邊的晶圓,其中:該階級環部的該寬度介於50至200微米之間;該階級環部的該高度介於20至100微米之間。Furthermore, in the wafer with step-like crystal edges, the width of the step ring is between 50 and 200 microns; the height of the step ring is between 20 and 100 microns.

進一步而言,所述之具階級狀晶邊的晶圓,其中:該本體包含:一矽基層,其中該環側面、該階級環部與該背面位於該矽基層;一氮化鎵層,其覆蓋該矽基層相對該背面的一側面;其中該元件面為該氮化鎵層相對該矽基層的一側面。Furthermore, in the wafer with step-like crystal edges, the body includes: a silicon-based layer, wherein the side surface of the ring, the step ring portion and the back surface are located on the silicon-based layer; a gallium nitride layer, which Covering a side surface of the silicon-based layer opposite to the back surface; wherein the device surface is a side surface of the gallium nitride layer opposite to the silicon-based layer.

請參閱圖7所示,本新型之具階級狀晶邊的晶圓之製造方法包含以下步驟:準備晶圓S1、形成階級環部S2、形成階級狀晶邊S3以及貼附保護層S4。本新型之晶圓是預備進行晶背薄化製程的晶圓。Please refer to FIG. 7, the method for manufacturing a wafer with step-shaped crystal edges of the present invention includes the following steps: preparing a wafer S1, forming a step ring portion S2, forming a step-shaped crystal edge S3, and attaching a protective layer S4. The wafer of the present invention is a wafer prepared for the backside thinning process.

準備晶圓:請參閱圖1所示,首先準備一晶圓,其具有一圓型片狀之本體10,本體10具有相對的一正面101及一背面102。具體來說,本體10為異質材料,包含一矽基層11及氮化鎵層12。矽基層11的厚度較佳地為600至750微米。氮化鎵層12為覆蓋於矽基層11表面的硬脆材料,其厚度較佳地為2至4微米,圖式僅為示意,未按照實際比例繪製。正面101及背面102分別為氮化鎵層12及矽基層11遠離彼此的一側面。Prepare wafer: Please refer to FIG. 1. First, prepare a wafer, which has a round sheet-shaped body 10 with a front side 101 and a back side 102 opposite to each other. Specifically, the body 10 is a heterogeneous material, and includes a silicon-based layer 11 and a gallium nitride layer 12. The thickness of the silicon-based layer 11 is preferably 600 to 750 microns. The gallium nitride layer 12 is a hard and brittle material covering the surface of the silicon base layer 11, and its thickness is preferably 2 to 4 microns. The drawing is only for illustration and not drawn according to actual scale. The front side 101 and the back side 102 are sides of the gallium nitride layer 12 and the silicon-based layer 11 away from each other, respectively.

形成階級環部:請配合參閱圖2所示,以一雷射裝置A於本體10的正面101切割形成一階級環部13。階級環部13為一環槽並且環繞本體10的中心,此時的本體10即為具階級狀環槽的晶圓。階級環部13具複數階級面131,階級面131與正面101朝向相同方向,並且依序環繞本體10的中心。所謂階級面131依序環繞本體10的中心,即各階級面131的直徑相異,直徑較大的階級面131環繞於直徑較小的階級面131外,組合成近似於年輪的形狀。階級環部13與背面102的距離朝正面101的周緣呈階級狀漸縮,也就是說,距離本體10中心較遠的階級面131與背面102的距離較近。階級環部13與本體10的側邊14的間隔距離D1較佳地介於0.5至1.5公釐之間。另外,在本實施例中,雷射裝置A穿透本體10表面的氮化鎵層12並於矽基層11形成階級環部13。Forming a step ring: Please refer to FIG. 2 to cut a laser device A on the front surface 101 of the main body 10 to form a step ring 13. The step ring portion 13 is a ring groove and surrounds the center of the main body 10. At this time, the main body 10 is a wafer with a step ring groove. The class ring 13 has a plurality of class planes 131, and the class planes 131 and the front 101 face the same direction, and surround the center of the main body 10 in sequence. The so-called level surface 131 sequentially surrounds the center of the body 10, that is, the diameter of each level surface 131 is different, and the level surface 131 with a larger diameter surrounds the level surface 131 with a smaller diameter and is combined into a shape similar to an annual ring. The distance between the level ring portion 13 and the back surface 102 is gradually reduced toward the periphery of the front surface 101, that is, the distance between the level surface 131 and the back surface 102, which is farther from the center of the main body 10, is closer. The distance D1 between the step ring 13 and the side 14 of the main body 10 is preferably between 0.5 and 1.5 mm. In addition, in this embodiment, the laser device A penetrates the gallium nitride layer 12 on the surface of the main body 10 and forms a step ring 13 on the silicon base layer 11.

在本實施例中,階級環部13的具體成形順序如下:首先固定雷射裝置A與正面101的周緣的徑向距離(即固定雷射裝置A與正面101中心的距離),並以雷射裝置A切割形成階級環部13最靠近正面101中心的階級面131,切割時可以固定本體10並使固定雷射裝置A環繞正面101中心移動,或者固定雷射裝置A並使本體10轉動,兩者均可。接著朝正面101的周緣移動雷射裝置A以縮減雷射裝置A與正面101的周緣的徑向距離並形成其他階級面131。In this embodiment, the specific forming sequence of the step ring portion 13 is as follows: First, fix the radial distance between the laser device A and the periphery of the front surface 101 (that is, fix the distance between the laser device A and the center of the front surface 101), and use the laser The device A is cut to form the step surface 131 of the step ring 13 closest to the center of the front 101. When cutting, the body 10 can be fixed and the fixed laser device A can be moved around the center of the front 101, or the laser device A can be fixed and the body 10 can be rotated. Either way. Then, the laser device A is moved toward the periphery of the front surface 101 to reduce the radial distance between the laser device A and the periphery of the front surface 101 and form another level surface 131.

請參閱圖5所示,當階級面的寬度較窄時,雷射裝置A的具體切割步驟如下:先將雷射裝置A對準第一對準線L1以切割出第一階級面1311A,接著朝正面101的周緣移動雷射裝置A,使雷射裝置A對準第二對準線L2以切割出第二階級面1312A。Please refer to FIG. 5, when the width of the step surface is narrow, the specific cutting steps of the laser device A are as follows: first align the laser device A with the first alignment line L1 to cut the first step surface 1311A, and then Move the laser device A toward the periphery of the front surface 101 to align the laser device A with the second alignment line L2 to cut a second level surface 1312A.

請參閱圖6所示,當階級面的寬度較寬時,也可朝正面101的周緣多次移動雷射裝置A以形成單一階級面。具體來說,先將雷射裝置A對準第一對準線L1A以切割出第一階級面1311B的內圈,接著朝正面101的周緣移動雷射裝置A,使雷射裝置A對準第二對準線L2A以切割出第一階級面1311B的外圈,然後再繼續移動雷射裝置A以形成其他階級面。Please refer to FIG. 6, when the width of the step surface is relatively wide, the laser device A can also be moved toward the periphery of the front surface 101 multiple times to form a single step surface. Specifically, first align the laser device A with the first alignment line L1A to cut out the inner ring of the first step surface 1311B, and then move the laser device A toward the periphery of the front surface 101 to align the laser device A with the first alignment line L1A. Align the line L2A to cut the outer ring of the first level surface 1311B, and then continue to move the laser device A to form other level surfaces.

形成階級狀晶邊:請配合參閱2及圖3所示,以一切削刀(圖中未示)將階級環部13外側的本體10切除,使階級環部13’位於本體10’的邊緣。經切削後的本體10’仍為一圓型片體,且具有相對的一元件面101’及一背面102’。元件面101’為正面101被切除後剩餘的部分,且具體來說是氮化鎵層12’相對矽基層11’的一側面,且元件面101’的直徑小於背面102’的直徑;元件面101’的周緣為一第一側周緣121’。本體10’的一環側面103’環繞於背面102’及元件面101’之間。環側面103’的相對兩周緣分別為一第二側周緣1032’及一第三側周緣1031’,第三側周緣1031’連接背面102’的周緣。Form the step-like crystal edge: please refer to 2 and Figure 3, use a cutter (not shown in the figure) to cut off the main body 10 outside the step ring 13 so that the step ring 13' is located at the edge of the main body 10'. The body 10' after cutting is still a round sheet body, and has an element surface 101' and a back surface 102' opposite to each other. The element surface 101' is the part remaining after the front surface 101 is cut off, and specifically is a side surface of the gallium nitride layer 12' opposite to the silicon base layer 11', and the diameter of the element surface 101' is smaller than the diameter of the back surface 102'; The periphery of 101' is a first side periphery 121'. A ring side surface 103' of the main body 10' surrounds between the back surface 102' and the element surface 101'. The two opposite peripheral edges of the ring side surface 103' are respectively a second side peripheral edge 1032' and a third side peripheral edge 1031', and the third side peripheral edge 1031' is connected to the peripheral edge of the back surface 102'.

切削後的階級環部13’之形狀與切削前大致相同,差異僅在於切削過程中階級環部13的外側槽壁面被切削刀削除。階級環部13’連接元件面101’的第一側周緣121’及環側面103’的第二側周緣1032’;階級環部13’的各階級面131自元件面101’的第一側周緣121’至環側面103’的第二側周緣1032’依序排列;階級環部13’與背面102’的距離由第一側周緣121’朝第二側周緣1032’呈階級狀漸縮。The shape of the step ring portion 13' after cutting is substantially the same as that before cutting. The only difference is that the outer groove wall surface of the step ring portion 13 is cut off by the cutter during the cutting process. The step ring portion 13' connects the first side peripheral edge 121' of the element surface 101' and the second side peripheral edge 1032' of the ring side surface 103'; each step surface 131 of the step ring portion 13' is from the first side peripheral edge of the element surface 101' 121' to the second side peripheral edge 1032' of the ring side 103' are arranged in sequence; the distance between the step ring portion 13' and the back side 102' is gradually tapered from the first side peripheral edge 121' to the second side peripheral edge 1032'.

貼附保護層:請配合請參閱圖4所示,於本體10’的元件面101’及階級環部13’上貼附一保護層20,保護層20覆蓋元件面101’及階級環部13’的階級面131。保護層20較佳地為膠帶,且厚度約為165微米。Attach a protective layer: please refer to Figure 4, attach a protective layer 20 on the component surface 101' and the level ring portion 13' of the main body 10', and the protective layer 20 covers the component surface 101' and the level ring portion 13 'The class aspect 131. The protective layer 20 is preferably an adhesive tape and has a thickness of about 165 microns.

請配合請參閱圖3所示,另外,為了進一步加強保護層20的貼附狀況以及本體10的邊角刀切強度,前述階級環部13’的較佳形狀如下:階級環部13’的寬度W1定義為環側面103’與元件面101’的第一側周緣121’的徑向間隔距離;階級環部13’的高度H1定義為元件面101’與環側面103’的第二側周緣1032’於本體10’的厚度方向的距離;在本實施例中,階級環部13’的寬度W1大於或等於階級環部13’的高度H1,並且階級環部13’的寬度W1介於50至200微米之間,階級環部13’的高度H1介於20至100微米之間。此外,各階級面131的寬度W2較佳地介於10至50微米,相鄰的二階級面131的高度差異H2較佳地介於10至50微米。本創作所有階級環部之圖式僅為示意,未按照實際比例繪製。Please refer to Figure 3 for cooperation. In addition, in order to further enhance the attachment condition of the protective layer 20 and the corner knife cutting strength of the body 10, the preferred shape of the aforementioned step ring portion 13' is as follows: the width of the step ring portion 13' W1 is defined as the radial separation distance between the ring side surface 103' and the first side peripheral edge 121' of the element surface 101'; the height H1 of the step ring portion 13' is defined as the second side peripheral edge 1032 of the element surface 101' and the ring side surface 103' 'In the thickness direction of the main body 10'; in this embodiment, the width W1 of the step ring portion 13' is greater than or equal to the height H1 of the step ring portion 13', and the width W1 of the step ring portion 13' is between 50 to Between 200 micrometers, the height H1 of the step ring 13' is between 20 to 100 micrometers. In addition, the width W2 of each level surface 131 is preferably between 10 and 50 microns, and the height difference H2 of adjacent two level surfaces 131 is preferably between 10 and 50 microns. The drawings of all the class rings in this creation are only for reference, and are not drawn according to the actual scale.

本新型的具階級狀晶邊的晶圓即為前述方法所製作的晶圓,其構造均已於前述製作步驟中說明,故在此不重複贅述。The wafer with step-shaped crystal edges of the present invention is the wafer produced by the aforementioned method, and its structure has been described in the aforementioned production steps, so it will not be repeated here.

綜上所述,本新型藉由在本體10’邊緣設計出一階級環部13’而使本體邊緣呈現階梯狀,藉此增加本體邊緣與保護層20的接觸面積,使保護層20穩固地附著本體10’邊緣並支撐本體10’,以提高晶圓在進行後續晶背薄化製程的良率。In summary, in the present invention, a stepped ring 13' is designed on the edge of the body 10' to make the edge of the body appear stepped, thereby increasing the contact area between the edge of the body and the protective layer 20, so that the protective layer 20 is firmly attached The edge of the main body 10' supports the main body 10' to improve the yield of the wafer during the subsequent thinning process of the backside of the wafer.

以上所述僅是本創作的較佳實施例而已,並非對本創作做任何形式上的限制,雖然本創作已以較佳實施例揭露如上,然而並非用以限定本創作,任何所屬技術領域中具有通常知識者,在不脫離本創作技術方案的範圍內,當可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例,但凡是未脫離本創作技術方案的內容,依據本創作的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾,均仍屬於本創作技術方案的範圍內。The above description is only the preferred embodiment of the creation, and does not limit the creation in any form. Although the creation has been disclosed in the preferred embodiment as above, it is not intended to limit the creation. Any technical field has Generally knowledgeable persons, without departing from the scope of this creative technical solution, can use the technical content disclosed above to make slight changes or modifications to equivalent embodiments with equivalent changes. However, any content that does not deviate from this creative technical solution is based on this Any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence of the creation still fall within the scope of the technical solution for creation.

10:本體 101:正面 102:背面 11:矽基層 12:氮化鎵層 13:階級環部 131:階級面 1311:第一階級面 1312:第二階級面 14:側邊 20:保護層 L1:第一對準線 L2:第二對準線 1311A:第一階級面 1312A:第一階級面 1311B:第一階級面 L1A:第一對準線 L2A:第二對準線 10’:本體 101’:元件面 102’:背面 103’:環側面 1031’:第三側周緣 1032’:第二側周緣 11’:矽基層 12’:氮化鎵層 121’:第一側周緣 13’:階級環部 H1:高度 W1:寬度 H2:高度差異 W2:寬度 A:雷射裝置10: body 101: front 102: back 11: Silicon base layer 12: Gallium nitride layer 13: Class Ring Department 131: Class side 1311: first class aspect 1312: second class aspect 14: side 20: protective layer L1: first alignment L2: second alignment 1311A: First class aspect 1312A: First class aspect 1311B: First class aspect L1A: first alignment L2A: second alignment 10’: body 101’: component side 102’: Back 103’: Ring side 1031’: Third side perimeter 1032’: Second side perimeter 11’: Silicon base layer 12’: Gallium nitride layer 121’: First side perimeter 13’: Class Circle Department H1: height W1: width H2: height difference W2: width A: Laser device

圖1為本創作的具階級狀晶邊的晶圓的製造方法的準備晶圓步驟的示意圖。 圖2為本創作的具階級狀晶邊的晶圓的製造方法的形成階級環部步驟的示意圖。 圖3為本創作的具階級狀晶邊的晶圓的製造方法的形成階級狀晶邊步驟的示意圖。 圖4為本創作的具階級狀晶邊的晶圓的製造方法的貼附保護層步驟的示意圖。 圖5為本創作的具階級狀晶邊的晶圓的製造方法的形成階級環部步驟的第二實施例之示意圖。 圖6為本創作的具階級狀晶邊的晶圓的製造方法的形成階級環部步驟的第三實施例之示意圖。 圖7為本創作的具階級狀晶邊的晶圓的製造方法的流程圖。 FIG. 1 is a schematic diagram of the wafer preparation steps of the method for manufacturing a wafer with a step-shaped crystal edge created by the invention. FIG. 2 is a schematic diagram of the steps of forming a step ring in the method for manufacturing a wafer with a step-shaped crystal edge created. FIG. 3 is a schematic diagram of the step of forming the step-shaped crystal edge in the method for manufacturing the created step-shaped crystal edge wafer. FIG. 4 is a schematic diagram of the steps of attaching a protective layer in the method for manufacturing a wafer with a step-shaped crystal edge created. FIG. 5 is a schematic diagram of a second embodiment of the step of forming a step ring in the method for manufacturing a wafer with a step-shaped crystal edge created. FIG. 6 is a schematic diagram of a third embodiment of the step of forming a step ring in the method for manufacturing a wafer with step-shaped crystal edges created. Fig. 7 is a flowchart of a method for manufacturing a wafer with a step-shaped crystal edge created.

10’:本體 10’: body

101’:元件面 101’: component side

102’:背面 102’: Back

103’:環側面 103’: Ring side

1031’:第三側周緣 1031’: Third side perimeter

1032’:第二側周緣 1032’: Second side perimeter

11’:矽基層 11’: Silicon base layer

12’:氮化鎵層 12’: Gallium nitride layer

121’:第一側周緣 121’: First side perimeter

13’:階級環部 13’: Class Circle Department

131:階級面 131: Class side

H1:高度 H1: height

W1:寬度 W1: width

H2:高度差異 H2: height difference

W2:寬度 W2: width

Claims (4)

一種具階級狀晶邊的晶圓,包含: 一本體,其為一圓型片體,且具有: 相對的一元件面及一背面,該元件面的直徑小於該背面的直徑,該元件面的周緣為一第一側周緣; 一環側面,其環繞於該背面及該元件面之間;該環側面的相對兩周緣分別為一第二側周緣及一第三側周緣,該第三側周緣連接該背面的周緣; 一階級環部,其連接該元件面的該第一側周緣及該環側面的該第二側周緣;該階級環部具有複數階級面,該等階級面與該元件面朝向相同方向,並且自該元件面的該第一側周緣至該環側面的該第二側周緣依序排列;該階級環部與該背面的距離由該元件面的該第一側周緣朝該環側面的該第二側周緣呈階級狀漸縮; 一保護層,其貼附於該本體的該元件面及該階級環部的該等階級面。 A wafer with hierarchical crystal edges, including: A body, which is a round sheet body and has: Opposite an element surface and a back surface, the diameter of the element surface is smaller than the diameter of the back surface, and the peripheral edge of the element surface is a first side peripheral edge; A ring side surface, which surrounds between the back surface and the element surface; two opposite peripheral edges of the ring side surface are a second side peripheral edge and a third side peripheral edge respectively, and the third side peripheral edge is connected to the peripheral edge of the back surface; A step ring portion, which connects the first side periphery of the element surface and the second side periphery of the ring side; The first side peripheral edge of the element surface to the second side peripheral edge of the ring side surface are arranged in sequence; the distance between the step ring portion and the back surface is from the first side peripheral edge of the element surface toward the second side peripheral edge of the ring side surface The side periphery gradually shrinks in a class-like manner; A protective layer attached to the element surface of the main body and the step surface of the step ring. 如請求項1所述之具階級狀晶邊的晶圓,其中: 該階級環部的寬度定義為該環側面與該元件面的該第一側周緣的徑向間隔距離; 該階級環部的高度定義為該元件面與該環側面的該第二側周緣於該本體的厚度方向的距離; 該階級環部的該寬度大於或等於該階級環部的該高度。 The wafer with hierarchical crystal edges as described in claim 1, in which: The width of the step ring portion is defined as the radial separation distance between the ring side surface and the first side peripheral edge of the element surface; The height of the step ring portion is defined as the distance between the element surface and the second side periphery of the ring side surface in the thickness direction of the body; The width of the step ring is greater than or equal to the height of the step ring. 如請求項2所述之具階級狀晶邊的晶圓,其中: 該階級環部的該寬度介於50至200微米之間; 該階級環部的該高度介於20至100微米之間。 A wafer with hierarchical crystal edges as described in claim 2, in which: The width of the step ring is between 50 and 200 microns; The height of the step ring is between 20 and 100 microns. 如請求項1至3中任一項所述之具階級狀晶邊的晶圓,其中: 該本體包含: 一矽基層,其中該環側面、該階級環部與該背面位於該矽基層; 一氮化鎵層,其覆蓋該矽基層相對該背面的一側面;其中該元件面為該氮化鎵層相對該矽基層的一側面。 The wafer with hierarchical crystal edges as described in any one of claims 1 to 3, wherein: The ontology contains: A silicon-based layer, wherein the side surface of the ring, the level ring portion and the back surface are located on the silicon-based layer; A gallium nitride layer covers a side surface of the silicon-based layer opposite to the back surface; wherein the device surface is a side surface of the gallium nitride layer opposite to the silicon-based layer.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114045474A (en) * 2022-01-14 2022-02-15 绍兴中芯集成电路制造股份有限公司 Method for preventing chemical plating liquid seepage and method for preparing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114045474A (en) * 2022-01-14 2022-02-15 绍兴中芯集成电路制造股份有限公司 Method for preventing chemical plating liquid seepage and method for preparing semiconductor device
CN114045474B (en) * 2022-01-14 2022-04-15 绍兴中芯集成电路制造股份有限公司 Method for preventing chemical plating liquid seepage and method for preparing semiconductor device

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