CN104465324A - Discrete component manufacturing method - Google Patents

Discrete component manufacturing method Download PDF

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Publication number
CN104465324A
CN104465324A CN201410714323.7A CN201410714323A CN104465324A CN 104465324 A CN104465324 A CN 104465324A CN 201410714323 A CN201410714323 A CN 201410714323A CN 104465324 A CN104465324 A CN 104465324A
Authority
CN
China
Prior art keywords
wafer
brilliant back
manufacture method
separate elements
surface roughness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410714323.7A
Other languages
Chinese (zh)
Inventor
廖奇泊
陈俊峰
周雯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen young Electronic Technology Co., Ltd.
Original Assignee
SHANGHAI POWER BRIGHT ELECTRONIC TECHNOLOGY Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHANGHAI POWER BRIGHT ELECTRONIC TECHNOLOGY Ltd filed Critical SHANGHAI POWER BRIGHT ELECTRONIC TECHNOLOGY Ltd
Priority to CN201410714323.7A priority Critical patent/CN104465324A/en
Publication of CN104465324A publication Critical patent/CN104465324A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The invention provides a discrete component manufacturing method which includes the following steps that firstly, a wafer is thinned through a common grinding method, and a first part of the wafer is ground off; secondly, the wafer is thinned through a fine grinding method, and a second part of the wafer is ground off; thirdly, uniform surface roughness is formed on the wafer processed in the second step in a wet etching mode, and slight defects on the surface of a wafer back are removed through a mixed solution; fourthly, a metal deposition process is applied to the wafer back, and wafer back metal is deposited on the wafer processed in the third step. By means of the method, uniformity of wafer back surface roughness is better, the risk of wafer back metal stripping is reduced, and the production loss or the component quality problem is reduced.

Description

The manufacture method of separate elements
Technical field
The present invention relates to a kind of manufacture method of element, particularly, relate to a kind of manufacture method of separate elements.
Background technology
Brilliant back of the body reduction process and brilliant back of the body metal deposition process is needed in the manufacture process of separate elements, but Chang Yinjing carries on the back mechanical polishing and causes trickle slight crack or deep layer lattice damage (as shown in Figure 5) on crystalline substance back of the body reduction process, form structural defect, cause brilliant back of the body metal peel off in successive process and cause production loss or element quality problem.
Summary of the invention
For defect of the prior art, the object of this invention is to provide a kind of manufacture method of separate elements, it obtains the uniformity of better brilliant back surface roughness (roughness) and reduces the risk of brilliant back of the body metal-stripping (peeling), thus reduces production loss or element quality problem.
According to an aspect of the present invention, a kind of manufacture method of separate elements is provided, it is characterized in that, comprise the following steps:
Step one, common grinding mode is thinning to wafer, and grinding wafer is fallen Part I;
Step 2, fine ground mode is thinning to wafer, and grinding wafer is fallen Part II;
Step 3, the wafer handled well in step 2 by Wet-type etching mode forms uniform outer surface roughness; The defect of trickle brilliant back surface is removed by hybrid solution;
Step 4, implements brilliant back of the body metal deposition process, deposition brilliant back of the body metal on the wafer after step 3 process.
Preferably, the thickness of described Part I is greater than the thickness of Part II.
Preferably, described hybrid solution comprises H2SO4, HNO3, HF, water, interfacial agent.
Compared with prior art, the present invention has following beneficial effect: the present invention's crystalline substance back of the body reduction process adopts the decline processing procedure of the thinning processing procedure of fine lapping and Wet-type etching of mixing machinery obtain the uniformity of better brilliant back surface roughness (roughness) and reduce the risk of brilliant back of the body metal-stripping (peeling), thus reduces production loss or element quality problem.
Accompanying drawing explanation
By reading the detailed description done non-limiting example with reference to the following drawings, other features, objects and advantages of the present invention will become more obvious:
Fig. 1 is the schematic diagram of the invention process step one.
Fig. 2 is the schematic diagram of the invention process step 2.
Fig. 3 is the schematic diagram after the invention process step 2.
Fig. 4 is the schematic diagram of the invention process step 4.
Fig. 5 before being the brilliant back of the body thinning after effect schematic diagram.
Fig. 6 is the effect schematic diagram after the invention process step one and step 2.
Fig. 7 is the effect schematic diagram after the invention process step 3.
Embodiment
Below in conjunction with specific embodiment, the present invention is described in detail.Following examples will contribute to those skilled in the art and understand the present invention further, but not limit the present invention in any form.It should be pointed out that to those skilled in the art, without departing from the inventive concept of the premise, some distortion and improvement can also be made.These all belong to protection scope of the present invention.
As shown in Figures 1 to 4, the manufacture method of separate elements of the present invention comprises the following steps:
Step one, common grinding mode is thinning to wafer, grinds away Part I (dotted portion of Fig. 1) 2 by wafer 1; The lapping mode of step one can be identical with former lapping mode; After this grinding, wafer rear is very coarse, height fluctuating size neither with, often have the surface tear of weight not grade.
Step 2, fine ground mode is thinning to wafer, grinds away Part II (dotted portion of Fig. 2) 3 by wafer 1, after grinding, wafer 1 has the defect 4 (as shown in Figure 6) of trickle brilliant back surface; The thickness of Part I 2 is greater than the thickness of Part II 3; Fine ground mode can reach the abrasive grains degree of 1500-3000Grit.Step 2 makes wafer rear smooth surface, and without the destruction that physics scratches, under different light rays, still cannot see the ring of light of scroll, light reflection is very even.
Step 3, the wafer handled well in step 2 by Wet-type etching mode forms uniform outer surface roughness; Removed the defect 4 (as shown in Figure 7) of trickle brilliant back surface by hybrid solution, to increase the contact area of itself and successive process back metal, to increase its degree of adhesion, play the effect avoiding back metal peeling.Hybrid solution (according to weight percent meter) comprises H2SO4 (80%-90%), HNO3 (10%-20%), HF (1%-5%), water (5%-10%), interfacial agent (1%-3%); Interfacial agent can be gel, BOE etc.
Step 4, implements brilliant back of the body metal deposition process, deposition brilliant back of the body metal 5 on the wafer 1 namely after step 3 process.
The present invention's crystalline substance back of the body reduction process adopts the decline processing procedure of the thinning processing procedure of fine lapping and Wet-type etching of mixing machinery obtain the uniformity of better brilliant back surface roughness (roughness) and reduce the risk of brilliant back of the body metal-stripping (peeling), thus reduces production loss or element quality problem.
Above specific embodiments of the invention are described.It is to be appreciated that the present invention is not limited to above-mentioned particular implementation, those skilled in the art can make various distortion or amendment within the scope of the claims, and this does not affect flesh and blood of the present invention.

Claims (3)

1. a manufacture method for separate elements, is characterized in that, comprises the following steps:
Step one, common grinding mode is thinning to wafer, and grinding wafer is fallen Part I;
Step 2, fine ground mode is thinning to wafer, and grinding wafer is fallen Part II;
Step 3, the wafer handled well in step 2 by Wet-type etching mode forms uniform outer surface roughness; The defect of trickle brilliant back surface is removed by hybrid solution;
Step 4, implements brilliant back of the body metal deposition process, deposition brilliant back of the body metal on the wafer after step 3 process.
2. the manufacture method of separate elements according to claim 1, is characterized in that, the thickness of described Part I is greater than the thickness of Part II.
3. the manufacture method of separate elements according to claim 1, is characterized in that, described hybrid solution comprises H 2sO 4, HNO 3, HF, water, interfacial agent.
CN201410714323.7A 2014-11-28 2014-11-28 Discrete component manufacturing method Pending CN104465324A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410714323.7A CN104465324A (en) 2014-11-28 2014-11-28 Discrete component manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410714323.7A CN104465324A (en) 2014-11-28 2014-11-28 Discrete component manufacturing method

Publications (1)

Publication Number Publication Date
CN104465324A true CN104465324A (en) 2015-03-25

Family

ID=52911199

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410714323.7A Pending CN104465324A (en) 2014-11-28 2014-11-28 Discrete component manufacturing method

Country Status (1)

Country Link
CN (1) CN104465324A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112053936A (en) * 2020-09-22 2020-12-08 广州粤芯半导体技术有限公司 Wafer back surface roughening control method and power device manufacturing method
CN114016042A (en) * 2021-11-25 2022-02-08 滁州钰顺企业管理咨询合伙企业(有限合伙) Acidic etching solution

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101327572A (en) * 2007-06-22 2008-12-24 中芯国际集成电路制造(上海)有限公司 Technique for thinning back side of silicon wafer
US20090246955A1 (en) * 2008-03-26 2009-10-01 Masayuki Kanazawa Wafer processing method and wafer processing apparatus
CN101981664A (en) * 2008-03-31 2011-02-23 Memc电子材料有限公司 Methods for etching the edge of a silicon wafer
CN102044428A (en) * 2009-10-13 2011-05-04 中芯国际集成电路制造(上海)有限公司 Method for thinning wafer
CN102082069A (en) * 2009-11-27 2011-06-01 北大方正集团有限公司 Method for processing back surface of wafer
CN102379028A (en) * 2009-03-31 2012-03-14 大金工业株式会社 Etching liquid
CN102473636A (en) * 2009-08-11 2012-05-23 斯泰拉化工公司 Microprocessing treatment agent and microprocessing treatment method using same
US20140175620A1 (en) * 2012-12-21 2014-06-26 Lapis Semiconductor Co., Ltd. Semiconductor device fabrication method and semiconductor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101327572A (en) * 2007-06-22 2008-12-24 中芯国际集成电路制造(上海)有限公司 Technique for thinning back side of silicon wafer
US20090246955A1 (en) * 2008-03-26 2009-10-01 Masayuki Kanazawa Wafer processing method and wafer processing apparatus
CN101981664A (en) * 2008-03-31 2011-02-23 Memc电子材料有限公司 Methods for etching the edge of a silicon wafer
CN102379028A (en) * 2009-03-31 2012-03-14 大金工业株式会社 Etching liquid
CN102473636A (en) * 2009-08-11 2012-05-23 斯泰拉化工公司 Microprocessing treatment agent and microprocessing treatment method using same
CN102044428A (en) * 2009-10-13 2011-05-04 中芯国际集成电路制造(上海)有限公司 Method for thinning wafer
CN102082069A (en) * 2009-11-27 2011-06-01 北大方正集团有限公司 Method for processing back surface of wafer
US20140175620A1 (en) * 2012-12-21 2014-06-26 Lapis Semiconductor Co., Ltd. Semiconductor device fabrication method and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112053936A (en) * 2020-09-22 2020-12-08 广州粤芯半导体技术有限公司 Wafer back surface roughening control method and power device manufacturing method
CN112053936B (en) * 2020-09-22 2024-06-11 粤芯半导体技术股份有限公司 Wafer back roughening control method and power device manufacturing method
CN114016042A (en) * 2021-11-25 2022-02-08 滁州钰顺企业管理咨询合伙企业(有限合伙) Acidic etching solution

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SE01 Entry into force of request for substantive examination
C41 Transfer of patent application or patent right or utility model
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Effective date of registration: 20170303

Address after: 361100 268-269, an industrial park, Tongan Industrial Zone, Fujian, Xiamen

Applicant after: Xiamen young Electronic Technology Co., Ltd.

Address before: 200233 Shanghai, Xuhui District Rainbow Road No. 56, building 8, room E,

Applicant before: SHANGHAI POWER BRIGHT ELECTRONIC TECHNOLOGY LTD.

RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20150325