CN115376471A - Data voltage compensation method, data voltage compensation module and display device - Google Patents

Data voltage compensation method, data voltage compensation module and display device Download PDF

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Publication number
CN115376471A
CN115376471A CN202211114471.6A CN202211114471A CN115376471A CN 115376471 A CN115376471 A CN 115376471A CN 202211114471 A CN202211114471 A CN 202211114471A CN 115376471 A CN115376471 A CN 115376471A
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China
Prior art keywords
data voltage
row
mth column
compensated
mth
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CN202211114471.6A
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Chinese (zh)
Inventor
张峻敏
肖利军
赵盼辉
廖燕平
江鹏
江峰
李冰
冯蒙
帅孟超
向建民
杨子铭
吕炎伟
陈航宇
白鋆
程凯
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BOE Technology Group Co Ltd
Wuhan BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Wuhan BOE Optoelectronics Technology Co Ltd
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Priority to CN202211114471.6A priority Critical patent/CN115376471A/en
Publication of CN115376471A publication Critical patent/CN115376471A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects

Abstract

The invention provides a data voltage compensation method, a data voltage compensation module and a display device. The voltage compensation method comprises the following steps: in the current frame, when the mth column data voltage of the nth row is different from the mth column data voltage of the (n + 1) th row, obtaining the mth column compensation data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the (n-1) th row and the mth column data voltage of the (n + 1) th row; obtaining an mth column compensation data voltage of an n +1 th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of an n +1 th row, the mth column data voltage of an n row and the mth column data voltage of an n +2 th row; n is a positive integer. The invention achieves better afterimage/image quality optimization effect.

Description

Data voltage compensation method, data voltage compensation module and display device
Technical Field
The invention relates to the technical field of display, in particular to a data voltage compensation method, a data voltage compensation module and a display device.
Background
In the related art, the afterimage is an inherent defect of the liquid crystal display panel and can be classified into a surface afterimage and a line afterimage. When the characteristics of the display panel are fixed, the surface residual image can be improved by adjusting the gray scale voltage symmetry, but the line residual image is more difficult to be optimized by the conventional means, and the line residual image is particularly suitable for the high-resolution and high-refresh rate display panel sensitive to the charging rate.
One of the main causes of the afterimage is the charging rate difference between the positive and negative pixels of the display panel. Taking an 8K column (column) structure 1G1D 120Hz display panel as an example, assuming that the gate-on voltage of the display thin film transistor is 32V, the positive polarity pixel driving voltage is greater than or equal to 8.5V and less than or equal to 15.5V, and the negative polarity pixel driving voltage is greater than or equal to 0.5V and less than or equal to 7.5V, the gate-source voltage Vgs of the display thin film transistor is different under different polarities. When the display picture is a black-and-white checkerboard picture, the positive and negative polarity difference of Vgs of 255 gray scales reaches 15V, and the charging rate of the negative polarity pixels is obviously better than that of the positive polarity pixels. In areas with pre-charge (i.e., within white blocks), this difference can be compensated for; however, at the black-white junction, due to the lack of pre-charging of charges, charges in the box are directionally accumulated to form an additional electric field caused by the positive and negative charging differences, and finally, a line residual image is formed.
The Line over-drive (Line OD) technique is an effective means for improving fine pitch defects, and the basic idea is to perform Line-to-Line over-drive according to the gray scale difference of adjacent lines to improve the problem of uneven brightness of adjacent pixels caused by insufficient charging. However, in the conventional overdrive technology, the same data voltmeter is used for positive and negative frames, and the charging difference problem of the positive and negative frames caused by non-uniform TFT (thin film transistor) characteristics and VCOM (common electrode voltage) shift cannot be avoided.
The related DP-Line OD technology can obviously improve the Line residual image caused by insufficient charging at the gray-scale mutation position, but the Line residual image caused by mischarging is not obviously improved, because the insufficient charging can be regarded as that the Line is charged with partial previous Line data, the condition can be compensated by the DP-Line OD technology, the mischarging is equivalent to that the Line is charged with partial next Line data, and the conventional Line over-drive technology only refers to the previous Line data and cannot refer to the next Line data, so that the Line cannot be subjected to polarity-distinguishing over-drive/under-drive compensation according to the next Line data, and the Line residual image caused by the mischarging cannot be improved.
Disclosure of Invention
The present invention is directed to a data voltage compensation method, a data voltage compensation module and a display device, which solve the problem that the related row overdrive technology can only refer to the previous row of data and cannot refer to the next row of data, so that the polarity-differentiated overdrive/underdrive compensation cannot be performed on the current row according to the next row of data, and thus the line image retention caused by the mischarging cannot be improved.
The embodiment of the invention provides a data voltage compensation method, which comprises the following steps:
in the present frame, when the mth column data voltage of the nth row corresponding to the mth column pixel circuit of the nth row is different from the mth column data voltage of the (n + 1) th row corresponding to the mth column pixel circuit of the (n + 1) th row,
compensating the mth column data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the (n-1) th row and the mth column data voltage of the (n + 1) th row to obtain the mth column compensation data voltage of the nth row; compensating the mth column data voltage of the (n + 1) th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the (n + 1) th row, the mth column data voltage of the nth row and the mth column data voltage of the (n + 2) th row to obtain the mth column compensation data voltage of the (n + 1) th row;
controlling the nth row and mth column of pixel circuits to display according to the nth row and mth column compensation data voltage, and controlling the (n + 1) th row and mth column of pixel circuits to display according to the (n + 1) th row and mth column compensation data voltage;
n is a positive integer.
Optionally, when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
Optionally, when the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, and the mth column data voltage of the n +1 th row is equal to the mth column data voltage of the n +2 th row, the mth column compensation data voltage of the n +1 th row is less than the mth column data voltage of the n +1 th row;
the data voltage of the mth column of the (n + 2) th row is the data voltage of the pixel circuit of the mth column of the (n + 2) th row corresponding to the current frame.
Optionally, the data voltage compensation method according to at least one embodiment of the present invention further includes: presetting a first lookup table and a second lookup table;
the data voltage compensation method includes:
in the current frame, when the mth column data voltage of the nth row and the mth column data voltage of the (n + 1) th row are different and the data voltage on the mth column data line is a positive polarity data voltage,
searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and operating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensation data voltage of the n th row;
and searching a corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, searching a corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and performing operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
Optionally, when the data voltage on the data line of the corresponding column is a positive polarity data voltage, the first lookup table stores a to-be-compensated data voltage, which is actually detected in advance and corresponds to the data voltage of the corresponding column in the previous row and the data voltage of the corresponding column in the current row;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
Optionally, the data voltage compensation method according to at least one embodiment of the present invention further includes: presetting a third lookup table and a fourth lookup table;
the data voltage compensation method includes:
in the current frame, when the data voltage of the nth row and the mth column is different from the data voltage of the (n + 1) th row and the data voltage of the mth column on the data line is a negative data voltage,
searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 row and the mth column data voltage of the n +1 row, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n row and the mth column data voltage of the n +1 row, and performing operation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n row;
and finding a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, finding a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and performing operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n +1 th row.
Optionally, when the data voltage on the data line of the corresponding line is a negative data voltage, the data voltage to be compensated corresponding to the data voltage of the corresponding line in the previous row and the data voltage of the corresponding line in the current row, which are actually detected in advance, are stored in the third lookup table;
when the data voltage on the corresponding line data line is negative data voltage, the data voltage to be compensated corresponding to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, which is obtained through actual detection in advance, is stored in the fourth lookup table.
The embodiment of the invention also provides a data voltage compensation module, which comprises a compensation circuit and a display control circuit;
the compensation circuit is used for compensating the mth column data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the n-1 row and the mth column data voltage of the n +1 row when the mth column data voltage of the nth row and the mth column data voltage of the mth column pixel circuit of the nth row are different from the mth column data voltage of the n +1 row in the current frame, so as to obtain the mth column compensation data voltage of the nth row; the compensation circuit is further used for compensating the mth column data voltage of the (n + 1) th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the (n + 1) th row, the mth column data voltage of the nth row and the mth column data voltage of the (n + 2) th row to obtain the mth column compensation data voltage of the (n + 1) th row;
the display control circuit is used for controlling the nth row and mth column pixel circuits to display according to the nth row and mth column compensation data voltage, and controlling the (n + 1) th row and mth column pixel circuits to display according to the (n + 1) th row and mth column compensation data voltage;
n is a positive integer.
Optionally, when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the (n + 1) th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
Optionally, when the mth column data voltage on the (n + 1) th row is less than the mth column data voltage on the nth row, and the mth column data voltage on the (n + 1) th row is equal to the mth column data voltage on the (n + 2) th row, the mth column compensation data voltage on the (n + 1) th row is less than the mth column data voltage on the (n + 1) th row;
the data voltage of the mth column of the (n + 2) th row is the data voltage of the pixel circuit of the mth column of the (n + 2) th row corresponding to the current frame.
Optionally, the data voltage compensation module according to at least one embodiment of the present invention further includes a look-up table setting circuit;
the lookup table setting circuit is used for presetting a first lookup table and a second lookup table;
the compensation circuit is used for searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a positive-polarity data voltage in the current frame, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and calculating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensated data voltage of the n-th row; the compensation circuit is further configured to find a corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, find a corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and perform an operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
Optionally, when the data voltage on the data line of the corresponding column is a positive polarity data voltage, the first lookup table stores a to-be-compensated data voltage, which is actually detected in advance and corresponds to the data voltage of the corresponding column in the previous row and the data voltage of the corresponding column in the current row;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
Optionally, the data voltage compensation module according to at least one embodiment of the present invention further includes a look-up table setting circuit; the lookup table setting circuit is used for presetting a third lookup table and a fourth lookup table;
the compensation circuit is used for searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a negative data voltage in the current frame, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and calculating the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n-th row; the compensation circuit is further configured to find a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage in the nth row and the mth column data voltage in the n +1 th row, find a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage in the n +1 th row and the mth column data voltage in the n +2 th row, and perform an operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensated data voltage in the n +1 th row.
Optionally, when the data voltage on the data line of the corresponding line is a negative data voltage, the data voltage to be compensated corresponding to the data voltage of the corresponding line in the previous row and the data voltage of the corresponding line in the current row, which are actually detected in advance, are stored in the third lookup table;
when the data voltage on the corresponding line data line is negative data voltage, the data voltage to be compensated corresponding to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, which is obtained through actual detection in advance, is stored in the fourth lookup table.
The embodiment of the invention also provides a display device which comprises the data voltage compensation module.
The data voltage compensation method, the data voltage compensation module and the display device in the embodiment of the invention simultaneously refer to the data voltage of the previous Line and the data voltage of the next Line, and perform overdrive compensation on the data voltage of the current Line according to the polarity of the data voltage on the mth column data Line of the current frame, so as to achieve better afterimage/image quality optimization effect, and solve the image quality problems of Line afterimage and the like caused by mischarging which cannot be solved by the related DP (bipolar) -Line OD (overdrive) technology.
Drawings
Fig. 1 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the invention;
fig. 2 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the invention;
fig. 3 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the invention;
FIG. 4 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the present disclosure;
FIG. 5 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the present disclosure;
FIG. 6 is a schematic compensation diagram corresponding to a data voltage compensation method according to at least one embodiment of the present disclosure;
fig. 7 is a schematic view showing a connection relationship of the thin film transistor T0 in the related art;
FIG. 8 is a schematic diagram of a checkerboard black and white picture;
FIG. 9 is a timing diagram of the last line of the white space when the picture to be displayed is the black-white space picture shown in FIG. 8;
FIG. 10 is a timing chart of the first row of black grids when the picture to be displayed is the black and white grid picture shown in FIG. 8;
fig. 11 is a structural diagram of a data voltage compensation module according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The data voltage compensation method provided by the embodiment of the invention comprises the following steps:
in the present frame, when the mth column data voltage of the nth row corresponding to the mth column pixel circuit of the nth row is different from the mth column data voltage of the (n + 1) th row corresponding to the mth column pixel circuit of the (n + 1) th row,
compensating the mth column data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the (n-1) th row and the mth column data voltage of the (n + 1) th row to obtain the mth column compensation data voltage of the nth row; compensating the mth column data voltage of the (n + 1) th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the (n + 1) th row, the mth column data voltage of the nth row and the mth column data voltage of the (n + 2) th row to obtain the mth column compensation data voltage of the (n + 1) th row;
controlling the nth row and mth column of pixel circuits to display according to the nth row and mth column compensation data voltage, and controlling the (n + 1) th row and mth column of pixel circuits to display according to the (n + 1) th row and mth column compensation data voltage;
n is a positive integer.
In the embodiment of the present invention, the polarity of the data voltage may be a positive polarity or a negative polarity, and the data voltage may be a positive polarity data voltage or a negative polarity data voltage;
when the data voltage is a positive polarity data voltage, a voltage difference between the positive polarity data voltage and a common electrode voltage Vcom is greater than 0, that is, the positive polarity data voltage is greater than the common electrode voltage Vcom;
when the data voltage is a negative polarity data voltage, a voltage difference between the negative polarity data voltage and the common electrode voltage Vcom is less than 0, that is, the negative polarity data voltage is less than the common electrode voltage Vcom.
In the data voltage compensation method according to the embodiment of the present invention, the data voltage of the previous Line and the data voltage of the next Line are referred to at the same time, and the data voltage of the current Line is subjected to overdrive compensation according to the polarity of the data voltage on the mth column data Line of the current frame, so as to achieve a better afterimage/image quality optimization effect, and solve the image quality problems such as Line afterimage and the like caused by wrong charging, which cannot be solved by the related DP (bipolar) -Line OD (overdrive) technology.
In the data voltage compensation method according to the embodiment of the present invention, in a current frame, when an mth column data voltage of an nth row and an mth column data voltage of an n +1 th row are different, the mth column data voltage of the nth row is compensated according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the n row, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row to obtain an mth column compensation data voltage of the nth row, and the mth column data voltage of the n +1 th row is compensated according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the n +1 th row, the mth column data voltage of the nth row and the mth column data voltage of the n +2 th row to obtain an mth column compensation data voltage of the n +1 th row; and controlling the nth row and mth column pixel circuits to display according to the nth row and mth column compensation data voltage, and controlling the (n + 1) th row and mth column pixel circuits to display according to the (n + 1) th row and mth column compensation data voltage so as to perform display compensation, thereby achieving a better afterimage/image quality optimization effect.
In at least one embodiment of the present invention, when n is equal to 1, the mth row pixel circuit in the nth row is a first mth row pixel circuit included in the display panel, and the mth row data voltage in the nth row is compensated according to a polarity of a data voltage on the mth row data line in the current frame, the mth row data voltage in the nth row, and the mth row data voltage in the n +1 th row;
when the mth row pixel circuit in the nth row is the mth row pixel circuit in the last row included in the display panel, compensating the mth row data voltage in the nth row according to the polarity of the data voltage on the mth row data line in the current frame, the mth row data voltage in the nth row and the mth row data voltage in the (n-1) th row to obtain the mth row compensation data voltage in the nth row.
Optionally, when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
In a specific implementation, when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the (n + 1) th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row.
Optionally, when the mth column data voltage on the (n + 1) th row is less than the mth column data voltage on the nth row, and the mth column data voltage on the (n + 1) th row is equal to the mth column data voltage on the (n + 2) th row, the mth column compensation data voltage on the (n + 1) th row is less than the mth column data voltage on the (n + 1) th row.
And the data voltage of the (n + 2) th row and the mth column is the data voltage of the pixel circuit corresponding to the (n + 2) th row and the mth column in the current frame.
In a specific implementation, when the mth column data voltage of the n +1 th row is less than the mth column data voltage of the n th row, and the mth column data voltage of the n +1 th row is equal to the mth column data voltage of the n +2 th row, the mth column compensation data voltage of the n +1 th row is less than the mth column data voltage of the n +1 th row.
The data voltage compensation method according to at least one embodiment of the present invention further includes: presetting a first lookup table and a second lookup table;
the data voltage compensation method includes:
in the current frame, when the mth column data voltage of the nth row and the mth column data voltage of the (n + 1) th row are different and the data voltage on the mth column data line is a positive polarity data voltage,
searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and operating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensation data voltage of the n th row;
and finding corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, finding corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and calculating the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n +1 th row.
In at least one embodiment of the present invention, the first lookup table may be a positive polarity forward table, and the second lookup table may be a positive polarity backward table.
In specific implementation, in a current frame, when a data voltage on an mth column data line is a positive polarity data voltage, a corresponding first to-be-compensated data voltage is found according to the first lookup table, an nth column data voltage of an n-1 th row and an mth column data voltage of an n +1 th row, a corresponding second to-be-compensated data voltage is found according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, the first to-be-compensated data voltage and the second to-be-compensated data voltage are calculated to obtain the mth column compensated data voltage of the n-th row, a corresponding third to-be-compensated data voltage is found according to the first lookup table, the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row, a corresponding fourth to-be-compensated data voltage is found according to the second lookup table, the mth data voltage of the n +1 th row and the mth column data voltage are calculated to obtain the compensating data voltage of the mth row and the mth column data voltage.
In at least one embodiment of the present invention, the operation on the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the nth row and the mth column compensation data voltage may be:
performing weighted average calculation on the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain an mth row and mth column of compensation data voltage; alternatively, the first and second electrodes may be,
performing weight-determining or weight-variable weighted average calculation on the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain an nth row and an mth column of compensated data voltages;
but not limited thereto.
In specific implementation, other operation modes may also be adopted to obtain the nth row and mth column compensation data voltages according to the first to-be-compensated data voltage and the second to-be-compensated data voltage.
In at least one embodiment of the present invention, the determining weight or the weighted average calculation with variable weight is performed on the first to-be-compensated data voltage Vb1 and the second to-be-compensated data voltage Vb2 to obtain the mth column compensation data voltage Vbnm in the nth row may be:
controlling Vvbnm to be equal to a x Vb1+ b x Vb2, wherein a + b is equal to 1; a and b are both positive numbers;
the value of a and the value of b are fixed; alternatively, the values of a and b may vary.
In at least one embodiment of the present invention, the operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the m-th column compensation data voltage of the n + 1-th row may be:
performing weighted average calculation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain an mth column compensation data voltage of the (n + 1) th row; alternatively, the first and second electrodes may be,
performing weighted average calculation of determined weight or variable weight on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensation data voltage of the (n + 1) th row;
but not limited thereto.
In specific implementation, other operation manners may also be adopted to obtain the mth column compensation data voltage in the n +1 th row according to the third to-be-compensated data voltage and the fourth to-be-compensated data voltage.
In at least one embodiment of the present invention, the determining weight or the weighted average calculation with variable weight is performed on the third to-be-compensated data voltage Vb3 and the fourth to-be-compensated data voltage Vb4 to obtain the m-th column compensation data voltage Vbn +1m in the n +1 th row may be:
controlling Vbn +1m equal to c × Vb3+ d × Vb4, wherein c + d is equal to 1; c and d are both positive numbers;
the value of c and the value of d are fixed; alternatively, the values of c and d may vary.
In at least one embodiment of the present invention, when the data voltage on the corresponding line data line is a positive polarity data voltage, the first lookup table stores a to-be-compensated data voltage that is actually detected in advance and corresponds to a corresponding line data voltage of a previous row and a corresponding line data voltage of a current row;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
In specific implementation, when the first lookup table and the second lookup table are set, the data voltage to be compensated corresponding to the data voltage of the corresponding column of the previous row and the data voltage of the corresponding column of the current row may be actually detected in advance, the data voltage to be compensated corresponding to the data voltage of the corresponding column of the previous row and the data voltage of the corresponding column of the current row may be stored in the first lookup table, the data voltage to be compensated corresponding to the data voltage of the corresponding column of the current row and the data voltage of the corresponding column of the next row may be actually detected in advance, and the data voltage to be compensated corresponding to the data voltage of the corresponding column of the current row and the data voltage of the corresponding column of the next row may be stored in the second lookup table.
The data voltage compensation method according to at least one embodiment of the present invention further includes: presetting a third lookup table and a fourth lookup table;
the data voltage compensation method includes:
in the current frame, when the mth column data voltage of the nth row and the mth column data voltage of the (n + 1) th row are different and the data voltage on the mth column data line is a negative polarity data voltage,
searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and performing operation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n th row;
and finding a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, finding a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and performing operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
In at least one embodiment of the present invention, the third lookup table may be a negative polarity forward table, and the fourth lookup table may be a negative polarity backward table.
In specific implementation, in a current frame, when a data voltage on a data line of a corresponding column is a negative data voltage, a corresponding fifth to-be-compensated data voltage is found according to the third lookup table, an mth column data voltage of an n-1 row and an mth column data voltage of an n +1 row, a corresponding sixth to-be-compensated data voltage is found according to the fourth lookup table, the mth column data voltage of the n-1 row and the mth column data voltage of the n +1 row, the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage are calculated to obtain the mth column compensated data voltage of the n row, a corresponding seventh to-be-compensated data voltage is found according to the third lookup table, the mth column data voltage of the n row and the mth column data voltage of the n +1 row, a corresponding eighth to-be-compensated data voltage is found according to the fourth lookup table, the mth column data voltage of the n +1 row and the mth column data voltage are calculated to obtain the eighth to-be-compensated data voltage and the mth column data voltage and the nth +1 row and the nth to-be-compensated data voltage are calculated to obtain the mth column data voltage.
In at least one embodiment of the present invention, the operation performed on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the nth row and the mth column of compensated data voltage may be:
performing weighted average calculation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain an mth row and mth column of compensation data voltages; alternatively, the first and second electrodes may be,
performing weight-determined or variable-weight weighted average calculation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain an mth row and mth column of compensated data voltages;
but not limited thereto.
In specific implementation, other operation manners may also be adopted to obtain the compensated data voltage in the (n + 1) th row and the mth column according to the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage.
In at least one embodiment of the present invention, the weight determination or the weighted average calculation with variable weight is performed on the fifth to-be-compensated data voltage Vb5 and the sixth to-be-compensated data voltage Vb6 to obtain the mth column compensation data voltage Vbnm in the nth row may be:
controlling Vbnm to be equal to e multiplied by Vb5+ f multiplied by Vb6, wherein e + f is equal to 1; e and f are both positive numbers;
the value of e and the value of f are fixed; alternatively, the values of e and f may vary.
In at least one embodiment of the present invention, the operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the m-th column compensation data voltage of the n + 1-th row may be:
performing weighted average calculation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensation data voltage of the (n + 1) th row; alternatively, the first and second liquid crystal display panels may be,
performing weight-determined or variable-weight weighted average calculation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensation data voltage of the (n + 1) th row;
but not limited thereto.
In specific implementation, other operation manners may also be adopted to obtain the compensated data voltage in the (n + 1) th row and the mth column according to the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage.
In at least one embodiment of the present invention, the determining weight or the weighted average calculation with variable weight is performed on the seventh to-be-compensated data voltage Vb7 and the eighth to-be-compensated data voltage Vb8 to obtain the mth column compensation data voltage Vbn +1m in the n +1 th row may be:
controlling Vbn +1m equal to gxVb 7+ hxVb 8, wherein g + h is equal to 1; g and h are both positive numbers;
the value of g and the value of h are fixed; alternatively, the values of g and h may vary.
In at least one embodiment of the present invention, when the data voltage on the corresponding line data line is a negative polarity data voltage, the third lookup table stores a to-be-compensated data voltage, which is actually detected in advance and corresponds to the corresponding line data voltage of the previous line and the corresponding line data voltage of the current line;
the fourth lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the data voltages of the corresponding column of the current row and the data voltages of the corresponding column of the next row, when the data voltages on the data lines of the corresponding columns are negative data voltages.
In a specific implementation, when the third lookup table and the fourth lookup table are set, the to-be-compensated data voltages corresponding to the data voltage of the corresponding column of the previous row and the data voltage of the corresponding column of the current row may be actually detected in advance, the to-be-compensated data voltages corresponding to the data voltage of the corresponding column of the previous row and the data voltage of the corresponding column of the current row may be stored in the first lookup table, the to-be-compensated data voltages corresponding to the data voltage of the corresponding column of the current row and the data voltage of the corresponding column of the next row may be actually detected in advance, and the to-be-compensated data voltages corresponding to the data voltage of the corresponding column of the current row and the data voltage of the corresponding column of the next row may be stored in the fourth lookup table.
As shown in fig. 1, in the current frame, when the data voltage on the mth column data line Dm is positive, a first to-be-compensated data voltage Vb1 is obtained according to the first lookup table LUT-P1, the mth column data voltage Vn-1m on the n-1 th row, and the mth column data voltage Vnm on the nth row; obtaining a second to-be-compensated data voltage Vb2 according to a second lookup table LUT-P2, an nth column data voltage Vnm of an nth row and an mth column data voltage Vn +1m of an n +1 th row, and obtaining an mth column compensation data voltage Vbnm of the nth row according to operation on the first to-be-compensated data voltage Vb1 and the second to-be-compensated data voltage Vb 2.
In fig. 1, reference numeral Pn-2m is a row n-2 and column m pixel circuit, reference numeral Pn-1m is a row n-1 and column m pixel circuit, reference numeral Pnm is a row n and column m pixel circuit, reference numeral Pn +1m is a row n +1 and column m pixel circuit, and reference numeral Pn +2m is a row n +2 and column m pixel circuit.
As shown in fig. 2, in the current frame, when the data voltage on the mth column data line Dm is positive, a third to-be-compensated data voltage Vb3 is obtained according to the first lookup table LUT-P1, the mth column data voltage Vnm in the nth row, and the mth column data voltage Vn +1m in the n +1 th row; obtaining a fourth data voltage Vb4 to be compensated according to a second lookup table LUT-P2, an mth column data voltage Vn +1m in an n +1 th row and an mth column data voltage Vn +2m in an n +2 th row, and obtaining an mth column compensation data voltage Vbn +1m in an n +1 th row according to operation on the third data voltage Vb3 to be compensated and the fourth data voltage Vb4 to be compensated.
In FIG. 2, reference numeral Pn-2m is the mth column pixel circuit of the n-2 th row, reference numeral Pn-1m is the mth column pixel circuit of the n-1 th row, reference numeral Pnm is the mth column pixel circuit of the n-1 th row, reference numeral Pn +1m is the mth column pixel circuit of the n +1 th row, reference numeral Pn +2m is the mth column pixel circuit of the n +2 th row.
As shown in fig. 3, in the current frame, when the data voltage on the mth column data line Dm is a negative polarity, a fifth to-be-compensated data voltage Vb5 is obtained according to the third lookup table LUT-N1, the mth column data voltage Vn-1m on the N-1 th row, and the mth column data voltage Vnm on the nth row; obtaining a sixth to-be-compensated data voltage Vb6 according to a fourth lookup table LUT-N2, the mth column data voltage Vnm of the nth row and the mth column data voltage Vn +1m of the (N + 1) th row, and obtaining the mth column compensation data voltage Vbnm of the nth row according to operation on the fifth to-be-compensated data voltage Vb5 and the sixth to-be-compensated data voltage Vb 6.
In FIG. 3, reference numeral Pn-2m is the mth column pixel circuit of the n-2 th row, reference numeral Pn-1m is the mth column pixel circuit of the n-1 th row, reference numeral Pnm is the mth column pixel circuit of the n-1 th row, reference numeral Pn +1m is the mth column pixel circuit of the n +1 th row, reference numeral Pn +2m is the mth column pixel circuit of the n +2 th row.
As shown in fig. 4, in the current frame, when the data voltage on the mth column data line Dm is a negative polarity, a seventh to-be-compensated data voltage Vb7 is obtained according to the third lookup table LUT-N1, the mth column data voltage Vnm on the nth row, and the mth column data voltage Vn +1m on the N +1 th row; obtaining an eighth to-be-compensated data voltage Vb8 according to a fourth lookup table LUT-N2, an mth column data voltage Vn +1m of an N +1 th row and an mth column data voltage Vn +2m of an N +2 th row, and obtaining an mth column compensation data voltage Vbn +1m of an N +1 th row according to operation on the seventh to-be-compensated data voltage Vb7 and the eighth to-be-compensated data voltage Vb 8.
In FIG. 4, reference numeral Pn-2m is the mth column pixel circuit of the n-2 th row, reference numeral Pn-1m is the mth column pixel circuit of the n-1 th row, reference numeral Pnm is the mth column pixel circuit of the n-1 th row, reference numeral Pn +1m is the mth column pixel circuit of the n +1 th row, reference numeral Pn +2m is the mth column pixel circuit of the n +2 th row.
The data voltage compensation method according to the present invention is described below according to an embodiment.
Assuming that a color block composed of 200 gray scales and 50 gray scales exists on a display screen, an mth row pixel circuit of an nth row (the mth row pixel circuit of the nth row should be connected with 200 gray scale data voltages) at a gray scale junction is charged with an mth row data voltage of an (n + 1) th row (the mth row data voltage of the (n + 1) th row can be 50 gray scale data voltages) in an incorrect manner, so that the luminance of the nth row pixel circuit is insufficient. The line afterimage caused by the positive and negative charging difference can be amplified by the insufficient charging caused by the wrong charging, and at the moment, the mth column data voltage of the nth row is overdriven, so that the actual output gray scale of the mth column pixel circuit of the nth row is larger than 200, for example, the actual output gray scale of the mth column pixel circuit of the nth row can be 220 gray scale, the problem of insufficient brightness of the nth row pixel circuit can be solved, and the purpose of compensating/balancing the charging rate is achieved. Similarly, the pixel circuit in the (n + 1) th row has insufficient charge (embodied as the first row of black cells is slightly bright) due to no pre-charge of charges, so the pixel circuit in the (n + 1) th row should be over-driven, the actual output gray scale of the mth column data voltage in the (n + 1) th row should be less than 50 gray scales, for example, the mth column data voltage in the (n + 1) th row may be 30 gray scales, so that the problem that the first row of black cells is slightly bright can be solved, and the purpose of compensating charge can be achieved.
As shown in fig. 5, in the current frame, when the data voltage on the mth column data line Dm is positive, a first to-be-compensated data voltage Vb1 is obtained according to the first lookup table LUT-P1, the mth column data voltage Vn-1m on the n-1 th row, and the mth column data voltage Vnm on the nth row; and obtaining a second to-be-compensated data voltage Vb2 according to a second lookup table LUT-P2, the nth row and mth column data voltage Vnm and the (n + 1) th row and mth column data voltage Vn +1m, and obtaining the nth row and mth column compensation data voltage Vbnm according to operation on the first to-be-compensated data voltage Vb1 and the second to-be-compensated data voltage Vb 2.
In at least one embodiment shown in FIG. 5, the mth column data voltage Vn-1m of the n-1 th row is a data voltage corresponding to 200 gray scales, the mth column data voltage Vnm of the n-1 th row is a data voltage corresponding to 200 gray scales, the mth column data voltage Vn +1m of the n +1 th row is a data voltage corresponding to 50 gray scales, and the data voltage corresponding to 220 gray scales can be obtained according to the first lookup table LUT-P1, the second lookup tables LUT-P2, vn-1m, vnm and Vn +1m.
In FIG. 5, reference numeral Pn-2m is the mth column pixel circuit of the n-2 th row, reference numeral Pn-1m is the mth column pixel circuit of the n-1 th row, reference numeral Pnm is the mth column pixel circuit of the n-1 th row, reference numeral Pn +1m is the mth column pixel circuit of the n +1 th row, and reference numeral Pn +2m is the mth column pixel circuit of the n +2 th row.
As shown in fig. 6, in the current frame, when the data voltage on the mth column data line Dm is positive, a third to-be-compensated data voltage Vb3 is obtained according to the first lookup table LUT-P1, the mth column data voltage Vnm in the nth row, and the mth column data voltage Vn +1m in the n +1 th row; obtaining a fourth data voltage to be compensated Vb4 according to a second lookup table LUT-P2, the mth column data voltage Vn +1m on the n +1 th row and the mth column data voltage Vn +2m on the n +2 th row, and obtaining the mth column compensation data voltage Vbn +1m on the n +1 th row according to the operation on the third data voltage to be compensated Vb3 and the fourth data voltage to be compensated Vb 4.
In at least one embodiment shown in FIG. 6, the mth column data voltage Vn-1m of the n-1 th row is a data voltage corresponding to 200 gray, the mth column data voltage Vnm of the n-1 th row is a data voltage corresponding to 200 gray, the mth column data voltage Vn +1m of the n +1 th row is a data voltage corresponding to 50 gray, and the mth column data voltage Vn +2m of the n +2 th row is a data voltage corresponding to 50 gray, and the mth column compensation data voltage of the n +1 th row is a data voltage corresponding to 30 gray according to the first lookup table LUT-P1, the second lookup tables LUT-P2, vnm, vn +1m, and Vn +2 m.
In FIG. 6, reference numeral Pn-2m is the mth column pixel circuit of the n-2 th row, reference numeral Pn-1m is the mth column pixel circuit of the n-1 th row, reference numeral Pnm is the mth column pixel circuit of the n-1 th row, reference numeral Pn +1m is the mth column pixel circuit of the n +1 th row, reference numeral Pn +2m is the mth column pixel circuit of the n +2 th row.
Through the data processing, the problems of wrong charging of the last line of the white lattice and insufficient charging of the first line of the black lattice can be solved, and the image quality problems of line residual images, partial brightness/partial darkness and the like are further solved.
As shown in fig. 7, in the related art, the gate of the display thin film transistor T0 is connected to the scan signal Vgate, the source of the display thin film transistor T0 is electrically connected to the data line D0, and the drain of the display thin film transistor T0 is electrically connected to the pixel electrode P0.
When the picture to be displayed is the black and white lattice picture shown in fig. 8, the timing diagram of the last row of the white lattice is shown in fig. 9, and the timing diagram of the first row of the black lattice is shown in fig. 10.
In fig. 9 and 10, G-OUT is a gate driving signal and S-OUT is a data voltage.
As shown in fig. 11, the data voltage compensation module according to the embodiment of the present invention includes a compensation circuit 71 and a display control circuit 72;
the compensation circuit 71 is configured to, in a current frame, compensate an nth row and mth column data voltage according to a polarity of the data voltage on an mth column data line of the current frame, an nth row and mth column data voltage, an nth-1 row and mth column data voltage, and an nth +1 row and mth column data voltage when an nth row and mth column data voltage corresponding to an nth row and mth column pixel circuit are different; the compensation circuit is further used for compensating the mth column data voltage of the n +1 th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the n +1 th row, the mth column data voltage of the n th row and the mth column data voltage of the n +2 th row to obtain the mth column compensation data voltage of the n +1 th row;
the display control circuit 72 is electrically connected to the compensation circuit 71, and is configured to control the nth row and mth column of pixel circuits to display according to the nth row and mth column of compensation data voltage, and control the (n + 1) th row and mth column of pixel circuits to display according to the (n + 1) th row and mth column of compensation data voltage;
n is a positive integer.
Optionally, when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the (n + 1) th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
Optionally, when the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, and the mth column data voltage of the n +1 th row is equal to the mth column data voltage of the n +2 th row, the mth column compensation data voltage of the n +1 th row is less than the mth column data voltage of the n +1 th row;
and the data voltage of the (n + 2) th row and the mth column is the data voltage of the pixel circuit corresponding to the (n + 2) th row and the mth column in the current frame.
The data voltage compensation module of at least one embodiment of the present invention further comprises a lookup table setting circuit;
the lookup table setting circuit is used for presetting a first lookup table and a second lookup table;
the compensation circuit is used for searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n-1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a positive polarity data voltage, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and calculating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensated data voltage of the n-th row; the compensation circuit is further configured to find a corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, find a corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and perform an operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
The data voltage compensation module in the embodiment of the invention refers to the data voltage of the previous Line and the data voltage of the next Line at the same time, and performs overdrive compensation on the data voltage of the current Line according to the polarity of the data voltage on the mth Line of the current frame, so as to achieve better afterimage/image quality optimization effect and solve the image quality problems of Line afterimage and the like caused by mischarging which cannot be solved by the related DP-Line OD technology.
In at least one embodiment of the present invention, when the data voltage on the corresponding line data line is a positive polarity data voltage, the first lookup table stores a to-be-compensated data voltage, which is actually detected in advance and corresponds to the corresponding line data voltage of the previous row and the corresponding line data voltage of the current row;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
The data voltage compensation module of at least one embodiment of the present invention further comprises a lookup table setting circuit; the lookup table setting circuit is used for presetting a third lookup table and a fourth lookup table;
the compensation circuit is used for searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a negative data voltage in the current frame, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and performing operation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n-th row; the compensation circuit is further configured to find a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the nth row, and the mth column data voltage of the n +1 th row, find a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n +1 th row, and the mth column data voltage of the n +2 th row, and perform an operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n +1 th row.
In at least one embodiment of the present invention, when the data voltage on the corresponding line data line is a negative polarity data voltage, the third lookup table stores a to-be-compensated data voltage, which is actually detected in advance and corresponds to the corresponding line data voltage of the previous line and the corresponding line data voltage of the current line;
when the data voltage on the corresponding line data line is negative data voltage, the data voltage to be compensated corresponding to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, which is obtained through actual detection in advance, is stored in the fourth lookup table.
The display device according to at least one embodiment of the invention includes the data voltage compensation module.
The display device provided by the embodiment of the invention can be any product or component with a display function, such as a mobile phone, a tablet personal computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (15)

1. A method of compensating for data voltages, comprising:
in the current frame, when the nth row and mth column data voltages corresponding to the nth row and mth column pixel circuits are different from the (n + 1) th row and mth column data voltages corresponding to the (n + 1) th row and mth column pixel circuits,
compensating the mth column data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the (n-1) th row and the mth column data voltage of the (n + 1) th row to obtain the mth column compensation data voltage of the nth row; compensating the mth column data voltage of the (n + 1) th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the (n + 1) th row, the mth column data voltage of the nth row and the mth column data voltage of the (n + 2) th row to obtain the mth column compensation data voltage of the (n + 1) th row;
controlling the pixel circuit at the mth row and the mth column to display according to the compensation data voltage at the nth row and the mth column, and controlling the pixel circuit at the (n + 1) th row and the mth column to display according to the compensation data voltage at the (n + 1) th row and the mth column;
n is a positive integer.
2. The data voltage compensation method of claim 1, wherein when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
3. The data voltage compensation method of claim 1, wherein when the mth column data voltage of the n +1 th row is less than the mth column data voltage of the n th row and the mth column data voltage of the n +1 th row is equal to the mth column data voltage of the n +2 th row, the mth column compensation data voltage of the n +1 th row is less than the mth column data voltage of the n +1 th row;
the data voltage of the mth column of the (n + 2) th row is the data voltage of the pixel circuit of the mth column of the (n + 2) th row corresponding to the current frame.
4. The data voltage compensation method of any one of claims 1 to 3, further comprising: presetting a first lookup table and a second lookup table;
the data voltage compensation method includes:
in the current frame, when the mth column data voltage of the nth row and the mth column data voltage of the (n + 1) th row are different and the data voltage on the mth column data line is a positive polarity data voltage,
searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and operating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensation data voltage of the n th row;
and searching a corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, searching a corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and performing operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
5. The data voltage compensation method of claim 4, wherein the first lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the corresponding column data voltages of the previous row and the corresponding column data voltages of the current row, when the data voltages on the corresponding column data lines are positive polarity data voltages;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
6. The data voltage compensation method of any one of claims 1 to 3, further comprising: presetting a third lookup table and a fourth lookup table;
the data voltage compensation method includes:
in the current frame, when the data voltage of the nth row and the mth column is different from the data voltage of the (n + 1) th row and the data voltage of the mth column on the data line is a negative data voltage,
searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and performing operation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n th row;
and finding a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, finding a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and performing operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n +1 th row.
7. The data voltage compensation method of claim 6, wherein the third lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the previous row of corresponding column data voltages and the current row of corresponding column data voltages when the data voltages on the corresponding column data lines are negative polarity data voltages;
the fourth lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the data voltages of the corresponding column of the current row and the data voltages of the corresponding column of the next row, when the data voltages on the data lines of the corresponding columns are negative data voltages.
8. A data voltage compensation module is characterized by comprising a compensation circuit and a display control circuit;
the compensation circuit is used for compensating the mth column data voltage of the nth row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the nth row, the mth column data voltage of the n-1 row and the mth column data voltage of the n +1 row when the mth column data voltage of the nth row and the mth column corresponding to the mth column pixel circuit of the nth row is different from the mth column data voltage of the n +1 row, so as to obtain the mth column compensation data voltage of the nth row; the compensation circuit is further used for compensating the mth column data voltage of the n +1 th row according to the polarity of the data voltage on the mth column data line of the current frame, the mth column data voltage of the n +1 th row, the mth column data voltage of the n th row and the mth column data voltage of the n +2 th row to obtain the mth column compensation data voltage of the n +1 th row;
the display control circuit is used for controlling the nth row and mth column pixel circuits to display according to the nth row and mth column compensation data voltage, and controlling the (n + 1) th row and mth column pixel circuits to display according to the (n + 1) th row and mth column compensation data voltage;
n is a positive integer.
9. The data-voltage compensation module of claim 8, wherein when the mth column data voltage of the nth row is equal to the mth column data voltage of the n-1 th row, and the mth column data voltage of the n +1 th row is less than the mth column data voltage of the nth row, the mth column compensation data voltage of the nth row is greater than the mth column data voltage of the nth row;
the data voltage of the mth column of the n-1 th row is the data voltage of the pixel circuit corresponding to the mth column of the n-1 th row in the current frame.
10. The data-voltage compensating module of claim 8, wherein when the mth column data voltage of the n +1 th row is less than the mth column data voltage of the n th row, and the mth column data voltage of the n +1 th row is equal to the mth column data voltage of the n +2 th row, the mth column compensating data voltage of the n +1 th row is less than the mth column data voltage of the n +1 th row;
and the data voltage of the (n + 2) th row and the mth column is the data voltage of the pixel circuit corresponding to the (n + 2) th row and the mth column in the current frame.
11. The data-voltage compensation module of any one of claims 8-10, further comprising a look-up table setting circuit;
the lookup table setting circuit is used for presetting a first lookup table and a second lookup table;
the compensation circuit is used for searching a corresponding first to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n-1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a positive polarity data voltage, searching a corresponding second to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and calculating the first to-be-compensated data voltage and the second to-be-compensated data voltage to obtain the mth column compensated data voltage of the n-th row; the compensation circuit is further configured to find a corresponding third to-be-compensated data voltage according to the first lookup table, the mth column data voltage of the nth row and the mth column data voltage of the n +1 th row, find a corresponding fourth to-be-compensated data voltage according to the second lookup table, the mth column data voltage of the n +1 th row and the mth column data voltage of the n +2 th row, and perform an operation on the third to-be-compensated data voltage and the fourth to-be-compensated data voltage to obtain the mth column compensated data voltage of the n +1 th row.
12. The data voltage compensation module of claim 11, wherein the first lookup table stores a data voltage to be compensated, which is actually detected in advance and corresponds to a corresponding column data voltage of a previous row and a corresponding column data voltage of a current row when the data voltage on the corresponding column data line is a positive polarity data voltage;
when the data voltage on the corresponding line data line is the positive polarity data voltage, the data voltage to be compensated, which is actually detected in advance and corresponds to the corresponding line data voltage of the current row and the corresponding line data voltage of the next row, is stored in the second lookup table.
13. The data-voltage compensation module of any one of claims 8-10, further comprising a look-up table setting circuit; the lookup table setting circuit is used for presetting a third lookup table and a fourth lookup table;
the compensation circuit is used for searching a corresponding fifth to-be-compensated data voltage according to the third lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row when the mth column data voltage of the n-th row and the mth column data voltage of the n +1 th row are different and the data voltage on the mth column data line is a negative data voltage in the current frame, searching a corresponding sixth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage of the n-1 th row and the mth column data voltage of the n +1 th row, and performing operation on the fifth to-be-compensated data voltage and the sixth to-be-compensated data voltage to obtain the mth column compensation data voltage of the n-th row; the compensation circuit is further configured to find a corresponding seventh to-be-compensated data voltage according to the third lookup table, the mth column data voltage in the nth row and the mth column data voltage in the n +1 th row, find a corresponding eighth to-be-compensated data voltage according to the fourth lookup table, the mth column data voltage in the n +1 th row and the mth column data voltage in the n +2 th row, and perform an operation on the seventh to-be-compensated data voltage and the eighth to-be-compensated data voltage to obtain the mth column compensated data voltage in the n +1 th row.
14. The data voltage compensation module of claim 13, wherein the third lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the previous row of corresponding column data voltages and the current row of corresponding column data voltages when the data voltages on the corresponding column data lines are negative data voltages;
the fourth lookup table stores data voltages to be compensated, which are actually detected in advance and correspond to the data voltages of the corresponding column of the current row and the data voltages of the corresponding column of the next row, when the data voltages on the data lines of the corresponding columns are negative data voltages.
15. A display device comprising the data voltage compensation module of any one of claims 8 to 14.
CN202211114471.6A 2022-09-14 2022-09-14 Data voltage compensation method, data voltage compensation module and display device Pending CN115376471A (en)

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