CN115295458A - Wafer detection system and method - Google Patents
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- CN115295458A CN115295458A CN202211027784.8A CN202211027784A CN115295458A CN 115295458 A CN115295458 A CN 115295458A CN 202211027784 A CN202211027784 A CN 202211027784A CN 115295458 A CN115295458 A CN 115295458A
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- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The application provides a wafer detection system and a method, wherein the wafer detection system comprises: the system comprises a carrier, an image acquisition module and a processing module; the carrying platform is used for placing the wafer to be detected; the image acquisition module comprises a light source and an image acquisition unit, wherein the light source and the image acquisition unit are respectively arranged on two sides of the carrying platform, the light source is used for projecting light to the back surface of the wafer to be detected, and the image acquisition unit is used for acquiring a target image corresponding to the front surface of the wafer to be detected; the processing module is used for processing the target image and outputting a detection result according to a processing result. The method adopts the transmission light to polish the back of the wafer semiconductor to obtain the high-definition virtual image of the front of the wafer to be detected, and the virtual image can clearly display all the front of the wafer semiconductor, so that the detection result is obtained according to the virtual image, the accuracy of the wafer semiconductor detection is improved, and various defects caused by the front detection of the wafer semiconductor are avoided.
Description
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a wafer detection system and a wafer detection method.
Background
With the development of digitization, the demand for chips and semiconductor materials is increasing. The method comprises the detection of the wafer made of the third generation compound semi-transparent semiconductor material, wherein the wafer is composed of silicon carbide, gallium nitride, gallium arsenide and the combination thereof.
For detecting defects such as scratches, broken edges and the like after the third-generation semiconductor wafer dicing, refer to fig. 1, where fig. 1 is a schematic diagram of a product after the semiconductor wafer dicing. However, the existing detection for wafer scribing needs manual detection by using a microscope. The problems of long time consumption and low efficiency exist, the risk of detection omission is caused, and in addition, the judgment standard needs to be non-uniform in experience, so that the detection effect is difficult to ensure and the required standard is met.
Therefore, a new wafer inspection scheme is needed.
Disclosure of Invention
In view of the above, embodiments of the present disclosure provide a wafer inspection system and method, which are used for detecting defects such as scratches, cracks, edge chipping, etc. after dicing a wafer semiconductor.
The embodiment of the specification provides the following technical scheme:
an embodiment of the present disclosure provides a wafer inspection system, which includes: the system comprises a carrier, an image acquisition module and a processing module;
the carrying platform is used for placing a wafer to be detected;
the image acquisition module comprises a light source and an image acquisition unit, wherein the light source and the image acquisition unit are respectively arranged on two sides of the carrying platform, the light source is used for projecting light to the back surface of the wafer to be detected, and the image acquisition unit is used for acquiring a target image corresponding to the front surface of the wafer to be detected;
and the processing module is used for processing the target image and outputting a detection result according to a processing result.
An embodiment of the present disclosure further provides a wafer inspection method, which applies any one of the wafer inspection systems described above, and the method includes:
illuminating the back surface of the wafer to be detected by adopting a light source to obtain a target image corresponding to the front surface of the wafer to be detected;
and obtaining a detection result of the wafer to be detected according to the target image.
Compared with the prior art, the beneficial effects that can be achieved by the at least one technical scheme adopted by the embodiment of the specification at least comprise:
according to the wafer semiconductor detection method, the transmission light is used for polishing the back surface of the wafer to obtain the high-definition virtual image of the front surface of the wafer semiconductor, and the virtual image can clearly display the whole front surface of the wafer semiconductor, so that the accuracy of wafer semiconductor detection is improved, and the detection result obtained by the processing module is more accurate. Various defects caused by the front side detection of the wafer semiconductor are avoided. The carrying platform can also carry wafer semiconductors with different sizes, and has wide usability.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic illustration of a semiconductor wafer diced product;
FIG. 2 is a schematic diagram of prior art failure detection after wafer dicing;
FIG. 3 is a schematic diagram of a wafer inspection system according to an embodiment of the present disclosure;
FIG. 4 is a partially enlarged schematic view of a wafer inspection system according to an embodiment of the present invention;
FIG. 5 is a schematic view of a hollow carrier provided in an embodiment of the present invention;
fig. 6 is a schematic view of a transparent material disposed on a hollow carrier according to an embodiment of the present invention;
FIG. 7 is a schematic illustration of a transparent material provided by an embodiment of the present invention;
FIG. 8 is a flowchart illustrating a wafer inspection method according to an embodiment of the present invention;
FIG. 9 is a first schematic diagram illustrating a wafer inspection result according to an embodiment of the present invention;
FIG. 10 is a second schematic diagram illustrating a wafer inspection result according to an embodiment of the present invention;
fig. 11 is a third schematic diagram of a wafer inspection result according to an embodiment of the present invention.
Detailed Description
Embodiments of the present application are described in detail below with reference to the accompanying drawings.
The following embodiments of the present application are described by specific examples, and other advantages and effects of the present application will be readily apparent to those skilled in the art from the disclosure of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. The application is capable of other and different embodiments and its several details are capable of modifications and various changes in detail without departing from the spirit of the application. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
It is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present application, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number and aspects set forth herein. In addition, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to or other than one or more of the aspects set forth herein.
It should be further noted that the drawings provided in the following embodiments are only schematic illustrations of the basic concepts of the present application, and the drawings only show the components related to the present application rather than the numbers, shapes and dimensions of the components in actual implementation, and the types, the numbers and the proportions of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.
The semiconductor material used to fabricate the third generation semiconductor wafers is typically silicon carbide, gallium nitride, gallium arsenide or combinations thereof, and the surfaces of the third generation semiconductor wafers are typically polymeric and cannot be detected using front reflected light. At present, most enterprises still adopt a detection mode of manually using a microscope for detecting processing defects such as scratches, cracks, edge breakage and the like after third-generation semiconductor wafer scribing, so that the risk of detection omission is high, the phase ratio is low, and the actual detection requirements of the enterprises on wafers are difficult to meet. In addition, although some automatic detection devices are available on the market in a non-manual mode, the devices are expensive and have unstable detection functions, so that the goals of cost reduction and efficiency improvement of semiconductor manufacturing enterprises in upgrading and modifying technologies are difficult to meet in a short period of time. Specifically, the processing defects are only defects such as front scratches and deep scratches covered with a polymer on the front surface of the wafer, cracks not penetrating from the front surface to the back surface, cracks penetrating from the front surface to the back surface, edge chipping at the peripheral edge, and the like.
In view of the above, the inventors have studied and found in an improved search that: although most of the light incident on the wafer front surface is easily reflected due to the polymer on the semiconductor wafer surface, when the light source for acquiring the wafer front surface image irradiates towards the wafer front surface, a clear wafer front surface image cannot be acquired, so that the defect automatic detection cannot be performed based on the unclear wafer front surface image. However, in the further improved approach, after the wafer is polished by transmitted light on the back side, because the surface of the wafer is covered with polymer, the front side is photographed and imaged to have poor light transmission at the processing defect (such as metal scratch, crack, etc.) of the wafer, and the light transmission is very good at the processing defect position of the wafer, so that the wafer self characteristics of poor light transmission at the processing defect position and good light transmission at the processing defect position can be utilized, the wafer front side is formed with color difference imaging when the wafer back side is polished, so that a clear wafer front side image (such as the image shown in fig. 2, fig. 2 is a schematic diagram of the prior art that the detection is not up to standard after wafer scribing) containing the processing defect can be obtained from the front side of the semiconductor wafer, and the existence of the crack defect in the wafer to be detected can be rapidly known from the clear wafer front side image, and the position of the crack in the wafer is the position corresponding to the crack shown in the middle image in fig. 2. Therefore, the semiconductor wafer (i.e. the wafer) to be detected can be polished from the back side of the wafer, and a clear front side image can be obtained from the front side of the wafer, so that possible defects can be automatically detected based on the clear front side image. In any technical scheme of the embodiment of the specification, polishing is performed on the back side of the wafer, the front side of the wafer is photographed, and due to the fact that polymers on the surface of the wafer have poor light transmission at the positions where defects such as metal scratches and cracks exist in the wafer, and have good light transmission at the positions where defects do not exist in the wafer, the self characteristics of the wafer with poor light transmission at the positions where the defects exist and good light transmission at the positions where the defects do not exist in the wafer can be utilized, and chromatic aberration imaging is formed on the front side of the wafer when polishing is performed on the back side of the wafer, so that clear images of the front side of the wafer are beneficial to image acquisition and processing, and the processing defects existing in the wafer can be accurately detected.
The technical solutions provided by the embodiments of the present application are described below with reference to the accompanying drawings.
Fig. 3 is a schematic diagram of a wafer inspection system according to an embodiment of the present disclosure, as shown in fig. 3, the system includes: a stage (e.g., hollow stage 105), an image capture module (including a light source and an image capture unit, such as a high-pointing backlight source 106 and a CCD camera 108, respectively), and a processing module (not shown). In some embodiments, the hollow stage is an iron ring stage compatible with 4 inch wafer and 6 inch wafer, and the hollow stage is used for placing the wafer to be detected; the light source and the image acquisition unit are respectively arranged on two sides of the carrier, wherein the light source is used for projecting light to the back surface of the wafer to be detected, and the image acquisition unit is used for acquiring a target image corresponding to the front surface of the wafer to be detected; and the processing module is used for processing the target image and outputting a detection result according to a processing result. The system further comprises an air flotation 102 of the vibration isolation system, a marble platform 103, a motion control mechanism 104, a supporting mechanism 101, a light path fixing support (located on the motion control mechanism 104) 107, a focusing Z axis 109, an upper computer 110 and an FFU (Fan Filter Unit, namely a self-powered air supply filtering device) 113.
Referring to fig. 3, the wafer inspection system includes: a hollow stage 105, a high-directional backlight light source 106, a CCD camera 108 and a processing module (not shown), wherein the hollow stage 105, the high-directional backlight light source 106 and the CCD camera 108 can be configured and arranged in a vertical direction as shown in fig. 3; in some embodiments, the matching arrangement in the horizontal direction can be also realized. The high-orientation backlight source 106 and the CCD camera 108 are respectively and correspondingly arranged on two sides of the hollow carrier, the high-orientation backlight source 106 is used for projecting light to the back of the wafer to be detected, and the CCD camera 108 is used for acquiring a target image corresponding to the front of the wafer to be detected; and the processing module is used for processing the target image and outputting a detection result according to a processing result.
In some embodiments, the carrier is provided with a plurality of supporting steps in different planes to support the wafers to be detected with different sizes, wherein the supporting steps in the same plane are used for supporting the wafers to be detected with preset sizes.
Referring to fig. 4 and 5 in detail, fig. 4 is a partially enlarged schematic view of a wafer inspection system according to an embodiment of the present invention, and fig. 5 is a schematic view of a hollow carrier according to an embodiment of the present invention. As shown in fig. 4, a hollow stage is located between the light source and the CCD camera, which can be compatible with wafers of 4 inches and 6 inches, and in some embodiments, is made of iron or the like. As shown in fig. 5, the hollow stage is provided with a plurality of supporting steps in different planes, and the supporting steps provide supporting force for wafers to be detected with different sizes, for example, wafers with sizes of 4 inches or 6 inches can be supported by the supporting steps. The same planar support bench can support wafers of 4 "or 6" size.
The hollow carrying platform is used for placing a wafer to be detected, a light source is adopted to project light to the back surface of the wafer to be detected, so that a CCD camera obtains a target image corresponding to the front surface of the wafer to be detected, a polymer (shown in figure 2) is arranged on the surface (namely the front surface) of the wafer, the front surface of a wafer semiconductor is irradiated by light to shoot, a large amount of reflected light can be generated, the problems that the shot image is not clear, inaccurate and the like are caused, and further the defects that the wafer semiconductor is scratched, broken, edge collapse and the like cannot be detected are caused. Therefore, the high-definition target image of the front side of the wafer semiconductor is obtained by polishing the back side of the wafer by adopting the transmission light, and the target image can clearly display all the front sides of the wafer semiconductor, so that the accuracy of wafer semiconductor detection is improved, and the detection result obtained by the processing module is more accurate. Various defects caused by the front detection of the wafer semiconductor are avoided. The hollow carrying platform can also carry wafer semiconductors with different sizes, and has wide usability.
In some embodiments, the stage further comprises: a film; the film is arranged on the carrying platform, and if the wafer to be detected is placed on the carrying platform, the film is positioned below the wafer to be detected and used for providing bearing capacity for the wafer to be detected.
Specifically, the hollow carrying platform can further comprise a blue soft film, and the blue soft film is arranged on the hollow carrying platform and fixed by an iron ring chuck. If the wafer semiconductor is placed on the hollow carrying platform, the blue soft film provides bearing capacity for the wafer semiconductor to be detected. The blue soft film can be arranged into other color soft films according to actual needs.
In some embodiments, the stage further comprises: a transparent material; the transparent material is arranged on the carrying platform and below the film and used for supporting the film and ensuring that the film is flat in the process of acquiring the target image.
Referring to fig. 6 and 7, fig. 6 is a schematic view of a transparent material disposed on a hollow carrier according to an embodiment of the present invention; fig. 7 is a schematic diagram of a transparent material provided by an embodiment of the invention. As shown in FIG. 7, the hollow carrier can hold two 4/6 inch wafers of transparent material, as shown in FIG. 6, which are used to support the blue soft film of the iron ring to ensure flatness during testing.
As shown in fig. 6, a transparent material (e.g., glass) is disposed on the hollow stage and below the blue soft film, and the transparent material is harder than the blue soft film to support the blue soft film, so as to ensure the flatness of the blue soft film in the process of acquiring the target image of the wafer semiconductor. The transparent material is colorless, so that light irradiating the back of the wafer semiconductor can penetrate through the transparent material, the CCD camera is ensured to acquire a high-definition target image of the front of the wafer semiconductor, and the target image can clearly display the whole front of the wafer semiconductor, so that the detection accuracy of the wafer semiconductor is improved, and the detection result obtained by the processing module is more accurate.
In some embodiments, the image acquisition module further comprises: and the focusing z-axis and the image acquisition unit are arranged on the same side, and the focusing z-axis and the light source are arranged on the opposite side of the hollow carrying platform, so that the focusing is adjusted by matching the position of the wafer to be detected in the process of acquiring the target image, and the whole wafer to be detected is ensured to be presented in the target image.
Referring specifically to fig. 3, for example, a focusing z-axis is fixedly arranged on the empty gantry, and the focusing z-axis can electrically adjust the height of the z-axis to precisely control the z-axis movement. The focusing z-axis and the CCD camera are arranged on the same side, and are arranged on the opposite side of the hollow carrying platform with the light source, the focusing z-axis is matched with the position of the wafer semiconductor to adjust the focal length in the process that the CCD camera acquires the target image of the wafer to be detected, the distance between the objective lens on the z-axis and the wafer to be detected is adjusted in order to obtain a clear target image, and the fact that the front surface of the wafer semiconductor is displayed in the target image is ensured. In some cases, the hollow stage may move in a horizontal plane direction; for example, the x-axis and y-axis movements can be performed while the position of the wafer semiconductor is moved in the horizontal plane direction; or the hollow carrying platform can rotate in the horizontal plane, and simultaneously the position of the wafer to be detected can rotate in the horizontal plane. Therefore, the focusing z axis is matched with the position of the wafer semiconductor to adjust the focal length so as to obtain a clear target image and ensure that all the front surface of the wafer to be detected is presented in the target image.
In some embodiments, the wafer inspection system further comprises: a motion control mechanism; the motion control mechanism is used for bearing the carrying platform and is matched with the image acquisition module to move and place the wafer to be detected at the imaging position.
In some embodiments, the motion control mechanism includes a motion platform and a rotation platform, and the motion platform is used for moving the position of the wafer to be detected in a linear manner in a horizontal plane direction; the rotary platform is arranged on the motion platform and is used for performing rotary motion on the position of the wafer to be detected in a horizontal plane; the carrying platform is arranged on the rotating platform and rotates along with the rotating platform in the horizontal plane to move the position of the wafer to be detected.
In some embodiments, the wafer inspection system further comprises a support mechanism, a vibration isolation system, and an electrical control device; the motion control mechanism and the detection mechanism are respectively arranged in the supporting mechanism, and the electrical control equipment provides electric energy for the motion control mechanism, the image acquisition module and the processing module; the vibration isolation system is arranged at the lower part of the supporting mechanism and is used for providing a damping environment for the detection of the wafer semiconductor; the vibration isolation system is provided with a marble, and the marble provides a flat plane for the motion control mechanism.
Specifically referring to fig. 3, the system further includes an air flotation 102 of the vibration isolation system, a marble platform 103, a motion control mechanism 104, a supporting mechanism 101, a light path fixing support (located on the motion control mechanism 104) 107, a focusing z-axis 109, an upper computer 110, and an FFU (Fan Filter Unit, which is a self-powered air supply filtering device) 113.
As shown in fig. 3, the main components of the system are all disposed in a supporting mechanism 101, which is mainly a frame such as a three-dimensional steel structure, the supporting mechanism is hollow, and a vibration isolation system is disposed at the lower part of the supporting mechanism to provide a vibration-absorbing environment for the inspection of the wafer semiconductor; the air flotation 102 of the vibration isolation system is shown in fig. 3, and the vibration isolation system is provided with marble, which provides a flat surface for the motion control mechanism. As shown in fig. 3, the motion control mechanism 104 of the system is disposed on the marble and used for carrying the hollow stage and cooperating with the image capture module to move the wafer semiconductor to the imaging position. The motion control mechanism comprises a motion platform and a rotating platform, wherein the motion platform is used for linearly moving the position of a wafer semiconductor in the horizontal plane direction; the rotary platform is arranged on the motion platform and is used for performing rotary motion on the position of the wafer semiconductor in the horizontal plane; the hollow carrying platform is arranged on the rotary platform and rotates along with the rotary platform in the horizontal plane to move the position of the wafer semiconductor. As shown in fig. 3, the motion platform is arranged on the marble, the rotary platform is arranged on the motion platform, and the hollow carrying platform is arranged on the rotary platform. The motion platform may perform linear motion on the position of the wafer semiconductor in the horizontal plane direction, and correspondingly, the rotary platform and the hollow stage perform linear motion along with the motion platform in the horizontal plane direction, where the linear motion may include linear motion in two directions of an x axis and a y axis. The rotary platform can perform rotary motion on the position of the wafer semiconductor in a horizontal plane; the hollow carrying platform rotates along with the rotating platform in the horizontal plane to move the position of the wafer semiconductor. In some embodiments, the light source is disposed at a central portion of the hollow stage, and is disposed on the motion stage and a central portion of the rotation stage. In some cases, the focusing z-axis and the CCD camera are arranged on the same side, and are arranged on the opposite side of the hollow stage from the light source, and in the process of acquiring the target image of the wafer semiconductor by the CCD camera, the focusing z-axis adjusts the focal length in cooperation with the position of the wafer semiconductor, and adjusts the distance between the objective lens on the z-axis and the wafer to be detected in order to obtain a clear target image, thereby ensuring that all the front surface of the wafer semiconductor is present in the target image.
The system further comprises: and the electrical control equipment provides electric energy for the motion control mechanism, the image acquisition module and the processing module and provides basic switch electric energy for the vibration isolation system. The upper computer 110 is used for controlling various data information, the FFU113 provides a filtering effect for the system, air is sucked from the top and filtered, and the filtered clean air is uniformly sent out at the speed of about 0.45m/s +/-20% on the whole air outlet surface.
With reference to the wafer inspection system of the above embodiment, fig. 8 is a flowchart of a wafer inspection method according to an embodiment of the present invention, and as shown in fig. 8, the method includes: step S810 to step S820. Step S810, illuminating the back surface of the wafer to be detected with a light source, and obtaining a target image corresponding to the front surface of the wafer to be detected.
Specifically, the polymer is arranged on the front surface of the wafer semiconductor, and a large amount of reflected light is generated when the front surface of the wafer semiconductor is photographed by adopting light, so that the photographed image is not clear and accurate, and further the defects of scratches, cracks, edge breakage and the like of the wafer semiconductor cannot be detected.
In the embodiment, the light source and the CCD camera are respectively disposed at both sides of the wafer semiconductor, and the light source illuminates the back surface of the wafer semiconductor. The back surface of the wafer to be detected is illuminated by adopting a light source, the back surface of the wafer to be detected is polished by adopting transmission light to obtain a high-definition target image of the front surface of the wafer semiconductor, the target image can clearly display all the front surface of the wafer semiconductor, the obtained clear visible image provides guarantee for detecting defects after the wafer semiconductor is scribed, and then the detection result of the wafer to be detected is obtained according to the processing of the target image. The wafer semiconductor detection accuracy is improved, and the detection result obtained by the processing module is more accurate. And various defects caused by the detection of the front surface of the wafer semiconductor are avoided.
And S820, obtaining a detection result of the wafer to be detected according to the target image.
By combining the embodiment, the detection result of the wafer to be detected can be obtained by processing the target image. The wafer semiconductor detection accuracy is improved, and the detection result obtained by the processing module is more accurate. And various defects caused by the front detection of the wafer semiconductor are avoided. In some embodiments, the processing of the target image may include image-dividing the virtual image, performing feature extraction, and detecting whether various defect portions are highlighted in the virtual image, and if so, the detection result for the wafer semiconductor is that defects such as scratches, cracks, edge breakage, and the like exist. Otherwise, the wafer semiconductor has no defects such as scratch, crack, edge breakage, etc. Referring to fig. 9, fig. 10 and fig. 11, fig. 9 is a first schematic diagram of a wafer detection result provided in an embodiment of the present invention, fig. 10 is a second schematic diagram of a wafer detection result provided in an embodiment of the present invention, and fig. 11 is a third schematic diagram of a wafer detection result provided in an embodiment of the present invention. As shown in fig. 9, compared with the detection result of fig. 2 in the prior art, the target image of fig. 9 is more clearly visible, a crack is shown in the left side of the graph, the middle of the left and right parts of the graph is processed in a fuzzy manner to be an undisclosed clear chip internal structure, it is further verified that the high-definition target image of the front side of the wafer semiconductor is obtained by polishing the back side of the wafer with transmitted light, the target image can clearly display all the front side of the wafer semiconductor, the obtained clearly visible virtual image provides guarantee for detecting defects after scribing the wafer semiconductor, and the detection result of the wafer semiconductor is obtained according to the virtual image processing. The wafer semiconductor detection accuracy is improved, and the detection result obtained by the processing module is more accurate. And various defects caused by the front detection of the wafer semiconductor are avoided. As shown in fig. 10, the middle portion is blurred to be an undisclosed clear internal structure of the chip, and the right side circles to detect cracks or scratches. As shown in fig. 11, two lines are image processed to detect a plurality of abnormal wafer structures, and the two lines are connected to form a crack or a scratch.
In some embodiments, the method further comprises: and acquiring the color or illumination intensity of the light source, and adjusting the light source to project light to the back of the wafer to be detected according to the color or illumination intensity.
By combining the embodiment, in the process of obtaining the target image by irradiating the back surface of the wafer semiconductor and photographing the front surface of the wafer semiconductor by the CCD camera, the color, the illumination intensity and the like of the light source can be adjusted according to actual conditions, so that the obtained target image is clearly and visually presented to the whole wafer semiconductor, further, a basic guarantee is provided for the subsequent processing of the virtual image, the detection accuracy of the wafer semiconductor is improved, and the detection result obtained by the processing module is more accurate. Various defects caused by the front detection of the wafer semiconductor are avoided.
In some embodiments, the method further comprises: moving the wafer to be detected in the plane direction; or, the wafer to be detected rotates in a plane; or, adjusting the focusing z-axis in the vertical direction; and if the wafer to be detected meets the relative position of the imaging focal length in the vertical direction, determining the imaging position of the wafer to be detected.
In combination with the above embodiments, the back surface of the wafer to be detected is irradiated by the light source, and in the process of acquiring the virtual image of the front surface of the wafer semiconductor by using the CCD camera, the wafer semiconductor may be moved or rotated in order to acquire a virtual image in which the front surface of the wafer semiconductor is completely visible. Specifically, the wafer semiconductor may be moved in position in two directions in the horizontal plane (for example, the x-axis direction and the y-axis direction are moved in the same horizontal plane, respectively); alternatively, the wafer semiconductor is rotated in a horizontal plane (for example, rotated in the same horizontal plane); or, the focusing z-axis is adjusted in the vertical direction, so that the distance between the objective lens on the z-axis and the wafer to be detected meets the requirement, and the front surface of the wafer semiconductor is ensured to be completely displayed in the virtual image. And if the wafer semiconductor meets the relative position of the imaging focal length in the vertical direction, determining the imaging position of the wafer semiconductor. Therefore, the front surface of the wafer semiconductor can be clearly seen, and the CCD camera is favorable for acquiring the corresponding virtual image. Referring to fig. 9, the virtual image of fig. 9 is more clearly visible than the prior art virtual image of fig. 2.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the product embodiments described later, since they correspond to the method, the description is simple, and the relevant points can be referred to the partial description of the system embodiments.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (11)
1. A wafer inspection system, comprising:
the system comprises a carrier, an image acquisition module and a processing module;
the carrying platform is used for placing a wafer to be detected;
the image acquisition module comprises a light source and an image acquisition unit, wherein the light source and the image acquisition unit are respectively arranged on two sides of the carrying platform, the light source is used for projecting light rays to the back surface of the wafer to be detected so that the wafer to be detected presents a corresponding wafer front image on the front surface of the wafer under the irradiation of the light rays, and the image acquisition unit is used for acquiring the wafer front image; the processing module is used for processing the front side image of the wafer and outputting a detection result according to a processing result.
2. The wafer detection system of claim 1, wherein the carrier is provided with a plurality of supporting steps in different planes to support the wafers to be detected in different sizes, wherein the supporting steps in the same plane are used for supporting the wafers to be detected in a preset size.
3. The wafer inspection system of claim 1, wherein the stage further comprises: a film; the film is arranged on the carrying platform, and if the wafer to be detected is placed on the carrying platform, the film is positioned below the wafer to be detected and used for providing bearing capacity for the wafer to be detected.
4. The wafer inspection system of claim 3, wherein the stage further comprises: a transparent material; the transparent material is arranged on the carrying platform and below the film and used for supporting the film and ensuring the flatness of the film in the process of acquiring the front image of the wafer.
5. The wafer inspection system of claim 1, wherein the image acquisition module further comprises: the focusing z-axis and the image acquisition unit are arranged on the same side, and the focusing z-axis and the light source are arranged on the opposite side of the carrier table, and are used for adjusting the focal length in cooperation with the position of the wafer to be detected in the process of acquiring the front image of the wafer, so that the front image of the wafer is ensured to show all the wafers to be detected.
6. The wafer inspection system of claim 1, further comprising: a motion control mechanism; the motion control mechanism is used for bearing the carrying platform and is matched with the image acquisition module to move and place the wafer to be detected at an imaging position.
7. The wafer detection system according to claim 1, wherein the motion control mechanism comprises a motion platform and a rotation platform, and the motion platform is used for linearly moving the position of the wafer to be detected in a plane direction; the rotary platform is arranged on the motion platform and is used for performing rotary motion on the position of the wafer to be detected in a plane; the carrying platform is arranged on the rotating platform and rotates along with the rotating platform in a plane to move the position of the wafer to be detected.
8. The wafer inspection system of claim 1, further comprising: the vibration isolation device comprises a supporting mechanism, a vibration isolation system and an electric control device; the motion control mechanism and the detection mechanism are respectively arranged in the supporting mechanism, and the electrical control equipment provides electric energy for the motion control mechanism, the image acquisition module and the processing module; the vibration isolation system is arranged at the lower part of the supporting mechanism and is used for providing a damping environment for the detection of the wafer to be detected; the vibration isolation system is provided with a marble, and the marble provides a flat plane for the motion control mechanism.
9. A wafer inspection method, wherein the wafer inspection system of any one of claims 1 to 8 is applied, the method comprising:
illuminating the back surface of the wafer to be detected by adopting a light source so that the wafer to be detected presents a corresponding wafer front image on the front surface of the wafer under the irradiation of light rays, and acquiring the wafer front image;
and obtaining a detection result of the wafer to be detected according to the front image of the wafer.
10. The method of claim 9, further comprising:
and acquiring the color or illumination intensity of the light source, and adjusting the light source to project light to the back of the wafer to be detected according to the color or illumination intensity.
11. The method of claim 9, further comprising:
moving the wafer to be detected in the plane direction; or, the wafer to be detected rotates in a plane; or, adjusting the focusing z-axis in the vertical direction;
and if the wafer to be detected meets the relative position of the imaging focal length in the vertical direction, determining the imaging position corresponding to the front surface of the wafer to be detected.
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