CN115291963A - Method for configuring hardware resources, electronic device and storage medium - Google Patents
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
The disclosure provides a method for configuring hardware resources, an electronic device and a storage medium. The method comprises the following steps: acquiring a first configuration file, wherein the first configuration file describes the connection relation between a plurality of peripheral components and a hardware simulation tool; receiving an editing instruction of a user for editing the first configuration file; modifying the first configuration file according to the editing instruction to generate a second configuration file; sending the second configuration file to the hardware simulation tool to cause the hardware simulation tool to configure at least a portion of the plurality of peripheral components according to the second configuration file.
Description
Technical Field
The present disclosure relates to the field of chip verification, and in particular, to a method for configuring hardware resources, an electronic device, and a storage medium.
Background
When a chip design is verified by using a hardware simulation tool, the hardware simulation tool needs to manage used hardware resources. These hardware resources may be peripheral components (e.g., network cards, mice, displays, PCI-E devices, etc.) that cooperate with the hardware emulation tool.
At present, the management of hardware resources requires a user to write a hardware resource configuration file in a code form, and the writing of the hardware resource configuration file requires the user to memorize a large number of parameters and grammars. Meanwhile, the grammars of different manufacturers are usually different. The written resource configuration file cannot simultaneously take readability, compactness and simplicity of analysis into consideration. Meanwhile, the hardware resources corresponding to the resource configuration file may come in and go out of the actual hardware, which causes the problem that the resource configuration file cannot run.
How to help users intuitively and quickly generate hardware configuration resource files to configure hardware resources is a problem which needs to be solved urgently.
Disclosure of Invention
In view of this, the present disclosure provides a method for configuring hardware resources, an electronic device, and a storage medium.
In a first aspect of the present disclosure, a method for configuring hardware resources is provided, including: acquiring a first configuration file, wherein the first configuration file describes the connection relation between a plurality of peripheral components and a hardware simulation tool; receiving an editing instruction of a user for editing the first configuration file; modifying the first configuration file according to the editing instruction to generate a second configuration file; sending the second configuration file to the hardware simulation tool to cause the hardware simulation tool to configure at least a portion of the plurality of peripheral components according to the second configuration file.
In a second aspect of the present disclosure, an electronic device for configuring hardware resources is provided, including: an interface connected to a hardware simulation tool; a memory for storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the electronic device to perform the method according to the first aspect.
In a third aspect of the disclosure, a non-transitory computer-readable storage medium is provided, which stores a set of instructions of an electronic device for causing the electronic device to perform the method according to the first aspect.
According to the method for configuring the hardware resources, the electronic device and the storage medium, interaction is performed with a user in a graphical interface mode, so that the user can intuitively configure and modify the hardware resources (namely, peripheral components) to generate a new configuration file. The hardware simulation tool can manage and configure the hardware resources according to the new configuration file. By the method, the hardware resource configuration is edited simply, conveniently and visually, user experience is improved, and further the efficiency of simulation verification is improved.
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In order to more clearly illustrate the present disclosure or the technical solutions in the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only the present disclosure, and other drawings can be obtained by those skilled in the art without inventive efforts.
FIG. 1 shows a schematic diagram of exemplary hardware resource profile code.
Fig. 2 shows a schematic structural diagram of an exemplary electronic device according to an embodiment of the present disclosure.
FIG. 3A shows a schematic diagram of an exemplary hardware connection relationship in accordance with an embodiment of the present disclosure.
Fig. 3B illustrates a schematic diagram of an exemplary edited topology map, in accordance with an embodiment of the present disclosure.
Fig. 3C shows a schematic diagram of an exemplary configuration file according to an embodiment of the present disclosure.
FIG. 4 shows a flowchart of an exemplary method of configuring hardware resources, according to an embodiment of the present disclosure.
Detailed Description
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
It is to be noted that technical or scientific terms used herein should have the ordinary meaning as understood by those of ordinary skill in the art to which this disclosure belongs, unless otherwise defined. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
FIG. 1 shows a schematic diagram of exemplary hardware resource profile code 100.
As mentioned above, currently, managing hardware resources requires a user to write a hardware resource profile in the form of code. As shown in fig. 1, writing a hardware resource profile requires a user to remember a large number of parameters, grammars, and the resulting profile is not user-friendly and intuitive.
In view of the foregoing problems, the present disclosure provides a method for configuring hardware resources, an electronic device, and a storage medium, which interact with a user in a graphical interface manner, so that the user can intuitively modify the configuration of the hardware resources to generate a new configuration file. The hardware simulation tool can manage and configure the hardware resources according to the new configuration file. By the method, the hardware resource configuration is edited simply, conveniently and visually, user experience is improved, and further the efficiency of simulation verification is improved.
Fig. 2 shows a schematic structural diagram of an exemplary electronic device 200 according to an embodiment of the present disclosure.
The electronic device 200 may be, for example, a host computer. The electronic device 200 may include: a processor 202, a memory 204, a network interface 206, a peripheral interface 208, and a bus 210. Wherein the processor 202, memory 204, network interface 206, and peripheral interface 208 may be communicatively coupled to each other within the electronic device 200 via a bus 210.
Processor 202 may be a Central Processing Unit (CPU), an image processor, a neural network processor, a microcontroller, a programmable logic device, a digital signal processor, an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits. Processor 202 may be used to perform functions related to the techniques described in this disclosure. In some embodiments, processor 202 may also include multiple processors integrated into a single logic component. As shown in fig. 2, the processor 202 may include a plurality of processors 202a, 202b, and 202c.
The memory 204 may be configured to store data (e.g., a set of instructions, computer code, intermediate data, etc.). For example, as shown in fig. 2, the stored data may include program instructions (e.g., for implementing techniques of this disclosure) as well as data to be processed (e.g., memory 204 may store temporary code generated during the compilation process). Processor 202 may also access stored program instructions and data and execute the program instructions to operate on the data to be processed. Memory 204 may include non-transitory computer-readable storage media, such as volatile memory devices or non-volatile memory devices. In some embodiments, the memory 204 may include Random Access Memory (RAM), read Only Memory (ROM), optical disks, magnetic disks, hard disks, solid State Disks (SSDs), flash memory, memory sticks, and the like.
The network interface 206 may be configured to enable the electronic apparatus 200 to communicate with one or more other external devices via a network. The network may be any wired or wireless network capable of transmitting and/or receiving data. For example, the network may be a wired network, a local wireless network (e.g., bluetooth, wiFi, near Field Communication (NFC), etc.), a cellular network, the internet, or a combination of the above. It is to be understood that the type of network is not limited to the specific examples described above. In some embodiments, network interface 206 may include any combination of any number of Network Interface Controllers (NICs), radio frequency modules, transceivers, modems, routers, gateways, adapters, cellular network chips, and the like.
The peripheral interface 208 may be configured to connect the electronic apparatus 200 with one or more peripheral devices to enable input and output of information. For example, the peripheral devices may include input devices such as a keyboard, mouse, touch pad, touch screen, microphone, various sensors, and output devices such as a display, speaker, vibrator, indicator light.
The bus 210 may be configured to transfer information between various components of the electronic device 200 (e.g., the processor 202, the memory 204, the network interface 206, and the peripheral interface 208), and may be, for example, an internal bus (e.g., a processor-memory bus), an external bus (a USB port, a PCI-E bus), or the like.
In some embodiments, in addition to processor 202, memory 204, network interface 206, peripheral interface 208, and bus 210 shown in fig. 2 and described above, electronic device 200 may include one or more other components necessary to achieve normal operation and/or one or more other components necessary to achieve the solutions of the embodiments of the present disclosure. In some embodiments, electronic device 200 may not include one or more of the components shown in fig. 2.
It should be noted that, although the above-mentioned construction architecture of the electronic device 200 only shows the processor 202, the memory 204, the network interface 206, the peripheral interface 208 and the bus 210, in a specific implementation process, the construction architecture of the electronic device 200 may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above-described structural architecture of the electronic device 200 may also include only the components necessary for implementing the embodiments of the present disclosure, and does not necessarily include all the components shown in the figures.
The electronic device 200 may run a debugging tool (e.g., a Fusion Debug tool available from Chi Hua Chapter technologies, inc.) to implement the methods of the embodiments of the present disclosure.
Fig. 3A illustrates a schematic diagram of an exemplary hardware connection relationship 300, according to an embodiment of the disclosure.
In some embodiments, the electronic device 200 may obtain resource information for peripheral components 3062, 3064, 3066 connected to the hardware simulation tool 302 and generate the configuration file 312 from the resource information. The resource information may include at least one of a name, a type, or a connection relationship of the peripheral components 3062, 3064, 3066. The electronic device 200 may generate a graphical interface according to the acquired resource information. The graphical interface may include a topology map 310 that describes the peripheral components 3062, 3064, 3066 and their connections and is displayed, for example, on a display via the peripheral interface 208. Topology graph 310 corresponds to configuration file 312. From the topology 310, the user can clearly see the connection relationship of the peripheral components 3062, 3064, 3066 and the hardware simulation tool 302.
In some embodiments, the peripheral components 3062, 3064, 3066 in the topology 310 may have peripheral components that are not needed for use in the simulation verification process. At this point, the user may edit the topology graph 310 as needed for simulation verification. The electronic device 200 may receive an editing instruction of a user. For example, the user may edit the topology map 310 directly in the graphical interface, and remove the peripheral components 3066 that are not needed in the simulation verification process. Other peripheral components required in the simulation verification process may also be absent from topology 310, such as peripheral component 3068 shown in FIG. 3A as being absent from topology 310. The user may directly interface peripheral component 3068 with hardware simulation tool 302 via interface 3088 in a graphical interface. It is noted that peripheral component 3068 is not yet available because peripheral component 3068 is not connected to hardware simulation tool 302 at this time. The electronic device 200, when displaying the topology map, may highlight the peripheral components 3068 and their connections to prompt the user that the peripheral components 3068 should be connected to the hardware simulation tool 302 in the connection relationship of the topology map 310.
Fig. 3B illustrates a schematic diagram of an exemplary edited topology graph 320, in accordance with an embodiment of the present disclosure.
Through the editing operation, the edited topology map 320 can be displayed in the graphical interface. Hardware simulation tool 302 is connected to peripheral component 3062 via interface 3082, to peripheral component 3064 via interface 3084, and to peripheral component 3068 via interface 3088. In contrast to the topology 310 shown in FIG. 3A, the peripheral components 3068 in topology 320 replace peripheral components 3066 in performing simulation verification of logic system design 304. As described above, in fig. 3B, the peripheral component 3068 and its connections are shown highlighted (e.g., bolded).
It is to be appreciated that in addition to removing peripheral components 3066 or adding peripheral components 3068, the user may also perform other editing operations on topology graph 310 to meet the needs of the simulation verification process, and the present disclosure is not limited to the editing operations of the user, e.g., the user may edit topology graph 310 to change the connection relationships of the peripheral components.
The topology map is user friendly and easy to edit, but cannot be read directly by hardware simulation tool 302. Hardware emulation tool 302 can manage the peripheral components used via configuration files (e.g., configuration files in JSON format). Electronic device 200 may generate configuration file 322 based on edited topology map 320 and send configuration file 322 to hardware simulation tool 302. Topology map 320 corresponds to configuration file 322, e.g., a user's editing operation of topology map 320 may map to a modification to configuration file 322. The hardware simulation tool 302 may configure the corresponding peripheral components 3062, 3064, and 3068 according to the received configuration file 322.
Fig. 3C shows a schematic diagram of an exemplary configuration file 322, according to an embodiment of the present disclosure.
In some embodiments, the electronic device 200 may provide a command line tool to the user and generate a text file describing the resource information. Similar to the graphical interface, the user may cut, supplement, or modify the text file according to the requirements of the simulation verification process, for example, the text file may be edited by an editor such as VI, eacs, or the like to obtain a new text file meeting the requirements of the user. Electronic device 200 may generate a configuration file based on the new text file for hardware simulation tool 302 to read.
It is understood that the graphical interface and command line tools herein are merely examples, and that electronic device 200 may generate other visualizations or user-editable formats from the resource information for editing by the user.
As described above, the modified configuration file 322 may not be connected to the actual peripheral component at the present time. To match the configuration file 322 requires the user to adjust the actual connections of the peripheral components, which may be a process error (e.g., interface connection error, etc.). Thus, in some embodiments, the electronic device 200 may determine whether the configuration file 322 matches resource information for a plurality of peripheral components connected to the hardware simulation tool 302. For example, electronic device 200 executes a verification mechanism to match the peripheral components in configuration file 322 that require configuration with the retrieved resource information of peripheral components 3062, 3064, 3068, which are actually connected to hardware simulation tool 302. In response to the configuration file 322 not matching the resource information, the electronic device 200 may highlight the unmatched peripheral component. For example, electronic device 200 may highlight (e.g., highlight) the unmatched peripheral components in configuration file 322 or topology map 320. Through the verification mechanism and the highlighting, the electronic device 200 of the embodiment of the present disclosure can ensure that the actual connection of the peripheral component corresponds to the configuration file. Even if an operation error occurs, the error can be found in time to carry out adjustment.
Returning to fig. 3A, in other embodiments, the configuration file 312 may be written by a user, rather than being generated by the electronic device 200 from resource information of the peripheral components 3062, 3064, 3066. The peripheral components involved in the user-written configuration file 312 may be different from the actual peripheral components, such as a lack of a peripheral component or an inconsistent connection relationship of a peripheral component, which may result in the configuration file not being operational. Some peripheral component conditions provided in the user-written configuration file 312 may also be undetectable automatically, thereby affecting the automatic verification mechanism for peripheral component conditions. Similar to the electronic device 200 determining whether the configuration file 322 matches the resource information of the plurality of peripheral components connected to the hardware simulation tool 302, the electronic device 200 may determine whether the user-written configuration file 312 matches the retrieved resource information of the peripheral components. In response to the user-written configuration file 312 not matching the resource information, the electronic device 200 may highlight the unmatched peripheral components.
In this way, the electronic device 200 interacts with the user in a graphical interface manner, so that the user can intuitively configure and modify the hardware resources to generate a new configuration file. Hardware simulation tool 302 may perform management and configuration of hardware resources according to the new configuration file. The electronic device 200 may also match the configuration file with the actually connected hardware resources and highlight the unmatched hardware resources. By the method, the user can edit the hardware resource configuration more simply and intuitively, unmatched parts in the hardware resource configuration can be found more quickly, user experience is improved, and simulation verification efficiency is improved.
FIG. 4 shows a flowchart of an exemplary method 400 of configuring hardware resources, according to an embodiment of the present disclosure. Method 400 may be performed by electronic device 200 of fig. 2, and more specifically, by a debugging tool running on electronic device 200. The method 400 may include the following steps.
At step S402, the electronic device 200 may obtain a first configuration file (e.g., configuration file 312 in fig. 3A), which may describe a connection relationship of a plurality of peripheral components (e.g., peripheral components 3062, 3064, and 3066 in fig. 3A) and a hardware simulation tool (e.g., hardware simulation tool 302 in fig. 3A).
In some embodiments, electronic device 200 may obtain resource information for a plurality of peripheral components (e.g., peripheral components 3062, 3064, and 3066 in FIG. 3A) connected to the hardware simulation tool and generate a first configuration file (e.g., configuration file 312 in FIG. 3A) based on the resource information.
In some embodiments, the resource information may include at least one of a name (e.g., "CARD" or "BOARD"), a type (e.g., "Cable" or "TWO CHIP _ BOARD"), or a connection relationship of the plurality of peripheral components. The electronic device 200 may generate a graphical interface based on the resource information. The graphical interface may include a first topology map (e.g., topology map 310 in fig. 3A) of the plurality of peripheral components and the hardware simulation tool. The first topology map corresponds to the first configuration file (e.g., topology map 310 and configuration file 312 correspond in fig. 3A).
In step S404, the electronic device 200 may receive an edit instruction of the user to edit the first configuration file.
In step S406, the electronic device 200 may modify the first configuration file according to the editing instruction to generate a second configuration file (e.g., the configuration file 322 in fig. 3B).
In some embodiments, the electronic device 200 may receive the editing instructions via the graphical interface. The editing instructions may include at least one of removing a peripheral component (e.g., removing peripheral component 3066), adding a peripheral component (e.g., adding peripheral component 3068), or changing a connection of a peripheral component. The electronic device 200 can edit the first topology map to obtain a second topology map (e.g., the topology map 320 in fig. 3B) according to the editing instruction. The electronic device 200 may generate the second profile (e.g., profile 322 in fig. 3B) based on the second topology map. The configuration file may be written in a resource specification language (resource specification language) of the core Chapter (e.g., configuration file 322 shown in FIG. 3C).
At step S408, the electronic device 200 may send the second configuration file to the hardware simulation tool 302 to cause the hardware simulation tool 302 to configure at least a portion of the plurality of peripheral components (e.g., peripheral components 3062, 3064, and 3068 in fig. 3B) according to the second configuration file (e.g., configuration file 322 in fig. 3B).
In some embodiments, the electronic device 200 may further determine whether the second configuration file matches the resource information, and in response to the second configuration file not matching the resource information, may highlight the unmatched peripheral components (e.g., highlight the unmatched peripheral components in the configuration file 322 or the topology map 320).
In other embodiments, the first configuration file (e.g., configuration file 312 in fig. 3A) may be written by a user. The electronic device 200 may obtain resource information of the plurality of peripheral components (e.g., peripheral components 3062, 3064, and 3066 in fig. 3A) connected to the hardware simulation tool. Since the peripheral components involved in the first configuration file written by the user may be distinguished from the actual peripheral components, resulting in an automatic verification mechanism in which the first configuration file does not function or affect the condition of the peripheral components. Similarly, the electronic device 200 may determine whether the first profile matches the resource information; in response to the first configuration file not matching the resource information, highlighting the non-matching peripheral component.
The present disclosure also provides an electronic device for configuring hardware resources. The electronic device may be the electronic device 200 shown in fig. 2. The electronic device 200 may include an interface to connect to a hardware simulation tool; a memory for storing a set of instructions; and at least one processor configured to execute a computer program stored in memory 204 to implement a method of configuring hardware resources consistent with the present disclosure, such as the exemplary method described above (e.g., method 400 shown in fig. 4). And will not be described in detail herein.
The present disclosure also provides a non-transitory computer-readable storage medium. A non-transitory computer readable storage medium stores a set of instructions for an electronic device. The set of instructions, when executed, may cause the electronic device 200 to implement a method of configuring hardware resources consistent with the present disclosure, such as the exemplary method described above (e.g., method 400 shown in fig. 4). And will not be described in detail herein.
Computer-readable media of the present embodiments, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device.
The foregoing description of specific embodiments of the present disclosure has been presented. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the idea of the present disclosure, features in the above embodiments or in different embodiments may also be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the present disclosure as described above, which are not provided in detail for the sake of brevity.
In addition, well known power/ground connections to Integrated Circuit (IC) chips and other components may or may not be shown in the provided figures for simplicity of illustration and discussion, and so as not to obscure the disclosure. Furthermore, devices may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram devices are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. Accordingly, the description is to be regarded as illustrative instead of restrictive.
While the present disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art in light of the foregoing description. For example, other memory architectures, such as Dynamic RAM (DRAM), may use the discussed embodiments.
The present disclosure is intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalents, improvements, and the like that may be made within the spirit and principles of the disclosure are intended to be included within the scope of the disclosure.
Claims (9)
1. A method of configuring hardware resources, comprising:
acquiring a first configuration file, wherein the first configuration file describes the connection relation between a plurality of peripheral components and a hardware simulation tool;
receiving an editing instruction of a user for editing the first configuration file;
modifying the first configuration file according to the editing instruction to generate a second configuration file;
sending the second configuration file to the hardware simulation tool to cause the hardware simulation tool to configure at least a portion of the plurality of peripheral components according to the second configuration file.
2. The method of claim 1, wherein obtaining the first profile further comprises:
obtaining resource information for the plurality of peripheral components connected to the hardware simulation tool;
and generating a first configuration file according to the resource information.
3. The method of claim 2, wherein the resource information includes at least one of a name, a type, or a connection relationship of the plurality of peripheral components, the generating a first profile from the resource further comprising:
generating a graphical interface according to the resource information, the graphical interface including a first topological graph of the plurality of peripheral components and the hardware simulation tool, the first topological graph corresponding to the first configuration file.
4. The method of claim 3, wherein receiving an edit instruction from a user to edit the first profile to generate a second profile further comprises:
receiving the editing instructions via the graphical interface;
editing the first topological graph according to the editing instruction to obtain a second topological graph;
generating the second configuration file based on the second topological graph.
5. The method of claim 4, wherein the editing instructions include at least one of removing a peripheral component, adding a peripheral component, or changing a connection relationship of a peripheral component.
6. The method of claim 1, wherein the first profile is written by a user, the method further comprising:
obtaining resource information for the plurality of peripheral components connected to the hardware simulation tool;
determining whether the first profile matches the resource information;
in response to the first configuration file not matching the resource information, highlighting the unmatched peripheral component.
7. The method of claim 4, further comprising:
determining whether the second profile matches the resource information;
in response to the second configuration file not matching the resource information, highlighting the unmatched peripheral component.
8. An electronic device, comprising:
an interface connected to a hardware simulation tool;
a memory for storing a set of instructions; and
at least one processor configured to execute the set of instructions to cause the electronic device to perform the method of any of claims 1-7.
9. A non-transitory computer readable storage medium storing a set of instructions of an electronic device, which when executed, cause the electronic device to perform the method of any of claims 1 to 7.
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| CN117951853A (en) * | 2024-03-27 | 2024-04-30 | 广东采日能源科技有限公司 | Energy storage system and configuration method and device thereof |
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