CN115291089B

CN115291089B - Crosstalk test assembly and crosstalk test method

Info

Publication number: CN115291089B
Application number: CN202211219129.2A
Authority: CN
Inventors: 请求不公布姓名
Original assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Current assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Priority date: 2022-10-08
Filing date: 2022-10-08
Publication date: 2023-08-08
Anticipated expiration: 2042-10-08
Also published as: CN115291089A

Abstract

The application discloses a crosstalk testing assembly and a crosstalk testing method, and belongs to the field of quantum chip manufacturing. The crosstalk testing assembly includes first and second lines coupled to each other. The second circuit has a plurality of second circuits, and part of the second circuits is provided with crosstalk suppressing units, while the other part is not provided with crosstalk suppressing units. The crosstalk suppressing unit may weaken the crosstalk between the two lines by a suppressing element provided to the coupling area of the first and second lines. The crosstalk testing assembly has the characteristic of being convenient to construct, and can also realize testing of the design schemes of various suppression elements under the condition of one set of configuration scheme, so that the independent test resource configuration aiming at each design scheme can be avoided, the test resources are saved, and the test efficiency and the utilization rate of the test resources are improved.

Description

Crosstalk test assembly and crosstalk test method

Technical Field

The application belongs to the field of quantum chip preparation, and particularly relates to a crosstalk testing assembly and a crosstalk testing method.

Background

As the number of qubits increases, the number of various corresponding control lines and measurement lines for the qubits increases during the quantum chip fabrication process. Given the limited space of the quantum chip, these lines are likely to have varying degrees of influence on each other, such as crosstalk, which is particularly pronounced in high frequency applications.

Therefore, in order to suppress such crosstalk, it is often necessary to optimally design the bit structure or its read and control lines.

In addition, some practices may choose a configuration configured to suppress crosstalk. It is necessary to examine the inhibitory effect that these structures can produce. In order to obtain a structure that can produce a more desirable effect, it is necessary to test crosstalk suppressing structures constructed in different forms. For example, different assay protocols are selected for different forms of inhibition structural protocols.

It may result in more solutions that need to be verified and reviewed, and configuring the corresponding test solutions for each structure individually is cumbersome and costly (e.g., consumes more test resources). And in fields such as superconducting quantum chips, it is necessary to configure a low-temperature environment and to configure various radio frequency elements in a line; meanwhile, the crosstalk signal in the quantum chip is relatively weak, and the signal of the quantum bit is also weak, so that extremely low crosstalk also needs to be treated with care.

Therefore, how to efficiently and conveniently perform scheme verification on the crosstalk suppression structure is a problem to be solved.

Disclosure of Invention

In view of this, the present application discloses a crosstalk testing assembly and a crosstalk testing method. The device can simplify the performance test process of the crosstalk suppression element, improve the test efficiency and the utilization rate of the test resources.

The scheme exemplified by the application is implemented as follows.

In a first aspect, examples of the present application provide a crosstalk testing assembly comprising:

a first line;

at least three second lines coupled to the first line, the at least three second lines being spaced apart along an extended trace of the first line, the at least three second lines including a reference line and at least two reference lines; and

at least two crosstalk suppressing units in one-to-one correspondence with the at least two control lines, each crosstalk suppressing unit comprising at least one suppressing element;

the suppression element is disposed at the coupling region of the first line and the at least two control lines and is configured to attenuate crosstalk between the first line and the control lines.

In the crosstalk testing assembly, a first line and a second line coupled to each other provide an environment for transmission of signals, generation of crosstalk, and interaction with a suppression element. And, wherein part of the second lines (reference lines) is configured with the crosstalk suppressing unit, while part of the second lines (reference lines) is not configured. Therefore, the measurement of the signals is carried out while the first line and the second line transmit signals, and the comparison of the measured values of the different second lines can obtain the result of whether the crosstalk suppression units are configured and the effect and influence on the crosstalk generated by the crosstalk suppression units in different forms, so that the configuration mode of the suppression element can be evaluated according to the result, and the verification and development of the crosstalk suppression scheme are facilitated.

In addition, a plurality of comparison lines can be configured in the second line according to the need, and thus, the testing of various schemes can be performed without configuring independent testing resources for each design scheme, thereby improving the resource utilization rate.

According to some examples of the present application, the suppression element is not in contact with both the first line and the second line and includes an air bridge, a superconducting element. Wherein the suppression element comprises a flip-chip interconnect structure for use in a flip-chip. Illustratively, the interconnect structure is an indium pillar. Further, an indium column is disposed between the first line and the reference line.

According to some examples of the present application, the crosstalk suppressing unit has a characteristic parameter associated with the degree of weakening, the characteristic parameter comprising a combination of any one or more of the number, shape, size and position of the suppressing elements.

According to some examples of the present application, the suppression element includes an air bridge, and the air bridge spans both sides of the first line; alternatively, the suppression element includes an air bridge, and the air bridge spans both sides of the control line.

According to some examples of the present application, the suppression element comprises an air bridge;

the number of crosstalk suppressing units is at least three, and wherein all air bridges of at least one crosstalk suppressing unit are connected across both sides of the first line, all air bridges of at least one crosstalk suppressing unit are connected across both sides of the control line, part of all air bridges of at least one crosstalk suppressing unit are connected across both sides of the first line, and the rest is connected across both sides of the control line.

According to some examples of the present application, each air bridge in the same crosstalk-suppressing unit has the same shape and size; and/or the air bridges in different crosstalk-suppressing elements have the same shape and different dimensions.

According to some examples of the present application, the first line is a read bus applied to the superconducting quantum chip, and the reference line are read resonators coupled to the read bus.

According to some examples of the present application, the first line is a microwave control line applied to a superconducting quantum chip, and the reference line and the control line are flux control lines applied to the superconducting quantum chip.

In a second aspect, examples of the present application provide a crosstalk testing method, comprising:

providing the crosstalk testing assembly;

determining a first coupling strength between the first line and the reference line, and determining a second coupling strength between the first line and the reference line;

the first coupling strength and the second coupling strength are compared to determine a degree to which the suppression element weakens the crosstalk.

In a third aspect, examples of the present application provide a crosstalk testing method, comprising:

providing the crosstalk testing component, wherein the first line is a read bus, and the reference line are read resonant cavities;

the quality factors of the individual read resonators are measured and compared to determine the performance of suppressing element weakening crosstalk.

The beneficial effects are that:

compared with the prior art, the crosstalk testing assembly can realize multi-project testing under the condition of relatively simpler configuration, so that the testing efficiency of the suppression element and the utilization rate of testing resources can be improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.

Fig. 1 is a schematic structural diagram of a first crosstalk testing component according to an embodiment of the present application;

FIG. 2 discloses a schematic cross-sectional structural view of a suppression element in one crosstalk suppression unit in the crosstalk testing assembly of FIG. 1;

FIG. 3 discloses a schematic structural diagram of a crosstalk testing assembly with suppression elements constructed in the form of indium columns in the examples of the present application;

fig. 4 is a flow chart of a crosstalk testing method according to an embodiment of the present application.

Icon: a 100-crosstalk testing component; 300-crosstalk testing component; 101-a first line; 102-a second line; 103 a-a first suppression unit; 103 b-a second suppression unit; 103 c-a third suppression unit; 201-a reference line; 202-control line; 301 a-a first suppression unit; 301 b-a second suppression unit; 301 c-a third suppression unit; 311-pier; 312-bridge.

Detailed Description

During the fabrication of flip chips, the chips are attached to a substrate or carrier using solder bumps instead of solder wires to provide dense interconnections. Thus, flip chips have excellent electrical and thermal properties.

In conventional chip packaging techniques, thin wires are used to interconnect the wafer and the carrier. Specifically, the back side (right side up) of the wafer is mounted onto a carrier; the thin wires are then bonded to the wafer and then soldered to the carrier. In contrast, flip-chip packaged chips and carriers are interconnected using bumps. Wherein, dispose the conductive bump on the surface of the chip. The bumped wafer is then "flipped over", placed face down, and the bumps attached to the carrier. In silicon-based chips, for example, the bumps are chosen to be copper. In order to prevent the Bump from adversely affecting the wafer, an intermediate layer, such as a structure called an Under Bump Metal (UBM) UBM, is often disposed between the Bump and the wafer.

It is also applied in quantum chips due to the advantages of flip-chip interconnect technology. The method can not only improve the integration level of the quantum chip, but also avoid the too rapid increase of the plane size when the number of the quantum bits in the quantum chip is increased. Accordingly, flip-chip interconnection techniques have been chosen and are expected to be used in the fabrication of superconducting quantum chips in view of the increasing number of qubits deployed in a single chip.

Currently, in superconducting quantum chips based on flip-chip interconnection technology, conventionally, a wafer therein is described as an upper chip, and a carrier may be described as a lower chip. Meanwhile, the upper and lower chips are also respectively and selectively configured with qubits, reading lines, control lines or various elements and the like according to design requirements. Currently, the interconnect between the upper and lower chips is typically selected to be an indium pillar.

In the studies of the present inventors, interconnects have been used to improve signal crosstalk between lines in addition to being transmission channels for signals. For example, indium columns provided between control lines of superconducting qubits, which can suppress crosstalk between control lines of superconducting qubits. And because the indium columns are added between the adjacent control lines, the distance between the control lines can be compressed under a certain crosstalk degree, so that more space can be reserved for other elements in the chip.

Therefore, in the above-described cases, how to accurately evaluate crosstalk to determine the performance of the crosstalk-suppressing structure becomes a problem that needs to be carefully considered.

Based on the above-mentioned real requirements, in the examples of the present application, the inventors propose a crosstalk testing assembly. In general, the crosstalk testing assembly evaluates the performance of a crosstalk-suppressing structure by constructing two elements that are coupled to each other, and by examining the attenuation of crosstalk by the crosstalk-suppressing structure on both.

For example, there may be measured crosstalk when transmitting signals between a first element and a second element coupled to each other. When the crosstalk suppressing structure is provided for the second element, and then the crosstalk measurement is performed, if the crosstalk obtained from the measurement value at this time becomes smaller than the crosstalk obtained from the measurement value when the crosstalk suppressing structure is not provided, it can be considered that the crosstalk suppressing structure plays a role in suppressing crosstalk. In addition, in actual operation, the crosstalk degree can be judged by measuring the coupling effect between the two elements, namely, the coupling strength.

Further, when in a superconducting quantum chip, for example, the first element is configured as a read bus and the second element is configured as a read resonator, crosstalk can also be measured by determining the quality factor of the read resonator. For example, the higher the quality factor of the read resonator, the less the energy leakage is indicated; in other words, the less the coupling of the read resonant cavity to the read bus, the less the crosstalk and vice versa.

In an example, as shown in fig. 1, the crosstalk testing assembly 100 includes a first line 101 and a second line 102, and the second line 102 includes a plurality, e.g., at least three. At least one second line 102 is used as a reference line 201, and at least two second lines 102 are used as reference lines 202. Where "reference" and "control" are named for the purpose of distinguishing between two lines and are not intended to limit the necessity of any intentional structural or performance distinction between them. And, on the contrary, there is no gap in terms of structure and performance between the reference line and the reference line, which is more helpful to compare and judge the suppression performance of the crosstalk suppression element through the test result.

In practice, the reference line 201 and the reference line 202 may be fabricated according to the same structure, material and process, so that they have the same coupling performance with the first line 101 or the coupling performance within an acceptable range of differences according to design requirements. Illustratively, when the first line 101 is a read bus and the second line 102 is a set of multiple read resonators, the cavity frequencies of the individual read resonators may be the same or, although there is a gap, the gap is small (e.g., less than 50 MHz). For example, the cavity frequencies of the four read resonators may be 6.50GHz, 6.55GHz, 6.60GHz and 6.65GHz, respectively.

In addition, the crosstalk test assembly further comprises a crosstalk suppression unit. Which serves to weaken the crosstalk between the first line 101 and the second line 102, i.e. to weaken the coupling between the two lines. And, the number of crosstalk suppressing units is identical to the number of the control lines 202; and the two are in one-to-one correspondence. I.e. one crosstalk suppressing unit corresponds to one control line 202.

Each of the control lines 202 is provided with a crosstalk suppressing unit in correspondence with the coupling area with the first line. That is, the configuration position in which the crosstalk suppressing unit is disposed is in the coupling area of the first line 101 and the reference line 202. As the name suggests, the crosstalk suppressing unit is used to weaken the crosstalk between the first line 101 and the control line 202.

Further, the crosstalk suppressing unit has various selected numbers of suppressing elements, such as one, two, three, four, and so on. Typically, the suppression element is plural, extending over the entire coupling length area to the extent of coupling of the first line with the second line.

As an example, the suppression element may be an air bridge or a superconducting element. The superconducting element therein is for example an interconnect structure in a flip chip, illustratively comprising indium columns.

When the suppression element is an air bridge, the air bridge may bridge the first line 101, or the air bridge may bridge the control line 202. In some examples, all of the air bridges span the first line 101; in other examples all air bridges span the control line 202; in still other examples some of the total air bridges are connected across the first line 101 and the remainder is connected across the control line 202.

By bridging is meant that the raised portions of the air bridge are located over the corresponding lines. Alternatively, the raised portion and the second direction of the extending track of the first circuit 101 are crisscrossed with each other in a first direction from one end to the second end of the air bridge.

As an example, an air bridge may have piers, approach bridges, and deck (or referred to as deck tops); and two ends of the bridge deck are respectively connected with one approach bridge, and each approach bridge is also connected with one pier. The two ends (piers) of the air bridge are bonded to the ground plane of the chip.

The bridge approach bulges and gradually gets away from the surface of the chip; the bridge approach terminates at a certain height relative to the surface of the chip. The bridge deck is connected to the bridge approach and extends substantially parallel to the surface of the chip. And after the bridge deck extends for a certain length, the bridge deck is connected with the approach bridge. The bridge approach extends gradually closer to the surface of the chip and then connects with the bridge pier of the ground plane bonded to the surface of the chip. Alternatively, as shown in fig. 2, the air bridge includes a bridge pier 311 and a bridge body 312; i.e., the bridge approach and deck described above are combined into a bridge body 312 and are generally arcuate.

The above mainly describes suppression elements in the form of air bridges. In other examples, when the suppression element is a flip-chip interconnect structure applied in a flip-chip, i.e., an indium pillar, the suppression element may be disposed between the first line 101 and the control line 202. The indium columns are typically constructed in a generally cylindrical configuration and have a suitable height (typically greater than the spacing between the upper and lower chips).

In practice, the inventors have found that the number, location, material, shape, size, etc. of suppression elements may all have an effect on the performance of weakening the crosstalk, either independently or in combination of two or more.

Taking the first line 101 as a read bus in a superconducting quantum chip, the reference line 201 and the reference line 202 in the second line 102 are taken as read resonant cavities in the superconducting quantum chip as an example. In fig. 1, the read bus is one and a coplanar waveguide transmission line may be employed; one reference line 201 and three reference lines 202 are coplanar waveguide resonators (1/4 wavelength resonators or 1/2 wavelength resonators) made of the same material and structure and fabricated by the same process.

Referring to fig. 1, the read buses are arranged to extend in a horizontal direction, and thus have an extension track in that direction. Four lines in total of one reference line 201 and three reference lines 202 are sequentially distributed at intervals in the horizontal direction. Wherein any two second lines have approximately the same distance therebetween.

The crosstalk testing assembly 100 shown in fig. 1 comprises three crosstalk suppressing units corresponding to the three control lines 202. Wherein the first suppression unit 103a has three air bridges; each air bridge spans across the read bus. The second suppression unit 103b has two air bridges; each air bridge spans across the read bus. The third suppression unit 103c has five air bridges; three of the air bridges are connected across the read bus, and two of the air bridges are connected across the read resonant cavity.

In the crosstalk testing assembly shown in fig. 1, the three suppression units have different numbers of suppression elements, the same suppression element shape, and the same material, but are different in size. Thus, the quality factors of the four read resonators are determined and then aligned to obtain interesting results, such as which size and number of air bridges better attenuate crosstalk.

For example, comparing the quality factor of the reference line 201 with the quality factors of the respective reference lines 202, or comparing the quality factors of any two reference lines 202, the attenuation effect of the air bridge on the crosstalk can be evaluated, and further, which air bridge configuration scheme, i.e., which crosstalk suppression unit, has better performance can be determined. The quality factor is measured by, for example, using a probe station or a network analyzer to test the S parameter/scattering parameter (e.g., S21), and then calculating the quality factor, i.e., Q value, by a transformation relation.

Similarly, fig. 3 discloses a crosstalk testing assembly 300 with suppression elements constructed in the form of indium columns. The main differences between the crosstalk testing assembly 300 and the crosstalk testing assembly 100 of fig. 1 are: the crosstalk suppressing units in fig. 1 and 3 are different, and suppressing elements constituting the crosstalk suppressing units are different.

The first suppressing units 301a have five indium columns and are sequentially arranged at equal intervals. The second suppressing unit 301b has four indium columns, and is arranged at equal intervals in order. The third suppressing unit 301c has ten indium columns, and is arranged in a group of five in a linear equidistant manner in order, and two groups are arranged in a row and staggered in the vertical direction. Wherein the diameter of the indium columns in the first suppression unit 301a is larger than the diameter of the indium columns in the second suppression unit 301 b. The diameter of the indium column in the third suppression unit 301c is smaller than the diameter of the indium column in the first suppression unit 301 a.

In the above example, the first line 101 is a read bus, and the second line 102 is a read resonant cavity. In other examples, the first line 101 may be selected as a microwave control line applied to a superconducting quantum chip; correspondingly, the reference line 201 and the reference line 202 in the second line 102 are flux control lines applied to the superconducting quantum chip, respectively. Alternatively, the first and second lines may also be various other forms of elements in the quantum chip.

Second, various property characteristics (one or more of number, shape, size, and position) of the suppression element as described above may have different degrees of influence on the crosstalk suppression effect, and the shape, size, and position of the suppression element are mainly exemplified in the examples shown in fig. 1 and 3. It should be appreciated that in other examples, the suppression element may be of other shapes, sizes, and locations; alternatively, in the crosstalk testing assembly, the suppression elements in the respective suppression units may also include air bridges and indium columns.

Corresponding to the crosstalk suppression assembly described above, a crosstalk testing method may be provided in examples.

Illustratively, referring to FIG. 4, the crosstalk testing method includes the steps of:

step S101, providing a crosstalk testing component.

Step S102, a first coupling strength between the first line 101 and the reference line 201 is measured, and a second coupling strength between the first line 101 and the reference line 202 is measured.

Step S103, comparing the first coupling strength and the second coupling strength to determine the degree to which the suppression element weakens the crosstalk.

When the first line 101 is configured in the form of a read bus and the reference line 201 and the reference line 202 are configured in the form of a read resonant cavity, the crosstalk test method may include: the quality factors of the individual read resonators are measured and compared to determine the performance of suppressing element weakening crosstalk. The testing method is to test the S parameter by using a network analyzer.

For example, when the Q value measured by the reference line 201 of the read cavity configuration is twelve thousands, and when the Q value measured by the reference line 202 of the read cavity configuration is fourteen thousands, the added suppression element is considered to attenuate the coupling between the read bus and the read cavity, and thus acts as a cross-talk reduction. In other words, crosstalk between two lines or elements transmitting signals may be represented by the form of coupling between the two. Thus, strong coupling indicates increased crosstalk. Therefore, by determining the Q value, it is possible to evaluate that the crosstalk-Q value is large and the crosstalk is small.

The embodiments described above by referring to the drawings are exemplary only and are not to be construed as limiting the present application. For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application clear, the foregoing descriptions of the embodiments of the present application are described in detail with reference to the accompanying drawings. However, as will be appreciated by those of ordinary skill in the art, in the various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments. The division of the examples is for convenience of description, and should not be construed as limiting the specific implementation manner of the present application, and the embodiments may be mutually combined and referred to without contradiction.

It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein.

Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The foregoing detailed description of the construction, features and advantages of the present application will be presented in terms of embodiments illustrated in the drawings, wherein the foregoing is a preferred embodiment of the present application, but the scope of the application is not limited to the embodiments illustrated in the drawings, and any changes made in accordance with the concepts of the present application, or modifications as equivalent embodiments, shall fall within the spirit of the disclosure and drawings.

Claims

1. A crosstalk testing assembly, comprising:

a first line;

the at least three second lines are coupled with the first line and distributed at intervals along the extending track of the first line, and the at least three second lines comprise a reference line and at least two comparison lines, wherein the first line is a reading bus, the reference line and the comparison lines are reading resonant cavities, and the cavity frequencies of the reading resonant cavities are different and the difference is smaller than 50MHz; and

at least two crosstalk suppressing units in one-to-one correspondence with the at least two control lines, each crosstalk suppressing unit including at least one suppressing element;

a suppression element disposed at the coupling region of the first line and the at least two control lines and configured to attenuate crosstalk between the first line and the control lines;

wherein the performance of suppressing element weakening crosstalk is determined by measuring and comparing the quality factors of the individual read resonators;

wherein the suppression element is a superconducting element and is a flip-chip interconnection structure applied to a flip-chip, and the flip-chip interconnection structure also serves as a signal transmission channel;

the suppression element is not in contact with both the first line and the second line, and the suppression element is located between the first line and the control line.

2. The crosstalk testing assembly according to claim 1, characterized in that the interconnect structure is an indium pillar.

3. The crosstalk testing assembly according to claim 1 or 2, characterized in that the crosstalk suppression unit has a characteristic parameter associated with the degree of weakening, the characteristic parameter comprising a combination of any one or more of the number, shape, size and position of suppression elements.

4. A method of crosstalk testing, comprising:

providing a crosstalk testing assembly according to any of claims 1 to 3;

5. A method of crosstalk testing, comprising:

providing a crosstalk testing assembly according to any of claims 1 to 3, and when the first line is a read bus and the reference line are read resonators;