CN115268546A - Band-gap reference circuit with transient enhancement - Google Patents
Band-gap reference circuit with transient enhancement Download PDFInfo
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- CN115268546A CN115268546A CN202210932171.2A CN202210932171A CN115268546A CN 115268546 A CN115268546 A CN 115268546A CN 202210932171 A CN202210932171 A CN 202210932171A CN 115268546 A CN115268546 A CN 115268546A
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Abstract
Embodiments of the present disclosure provide a bandgap reference circuit with transient enhancement. The circuit comprises: the device comprises a pre-voltage stabilizing circuit, a band-gap reference core circuit, a frequency compensation circuit and a filter circuit. Wherein the pre-regulator circuit is configured to generate a clamped secondary supply voltage when the supply voltage transiently increases and to provide the clamped secondary supply voltage to the bandgap reference core circuit via a first node; the bandgap reference core circuit is configured to output a corresponding reference voltage according to the clamped secondary supply voltage; the frequency compensation circuit is configured to provide frequency compensation to the bandgap reference core circuit and the pre-regulation circuit via a second node; the filtering circuit is configured to filter the bandgap reference core circuit via the first node. The embodiment of the disclosure is suitable for the processing process of the reference voltage in the band-gap reference circuit.
Description
Technical Field
The embodiment of the disclosure relates to the technical field of integrated circuits, in particular to a band-gap reference circuit with transient enhancement.
Background
The bandgap reference circuit, which has an output voltage that does not vary with the power supply voltage and has a good temperature characteristic, is often used as a stable reference voltage in a switching power supply chip. However, with the development of the power supply technology of the switching power supply chip, the requirements of users on the stability and the recovery speed of the reference voltage are higher and higher when the power supply voltage suddenly changes, so that the common bandgap reference circuit is difficult to meet the requirements of users, particularly when the power supply voltage suddenly and instantly increases, the reference voltage can overshoot to a larger extent, and the speed of the overshoot voltage recovering to a normal value is very slow, so that a series of subsequent comparators based on the reference voltage make a judgment mistake, and further a logic error is caused.
At present, aiming at the problem that the reference voltage overshoots due to sudden increase of the power voltage, a common method is to add an RC filter circuit at all subsequent tap points based on the reference voltage, and filter overshoot spikes of the reference voltage by reasonably setting a time constant of the RC filter circuit, but the RC filter circuit generally consumes a larger chip area, and the problem that the overshoot voltage recovery speed is slower cannot be solved.
Disclosure of Invention
The embodiment of the disclosure aims to provide a bandgap reference circuit with transient enhancement, which solves the problem of overshoot peak of reference voltage caused by sudden and instantaneous increase of power voltage through a transient response enhancement technology, reduces the overshoot amplitude of the reference voltage, and accelerates the overshoot recovery speed of the reference voltage.
In order to achieve the above object, a first aspect of the embodiments of the present disclosure provides a bandgap reference circuit with transient enhancement, including: the device comprises a pre-voltage stabilizing circuit, a band-gap reference core circuit, a frequency compensation circuit and a filter circuit. Wherein the pre-regulator circuit is configured to generate a clamped secondary supply voltage when the supply voltage transiently increases and to provide the clamped secondary supply voltage to the bandgap reference core circuit via a first node; the bandgap reference core circuit is configured to output a corresponding reference voltage according to the clamped secondary supply voltage; the frequency compensation circuit is configured to provide frequency compensation to the bandgap reference core circuit and the pre-regulation circuit via a second node; the filtering circuit is configured to filter the bandgap reference core circuit via the first node.
In some embodiments of the present disclosure, the pre-voltage regulation circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. A control electrode of the first transistor is coupled to a third voltage terminal, a first electrode of the first transistor is coupled to a first voltage terminal, and a second electrode of the first transistor is coupled to a control electrode of the second transistor; a first pole of the second transistor is coupled to the first voltage terminal, and a second pole of the second transistor is coupled to the first node; a control electrode of the third transistor is coupled to the second node, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to a control electrode of the fourth transistor and a control electrode of the second transistor; a first pole of the fourth transistor is coupled to the first node, and a second pole of the fourth transistor is coupled to a second voltage terminal; a control electrode of the fifth transistor is coupled to a fourth voltage terminal, a first electrode of the fifth transistor is coupled to a control electrode of the second transistor, and a second electrode of the fifth transistor is coupled to the second voltage terminal.
In some embodiments of the present disclosure, the bandgap reference core circuit comprises: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a first resistor, a second resistor, a third resistor, and a fourth resistor. A control electrode of the sixth transistor is coupled to the control electrode of the seventh transistor, a first electrode of the sixth transistor is coupled to the first node, and a second electrode of the sixth transistor is coupled to the first electrode of the eighth transistor; a first pole of the seventh transistor is coupled to the first node, and a second pole of the seventh transistor is coupled to a first pole of a ninth transistor; a control electrode of the eighth transistor is coupled to the fifth voltage terminal, and a second electrode of the eighth transistor is coupled to the first electrode of the tenth transistor and the control electrode of the sixth transistor; a control electrode of the ninth transistor is coupled to the fifth voltage terminal, and a second electrode of the ninth transistor is coupled to the second node; a control electrode of the tenth transistor is coupled to the fourth voltage terminal, and a second electrode of the tenth transistor is coupled to the second voltage terminal; a control electrode of the eleventh transistor is coupled to the fourth voltage terminal, a first electrode of the eleventh transistor is coupled to the second node, and a second electrode of the eleventh transistor is coupled to the second voltage terminal; a control electrode of the twelfth transistor is coupled to the output end of the reference voltage, a first electrode of the twelfth transistor is coupled to a second electrode of the sixth transistor, and a second electrode of the twelfth transistor is coupled to the first end of the first resistor; a control electrode of the thirteenth transistor is coupled to the output end of the reference voltage, a first electrode of the thirteenth transistor is coupled to the second electrode of the seventh transistor, and a second electrode of the thirteenth transistor is coupled to the first end of the second resistor; a second end of the first resistor is coupled to a first end of the second resistor; a second end of the second resistor is coupled to the second voltage end; a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to an output end of the reference voltage; a first terminal of the fourth resistor is coupled to the output terminal of the reference voltage, and a second terminal of the fourth resistor is coupled to the second voltage terminal.
In some embodiments of the present disclosure, the frequency compensation circuit includes: a first capacitor. The first end of the first capacitor is coupled to the second node, and the second end of the first capacitor is coupled to the second voltage end.
In some embodiments of the present disclosure, the filter circuit includes: a second capacitance. The first end of the second capacitor is coupled to the first node, and the second end of the second capacitor is coupled to the second voltage end.
In some embodiments of the disclosure, the third voltage terminal and the fourth voltage terminal are respectively coupled to a first constant voltage source and a second constant voltage source.
In some embodiments of the present disclosure, the fourth voltage terminal and the fifth voltage terminal are respectively coupled to a second constant voltage source and a third constant voltage source.
In some embodiments of the present disclosure, the first transistor, the second transistor, and the third transistor are PMOS transistors, and the fourth transistor and the fifth transistor are NMOS transistors.
In some embodiments of the present disclosure, the sixth transistor, the seventh transistor, the eighth transistor, and the ninth transistor are PMOS transistors, the tenth transistor and the eleventh transistor are NMOS transistors, and the twelfth transistor and the thirteenth transistor are NPN bipolar transistors.
A second aspect of the embodiments of the present disclosure provides a bandgap reference circuit with transient enhancement, including: first to thirteenth transistors, first to fourth resistors, a first capacitance, and a second capacitance. A control electrode of the first transistor is coupled to a third voltage terminal, a first electrode of the first transistor is coupled to a first voltage terminal, and a second electrode of the first transistor is coupled to a control electrode of the second transistor; a first pole of the second transistor is coupled to the first voltage terminal, and a second pole of the second transistor is coupled to the first node; a control electrode of the third transistor is coupled to the second node, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to a control electrode of the fourth transistor and a control electrode of the second transistor; a first pole of the fourth transistor is coupled to the first node, and a second pole of the fourth transistor is coupled to a second voltage terminal; a control electrode of the fifth transistor is coupled to a fourth voltage terminal, a first electrode of the fifth transistor is coupled to a control electrode of the second transistor, and a second electrode of the fifth transistor is coupled to the second voltage terminal; a control electrode of the sixth transistor is coupled to the control electrode of the seventh transistor, a first electrode of the sixth transistor is coupled to the first node, and a second electrode of the sixth transistor is coupled to the first electrode of the eighth transistor; a first pole of the seventh transistor is coupled to the first node, and a second pole of the seventh transistor is coupled to a first pole of a ninth transistor; a control electrode of the eighth transistor is coupled to the fifth voltage terminal, and a second electrode of the eighth transistor is coupled to the first electrode of the tenth transistor and the control electrode of the sixth transistor; a control electrode of the ninth transistor is coupled to the fifth voltage terminal, and a second electrode of the ninth transistor is coupled to the second node; a control electrode of the tenth transistor is coupled to the fourth voltage terminal, and a second electrode of the tenth transistor is coupled to the second voltage terminal; a control electrode of the eleventh transistor is coupled to the fourth voltage terminal, a first electrode of the eleventh transistor is coupled to the second node, and a second electrode of the eleventh transistor is coupled to the second voltage terminal; a control electrode of the twelfth transistor is coupled to the output end of the reference voltage, a first electrode of the twelfth transistor is coupled to a second electrode of the sixth transistor, and a second electrode of the twelfth transistor is coupled to the first end of the first resistor; a control electrode of the thirteenth transistor is coupled to the output end of the reference voltage, a first electrode of the thirteenth transistor is coupled to the second electrode of the seventh transistor, and a second electrode of the thirteenth transistor is coupled to the first end of the second resistor; a second end of the first resistor is coupled to a first end of the second resistor; a second end of the second resistor is coupled to the second voltage end; a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to an output end of the reference voltage; a first end of the fourth resistor is coupled to the output end of the reference voltage, and a second end of the fourth resistor is coupled to the second voltage end; a first end of the first capacitor is coupled to the second node, and a second end of the first capacitor is coupled to the second voltage end; a first end of the second capacitor is coupled to the first node, and a second end of the second capacitor is coupled to the second voltage terminal.
Through the technical scheme, the transient response enhancement technology is adopted, the problem of overshoot peak of the reference voltage caused by sudden and instant increase of the power supply voltage is solved, the overshoot amplitude of the reference voltage is reduced, and the overshoot recovery speed of the reference voltage is accelerated.
Additional features and advantages of embodiments of the present disclosure will be described in detail in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the detailed description serve to explain the embodiments of the disclosure, but are not intended to limit the embodiments of the disclosure. In the drawings:
FIG. 1 is an exemplary circuit diagram of a bandgap reference circuit;
fig. 2 is a schematic block diagram of a bandgap reference circuit 200 with transient enhancement according to an embodiment of the present disclosure;
fig. 3 is an exemplary circuit diagram of a bandgap reference circuit 200 with transient enhancement according to an embodiment of the present disclosure.
The elements in the drawings are schematic and not drawn to scale.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described below in detail and completely with reference to the accompanying drawings. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are also within the scope of protection of the disclosure.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the presently disclosed subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together either directly or joined through one or more intermediate components.
In all embodiments of the present disclosure, since the source and the drain of the fet are symmetrical and the on-currents between the source and the drain of the N-type fet and the P-type fet are opposite in direction, in embodiments of the present disclosure, the controlled middle terminal of the fet is referred to as a control electrode, and the remaining two terminals of the fet are referred to as a first electrode and a second electrode, respectively. In addition, terms such as "first" and "second" are only used to distinguish one element (or a portion of an element) from another element (or another portion of an element).
Fig. 1 shows an exemplary circuit diagram of a bandgap reference circuit 100. In the example of fig. 1, when the power supply voltage VIN suddenly increases, the current flowing through the PMOS transistor Mp2 is larger than the current flowing through the PMOS transistor Mp5, the current difference between the two currents charges the capacitor C1 quickly, the voltage of the secondary power supply VREG increases instantaneously, the reference voltage VBG instantaneously overshoots under the action of the voltage dividing resistors Rf1 and Rf2, and due to the action of the large capacitor C1, the overshoot voltage on the capacitor C1 needs to be discharged to a normal value in the subsequent recovery process, but in the low power consumption design, the normal static current is small, so the discharge speed of the capacitor C1 is slow, and when the bandgap reference circuit shown in fig. 1 generates the transient response of the power supply voltage, the overshoot voltage is high and the recovery speed is slow.
Embodiments of the present disclosure provide a bandgap reference circuit with transient enhancement. The circuit solves the problem of overshoot peak of the reference voltage caused by sudden and instant increase of the power supply voltage through a transient response enhancement technology, reduces the overshoot amplitude of the reference voltage, and accelerates the overshoot recovery speed of the reference voltage. Fig. 2 shows a schematic block diagram of a bandgap reference circuit 200 with transient enhancement according to an embodiment of the present disclosure. As shown in fig. 2, a bandgap reference circuit 200 with transient enhancement may include: a pre-regulation circuit 210, a bandgap reference core circuit 220, a frequency compensation circuit 230, and a filter circuit 240.
The pre-regulation circuit 210 may be coupled to the bandgap reference core circuit 220, the frequency compensation circuit 230, the filter circuit 240, the first voltage terminal V1, the second voltage terminal V2, the third voltage terminal V3, and the fourth voltage terminal V4. The pre-regulation circuit 210 may be configured to produce a clamped secondary supply voltage V when the supply voltage increases transiently REG And provides the clamped secondary power supply voltage V to the bandgap reference core circuit 220 via a first node N1 REG 。
The bandgap reference core circuit 220 may be coupled to the pre-voltage regulator circuit 210, the frequency compensation circuit 230, the filter circuit 240, the second voltage terminal V2, the fourth voltage terminal V4, the fifth voltage terminal V5, and the output terminal V of the reference voltage BG . The bandgap reference core circuit 220 may be configured to output a corresponding reference voltage V according to the clamped secondary supply voltage BG 。
The frequency compensation circuit 230 may be coupled to the pre-voltage regulation circuit 210, the bandgap reference core circuit 220 and the second voltage terminal V2. The frequency compensation circuit 230 may be configured to provide frequency compensation to the bandgap reference core circuit and the pre-regulation circuit via the second node N2, ensuring stability of the circuit under various conditions.
The filter circuit 240 may be coupled to the pre-voltage regulation circuit 210, the bandgap reference core circuit 220 and the second voltage terminal V2. The filtering circuit 240 may be configured to filter the bandgap reference core circuit 220 via the first node N1.
According to the band gap reference circuit with transient enhancement, through a transient response enhancement technology, when the power supply voltage is increased in a transient state, a clamped secondary power supply voltage is generated, so that the reference voltage response speed is higher, and the overshoot amplitude is smaller.
Fig. 3 illustrates an exemplary circuit diagram of a bandgap reference circuit 200 with transient enhancement according to an embodiment of the present disclosure. As shown in FIG. 3, the pre-voltage regulation circuit 210 may include: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, and a fifth transistor M5. The control electrode of the first transistor M1 is coupled to the third voltage terminal V3, the first electrode of the first transistor M1 is coupled to the first voltage terminal V1, and the second electrode of the first transistor M1 is coupled to the control electrode of the second transistor M2. A first pole of the second transistor M2 is coupled to the first voltage terminal V1, and a second pole of the second transistor M2 is coupled to the first node N1. A control electrode of the third transistor M3 is coupled to the second node N2, a first electrode of the third transistor M3 is coupled to the first node N1, and a second electrode of the third transistor M3 is coupled to a control electrode of the fourth transistor M4 and a control electrode of the second transistor M2. A first pole of the fourth transistor M4 is coupled to the first node N1, and a second pole of the fourth transistor M4 is coupled to the second voltage terminal V2. A control electrode of the fifth transistor M5 is coupled to the fourth voltage terminal V4, a first electrode of the fifth transistor M5 is coupled to the control electrode of the second transistor M2, and a second electrode of the fifth transistor M5 is coupled to the second voltage terminal V2.
The bandgap reference core circuit 220 may include: a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor Q12, a thirteenth transistor Q13, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. A control electrode of the sixth transistor M6 is coupled to the control electrode of the seventh transistor M7, a first electrode of the sixth transistor M6 is coupled to the first node N1, and a second electrode of the sixth transistor M6 is coupled to a first electrode of the eighth transistor M8. A first pole of the seventh transistor M7 is coupled to the first node N1, and a second pole of the seventh transistor M7 is coupled to a first pole of a ninth transistor M9. A control electrode of the eighth transistor M8 is coupled to the fifth voltage terminal V5, and a second electrode of the eighth transistor M8 is coupled to a first electrode of the tenth transistor M10 and a control electrode of the sixth transistor M6. A control electrode of the ninth transistor M9 is coupled to the fifth voltage terminal V5, and a second electrode of the ninth transistor M9 is coupled to the second node N2. A control electrode of the tenth transistor M10 is coupled to the fourth voltage terminal V4, and a second electrode of the tenth transistor M10 is coupled to the second voltage terminal V2. A control electrode of the eleventh transistor M11 is coupled to the fourth voltage terminal V4, a first electrode of the eleventh transistor M11 is coupled to the second node N2, and a second electrode of the eleventh transistor M11 is coupled to the second voltage terminal V2. A control electrode of the twelfth transistor Q12 is coupled to the output end V of the reference voltage BG A first pole of the twelfth transistor Q12 is coupled to a second pole of the sixth transistor M6, and a second pole of the twelfth transistor Q12 is coupled to the first end of the first resistor R1. A control electrode of the thirteenth transistor Q13 is coupled to the output end V of the reference voltage BG A first pole of the thirteenth transistor Q13 is coupled to the second pole of the seventh transistor M7, and a second pole of the thirteenth transistor Q13 is coupled to the first end of the second resistor R2. The second end of the first resistor R1 is coupled to the first end of the second resistor R2. A second end of the second resistor R2 is coupled to the second voltage terminal V2. A first end of the third resistor R3 is coupled to the first node N1, theThe second terminal of the third resistor R3 is coupled to the output terminal V of the reference voltage BG . A first end of the fourth resistor R4 is coupled to the output end V of the reference voltage BG A second end of the fourth resistor R4 is coupled to the second voltage terminal V2.
The frequency compensation circuit 230 may include: a first capacitor C1. A first end of the first capacitor C1 is coupled to the second node N2, and a second end of the first capacitor C1 is coupled to a second voltage terminal V2.
The filter circuit 240 may include: a second capacitor C2. A first end of the second capacitor C2 is coupled to the first node N1, and a second end of the second capacitor C2 is coupled to a second voltage terminal V2.
In the example of fig. 3, a power voltage is input from a first voltage terminal V1, a second voltage terminal V2 is grounded, a third voltage terminal V3 is coupled to a first constant voltage source, a fourth voltage terminal V4 is coupled to a second constant voltage source, and a fifth voltage terminal V5 is coupled to a third constant voltage source. The first constant voltage source is a fixed voltage source which is 800mV lower than a power supply voltage, the second constant voltage source is a fixed voltage source which is 800mV higher than a ground voltage, and the third constant voltage source is a fixed voltage source which is 800mV or 900mV lower than a secondary power supply voltage. The first transistor M1, the second transistor M2, the third transistor M3, and the sixth to ninth transistors M6 to M9 are all PMOS transistors. The fourth transistor M4, the fifth transistor M5, the tenth transistor M10, and the eleventh transistor M11 are all NMOS transistors. The twelfth transistor Q12 and the thirteenth transistor Q13 are both NPN bipolar transistors. Those skilled in the art will appreciate that variations to the circuit shown in fig. 3 based on the above inventive concepts are intended to fall within the scope of the present disclosure. In this modification, the above-described transistor and voltage terminal may also have different arrangements from the example shown in fig. 3.
The operation of the over-temperature protection circuit 200 according to the embodiment of the disclosure is described below with reference to the example of fig. 3.
The second transistor M2, the third transistor M3 and the fourth transistor M4 in the pre-voltage regulation circuit 210 form a transient response enhancement circuit, which is also a negative feedback clamp circuit. When the power supply voltage input by the first voltage terminal V1 is increased transientlyThe sum of the current flowing through the second transistor M1 and the current flowing through the third transistor M3 is greater than the current flowing through the fifth transistor M5, the voltage at the node a is raised, the NMOS transistor M4 is turned on, and the excessive current is drained through the fourth transistor M4, i.e., the increased amount of current in the second transistor M2 is clamped to the current value of the fourth transistor M4, thereby limiting the charging current of the second capacitor C2 at the moment of overshoot. Meanwhile, after the fourth transistor M4 is turned on, the secondary power voltage V may be applied to the first node N1 REG The overshoot voltage that has occurred is discharged in an accelerated manner, and the reference voltage V is finally reduced BG The upward stroke amplitude of the piston is increased, and the upward stroke recovery speed is increased.
In summary, according to the bandgap reference circuit with transient enhancement according to the embodiment of the disclosure, a transient response enhancement circuit is formed by adding a transistor, and at the moment when the power voltage suddenly increases, the reference voltage is pulled down through negative feedback to reduce the rising amplitude thereof, so that the circuit structure is simple.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus and methods according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
As used herein and in the appended claims, the singular forms of words include the plural and vice versa, unless the context clearly dictates otherwise. Thus, when reference is made to the singular, it is generally intended to include the plural of the corresponding term. Similarly, the terms "comprising" and "including" are to be construed as being inclusive rather than exclusive. Likewise, the terms "include" and "or" should be construed as inclusive unless such an interpretation is explicitly prohibited herein. Where the term "example" is used herein, particularly when it comes after a set of terms, it is merely exemplary and illustrative and should not be considered exclusive or extensive.
Further aspects and ranges of adaptability will become apparent from the description provided herein. It should be understood that various aspects of the present application may be implemented alone or in combination with one or more other aspects. It should also be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.
Several embodiments of the present disclosure have been described in detail above, but it is apparent that various modifications and variations can be made to the embodiments of the present disclosure by those skilled in the art without departing from the spirit and scope of the present disclosure. The scope of the present disclosure is defined by the appended claims.
Claims (10)
1. A bandgap reference circuit with transient enhancement, comprising: a pre-voltage stabilizing circuit, a band-gap reference core circuit, a frequency compensation circuit and a filter circuit,
wherein the pre-regulator circuit is configured to generate a clamped secondary supply voltage when the supply voltage transiently increases and to provide the clamped secondary supply voltage to the bandgap reference core circuit via a first node;
the bandgap reference core circuit is configured to output a corresponding reference voltage according to the clamped secondary supply voltage;
the frequency compensation circuit is configured to provide frequency compensation to the bandgap reference core circuit and the pre-regulation circuit via a second node;
the filtering circuit is configured to filter the bandgap reference core circuit via the first node.
2. The bandgap reference circuit with transient enhancement of claim 1, wherein the pre-regulator circuit comprises: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor,
a control electrode of the first transistor is coupled to a third voltage terminal, a first electrode of the first transistor is coupled to a first voltage terminal, and a second electrode of the first transistor is coupled to a control electrode of the second transistor;
a first pole of the second transistor is coupled to the first voltage terminal, and a second pole of the second transistor is coupled to the first node;
a control electrode of the third transistor is coupled to the second node, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to a control electrode of the fourth transistor and a control electrode of the second transistor;
a first pole of the fourth transistor is coupled to the first node, and a second pole of the fourth transistor is coupled to a second voltage terminal;
a control electrode of the fifth transistor is coupled to a fourth voltage terminal, a first electrode of the fifth transistor is coupled to a control electrode of the second transistor, and a second electrode of the fifth transistor is coupled to the second voltage terminal.
3. The bandgap reference circuit with transient enhancement of claim 1, wherein the bandgap reference core circuit comprises: a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a first resistor, a second resistor, a third resistor, and a fourth resistor,
a control electrode of the sixth transistor is coupled to the control electrode of the seventh transistor, a first electrode of the sixth transistor is coupled to the first node, and a second electrode of the sixth transistor is coupled to the first electrode of the eighth transistor;
a first pole of the seventh transistor is coupled to the first node, and a second pole of the seventh transistor is coupled to a first pole of a ninth transistor;
a control electrode of the eighth transistor is coupled to a fifth voltage terminal, and a second electrode of the eighth transistor is coupled to a first electrode of the tenth transistor and a control electrode of the sixth transistor;
a control electrode of the ninth transistor is coupled to the fifth voltage terminal, and a second electrode of the ninth transistor is coupled to the second node;
a control electrode of the tenth transistor is coupled to the fourth voltage terminal, and a second electrode of the tenth transistor is coupled to the second voltage terminal;
a control electrode of the eleventh transistor is coupled to the fourth voltage terminal, a first electrode of the eleventh transistor is coupled to the second node, and a second electrode of the eleventh transistor is coupled to the second voltage terminal;
a control electrode of the twelfth transistor is coupled to the output end of the reference voltage, a first electrode of the twelfth transistor is coupled to a second electrode of the sixth transistor, and a second electrode of the twelfth transistor is coupled to the first end of the first resistor;
a control electrode of the thirteenth transistor is coupled to the output end of the reference voltage, a first electrode of the thirteenth transistor is coupled to the second electrode of the seventh transistor, and a second electrode of the thirteenth transistor is coupled to the first end of the second resistor;
a second end of the first resistor is coupled to a first end of the second resistor;
a second end of the second resistor is coupled to the second voltage end;
a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to an output end of the reference voltage;
a first terminal of the fourth resistor is coupled to the output terminal of the reference voltage, and a second terminal of the fourth resistor is coupled to the second voltage terminal.
4. The bandgap reference circuit with transient enhancement of claim 1, wherein the frequency compensation circuit comprises: a first capacitor for storing the first voltage and the second voltage,
the first end of the first capacitor is coupled to the second node, and the second end of the first capacitor is coupled to the second voltage end.
5. The bandgap reference circuit with transient enhancement of claim 1, wherein the filtering circuit comprises: the second capacitance is set to be a second capacitance,
a first end of the second capacitor is coupled to the first node, and a second end of the second capacitor is coupled to a second voltage end.
6. The bandgap reference circuit with transient enhancement according to claim 2, wherein the third voltage terminal and the fourth voltage terminal are respectively coupled to a first constant voltage source and a second constant voltage source.
7. The bandgap reference circuit with transient enhancement according to claim 3, wherein the fourth voltage terminal and the fifth voltage terminal are respectively coupled to a second constant voltage source and a third constant voltage source.
8. The bandgap reference circuit with transient enhancement of claim 2, wherein the first, second and third transistors are PMOS transistors and the fourth and fifth transistors are NMOS transistors.
9. The bandgap reference circuit according to claim 3, wherein the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor are PMOS transistors, the tenth transistor and the eleventh transistor are NMOS transistors, and the twelfth transistor and the thirteenth transistor are NPN bipolar transistors.
10. A bandgap reference circuit with transient enhancement, comprising: first to thirteenth transistors, first to fourth resistors, a first capacitance and a second capacitance,
a control electrode of the first transistor is coupled to a third voltage terminal, a first electrode of the first transistor is coupled to a first voltage terminal, and a second electrode of the first transistor is coupled to a control electrode of the second transistor;
a first pole of the second transistor is coupled to the first voltage terminal, and a second pole of the second transistor is coupled to the first node;
a control electrode of the third transistor is coupled to the second node, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to a control electrode of the fourth transistor and a control electrode of the second transistor;
a first pole of the fourth transistor is coupled to the first node, and a second pole of the fourth transistor is coupled to a second voltage terminal;
a control electrode of the fifth transistor is coupled to a fourth voltage terminal, a first electrode of the fifth transistor is coupled to a control electrode of the second transistor, and a second electrode of the fifth transistor is coupled to the second voltage terminal;
a control electrode of the sixth transistor is coupled to the control electrode of the seventh transistor, a first electrode of the sixth transistor is coupled to the first node, and a second electrode of the sixth transistor is coupled to the first electrode of the eighth transistor;
a first pole of the seventh transistor is coupled to the first node, and a second pole of the seventh transistor is coupled to a first pole of a ninth transistor;
a control electrode of the eighth transistor is coupled to a fifth voltage terminal, and a second electrode of the eighth transistor is coupled to a first electrode of the tenth transistor and a control electrode of the sixth transistor;
a control electrode of the ninth transistor is coupled to the fifth voltage terminal, and a second electrode of the ninth transistor is coupled to the second node;
a control electrode of the tenth transistor is coupled to the fourth voltage terminal, and a second electrode of the tenth transistor is coupled to the second voltage terminal;
a control electrode of the eleventh transistor is coupled to the fourth voltage terminal, a first electrode of the eleventh transistor is coupled to the second node, and a second electrode of the eleventh transistor is coupled to the second voltage terminal;
a control electrode of the twelfth transistor is coupled to the output end of the reference voltage, a first electrode of the twelfth transistor is coupled to a second electrode of the sixth transistor, and a second electrode of the twelfth transistor is coupled to the first end of the first resistor;
a control electrode of the thirteenth transistor is coupled to the output end of the reference voltage, a first electrode of the thirteenth transistor is coupled to the second electrode of the seventh transistor, and a second electrode of the thirteenth transistor is coupled to the first end of the second resistor;
a second end of the first resistor is coupled to a first end of the second resistor;
a second end of the second resistor is coupled to the second voltage end;
a first end of the third resistor is coupled to the first node, and a second end of the third resistor is coupled to an output end of the reference voltage;
a first end of the fourth resistor is coupled to the output end of the reference voltage, and a second end of the fourth resistor is coupled to the second voltage end;
a first end of the first capacitor is coupled to the second node, and a second end of the first capacitor is coupled to the second voltage end;
a first end of the second capacitor is coupled to the first node, and a second end of the second capacitor is coupled to the second voltage terminal.
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| CN202210932171.2A CN115268546B (en) | 2022-08-04 | 2022-08-04 | Bandgap reference circuit with transient enhancement |
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| CN202210932171.2A CN115268546B (en) | 2022-08-04 | 2022-08-04 | Bandgap reference circuit with transient enhancement |
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| CN115268546A true CN115268546A (en) | 2022-11-01 |
| CN115268546B CN115268546B (en) | 2023-09-26 |
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| Publication number | Publication date |
|---|---|
| CN115268546B (en) | 2023-09-26 |
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