CN115246270B

CN115246270B - Chip and ink box

Info

Publication number: CN115246270B
Application number: CN202210006104.8A
Authority: CN
Inventors: 夏敬章
Original assignee: Zhuhai Ninestar Management Co Ltd
Current assignee: Zhuhai Ninestar Management Co Ltd
Priority date: 2017-10-12
Filing date: 2017-12-21
Publication date: 2024-03-12
Anticipated expiration: 2037-12-21
Also published as: CN107901611B; WO2019072010A1; EP3666527A4; JP2019073004A; CN207790032U; CN115246270A; JP2023052865A; JP7261553B2; EP3666527A1; EP3666527B1; CN107901611A; JP7442702B2

Abstract

The invention provides a chip and an ink box, wherein the chip is used for being mounted on the ink box, and the ink box is used for being mounted in a mounting part in a printer along a mounting direction; the chip comprises a memory, a first contact part and a second contact part, wherein the first contact part and the second contact part are used for installation detection; at least one second contact is electrically connected to the memory; the first contact portion and the second contact portion are respectively contacted with contact pins in the printer; the first contact parts are arranged in a plurality of rows in the installation direction; one or more rows of second contact portions are arranged between the rows of first contact portions in the mounting direction; alternatively, the plurality of rows of the second contact portions are arranged between the plurality of rows of the first contact portions. The first contact part and the second contact part are not arranged in the same row, the structure is beneficial to reducing the occurrence of burr waves caused by non-contact electromagnetic interference caused by the voltage difference between the first contact part and the second contact part, preventing the terminal from generating wrong data signals and ensuring the normal operation of the chip.

Description

Chip and ink box

The invention relates to a divisional application with the application number of 201711397088.5, the application date of 2017, 12 months and 21 days, and the invention name of chip and ink box.

Technical Field

The invention relates to the technical field of ink-jet printers, in particular to a chip and an ink box.

Background

With the continuous progress of science and technology, the printer industry is rapidly developed, the application of the inkjet printer is more and more widespread, and the ink box is already a consumable part of the inkjet printer. The ink box is internally provided with a chip, the chip for the ink box is used for storing information such as factory information, ink quantity information, ink box type information, ink color and the like, and the chip for the ink box plays a decisive role in normal operation of the ink-jet printer.

Fig. 1 is a schematic view of an ink cartridge 10 to be mounted to a mounting portion 90. Fig. 2 is a schematic diagram of a prior art chip 20. As shown in fig. 1 and 2, the mounting portion 90 is a component of the printer for carrying a plurality of or one ink cartridge 10, and the ink cartridge 10 is detachably mounted in the mounting portion 90 in the mounting direction P. The ink cartridge 10 includes a chip 20, a handle 30, an ink outlet 40, and a cartridge body 50. The mounting portion 90 has a stylus portion 91 and an ink supply portion 92. The ink is stored in the cartridge 50, and reaches the ink supply portion 92 through the ink outlet 40, so that the ink supply portion 92 can supply ink to the print head, and the ink can be used to perform printing. The chip 20 has thereon a terminal group 200, and the terminal group 200 can be in contact electrical connection with the contact pins 91a of the contact pin portion 91 for mutual transmission of electrical signals. The handle 30 is used to fix the ink cartridge 10 to the mounting portion 90, preventing the ink cartridge 10 from being detached from the mounting portion 90.

The chip 20 of the related art has a substrate 20a, a terminal group 200 provided on the substrate 20a, and a memory (not shown in the figure). The terminal group 200 includes 9 terminals 201 to 209,9 terminals divided into first terminals 201, 204, 205, 209 and second terminals 202, 203, 206 to 208. The first terminal is a terminal for performing mounting detection when the ink cartridge 10 is mounted to the mounting portion 90. The second terminal is a terminal other than the first terminal. At least a portion of the second terminals are for connection to a memory of the chip 20. Each of the 9 terminals 201 to 209 includes a contact portion 201a to 209a that makes contact with the contact pin 91 a. The 9 contact portions 201a to 209a are arranged in 2 rows (first row L1, second row L2) in the mounting direction P, and the 9 contact portions 201a to 209a are arranged offset from each other in the width direction T perpendicular to the mounting direction P. The contact portions 201a, 204a of the terminals 201, 204 in the first terminal and the second contact portions 202a, 203a of the terminals 202, 203 in the second terminal are provided in the first row L1, and the contact portions 201a, 204a are located at both ends in the width direction T of the first row L1, respectively; the contact portions 205a, 209a of the terminals 205, 209 in the first terminal and the second contact portions 206a-208a of the terminals 206-208 in the second terminal are provided in the second row L2, and the contact portions 205a, 209a are located at both ends in the width direction T of the second row L2, respectively.

In the prior art, for better mounting inspection, the input voltage of the first terminals 201, 204, 205, 209 is typically different from the input voltage of the second terminals 202, 203, 206-208. The electrical signal on each terminal is within a certain range, and the chip 20 can normally perform installation detection and signal transmission. A voltage difference between the first terminal and the second terminal (for example, a high voltage of 42V is input to the first terminal for installation detection, a low voltage of 3.3V is input to the second terminal connected to the memory), but the first terminal and the second terminal for installation detection are arranged in a manner as shown in fig. 2, so that the first terminal and the second terminal are too close to each other, a signal interference is caused between an installation detection signal on the first terminal and a signal on the second terminal, and a case where the interfered terminal is mistaken for a data signal may occur (for example, a case where a glitch occurs on the close terminal due to a high voltage of 42V on the first terminal may cause the terminal to be mistaken for the data signal). Signal interference between the terminals occurs between the first terminal and the second terminal, which may cause the terminals to generate erroneous data signals, resulting in the failure of the terminal set 200 of the chip 20.

Disclosure of Invention

The invention provides a chip and an ink box, which are used for solving the technical problem that signals between terminals are mutually interfered in the prior art.

A first aspect of an embodiment of the present invention provides a chip for mounting onto an ink cartridge for mounting into a mounting portion in a printer in a mounting direction; the chip comprises a memory, a first contact part and a second contact part, wherein the first contact part and the second contact part are used for installation detection; at least one of the second contact portions is electrically connected to the memory; the first contact portion and the second contact portion are respectively contacted with a contact pin in the printer;

the first contact parts are arranged in a plurality of rows in the mounting direction;

one or more rows of second contact portions are arranged between the rows of first contact portions in the mounting direction; alternatively, a plurality of rows of the second contact portions are arranged between a plurality of rows of the first contact portions.

Optionally, the first contact portion includes: a first set of interconnected mounting and detecting contacts, a second set of interconnected mounting and detecting contacts; the first set of mounting detection contact portions and the second set of mounting detection contact portions are arranged in a plurality of rows in the mounting direction.

Optionally, the first set of mounting detection contacts form a first row in the mounting direction; the second set of mounting detection contacts forming a second row in the mounting direction; one or more rows of the second contact portions are disposed between the first row and the second row.

Optionally, the first set of installation detection contact parts are connected by a wire, and the second set of installation detection contact parts are connected by a resistor; the second set of mounting detection contacts is applied with a higher voltage than the first set of mounting detection contacts.

Optionally, the second contact portion includes a ground contact portion that is not connected to the memory; the memory also comprises a power supply contact part, a data contact part and a reset contact part which are connected with the memory.

Optionally, the chip includes: a plurality of first terminals, a plurality of second terminals; the plurality of first contact portions are provided on the plurality of first terminals, and the plurality of second contact portions are provided on the plurality of second terminals.

Optionally, the chip includes: a plurality of first terminals, a plurality of second terminals; in the mounting direction, one or more rows of second terminals are arranged between the rows of first terminals.

Optionally, the first contact portion forms a plurality of rows spaced from one or more rows of the second contact portion.

Optionally, in the mounting direction, the rows of the first contact portions and the rows of the second contact portions are spaced one by one.

Optionally, in the installation direction, the first contact portion forms a first row and a second row; the second contact parts form a third row and a fourth row; the first row and the second row are mutually spaced one by one from the third row and the fourth row.

Optionally, the second row is closer to a front end side in the mounting direction than the third row and the fourth row.

Optionally, the fourth row is closer to a front end side in the mounting direction than the first row and the second row.

Optionally, the chip includes a first portion and a second portion; the first part and the second part are manufactured by two circuit substrates.

Optionally, the first portion and the second portion are made of substrates of different materials; the second portion is made of conductive silicone or conductive metal material.

Optionally, the second contact portion is disposed on the first portion, and the first contact portion is disposed on the second portion.

Optionally, the chip further comprises a through part; the through portion penetrates the chip in a thickness direction of the chip.

Optionally, the chip further comprises a substrate, and the first contact portion protrudes with respect to the substrate compared to the second contact portion.

Optionally, the first portion is provided with a terminal hole, through which a terminal provided with a contact portion on the second portion passes and protrudes with respect to the first portion.

Optionally, in the installation direction, the first contact portion forms a first row and a second row; the second contact parts form a third row and a fourth row; the first row and the second row are arranged between the third row and the fourth row.

Optionally, in a direction perpendicular to the mounting direction, the second set of mounting detection contacts is outermost of all contacts, and the first set of mounting detection contacts is next to all contacts.

Optionally, the first contact portion is located at a front end of the mounting direction compared to the second contact portion; the front end is a downstream side in the mounting direction.

Optionally, a distance between each first contact portion, each second contact portion, and each first contact portion and each second contact portion is greater than or equal to a preset distance threshold.

In a second aspect, an ink cartridge is provided that includes any of the above-described chips. After adopting above-mentioned technical scheme, beneficial effect is: one or more rows of second contact portions are arranged between the rows of first contact portions in the mounting direction; the multi-row formed by the first contact parts is arranged among the multi-row formed by the second contact parts, namely, the first contact parts and the second contact parts are not arranged in the same row, and the structure is beneficial to reducing the occurrence of burr waves caused by non-contact electromagnetic interference caused by the voltage difference between the first contact parts and the second contact parts, preventing the terminal from generating wrong data signals and ensuring the normal operation of the chip.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic view of an ink cartridge to be mounted to a mounting portion;

FIG. 2 is a schematic diagram of a prior art chip;

FIG. 3 is a schematic diagram of a chip according to a first embodiment;

FIG. 4 is a schematic diagram of an on-chip contact according to a second embodiment;

FIG. 5 is a schematic diagram of a first chip according to a second embodiment;

FIG. 6 is a schematic diagram of a first chip according to a second embodiment;

fig. 7a and 7b are chip configuration diagrams of a first embodiment of a second embodiment;

fig. 8 is a chip configuration diagram of a second embodiment of the second embodiment;

FIG. 9 is a schematic diagram of an on-chip contact of a third embodiment;

fig. 10 is a chip configuration diagram of a first embodiment of a third embodiment;

fig. 11 is a chip configuration diagram of a second embodiment of a third embodiment;

fig. 12 is a chip configuration diagram of a third embodiment of the third embodiment;

fig. 13a and 13b are chip configuration diagrams of a fourth embodiment of a third embodiment;

fig. 14a and 14b are chip configuration diagrams of a fifth embodiment of a third embodiment;

FIG. 15 is a schematic diagram of a chip according to a fourth embodiment;

fig. 16 is a chip configuration diagram of a first embodiment of a fourth embodiment;

fig. 17 is a chip configuration diagram of a second embodiment of the fourth embodiment.

Detailed Description

For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.

It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Embodiment one:

fig. 1 is a schematic view of an ink cartridge 10 to be mounted to a mounting portion 90. As shown in fig. 1, the mounting portion 90 is a component of the printer for carrying a plurality of or one ink cartridge 10, and the ink cartridge 10 is detachably mounted in the mounting portion 90 in the mounting direction P. The ink cartridge 10 has a chip 20 mounted thereon. The ink cartridge 10 includes a chip 20, a handle 30, an ink outlet 40, and a cartridge body 50. The mounting portion 90 has a stylus portion 91 and an ink supply portion 92. The ink is stored in the cartridge 50, and reaches the ink supply portion 92 through the ink outlet 40, so that the ink supply portion 92 can supply ink to the print head, and the ink can be used to perform printing. The chip 20 has thereon a terminal group 200, and the terminal group 200 can be electrically connected with the contact pins 91a of the contact pin portion 91 for mutual transmission of electric signals. The handle 30 is used to fix the ink cartridge 10 to the mounting portion 90, preventing the ink cartridge 10 from being detached from the mounting portion 90.

Fig. 3 is a schematic diagram of a chip according to the first embodiment. As shown in fig. 1 and 3, the chip 20 has therein a substrate 20a, a terminal group 200 provided on the substrate 20a, and a memory (not shown in the drawings). Alternatively, the chip may include a terminal set 200 including 9 terminals 201-209,9 divided into first terminals 201, 204, 205, 209, second terminals 202, 203, 206-208; the first terminal is a terminal for performing mounting detection when the ink cartridge 10 is mounted to the mounting portion 90, the second terminal is a terminal other than the first terminal, and at least a part of the second terminal is a terminal for connection with the memory of the chip 20. Each of the 9 terminals 201-209 includes a contact portion 201a-209a that makes contact with the contact pin 91 a. First contact portions 201a, 204a, 205a, 209a are provided on the first terminals 201, 204, 205, 209, and second contact portions (contact portions not shown in the figure) are provided on the second terminals 202, 203, 206-208. Wherein the first contact portions are arranged in a plurality of rows in the mounting direction P, i.e. the first contact portions 201a, 204a, 205a, 209a form rows L11, L12. The second contact portions on the second terminals 202, 203, 206-208 are arranged in a row in the mounting direction P, forming a row L21; the second contact portions on the second terminals 202, 203, 206-208 may also be arranged in a plurality of rows, and fig. 3 is only illustrated in the case where the second contact portions are arranged in one row L21. The rows L21, L11, L12 are arranged at intervals in the mounting direction P, that is, the rows L21, L11, L12 are not in the same row in the mounting direction P, and the row L21 is located between the rows L11, L12, where in the mounting direction P, the second contact portion L21 may be located between the rows L11, L12 formed by the first contact portion, as shown in fig. 3, or between the rows L11, L12 formed by the second contact portion, as shown in fig. 15. In either of the arrangements shown in fig. 3 or 15, one or more rows of the second contact portions are provided between the rows of the first contact portions in the mounting direction P; or, the structure of the multiple rows formed by the first contact parts is arranged among the multiple rows formed by the second contact parts, which is favorable for reducing the occurrence of burr waves caused by non-contact electromagnetic interference caused by the voltage difference between the first contact parts and the second contact parts, preventing the terminal from generating wrong data signals and ensuring the normal operation of the chip.

Alternatively, the first contact portions 201a, 204a, 205a, 209a may include: a first group of mutually connected mounting detection contact portions 200a (201 a, 204 a), a second group of mutually connected mounting detection contact portions 200b (205 a, 209 a); the first group of attachment detection contact portions 200a (201 a, 204 a) and the second group of attachment detection contact portions 200b (205 a, 209 a) are arranged in a plurality of rows in the attachment direction P; specifically, as shown in fig. 3, the first group of mounting detection contact portions 200a (201 a, 204 a) form a first row L11 in the mounting direction; the second group of mounting detection contact portions 200b (205 a, 209 a) form a second row L12 in the mounting direction P; one row (L21) or a plurality of rows of second contact portions (contact portions shown on second terminals 202, 203, 206-208) are disposed between first row L11 and second row L12. In the above-described configuration, the first group of mounting detection contact portions 201a, 204a form the row L11, and the second group of mounting detection contact portions 205a, 209a form the row L12, so that the plurality of first contact portions are arranged in parallel in rows, which can make the terminal group 200 have a larger design space, thereby making it possible to perform arrangement layout on the substrate 20a better.

Alternatively, the first set of mounting detection contacts 200a (201 a, 204 a) are connected by wires and the second set of mounting detection contacts 200b (205 a, 209 a) are connected by resistors; the voltage applied to the second set of mounting detection contacts 200b (205 a, 209 a) is higher than the voltage applied to the first set of mounting detection contacts 200a (201 a, 204 a). The contact parts of different groups are connected into different working voltages, the installation detection contact parts of different groups are not in the same row, the arrangement mode of interval arrangement is adopted, the occurrence of burr waves caused by non-contact electromagnetic interference caused by voltage difference between the installation detection contact parts of different groups is further reduced, the occurrence of error data signals of terminals is prevented, and the normal operation of the chip is ensured. Taking fig. 3 as an example, the first terminals 201, 204, 205, 209 are divided into 2 groups at the time of installation detection, and the first installation detection terminal 201 and the second installation detection terminal 204 are the first group of installation detection terminals; the first contact portions 201a and 204a thereon are connected to each other to form a first group of mounting detection contact portions 200a; the third and fourth mounting detection terminals 205 and 209 are the second group of mounting detection terminals; the first contact portions 205a and 209a thereon are connected to each other to form a second set of mounting detection contact portions 200b. The first set of mounting detection terminals 201, 204 are at a voltage of 2.4V input by the printer, and the second set of mounting detection terminals 205, 209 are at a voltage of 42V input by the printer. The terminal of the second terminals 202, 203, 206-208 connected to the memory is inputted with 3.3V voltage by the printer to maintain the transmission of signals between the chip 20 and the printer. The first contact portion and the second contact portion form a row L11, a row L12, and a row L21. The rows L11, L12 and L21 are spaced apart in the mounting direction P, i.e. not in the same row, and are separated and independent. The structure is beneficial to reducing the occurrence of burr waves caused by non-contact electromagnetic interference caused by voltage differences among the first group of installation detection contact parts 200a, the second group of installation detection contact parts 200b and the second contact parts of different access voltages, and is also beneficial to preventing the situation that the terminals generate wrong data signals and ensuring the normal operation of the chip.

Optionally, the second contact (e.g., the contact shown on the second terminals 202, 203, 206-208) includes a ground contact (contact on terminal 207) that is not connected to a memory (not shown); also included are power contacts (contacts on terminal 206), data contacts (contacts on terminal 208), and reset contacts (contacts on terminal 202) that are connected to the memory.

Specifically, the roles and functions of the respective terminals in the terminal group 200 are as follows:

terminal 201: a first set of mounting detection terminals;

terminal 202: a reset terminal;

terminal 203: a clock terminal;

terminal 204: a first set of mounting detection terminals;

terminal 205: a second set of mounting detection terminals;

terminal 206: a power supply terminal;

terminal 207: a ground terminal;

terminal 208: a data terminal;

terminal 209: and a second set of mounting detection terminals.

Of the second terminals 202, 203, 206-208, the terminals 202, 203, 207, 208 are connected to a memory for transmitting electrical signals to and from the printer, operating at a voltage of 3.3V. Terminal 207 is a ground terminal and has a voltage of 0V. Terminal 207 is not connected to the memory. Those skilled in the art will appreciate that terminal 207 may be absent from terminal set 200.

Alternatively, the larger the voltage difference between the terminals is, the easier the voltage differences are to influence each other, the signal interference is easy to occur, the error signal is easy to occur to the terminals, and the terminals cannot work normally. Therefore, the voltage difference between the second group mounting detection terminals 205, 209 (to which 42V voltage is input) and the second terminal (to which 3.3V is input) is large, and the row L12 can be disposed on the front end side in the mounting direction P, that is, the outermost side of the terminal group 200. And the first group of mounting detection terminals 201, 204 (input 2.4V) having a small voltage difference from the second terminal are provided in the row L11. The input voltage of line L11 is 2.4V, the input voltage of line L21 is 3.3V, and the input voltage of line L12 is 42V, as seen in mounting direction P, with the voltages appearing in a low-to-high arrangement. That is, the multiple rows of the first contact portion and/or the second contact portion are arranged according to the connected voltage, so that the voltage difference between every two rows is as small as possible, the occurrence of burr waves caused by non-contact electromagnetic interference caused by the voltage difference is reduced, the situation that the terminal generates error data signals is prevented, and the chip is ensured to work normally.

Further, the arrangement of the first contact portions 201a, 204a, 205a, 209a in fig. 3 forms a quadrangle, and the second terminal or the second contact portion on the second terminal is disposed in the quadrangle surrounded by the first contact portions 201a, 204a, 205a, 209a, so that good contact between the second terminal and the contact pin can be ensured. Since the outermost periphery of the terminal group 200 is the first contact portion for mounting detection, if the chip 20 and the printer contact pin 91a complete mounting detection during the mounting of the ink cartridge 10, it is indicated that all the mounting detection terminals (first terminals) are connected in place, and all the positions within the polygon formed by the first contact portion are ensured that the contact is good. Further, the number of the first contact portions may be any number of 3 or more, so long as it is in line with the polygon formed by the second contact portions in the first contact portions, the beneficial effect can be achieved.

Alternatively, as shown in fig. 3, the row L12 formed by the first contact portions 205a, 209a of the first terminals 205, 209 is located at the front end of the mounting direction P, which is the downstream side of the mounting direction P, than the row L21 in which the second contact portions are located. This structure makes it possible to make the terminals of the row L12 contact the contact pins 91a first and then make the mounting detection and the second terminals of the row L21 contact the contact pins 91a first during the mounting of the ink cartridge 10 to the mounting portion 90, and therefore, the contact pins 91a contact the terminals for the mounting detection and then contact the terminals connected to the memory during the mounting, preventing the chip 20 from being mounted out of alignment or the terminals connected to the memory from being connected erroneously. Further, in the perpendicular direction T of the mounting direction P, the second set of mounting detection contact portions 200b is outermost of all contact portions, and the first set of mounting detection contact portions 200a is next-to-outside of all contact portions. As shown in fig. 3, the first contact portions 205a and 209a of the second set of mounting detection contact portions 200b are outermost in the vertical direction T, followed by the first contact portions 201a and 204a of the first set of mounting detection contact portions 200a, and the innermost is the second terminal 202, 203, 206-208 where the remaining second contact portions are located. By adopting the layout, the terminals (terminals 205 and 209 are input with 42V voltage) with the high voltage input can be arranged at the outermost side, the terminals (terminals 201 and 204 are input with 2.4V voltage) with the next highest voltage and the terminals (the second terminal is input with 3.3V voltage) with the lower input voltage at the innermost side, so that the voltage difference between the adjacent terminals is as small as possible, the non-contact electromagnetic interference caused by the voltage difference is reduced, the occurrence of burr waves caused by the non-contact electromagnetic interference is reduced, the situation that the terminals generate error data signals is prevented, and the normal operation of the chip is ensured.

Embodiment two:

fig. 4 is a schematic diagram of an on-chip contact portion according to the second embodiment. Fig. 5 is a schematic diagram of a first chip according to a second embodiment. Fig. 6 is a schematic diagram of a first chip according to a second embodiment. Fig. 4 omits terminals on the chip, showing only schematic views of the contacts. Fig. 5 and 6 are schematic diagrams of two chips, respectively. Fig. 7a and 7b are chip configuration diagrams of a first embodiment of a second embodiment. Fig. 8 is a chip configuration diagram of a second embodiment of the second embodiment. As shown in fig. 4 to 6, the first contact portions 201a, 204a, 205a, 209a of the first terminals 201, 204, 205, 209 form rows L11, L12. The second contact portions 202a, 203a, 206a-208a of the second terminals 202, 203, 206-208 form rows L21, L22 in the mounting direction P. One or more rows (rows L21, L22) of the second contact portions are arranged between the rows (rows L11, L12) of the first contact portions; alternatively, the multiple rows (the rows L11 and L12) formed by the first contact portions are arranged between the multiple rows (the rows L21 and L22) formed by the second contact portions, so that the beneficial effects of the present application can be still achieved.

Further, the plurality of rows (rows L11, L12) of the first contact portions and the plurality of rows (rows L21, L22) of the second contact portions are spaced one from another. That is, in the mounting direction P, the first contact portions form a first row L11, a second row L12; the second contact parts form a third row L21 and a fourth row L22; the first and second rows L11 and L12 are spaced from the third and fourth rows L21 and L22 one by one. So that the first contact portion and the second contact portion form a row L21, a row L11, a row L22, and a row L12 in this order. The structure enables the first terminal and the second terminal or the first contact part and the second contact part to be spaced one by one, so that the design space of the terminals is larger, the space between the terminals is increased, and the electromagnetic mutual interference between the terminals is reduced.

Alternatively, as shown in fig. 4, the second row (row L12) (row L12 formed by the first contact portions 205a, 209 a) is closer to the front end side in the mounting direction P than the third row L21 and the fourth row L22, that is, the row L12 is located at the forefront end side in the mounting direction P, and during the mounting of the ink cartridge 10 to the mounting portion 90, the terminals of the row L12 contact the contact pins 91a first for mounting detection and then the second terminals of the row L22 contact the contact pins 91a, so that during the mounting, mounting detection is performed first and then the terminals connected to the memory contact the contact 91a, preventing the chip 20 from being mounted in a misalignment or a wrong connection with the terminals connected to the memory.

Fig. 5 and 6 show two specific arrangements of the terminal arrangement. As long as the contact portion is ensured to be in the distributed manner of fig. 4. Further, the arrangement of the terminals of the chip 20 is not limited to the arrangement of fig. 5 or 6, and various arrangements are possible. Different arrangements of the terminals based on fig. 4 are all within the scope of the present application.

In the first embodiment, the terminal 202 may be a reset terminal, and the terminal 203 may be a clock terminal; terminal 206 may be a power terminal, terminal 207 may be a ground terminal, and terminal 208 may be a data terminal; terminals 206-208 in the second terminal of terminal set 200 are more important than terminals 202, 203. Alternatively, as shown in fig. 5, the layout of the first contact portions 201a, 204a, 205a, 209a forms a virtual quadrangle, and a part of the terminals 206 to 208 of the second terminals are disposed within the range of the quadrangle, and the important terminals (the terminals 206 to 208 in this embodiment) of the second terminals are disposed within the quadrangle surrounded by the first terminals, so that good contact of the terminals can be ensured (or, the important communication terminals which are more susceptible to signals are disposed in the region away from the four first terminals). In the mounting process of the ink cartridge 10, when the chip 20 and the printer contact pin 91a complete the mounting inspection, it is explained that all the mounting inspection (first terminals) are connected in place, and all the positions within the polygon formed by the first contact portions are guaranteed to be in good contact. Thus, good contact of the more important terminals (terminals 206 to 208 in this embodiment) among the second terminals can be ensured. Further, the number of the first contact portions may be 3 or more, so long as the second contact portions are in line with the polygon formed by the first contact portions.

Further, the ink cartridge 10 mounted to the mounting portion 90 has a certain movement range in the width direction T, and the following may occur: the chip 20 has been mounted, but the first terminals (mounting detection terminals) are not in contact with the contact pins 91 a. The chip described in this embodiment can solve this problem, and the rows formed by the first terminals and the rows formed by the second terminals are not in the same row, so that the width of each terminal can be increased, and the increase in width can avoid this.

Further, the first terminal is far away from the second terminal, and damage to the chip or the printer caused by short circuit between the first terminal and the second terminal due to covering of the first terminal and the second terminal by foreign matters (such as ink and the like) accidentally dropped can be prevented. That is, the distance between each first contact portion, each second contact portion, each first contact portion and each second contact portion is equal to or greater than a preset distance threshold. The distance threshold value can be preset to various different values according to the voltage value applied to each terminal by a person skilled in the art, so that the technical effect is achieved and the mutual interference of signals between each terminal can be further reduced.

The remainder was the same as in example one.

The following are two implementations of this example.

First embodiment:

fig. 7a and 7b are chip configuration diagrams of a first embodiment of a second embodiment. As shown in fig. 7a, 7b, the chip 20 has a first portion 21, a second portion 22. The second terminals 202, 203, 206-208 are arranged on the first portion 21; the first terminals 201, 204, 205, 209 are arranged on the second portion 22.

The first portion 21 and the second portion 22 are manufactured by two circuit boards 21a and 22a, and then the first portion 21 and the second portion 22 are fixed together by welding, pasting, clamping and the like, and finally the chip 20 is formed.

Using two circuit substrates 21a, 22a to manufacture the chip 20, the terminals on the first portion 21 and the terminals on the second portion 22 can be located at different heights so as to contact different positions of the contact pins 91a when contacting the contact pins 91a, respectively, to achieve the first contact portion and the second contact portion to achieve the layout as in fig. 4.

The chip 20 further has: additional terminals 210, 211, fixing portions 251, 252, 253. The additional terminals 210, 211 do not contact the contact pins 91a in the mounting portion 90, and may function to prevent a short circuit between terminals of the terminal group 200 or scratch the contact pins 91a to clean the contact pins 91a when contacting the contact pins 91 a. The chip 20 can be fixed to the ink cartridge 10 by the fixing portions 251, 252, 253, preventing the chip 20 from being detached from the ink cartridge 10.

Second embodiment:

fig. 8 is a chip configuration diagram of a second embodiment of the second embodiment. As shown in fig. 8, the chip 20 has only one substrate 20a. The chip 20 further has: the additional terminals 210, 211, the fixing portions 251, 252, further include a penetration portion 255; the through portion 255 penetrates the chip in the thickness direction of the chip. The additional terminals 210, 211, the fixing portions 251, 252 are identical to the first embodiment of the present embodiment, and will not be described again. The through portion 255 is for accommodating the contact pins 91a such that the first terminal and the second terminal respectively contact different positions of the contact pins 91a to achieve the first contact portion and the second contact portion to achieve the layout as in fig. 4. The thickness direction is a direction perpendicular to the mounting direction P and the width direction T at the same time. In the present embodiment, the thickness direction of the chip is also a direction parallel to the shortest side direction of the chip. The thickness direction of the chip is perpendicular to the surface of the terminal.

Embodiment III:

fig. 9 is a schematic diagram of an on-chip contact of the third embodiment. Fig. 10 is a chip configuration diagram of the first embodiment of the third embodiment. Fig. 11 is a chip configuration diagram of a second embodiment of a third embodiment. Fig. 12 is a chip configuration diagram of a third embodiment of the third embodiment. Fig. 13a and 13b are chip configuration diagrams of a fourth embodiment of the third embodiment. Fig. 14a and 14b are chip configuration diagrams of a fifth embodiment of the third embodiment. In fig. 9, terminals on the chip are omitted, and only schematic diagrams of contact portions are shown. Fig. 10 to 14b are block diagrams of 5 chips, respectively. As shown in fig. 9, the first contact portions 201a, 204a, 205a, 209a of the first terminals 201, 204, 205, 209 form rows L11, L12. The second contact portions 202a, 203a, 206a-208a of the second terminals 202, 203, 206-208 form rows L21, L22 in the mounting direction P. One or more rows (rows L21, L22) of the second contact portions are arranged between the rows (rows L11, L12) of the first contact portions; alternatively, the multiple rows (the rows L11 and L12) formed by the first contact portions are arranged between the multiple rows (the rows L21 and L22) formed by the second contact portions, so that the beneficial effects of the present application can be still achieved.

Further, the rows L11, L12 are spaced one by one from the rows L21, L22. That is, in the mounting direction P, the first contact portions form a first row L11, a second row L12; the second contact parts form a third row L21 and a fourth row L22; the first and second rows L11 and L12 are spaced from the third and fourth rows L21 and L22 one by one. So that the first contact portion and the second contact portion form a row L11, a row L21, a row L12, and a row L22 in this order along the mounting direction P. The structure enables the first terminal and the second terminal, or the first contact part and the second contact part to be mutually spaced one by one, and the design space of the terminal is larger.

Alternatively, as shown in fig. 9, the fourth row L22 is closer to the front end side in the mounting direction than the first and second rows L11 and L12, that is, the row L22 is located at the forefront end side in the mounting direction P.

The function of the terminals of the terminal group 200 is not limited to the terminal function described in the third embodiment, and the terminals 202, 203 in the second terminal are more important than the terminals 206-208. As shown in fig. 9, the layout of the first contact portions 201a, 204a, 205a, 209a forms a virtual quadrangle, and some of the second terminals 202, 203 are disposed within the scope of the quadrangle, and the important terminals (in this embodiment, the terminals 202, 203) among the second terminals are disposed within the quadrangle enclosed by the first terminals, so that good contact can be ensured (or, important communication terminals more susceptible to signals are disposed in a region away from the four first terminals). In the mounting process of the ink cartridge 10, the chip 20 and the printer contact pin 91a complete the mounting inspection, which means that all the mounting inspection (first terminals) are connected in place, all the positions within the polygon formed by the first contact portions 201a, 204a, 205a, 209a are guaranteed to be in good contact. Therefore, it is possible to ensure good contact of the terminals (the terminals 202, 203 in this embodiment) which are important among the second terminals.

The remainder is the same as the examples.

The following are four implementations of the present example.

First embodiment:

fig. 10 is a chip configuration diagram of the first embodiment of the third embodiment. As shown in fig. 10, the chip 20 has a first portion 21, a second portion 22. The first terminals 201, 204, 205, 209 are arranged on the first portion 21; the second terminals 202, 203, 206-208 are disposed on the second portion 22.

The first portion 21 and the second portion 22 are manufactured by 2 different circuit boards 21a, 22a, and then the first portion 21 and the second portion 22 are fixed together by welding, pasting, clamping or the like, and finally the chip 20 is formed.

Using two circuit substrates 21a, 22a to manufacture the chip 20, the terminals on the first portion 21 and the terminals on the second portion 22 can be positioned at different heights so as to contact different positions of the contact pins 91a when contacting the contact pins 91a, respectively, to achieve the layout of the first contact portion and the second contact portion as shown in fig. 9.

The chip 20 further has: the fixing portions 251, 252, 253. The chip 20 can be fixed to the ink cartridge 10 by the fixing portions 251, 252, 253, preventing the chip 20 from being detached from the ink cartridge 10.

The chip 20 may also have additional terminals (not shown in the drawing, reference may be made to the arrangement of the additional terminals 210, 211 in fig. 8) which are not in contact with the contact pins 91a in the mounting portion 90, and which may function to prevent short circuits between terminals of the terminal group 200 or scratch the contact pins 91a when in contact with the contact pins 91a to clean the contact pins 91 a.

Second embodiment:

fig. 11 is a chip configuration diagram of a second embodiment of a third embodiment. As shown in fig. 11, the chip 20 has only one substrate 20a. The chip 20 further has: additional terminals 210, 211, fixing portions 251, 252, and penetrating portion 255. The additional terminals 210, 211, the fixing portions 251, 252 are identical to the first embodiment of the present embodiment, and will not be described again. The through portion 255 is for accommodating the contact pins 91a such that the first terminal and the second terminal respectively contact different positions of the contact pins 91a to achieve the first contact portion and the second contact portion to achieve the layout as shown in fig. 9.

The through portions 255 of the through chip 20 of this embodiment are located on both sides of the second terminals 202, 203, 206-208 in the width direction T, respectively, and this structure makes the first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 spatially separated by the through portions 255 of the through chip 20, further preventing the first terminals and the second terminals from being covered by foreign substances (such as ink, etc.) accidentally dropped, causing a short circuit between the two, resulting in damage to the chip or the printer. For example, when ink drops between the first terminal and the second terminal, the through portion 255 penetrating the chip 20 leads the ink from the through portion 255 to the lower side of the chip 20 without remaining on the upper surface (surface provided with the terminal) of the chip 20.

Third embodiment:

fig. 12 is a chip configuration diagram of a third embodiment of the third embodiment. As shown in fig. 12, the first terminals 201, 204, 205, 209 are protruded with respect to the substrate 20 a. The first terminals 201, 204, 205, 209 may be connected to the substrate 20a by soldering or the like. That is, the first contact portions (not shown in fig. 12) located on the first terminals 201, 204, 205, 209 are more protruded with respect to the substrate 20a than the second contact portions (not shown in fig. 12) located on the second terminals 202, 203, 206-208.

Further, the first terminals 201, 204, 205, 209 protrude with respect to the substrate 20a, and the second terminals 202, 203, 206-208 are provided on the substrate 20 a; the first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 have a height difference in height such that the first and second terminals contact different positions of the contact pins 91a, respectively, to achieve the first and second contact portions to achieve the layout as shown in fig. 9.

The first terminals 201, 204, 205, 209 protrude with respect to the substrate 20a, and this structure spatially separates the first terminals 201, 204, 205, 209 from the second terminals 202, 203, 206-208, further preventing a chip or a printer from being damaged due to a short circuit between the first terminals and the second terminals caused by an accidentally dropped foreign matter (e.g., ink, etc.) covering the first terminals and the second terminals.

Fourth embodiment:

fig. 13a and 13b are chip configuration diagrams of a fourth embodiment of the third embodiment. As shown in fig. 13a, 13b, the first terminals 201, 204, 205, 209 are provided on the second portion 22, and the second terminals 202, 203, 206-208 are provided on the substrate 21a of the first portion 21; the first portion 21 is provided with terminal holes 201b, 204b, 205b, 209b through which terminals (first terminals 201, 204, 205, 209) provided with contact portions on the second portion 22 pass and protrude with respect to the first portion 21. That is, the first terminals 201, 204, 205, 209 of the second portion 22 pass through the terminal holes 201b, 204b, 205b, 209b and protrude with respect to the first portion 21. The first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 have a height difference in height such that the first and second terminals contact different positions of the contact pins 91a, respectively, to achieve the first and second contact portions to achieve the layout as shown in fig. 9. The second portion 22 may be made of conductive silicone or conductive metal material, or the substrate 22a of the second portion 22 may be made of non-conductive substrate material, and the first terminals 201, 204, 205, 209 may be made of conductive material.

The remainder corresponds to the third embodiment of the present embodiment.

Fifth embodiment:

fig. 14a and 14b are chip configuration diagrams of a fifth embodiment of the third embodiment. As shown in fig. 14a and 14b, the chip 20 is composed of a first portion 21 and a second portion 22. The second portion 22 is a chip carrier for carrying the chip and may be secured to the cartridge body. A first set of mounting detection terminals 201, 204 of the first terminals are provided on the second portion 22. The first group of mounting detection terminals 205, 209 among the first terminals are provided on the substrate 21a of the first portion 21, and the second terminals 202, 203, 206-208 (not shown in the drawings) are provided on the substrate 21a of the first portion 21. The first portion 21 is provided with terminal holes 201b, 204b, and the first terminals 201, 204 of the second portion 22 pass through the terminal holes 201b, 204b and protrude with respect to the substrate 21a of the first portion 21. The first terminals 205, 209 protrude with respect to the substrate 21a of the first portion 21, and the first terminals 205, 209 may be formed of pads or bumps provided on the substrate 21a and then copper plated. The first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 have a height difference in height such that the first and second terminals contact different positions of the contact pins 91a, respectively, to achieve the first and second contact portions to achieve the layout as shown in fig. 9. The second portion 22 is provided with the first terminals 201, 204 and also functions as a chip carrier (carrying the chip and fixed to the case of the ink cartridge). The structure reduces the number of parts of the ink box, thereby achieving the effect of reducing the cost. The second portion 22 may be made of conductive silicone or conductive metal material, or the substrate 22a of the second portion 22 may be made of non-conductive substrate material, and the first terminals 201, 204, 205, 209 may be made of conductive material. The second portion 22 may be made of conductive silicone, so that when the chip 20 contacts the contact pins 91a, the second portion 22 may deform to a certain extent, thereby avoiding the situation that the terminals on the chip 20 are worn or scratched due to hard contact between the terminals and the contact pins 91 a.

The remainder corresponds to the third embodiment of the present embodiment.

Embodiment four:

fig. 15 is a schematic diagram of a chip according to the fourth embodiment. Fig. 16 is a chip configuration diagram of the first embodiment of the fourth embodiment. Fig. 17 is a chip configuration diagram of a second embodiment of the fourth embodiment. Fig. 16 and 17 are block diagrams of two chips, respectively. As shown in fig. 15, the first contact portions 201a, 204a, 205a, 209a (not shown) of the first terminals 201, 204, 205, 209 form a first row (row L11) and a second row (row L12). The second contact portions 202a, 203a, 206a-208a (not shown in the drawings) of the second terminals 202, 203, 206-208 form a third row (row L21), a fourth row (row L22) in the mounting direction P. One or more rows (rows L21, L22) of the second contact portions are arranged between the rows (rows L11, L12) of the first contact portions; alternatively, the multiple rows (the rows L11 and L12) formed by the first contact portions are arranged between the multiple rows (the rows L21 and L22) formed by the second contact portions, so that the beneficial effects of the present application can be still achieved.

Further, the first contact portions form a first row (row L11), a second row (row L12); the second contact portions form a third row (row L21), a fourth row (row L22); the first line (line L11) and the second line (line L12) are arranged between the third line (line L21) and the fourth line (line L22). That is, the first contact portion and the second contact portion form a row L21, a row L11, a row L12, and a row L22 in this order along the mounting direction P. The structure is such that the third row (row L21) and the fourth row (row L22) of the second contact portions are located at the outer periphery side of the first row (row L11) and the second row (row L12) of the first contact portions, the second contact portions 202a, 203a, 206a-208a are located entirely at the outer periphery of the first contact portions 201a, 204a, 205a, 209a, and the second contact portions 202a, 203a, 206a-208a are located outside the polygonal (quadrangular in this embodiment) area formed by the plurality of first contact portions 201a, 204a, 205a, 209a, so that interference of electrical signals between the first terminal and the second terminal is further prevented.

The remainder are the same as the examples.

The following are two implementations of this example.

First embodiment:

fig. 16 is a chip configuration diagram of the first embodiment of the fifth embodiment. As shown in fig. 16, the chip 20 has a first portion 21 and a second portion 22. Terminals 202, 203 and terminals 205, 209 are provided on the first portion 21; terminals 201, 204, 206-208 are disposed on second portion 22.

The first portion 21 and the second portion 22 are manufactured by 2 different circuit boards 21a, 22b, and then the first portion 21 and the second portion 22 are fixed together by welding, pasting, clamping or the like, and finally the chip 20 is formed.

Using 2 circuit substrates 21a, 22b to make the chip 20, the terminals on the first portion 21 and the terminals on the second portion 22 can be located at different heights so as to contact different positions of the contact pins 91a, respectively, when in contact with the contact pins 91a, to achieve the layout as shown in fig. 15.

The chip 20 also has additional terminals 210, 211, and the additional terminals 210, 211 do not contact the contact pins 91a in the mounting portion 90, and may function to prevent a short circuit between terminals of the terminal group 200 or scratch the contact pins 91a when contacting the contact pins 91a, thereby cleaning the contact pins 91 a.

Second embodiment:

fig. 17 is a chip configuration diagram of a second embodiment of the fifth embodiment. As shown in fig. 17, the terminals 202, 203, 205, 209 are provided on the second portion 22, and the terminals 201, 204, 206-208 are provided on the substrate 21a of the first portion 21; the first portion 21 is provided with terminal holes 202b, 203b, 205b, 209b, and the terminals 202, 203, 205, 209 of the second portion 22 pass through the terminal holes 202b, 203b, 205b, 209b and protrude with respect to the first portion 21, the terminals 202, 203, 205, 209 being different in height from the terminals 201, 204, 206-208 such that the terminals contact different positions of the contact pins 91a, respectively, to achieve the first contact portion and the second contact portion to achieve the layout as shown in fig. 15. The second portion 22 may be made of conductive silicone or conductive metal material, or the substrate 22a of the second portion 22 may be made of non-conductive substrate material, and the first terminals 201, 204, 205, 209 may be made of conductive material.

The remainder is identical to the first embodiment of the present example.

The invention also provides an ink box, which comprises any chip described in the embodiment.

The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather to enable any modification, equivalent replacement, improvement or the like to be made within the spirit and principles of the invention.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

1. A chip for mounting onto an ink cartridge for mounting into a mounting portion in a printer in a mounting direction, the chip including a memory, first terminals for mounting detection, second terminals, at least one of the second terminals being electrically connected to the memory, the first terminals and the second terminals being respectively in contact with contact pins in the printer and forming first contact portions and second contact portions, characterized in that the chip further includes a through portion for accommodating the contact pins, the through portion penetrating through the chip in a thickness direction of the chip, at least part of the first terminals or at least part of the second terminals being provided on a wall surface of the through portion and extending upward to an upper surface of the chip;

2. The chip of claim 1, wherein the first contact portions and the second contact portions are arranged in a plurality of rows in the mounting direction.

3. The chip according to claim 1, wherein the through-hole is a U-shaped structure with one side open, the opening of the through-hole is directed forward in the mounting direction, the first terminal or the second terminal is provided on a side wall of the bottom of the through-hole U-shaped structure or on a side face of an outer end portion, and the first terminal or the second terminal on a side face of the wall of the bottom of the through-hole U-shaped structure or on a side face of the outer end portion extends upward to an upper surface of the chip.

4. The chip of claim 1, further comprising a plurality of securing portions for securing the chip to the ink cartridge, the securing portions being indentations disposed at an edge of the chip.

5. The chip according to any one of claims 1 to 4, wherein the number of through portions is 2, and 2 through portions are provided on both sides of the chip in the mounting direction.

6. The chip of any one of claims 1-4, wherein the through-hole comprises a first through-hole, a second through-hole, and a third through-hole, each having a U-shaped structure;

the openings of the first through part, the second through part and the third through part are all towards the front of the installation direction, and the second through part and the third through part are positioned at the bottom of the first through part;

the first contact portion or the second contact portion is disposed at the bottom of the first through portion and/or the bottoms of the second through portion and the third through portion.

7. The chip of any one of claims 1-4, wherein the first terminal and the second terminal each contact a different location of the contact pin.

8. The chip of claim 7, wherein the first terminal is disposed on a wall surface of the through portion and extends upward to an upper surface of the chip, the second terminal is disposed on an upper surface of the chip, or the second terminal is disposed on a wall surface of the through portion and extends upward to an upper surface of the chip, and the first terminal is disposed on an upper surface of the chip.

9. An ink cartridge comprising the chip of any one of claims 1-8.