CN115241328A - Preparation method of single-carrier photon detector - Google Patents

Preparation method of single-carrier photon detector Download PDF

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CN115241328A
CN115241328A CN202211049762.1A CN202211049762A CN115241328A CN 115241328 A CN115241328 A CN 115241328A CN 202211049762 A CN202211049762 A CN 202211049762A CN 115241328 A CN115241328 A CN 115241328A
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inp
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弭伟
杨志茂
王斌
唐金泽
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Beijing Yingfurui Semiconductor Technology Co ltd
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Abstract

The invention discloses a preparation method of a single-carrier neutron detector, which enables the diffusion depth of an active region of a Shan Zailiu neutron detector to cover the whole intrinsic In by optimizing the time and concentration of Zn diffusion 0.53 Ga 0.47 An As absorption layer for ensuring intrinsic In 0.53 Ga 0.47 The As absorption layer has a suitable p-type doping In the central region of the detector, and intrinsic In 0.53 Ga 0.47 The concentration of Zn doping In the As absorption layer is gradually reduced from top to bottom, and the doping gradient is In the intrinsic type 0.53 Ga 0.47 A weak electric field is formed In the As absorption layer, which helps electrons In the intrinsic type In 0.53 Ga 0.47 Transport in As absorber layer to improve detector performanceSpeed.

Description

Preparation method of single-carrier photon detector
Technical Field
The invention relates to the technical field of photoelectric detectors, in particular to a preparation method of a single-carrier photon detector.
Background
With the continuous development and the increasing maturity of the photoelectric communication technology, the response speed, the bandwidth and other performances of the existing optical communication system can hardly meet the requirements of people. As an important part of an optoelectronic communication system, an optoelectronic signal detector is also a research hotspot at present.
The traditional PIN type balance detector simultaneously uses electrons and holes as carriers, and the response speed of the detector is mainly influenced by the holes with larger effective mass, so that the detector with the response speed greatly improved compared with the traditional PIN type detector is urgently needed; meanwhile, the phenomenon of tailing is commonly existed in the Zn diffusion process, which brings great harm to the traditional balanced detector.
Disclosure of Invention
In order to solve the defects of the technical scheme, the invention aims to provide a preparation method of a single-carrier flow detector.
Another object of the present invention is to provide a single-carrier flow detector.
The purpose of the invention is realized by the following technical scheme.
A preparation method of a single-carrier flow detector comprises the following steps:
the method comprises the following steps: sequentially growing an N-type InP buffer layer, an N-type DBR reflecting region, an N-type InP drift layer, an N-type InGaAsP transition layer (1 or more layers), and an intrinsic In layer on a semi-insulating InP substrate by MOCVD or MBE deposition 0.53 Ga 0.47 As absorption layer and intrinsic In 0.52 Al 0.48 An As electron diffusion barrier layer and an intrinsic InP cap layer;
step two: depositing a SiN film on the upper surface of the intrinsic InP cover layer by PECVD;
step three: forming a Zn diffusion window pattern on the surface of the SiN film by using photoresist, removing the SiN film on the Zn diffusion window pattern array by using an etching method to expose the intrinsic InP cover layer below, and removing the photoresist after etching is finished to form a Zn diffusion window;
step four: performing Zn diffusion on the Zn diffusion window region by MOCVD or furnace tube method to form P-type diffusion region and surroundingA non-active region of P-type diffusion region, a Zn-diffused region including an intrinsic InP cap layer and an intrinsic In 0.52 Al 0.48 As electron diffusion barrier layer and intrinsic In 0.53 Ga 0.47 As absorption layer, zn diffusion, intrinsic InP cover layer and In 0.52 Al 0.48 As electron diffusion barrier layer and In 0.53 Ga 0.47 The As absorption layer is converted into P type, wherein, the intrinsic type In 0.53 Ga 0.47 The P-type doping concentration In the As absorption layer is gradually reduced from top to bottom to form P-type In with P-type doping concentration gradient 0.53 Ga 0.47 An As absorption layer;
step five: forming a step pattern on the upper surfaces of the SiN film and the P-type diffusion region by using photoresist, and forming a step region and an N-type contact region surrounding the step region by step etching, wherein the step region comprises the P-type diffusion region, the radius difference between the step region and the P-type diffusion region is 5-50 μm, and the step etching region comprises an intrinsic InP cover layer and an intrinsic In layer 0.52 Al 0.48 As electron diffusion barrier layer, intrinsic In 0.53 Ga 0.47 An As absorption layer, an N-type InGaAsP transition layer (1 layer or multiple layers), an N-type InP drift layer, an N-type DBR reflection region and an N-type InP buffer layer;
step six: forming a continuous P-type metal electrode pattern in one side area of the Zn diffusion window and on the upper surface of the SiN film adjacent to the area by using photoresist, evaporating metal on the outer surface of the P-type metal electrode pattern, carrying out metal stripping, annealing to form a P-type metal electrode, wherein the contact between the P-type metal electrode pattern and the upper surface of the P-type diffusion area is ohmic contact;
step seven: forming an N-type electrode pattern on the N-type contact area around the step area by utilizing photoresist, evaporating metal by utilizing an electron beam evaporation or magnetron sputtering method, stripping and annealing the metal to form an N-type metal electrode, wherein the N-type metal electrode is in contact with the N-type InP buffer layer to form ohmic contact, a gap is formed between the N-type metal electrode and the step area, and the distance of the gap is 5-50 mu m;
step eight: coating BCB or PBO material on all exposed upper surfaces by using a glue coating method, forming a BCB or PBO pattern by using a photoetching and developing method, covering the side surface of the step region by using the BCB or PBO pattern, exposing the N-type metal electrode and the P-type metal electrode outside after photoetching and developing, and baking and curing to complete passivation of the side surface of the step region, wherein the coating thickness is 1-20 mu m;
step nine: depositing a SiN antireflection film on the outer surface of the detector in a PECVD (plasma enhanced chemical vapor deposition) deposition mode;
step ten: forming a VIA hole pattern right above the P-type metal electrode and the N-type metal electrode by using photoresist, removing the SiN antireflection film in the VIA hole pattern by using an etching method to expose the P-type metal electrode and the N-type metal electrode, and removing the photoresist after etching is finished to obtain a VIA hole;
step eleven: and thinning and polishing the back surface of the semi-insulating InP substrate.
In the above technical solution, the thickness of the N-type InP buffer layer is 0.5 μm, and the doping concentration is 5 × 10 17 /cm 3 。
In the above technical solution, in the first step, the N-type DBR reflecting region is composed of a plurality of layers of InP and InAlGaAs, the thickness of each layer of InP and InAlGaAs is 1/4 of the effective wavelength of the light with the wavelength of 1550nm in the material, the number of layers of InP and InAlGaAs is greater than or equal to 10, and the reflectivity of the N-type DBR reflecting region to the light with the wavelength of 1300-1700 nm is greater than or equal to 70%.
In the above technical solution, in the step one, the intrinsic type In 0.53 Ga 0.47 The thickness of the As absorption layer is 1 to 4 μm.
In the above technical solution, in the step one, the thickness of the N-type InP drift layer is 0.1 to 1 μm, and the doping concentration is 5 × 10 15 ～2×10 17 /cm 3 。
In the above technical solution, in the step one, the intrinsic type In 0.52 Al 0.48 The thickness of the As electron diffusion impervious layer is 10-200 nm.
In the above technical solution, in the second step, the thickness of the SiN film is 100nm.
In the above technical solution, in the stepIV, intrinsic In 0.53 Ga 0.47 The P-type doping concentration of the As absorption layer is from 5 multiplied by 10 from top to bottom 17 ～5×10 18 /cm 3 Reduced to 1 × 10 17 ～5×10 17 /cm 3 。
In the above technical solution, in the fourth step, the P-type diffusion region is circular, and the radius thereof is 10 to 2000 μm.
In the above technical solution, in the ninth step, the SiN antireflection film has a thickness of 200nm, and a reflectance of the SiN antireflection film with respect to light with a wavelength of 1310nm to 1700nm is greater than or equal to 70%.
In the above technical solution, in the eleventh step, the thickness of the semi-insulating InP substrate after thinning and polishing is 50 to 200 μm.
The single-carrier flow detector obtained by the preparation method.
The invention has the advantages and beneficial effects that:
the invention discloses a preparation method of a single-carrier detector, which mainly adopts a method of combining Zn diffusion and a step. Wherein the Zn diffusion is used for forming a P-type metal contact area, the step pattern is larger than the diameter of the Zn diffusion and is used for forming electrical isolation, and the advantages of the step pattern are as follows:
1. by optimizing the time and concentration of Zn diffusion, the diffusion depth of the active region of the Shan Zailiu sub-detector covers the whole intrinsic In 0.53 Ga 0.47 An As absorption layer for ensuring intrinsic In 0.53 Ga 0.47 The As absorption layer has a suitable p-type doping In the central region of the detector, and intrinsic In 0.53 Ga 0.47 The concentration of Zn doping In the As absorption layer is gradually reduced from top to bottom, and the doping gradient is In the intrinsic type 0.53 Ga 0.47 A weak electric field is formed In the As absorption layer, which helps electrons In the intrinsic type In 0.53 Ga 0.47 Transport in the As absorber layer increases the speed of the detector.
2. The tailing phenomenon generally exists In the Zn diffusion process, the tailing phenomenon of Zn diffusion In the single-carrier detector is reasonably utilized, and the tailing Zn doping is In an intrinsic type In 0.53 Ga 0.47 Middle product of As absorption layerGenerating a doping gradient to help electrons In intrinsic type In 0.53 Ga 0.47 Transport in the As absorber layer.
3. The invention adopts the semi-insulating InP substrate, and limits the active region of Zn diffusion in the step region through step corrosion, thereby not only realizing electrical insulation, but also reducing the capacitance of the detector to the maximum extent, and further improving the switching speed and the bandwidth of the detector.
4. The diameter of the step region is larger than that of the Zn diffusion region, therefore, the side surface of the step region is semi-insulating high-resistance material (BCB or PBO material), and the dark current can be further reduced by optimizing the side surface passivation.
Drawings
FIG. 1 is a schematic flow chart of a first step of the Shan Zailiu sub-detector of the present invention.
Fig. 2 is a schematic flow chart of step two to step four of the single-carrier flow detector of the present invention.
FIG. 3 is a schematic flow chart of step five of the Shan Zailiu sub-detector of the present invention.
FIG. 4 is a schematic flow chart of step six-step seven of the Shan Zailiu sub-detector of the present invention.
FIG. 5 is a schematic flow chart of step eight of the Shan Zailiu sub-detector of the present invention.
FIG. 6 is a schematic flow chart of step nine of the Shan Zailiu sub-detector of the present invention.
FIG. 7 is a schematic flow chart of step ten of the Shan Zailiu sub-detector of the present invention.
Wherein the content of the first and second substances,
1: a semi-insulating InP substrate, and a semiconductor substrate,
2: an N-type InP buffer layer is formed on the substrate,
3: the reflective region of the N-type DBR,
4: an N-type InP drift layer is formed on the substrate,
5: an N-type InGaAsP transition layer,
6: intrinsic In 0.53 Ga 0.47 An As absorption layer, which is formed on the substrate,
7: intrinsic In 0.52 Al 0.48 An As electron diffusion barrier layer, which is,
8: an intrinsic type InP cap layer is formed,
9: a thin film of SiN, which is a,
10: the window of the Zn diffusion is shown,
11: a P-type diffusion region is formed in the substrate,
12: in the region of the step(s),
13: a P-type metal electrode,
14: an N-type metal electrode is arranged on the substrate,
15: a BCB or a PBO pattern,
16: a SiN anti-reflective film is formed on the substrate,
17: VIA holes.
Detailed Description
The technical scheme of the invention is further explained by combining specific examples.
Example 1
As shown in fig. 1 to 7, this embodiment provides a method for manufacturing a single-carrier flow detector, including the following steps:
the method comprises the following steps: an N-type InP buffer layer 2, an N-type DBR reflecting region 3, an N-type InP drift layer 4, an N-type InGaAsP transition layer 5 (1 layer or multiple layers), and intrinsic In are sequentially grown on a semi-insulating InP substrate 1 by MOCVD or MBE deposition 0.53 Ga 0.47 As absorption layer 6, intrinsic In 0.52 Al 0.48 An As electron diffusion barrier layer 7 and an intrinsic InP cover layer 8, wherein the N-type InP buffer layer 2 has a thickness of 0.5 μm and a doping concentration of 5 × 10 17 /cm 3 The function of the method is to better match the difference of lattice constants caused by different growth conditions between epitaxial layer materials on the semi-insulating InP substrate 1 and the N-type InP buffer layer 2, and ensure the growth quality of the epitaxial layer; the N-type DBR reflecting region 3 consists of a plurality of layers of InP and InAlGaAs, the thickness of each layer of InP and InAlGaAs is 1/4 of the effective wavelength of light with the wavelength of 1550nm in the material, the light-emitting wavelength of the InAlGaAs is 1190nm, the thickness of the InAlGaAs is 93nm, the number of layers of the InP and InAlGaAs is more than or equal to 10, and the reflectivity of the N-type DBR reflecting region 3 to the light with the wavelength of 1550nm is 80 percent; the thickness of the N-type InP drift layer 4 is 1 μm, and the doping concentration is 5 × 10 15 /cm 3 (ii) a Intrinsic In 0.53 Ga 0.47 The thickness of the As absorption layer 6 is 1 μm, which is a photogenerated carrier generating layer, the thickness of which is low,this reduces the diffusion time of the photo-generated electrons In this layer, while the N-DBR layer reflects the unabsorbed light back to intrinsic In 0.53 Ga 0.47 The As absorption layer carries out secondary absorption, so that the response speed of the single-carrier detector is ensured; intrinsic In 0.52 Al 0.48 The thickness of the As electron diffusion barrier layer 7 is 20nm, and the As electron diffusion barrier layer is used for preventing photo-generated electrons from diffusing upwards, so that the single carrier transport characteristic of the detector is guaranteed.
Step two: a SiN film 9 is deposited on the upper surface of the intrinsic InP cap layer 8 by PECVD (Plasma Enhanced Chemical Vapor Deposition), and the thickness of the SiN film 9 is 100nm.
Step three: forming a Zn diffusion window 10 pattern array on the surface of the SiN film 9 by using photoresist, removing the SiN film 9 on the Zn diffusion window 10 pattern array by using an etching method to expose the intrinsic InP cover layer 8 below, and removing the photoresist after the etching is finished to form the Zn diffusion window 10.
Step four: performing Zn diffusion on the Zn diffusion window 10 region by MOCVD or furnace tube method to form a P-type diffusion region 11 and a non-active region surrounding the P-type diffusion region 11, wherein the Zn-diffused region comprises an intrinsic InP cover layer 8 and intrinsic In 0.52 Al 0.48 As electron diffusion barrier layer 7 and intrinsic type In 0.53 Ga 0.47 As absorption layer 6, after Zn diffusion, intrinsic InP cap layer 8, in 0.52 Al 0.48 As electron diffusion barrier layer 7 and In 0.53 Ga 0.47 As absorption layer is converted into P type, in 0.53 Ga 0.47 The P-type doping concentration In the As absorption layer is gradually reduced from top to bottom to form P-type In with P-type doping concentration gradient 0.53 Ga 0.47 As absorption layer with concentration of 2X 10 18 /cm 3 Reduced to 1 × 10 17 /cm 3 Wherein the upper surface of the P-type diffusion region 11 is circular and has a radius of 25 μm.
Step five: forming a step pattern on the upper surfaces of the SiN film 9 and the P-type diffusion region 11 by using a resist, and forming a step region 12 and a step portion by step etchingAn N-type contact region surrounding a step region 12, wherein the step region 12 comprises a P-type diffusion region 11, the radius difference between the step region 12 and the P-type diffusion region 11 is 10 μm, and the step etched region comprises an intrinsic InP cover layer 8 and intrinsic In 0.52 Al 0.48 As electron diffusion barrier layer 7, intrinsic In 0.53 Ga 0.47 An As absorption layer 6, an N-type InGaAsP transition layer 5 (1 layer or multiple layers), an N-type InP drift layer 4, an N-type DBR reflective region 3, and an N-type InP buffer layer 2.
Step six: forming a continuous P-type metal electrode 13 pattern on one side region of the Zn diffusion window 10 and the upper surface of the SiN film 9 adjacent to the region by using photoresist, evaporating metal on the outer surface of the P-type metal electrode pattern, carrying out metal stripping, annealing, forming the P-type metal electrode 13, and enabling the P-type metal electrode pattern to be in ohmic contact with the SiN film 9.
Step seven: an N electrode pattern is formed on the N-type contact area on one side of the photoresist stepped area 12, metal is evaporated by an electron beam evaporation or magnetron sputtering method, metal stripping and annealing are carried out, an N-type metal electrode 14 is formed, the N-type metal electrode 14 is in contact with the N-type InP buffer layer 2 to form ohmic contact, and a gap exists between the N-type metal electrode 14 and the stepped area 12, wherein the distance of the gap is 5-50 micrometers.
Step eight: and coating BCB or PBO material on all the exposed upper surfaces by using a glue coating method, forming a BCB or PBO pattern 15 by using a photoetching and developing method, covering the side surface of the step region 12 by using the BCB or PBO pattern 15, exposing the N-type metal electrode 14 and the P-type metal electrode 13 outside after photoetching and developing, baking and curing to complete passivation of the side surface of the step region 12, wherein the coating thickness is 4 mu m.
Step nine: and depositing the SiN antireflection film 16 on all exposed outer surfaces by using a PECVD (plasma enhanced chemical vapor deposition) deposition mode, wherein the thickness of the SiN antireflection film 16 is 200nm, and the reflectivity of the SiN antireflection film 16 to 1550nm wavelength light is more than 90%.
Step ten: forming a VIA hole 17 pattern right above the P-type metal electrode 13 and the N-type metal electrode 14 by using photoresist, removing the SiN antireflection film 16 in the VIA hole 17 pattern by using an etching method to expose the P-type metal electrode 13 and the N-type metal electrode 14, and removing the photoresist after the etching is finished to obtain the VIA hole 17.
Step eleven: and thinning and polishing the back surface of the semi-insulating InP substrate 1, wherein the thickness of the thinned and polished semi-insulating InP substrate is 150 mu m.
The single-carrier detector obtained by the preparation method of the embodiment adopts a front incidence mode, and light enters and is intrinsic In through the incidence of the SiN antireflection film 16 0.53 Ga 0.47 The As absorption layer 6 absorbs the light not completely absorbed and the light is reflected back to intrinsic In through the N-type DBR reflection region 3 0.53 Ga 0.47 As absorbing layer 6, thereby performing secondary absorption.
The invention has been described in an illustrative manner, and it is to be understood that any simple variations, modifications or other equivalent changes which can be made by one skilled in the art without departing from the spirit of the invention fall within the scope of the invention.

Claims (9)

1. A preparation method of a single-carrier flow detector is characterized by comprising the following steps:
the method comprises the following steps: an N-type InP buffer layer (2), an N-type DBR reflecting region (3), an N-type InP drift layer (4), an N-type InGaAsP transition layer (5) and intrinsic In are sequentially grown on a semi-insulating InP substrate (1) by utilizing the deposition mode of MOCVD or MBE 0.53 Ga 0.47 As absorption layer (6), intrinsic In 0.52 Al 0.48 An As electron diffusion barrier layer (7) and an intrinsic InP cap layer (8);
step two: depositing a SiN film (9) on the upper surface of the intrinsic InP cover layer (8) by utilizing PECVD;
step three: forming a Zn diffusion window (10) pattern on the surface of the SiN film (9) by using photoresist, removing the SiN film (9) on the Zn diffusion window (10) pattern array by using an etching method to expose the intrinsic InP cover layer (8) below, and removing the photoresist after etching is finished to form the Zn diffusion window (10);
step four: (ii) forming said Zn diffusion window by MOCVD or furnace tube method10 Is subjected to Zn diffusion to form a P-type diffusion region (11) and a non-active region surrounding the P-type diffusion region (11), the Zn-diffused region including an intrinsic InP cap layer (8), intrinsic In 0.52 Al 0.48 As electron diffusion barrier layer (7) and intrinsic In 0.53 Ga 0.47 An As absorption layer (6) In which an intrinsic InP cap layer (8) and In are formed after Zn diffusion 0.52 Al 0.48 As electron diffusion barrier layer (7) and In 0.53 Ga 0.47 The As absorption layer (6) is converted into P type, wherein In is intrinsic 0.53 Ga 0.47 The P-type doping concentration In the As absorption layer (6) is gradually reduced from top to bottom to form P-type In with P-type doping concentration gradient 0.53 Ga 0.47 An As absorption layer (6);
step five: forming a step pattern on the upper surfaces of the SiN film (9) and the P-type diffusion region (11) by using photoresist, and forming a step region (12) and an N-type contact region surrounding the step region (12) by step etching, wherein the step region (12) comprises the P-type diffusion region (11), the radius difference between the step region (12) and the P-type diffusion region (11) is 5-50 mu m, and the step etched region comprises an intrinsic InP cover layer (8) and an intrinsic In 0.52 Al 0.48 As electron diffusion barrier layer (7), intrinsic In 0.53 Ga 0.47 The semiconductor device comprises an As absorption layer (6), an N-type InGaAsP transition layer (5), an N-type InP drift layer (4), an N-type DBR reflection region (3) and an N-type InP buffer layer (2);
step six: forming a continuous P-type metal electrode pattern on the upper surface of the SiN film (9) adjacent to the region in the region on one side of the Zn diffusion window (10) by utilizing photoresist, evaporating metal on the outer surface of the P-type metal electrode pattern, stripping the metal, annealing to form a P-type metal electrode (13), wherein the contact between the P-type metal electrode pattern and the upper surface of the P-type diffusion region (11) is ohmic contact;
step seven: forming an N-type electrode pattern on the N-type contact area around the step area (12) by utilizing photoresist, evaporating metal by utilizing an electron beam evaporation or magnetron sputtering method, and carrying out metal stripping and annealing to form an N-type metal electrode (14), wherein the N-type metal electrode (14) is in contact with the N-type InP buffer layer (2) to form ohmic contact, and a gap is formed between the N-type metal electrode (14) and the step area (12), and the distance of the gap is 5-50 mu m;
step eight: coating BCB or PBO material on all exposed upper surfaces by using a glue coating method, forming a BCB or PBO pattern (15) by using a photoetching and developing method, covering the side surface of the step region (12) with the BCB or PBO pattern (15), exposing the N-type metal electrode (14) and the P-type metal electrode (13) outside after photoetching and developing, baking and curing to complete passivation of the side surface of the step region (12), wherein the coating thickness is 1-20 mu m;
step nine: depositing a SiN antireflection film (16) on all exposed outer surfaces by using a PECVD (plasma enhanced chemical vapor deposition) deposition mode;
step ten: forming a VIA hole (17) pattern right above the P-type metal electrode (13) and the N-type metal electrode (14) by using photoresist, removing the SiN antireflection film (16) in the VIA hole (17) pattern by using an etching method to expose the P-type metal electrode (13) and the N-type metal electrode (14), and removing the photoresist after the etching is finished to obtain the VIA hole (17);
step eleven: and thinning and polishing the back surface of the semi-insulating InP substrate (1).
2. The method according to claim 1, wherein in step one, the N-type InP buffer layer (2) has a thickness of 0.5 μm and a doping concentration of 5 x 10 17 /cm 3 。
3. The manufacturing method according to claim 1, wherein in step one, the N-type DBR reflecting region (3) is composed of a plurality of layers of InP and InAlGaAs, the thickness of each layer of InP and InAlGaAs is 1/4 of the optically effective wavelength of the light with the wavelength of 1550nm in the material, the number of layers of InP and InAlGaAs is 10 or more, and the reflectivity of the N-type DBR reflecting region (3) for the light with the wavelength of 1300-1700 nm is 70% or more.
4. The method according to claim 1, wherein In step one, intrinsic type In 0.53 Ga 0.47 The thickness of the As absorption layer (6) is 1-4 μm; the thickness of the N-type InP drift layer (4) is 0.1-1 mu mDoping concentration of 5X 10 15 ～2×10 17 /cm 3 (ii) a Intrinsic In 0.52 Al 0.48 The thickness of the As electron diffusion impervious layer (7) is 10-200 nm.
5. The method according to claim 1, wherein in step two, the SiN thin film (9) has a thickness of 100nm.
6. The method according to claim 1, wherein In step four, in is intrinsic 0.53 Ga 0.47 The P-type doping concentration of the As absorption layer (6) is from 5 multiplied by 10 from top to bottom 17 ～5×10 18 /cm 3 Reduced to 1 × 10 17 ～5×10 17 /cm 3 。
7. The production method according to claim 1, wherein, in step four, the P-type diffusion region (11) is circular and has a radius of 10 to 2000 μm.
8. The manufacturing method according to claim 1, wherein in the ninth step, the SiN antireflection film (16) has a thickness of 200nm, and the SiN antireflection film (16) has a reflectance of 70% or more with respect to light having a wavelength of 1310nm to 1700 nm.
9. A method according to claim 1, wherein in step eleven, the thickness of the semi-insulating InP substrate (1) after thinning and polishing is 50 to 200 μm.
CN202211049762.1A 2022-08-30 2022-08-30 Preparation method of single-carrier photon detector Pending CN115241328A (en)

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