CN112768550A - Structure for improving responsivity of back-illuminated photodiode and manufacturing method - Google Patents
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
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Abstract
The invention relates to the field of semiconductor photodiodes, in particular to a structure for improving the responsivity of a back-illuminated photodiode and a manufacturing method thereof, wherein the structure comprises the following steps: the device comprises a substrate, wherein an absorption layer, a gradient layer, a window layer and an ohmic contact layer are grown on the substrate; the structure adopts a mesa chip structure; the active area of the mesa structure is provided with a passive film and a grating reflecting layer formed by P-type metal; leading out an N electrode from the N-type contact layer under the table top, and forming a coplanar electrode with the P electrode; the grating reflection layer is arranged on the P-type metal layer, so that the reflection efficiency of the grating reflection layer on a light source reaches more than 80%, the conductive effect of an ohmic contact area of an original chip is not influenced after the grating reflection layer is added, and the responsivity of the high-speed high-power photodiode is improved.
Description
Technical Field
The invention relates to the field of semiconductor photodiodes, in particular to a structure for improving the responsivity of a back-illuminated photodiode and a manufacturing method thereof.
Background
In fiber optic communication systems, photodiodes are used to convert information-carrying optical signals into information-carrying electrical signals. The photodiode can be classified into a front-side illumination type, a back-side illumination type, and a side-illumination type according to the incident light type.
With the continuous improvement (more than or equal to 25Gbps) of the speed requirement of the high-speed optical fiber communication system on the photodiode, the light receiving aperture of the diode is smaller and smaller (the diameter is less than or equal to 20 mu m), and the difficulty of optical fiber coupling is greater and greater. The front-side illumination type and side-side illumination type photodiodes are not suitable for mass production due to the difficulty and reliability of the optical fiber coupling process. The back-illuminated photodiode adopts back incident light, the front electrode can reflect the incident light, and the reflected light is secondarily absorbed in the absorption region, so that the responsivity is improved; the integrated micro-lens increases the light receiving aperture; p, N the coplanar design of electrodes reduces the series resistance and parasitic capacitance, and is widely applied to high-speed optical receivers.
The existing methods for improving the responsivity of the back-illuminated photodiode mainly comprise two methods: the first is to deposit a metal reflective layer on top of the active area, as disclosed in the following documents: chinese patent CN101350378B issued on 1/4/2012 in husbandry et al; 20/11/2013, granted the announcement of chinese patent CN101552303B in husbandry. The second is to deposit a dielectric reflective layer on top of the active area (see fig. 1). For example, the back-illuminated photodiode proposed in "a structure and a manufacturing method for improving responsivity of back-illuminated photodiode" with patent application number CN 201811282182.
However, the two types of back-illuminated photodiodes have the following problems in practical application, and most of photons form transversely-propagated electromagnetic waves on the surface of metal due to the existence of the metal plasmon effect in chinese patent CN101350378B of filed et al, so that the reflection efficiency is reduced, the capability of improving the responsivity is limited, and the actual improvement effect is only about 30%. In the method provided by the structure for improving the responsivity of the back-illuminated photodiode and the manufacturing method, the DBR reflecting layer is actually grown in the P region, although the reflection efficiency is high, the thickness of the DBR reflecting layer is too large, so that the detector is not beneficial to the process manufacturing; according to the method, the DBR reflecting layer needs to occupy the ohmic contact area of the active region, the ohmic contact area is reduced, the series resistance of the diode is increased, and the frequency and the saturation characteristics of the diode are reduced. Particularly, in the design of a high-speed high-power photodiode, the contact resistance is required to be as low as possible, and the influence is more obvious, so that the method is not suitable for manufacturing high-speed high-power chips with the power of 20GHz and more than 15 dB.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides a structure for improving the responsivity of a back-illuminated photodiode, which comprises a substrate, wherein an absorption layer, a gradual change layer, a window layer and an ohmic contact layer are grown on the substrate; the structure adopts a mesa chip structure; the active area of the mesa structure is provided with a passivation layer and a P-type metal layer, and the P-type metal layer is provided with a grating reflection layer; and an N electrode is led out from the N-type contact layer under the table top and forms a coplanar electrode with the P electrode.
Preferably, the grating reflective layer is composed of one-dimensional gratings and two-dimensional gratings of various structures.
Furthermore, each grating of the grating layer is sequentially arranged in the grating, and a gap is arranged between every two adjacent gratings.
Furthermore, each grating period is 1-5 microns, the duty ratio is 50% -90%, and the grating height is 0.05-1 micron, so that the reflection efficiency of the grating layer reaches more than 80%.
Preferably, the passivation film adopted by the grating reflection layer is a dielectric film such as silicon nitride and silicon dioxide, and the metal layer is CrAu, TiPtAu, TiAu and TiAl.
Preferably, the back surface of the substrate is a polished light inlet surface, the light inlet surface is a micro lens, and an antireflection film is deposited on the surface.
A method of fabricating a structure for improving responsivity of a back-illuminated photodiode, the method comprising:
s1 depositing the epitaxial material by PECVD to a thickness of
A silicon nitride SiNx dielectric film, and defining an active region area by a photoetching process;
s2, etching the active area to the substrate by adopting a dry etching or wet etching mode, and isolating the active area; wherein the dry etching can adopt an inductively coupled plasma etching ICP or reactive ion etching RIE mode; the wet etching can adopt acid series, acid-oxygen series and bromine series etching solutions, and the etching or etching depth needs to reach the n + InP substrate;
s3, depositing a SiNx, SiO2 or SiNxOy dielectric film on the passivation layer by adopting plasma enhanced chemical vapor deposition PECVD;
and S4, defining a grating morphology on the photoresist through a photoetching process. The required precision of the photoetching process is higher, and a stepping photoetching machine can be adopted to meet the requirements of high precision and high resolution
S5, transferring the grating pattern on the photoresist to the passivation layer formed in the step S3 through an ICP or RIE plasma etching process;
s6, forming a P-type ohmic contact metal or metal alloy by adopting a stripping process through evaporation or sputtering, wherein the selected metal or metal alloy comprises titanium Ti, platinum Pt, chromium Cr or gold Au;
s7, evaporating to form metal or metal alloy of N-type ohmic contact by adopting an electron beam or thermal evaporation process, wherein the selected metal or metal alloy comprises gold germanium nickel AuGeNi or gold Au;
s8, thinning and polishing the epitaxial wafer to 100-150 μm by adopting a chemical mechanical polishing mode;
s9, depositing on the back of the wafer
An anti-reflection antireflection film.
The grating reflection layer is arranged on the P-type metal layer, so that the reflection efficiency of the grating reflection layer on a light source reaches more than 80%, the conductive effect of an ohmic contact area of an original chip is not influenced after the grating reflection layer is added, and the responsivity of the high-speed high-power photodiode is improved.
Drawings
FIG. 1 is a schematic diagram of a conventional backside-illuminated photodiode chip using a metal layer as a reflective layer;
fig. 2 is a schematic structural diagram of a back-illuminated photodiode chip according to the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a structure for improving responsivity of a back-illuminated photodiode, which comprises a substrate, wherein an absorption layer, a gradient layer, a window layer and an ohmic contact layer are grown on the substrate, as shown in figure 2; the structure adopts a mesa chip structure; the active region of the mesa structure is provided with a passivation layer and a P-type metal layer, and the P-type metal layer is provided with a grating reflection layer; and an N electrode is led out from the N-type contact layer under the table top and forms a coplanar electrode with the P electrode.
The grating reflecting layer is composed of one-dimensional gratings and two-dimensional gratings with various structures; each grating of the grating layer is sequentially arranged in the grating, and a space is arranged between every two adjacent gratings; each grating period is 1-5 microns, the duty ratio is 50% -90%, and the grating height is 0.05-1 micron, so that the reflection efficiency of the grating layer is over 80%. After the grating reflecting layer is added, the conductive effect of the ohmic contact area of the original chip is not influenced.
Preferably, the grating period is 3 microns, the duty cycle is 70%, and the height of the grating is 0.5 microns.
The passive film adopted by the grating reflecting layer is a dielectric film such as silicon nitride and silicon dioxide, and the metal layer is CrAu, TiPtAu, TiAu, TiAl and the like.
The back of the substrate is a polished light-entering surface which is a micro lens, and an anti-reflection coating is deposited on the surface.
A method of fabricating a structure for improving responsivity of a back-illuminated photodiode, the method comprising:
s1 depositing the epitaxial material by PECVD to a thickness of
A silicon nitride SiNx dielectric film, and defining an active region area by a photoetching process;
s2, etching the active area to the substrate by adopting a dry etching or wet etching mode, and isolating the active area; wherein the dry etching can adopt an inductively coupled plasma etching ICP or reactive ion etching RIE mode; the wet etching can adopt acid series, acid-oxygen series and bromine series etching solutions, and the etching or etching depth needs to reach the n + InP substrate;
s3, depositing a SiNx, SiO2 or SiNxOy dielectric film on the passivation layer by adopting plasma enhanced chemical vapor deposition PECVD;
and S4, defining a grating morphology on the photoresist through a photoetching process. The required precision of the photoetching process is higher, and a stepping photoetching machine can be adopted to meet the requirements of high precision and high resolution
S5, transferring the grating pattern on the photoresist to the passivation layer formed in the step S3 through an ICP or RIE plasma etching process;
s6, forming a P-type ohmic contact metal or metal alloy by adopting a stripping process through evaporation or sputtering, wherein the selected metal or metal alloy comprises titanium Ti, platinum Pt, chromium Cr or gold Au;
s7, evaporating to form metal or metal alloy of N-type ohmic contact by adopting an electron beam or thermal evaporation process, wherein the selected metal or metal alloy comprises gold germanium nickel AuGeNi or gold Au;
s8, thinning and polishing the epitaxial wafer to 100-150 μm by adopting a chemical mechanical polishing mode;
s9, depositing on the back of the wafer
An anti-reflection antireflection film.
In this embodiment, the epitaxial material of the chip structure is grown on n by Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE)+-on the InP substrate, in order:
1) n-InP buffer layer
n-type InP buffer layer with carrier concentration not less than 1 × 1018cm-3The thickness is 0.1 to 1.0 μm;
2) i-InGaAs absorption layer
Intrinsic or extrinsic doping InGaAs as absorption layer with carrier concentration less than 1 × 1015cm-3The thickness is 0.4 to 1.2 μm;
3) n-InGaAsP graded layer
n-type InGaAsP (InGaAsP) graded layer with doping concentration not more than 1 × 1016cm-3The growth thickness is 0.03-0.1 micron;
4) n-InP cap layer
n-type indium phosphide (InP) cap layer with carrier concentration less than 1 × 1016cm-3The thickness is 0.1 to 1.0 μm; forming a P-type layer in the selected region after diffusion doping;
5) n-InGaAsP contact layer
n-type InGaAsP contact layer with carrier concentration less than 1 × 1016cm-3The thickness is 0.05 to 0.1 μm.
The process flow of the embodiment comprises the following steps:
1) deposition on epitaxial materials by Plasma Enhanced Chemical Vapor Deposition (PECVD)
A silicon nitride (SiNx) dielectric film, and defining an active region area by a photoetching process;
2) doping the shadow region into a P type by using MOCVD or closed tube diffusion technology; the P-type dopant includes zinc (Zn), cadmium (Cd), beryllium (Be), carbon (C), etc., and the diffusion depth must Be into the InGaAs absorption region.
3) Defining an n-type ohmic contact groove by adopting a dry etching or wet etching mode, wherein the dry etching can adopt an inductively coupled plasma etching (ICP) or Reactive Ion Etching (RIE) mode; the wet etching can adopt acid series, acid-oxygen series and bromine series etching solutions, and the etching or etching depth needs to reach the n + InP substrate.
4) Depositing a SiNx, SiO2 or SiNxOy dielectric film by adopting Plasma Enhanced Chemical Vapor Deposition (PECVD), and defining a grating pattern by photoetching and corrosion processes;
5) metals or metal alloys for P-type ohmic contacts are evaporated or sputtered by a lift-off process, and commonly used metals include titanium (Ti), platinum (Pt), chromium (Cr), gold (Au), and the like. In the embodiment, Ti/Pt/Au is preferably used as the P-type ohmic contact electrode and has the thickness of
6) The metal or metal alloy used for the N-type ohmic contact is evaporated by adopting a stripping process, and the common metal is gold germanium nickel (AuGeNi), gold (Au) and the like. AuGeNi/Au is preferably used as the N-type ohmic contact electrode in the embodiment, and the thickness is
7) Thinning and polishing the epitaxial wafer to 100-150 mu m by adopting a chemical mechanical polishing mode;
8) depositing on the back of the chip
An antireflective coating, preferably SiNx, is deposited by PECVD.
In the description of the present invention, it is to be understood that the terms "top", "bottom", "one end", "upper", "one side", "inner", "front", "rear", "center", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
In the present invention, unless otherwise expressly stated or limited, the terms "disposed," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integral; can be mechanically or electrically connected; the terms may be directly connected or indirectly connected through an intermediate, and may be communication between two elements or interaction relationship between two elements, unless otherwise specifically limited, and the specific meaning of the terms in the present invention will be understood by those skilled in the art according to specific situations.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (7)
1. A structure for improving the responsivity of a back-illuminated photodiode comprises a substrate, wherein an absorption layer, a gradient layer, a window layer and an ohmic contact layer are grown on the substrate; the structure adopts a mesa chip structure; the active area of the mesa structure is provided with a passivation layer and a P-type metal layer, and the P-type metal layer is provided with a grating reflection layer; and an N electrode is led out from the N-type contact layer under the table top and forms a coplanar electrode with the P electrode.
2. A structure for improving responsivity of a back-illuminated photodiode according to claim 1, wherein the grating reflection layer is constituted of one-dimensional gratings and two-dimensional gratings of various structures.
3. A structure for improving responsivity of a back-illuminated photodiode according to claim 2, wherein the gratings of the grating layer are arranged in sequence in a grating with a space provided between two adjacent gratings.
4. A structure for improving responsivity of a back-illuminated photodiode according to claim 2, wherein each grating period is 1-5 microns, the duty cycle is 50% -90%, and the grating height is 0.05-1 micron, so that the reflection efficiency of the grating layer is above 80%.
5. The structure of claim 1, wherein the passivation film used for the grating reflective layer is a dielectric film such as silicon nitride and silicon dioxide, and the metal layer is CrAu, TiPtAu, TiAu and TiAl.
6. A structure for improving the responsivity of a back-illuminated photodiode according to claim 1, wherein the back surface of the substrate is a polished light entrance surface, the light entrance surface is a microlens, and an antireflection film is deposited on the surface.
7. A method of fabricating a structure for improving responsivity of a back-illuminated photodiode, the method comprising:
s1 depositing the epitaxial material by PECVD to a thickness of
A silicon nitride SiNx dielectric film, and defining an active region area by a photoetching process;
s2, etching the active area to the substrate by adopting a dry etching or wet etching mode, and isolating the active area; wherein the dry etching can adopt an inductively coupled plasma etching ICP or reactive ion etching RIE mode; the wet etching can adopt acid series, acid-oxygen series and bromine series etching solutions, and the etching or etching depth needs to reach the n + InP substrate;
s3, depositing a SiNx, SiO2 or SiNxOy dielectric film on the passivation layer by adopting plasma enhanced chemical vapor deposition PECVD;
s4, defining a grating morphology on the photoresist through a photoetching process; the required precision of the photoetching process is higher, and a stepping photoetching machine can be adopted to meet the requirements of high precision and high resolution;
s5, transferring the grating pattern on the photoresist to the passivation layer formed in the step S3 through an ICP or RIE plasma etching process;
s6, forming a P-type ohmic contact metal or metal alloy by adopting a stripping process through evaporation or sputtering, wherein the selected metal or metal alloy comprises titanium Ti, platinum Pt, chromium Cr or gold Au;
s7, evaporating to form metal or metal alloy of N-type ohmic contact by adopting an electron beam or thermal evaporation process, wherein the selected metal or metal alloy comprises gold germanium nickel AuGeNi or gold Au;
s8, thinning and polishing the epitaxial wafer to 100-150 μm by adopting a chemical mechanical polishing mode;
s9, depositing on the back of the wafer
An anti-reflection antireflection film.
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