CN218730973U - Single-carrier current sub-detector structure - Google Patents

Abstract

The utility model discloses a single-carrier current detector structure, which adopts a semi-insulating InP substrate, and a p-type diffusion area is arranged in a step area, thereby realizing electrical insulation and reducing the capacitance of the detector to the maximum extent, thereby improving the switching speed and the bandwidth of the detector; the diameter of the step region is larger than that of the p-type diffusion region, so that the side face of the step region is provided with a semi-insulating high-resistance material (BCB or PBO material), and dark current can be further reduced.

Description

Single-carrier flow sub-detector structure

Technical Field

The utility model relates to a photoelectric detector technical field relates to a single-carrier current sub-detector structure particularly.

Background

With the continuous development and the increasing maturity of the photoelectric communication technology, the response speed, the bandwidth and other performances of the existing optical communication system can hardly meet the requirements of people. As an important part of the optical-electrical communication system, the optical-electrical signal detector is also a research hotspot at present.

On the basis of a PIN type photoelectric detector, in order to improve the response rate of the device, a single-row carrier structure is also provided. In a single-row carrier photodetector, only electrons are active carriers and participate in forming the output current. Because electrons have a light mass and a high mobility, while holes have a high mass and a low mobility, in a conventional PIN photodiode, the response time of the holes is long, which results in a low response rate of the whole device, and therefore, a detector with a response speed greatly improved compared with that of the conventional PIN detector is urgently needed; meanwhile, the phenomenon of tailing is common in the Zn diffusion process, which has great harm to the traditional balance detector.

SUMMERY OF THE UTILITY MODEL

In order to solve the technical scheme not enough, the utility model aims to provide a singly carry the current son detector structure.

The purpose of the utility model is realized by the following technical proposal.

The single-carrier photon detector structure comprises a step region, an N-type InP buffer layer I and a semi-insulating InP substrate, wherein the N-type InP buffer layer I and the semi-insulating InP substrate are positioned below the step region, and the step region comprises an N-type InP buffer layer II, an N-type DBR reflecting region, an N-type InP drift layer, an N-type InGaAsP transition layer, an In transition layer and an In transition layer which are sequentially arranged from bottom to top _0.53 Ga _0.47 As absorption layer and intrinsic In _0.52 Al _0.48 The N-type InP buffer layer I and the N-type InP buffer layer II are integrally formed;

the upper surface of the intrinsic InP cover layer is provided with a SiN film, and a Zn diffusion window is formed in the SiN film so that the intrinsic InP cover layer below the SiN film is exposed;

a p-type diffusion region is arranged below the exposed intrinsic InP cover layer, and the depth of the p-type diffusion region is from the upper surface of the intrinsic InP cover layer to the In _0.53 Ga _0.47 A lower surface of the As absorption layer;

a P metal electrode forming ohmic contact is arranged on one side of the Zn diffusion window, the P metal electrode extends to the upper surface of the SiN film adjacent to the P metal electrode, and an N metal electrode is arranged on the upper surface of the first N-type InP buffer layer;

the side face of the step region, the upper surface of the SiN film and the upper surface of the joint of the step region and the N metal electrode are provided with side wall passivation layers, the side wall passivation layers extend to the upper surface of the N metal electrode, antireflection films are arranged on all the exposed upper surfaces, and VIA holes are formed in the antireflection films above the P metal electrode and the N metal electrode.

In the above technical solution, the step region includes a p-type diffusion region, and a difference in radius between the step region and the p-type diffusion region is 5 to 50 μm.

In the technical scheme, a gap exists between the N metal electrode and the step region, and the distance of the gap is 5-50 μm.

In the above technical solution, the sidewall passivation layer is made of BCB or PBO material, and the thickness of the sidewall passivation layer is 1 to 20 μm.

In the above technical solution, the thickness of the N-type InP buffer layer is 0.5 μm, and the doping concentration is 5 × 10 ¹⁷ /cm ³ 。

In the technical scheme, the N-type DBR reflecting region is composed of a plurality of layers of InP and InAlGaAs, the thickness of each layer of InP and InAlGaAs is 1/4 of the effective wavelength of light with the wavelength of 1550nm in the material, the number of layers of InP and InAlGaAs is more than or equal to 10, and the reflectivity of the N-type DBR reflecting region to the light with the wavelength of 1300-1700 nm is more than or equal to 70%.

In the above technical solution _0.53 Ga _0.47 The thickness of the As absorption layer is 1 to 4 μm.

In the above technical solution, the thickness of the N-type InP drift layer is 0.1 to 1 μm, and the doping concentration is 5 × 10 ¹⁵ ～2×10 ¹⁷ /cm ³ 。

In the above technical solution, intrinsic In _0.52 Al _0.48 Of As electron diffusion barriersThe thickness is 10-200 nm.

In the above technical solution, the thickness of the SiN film is 100nm.

In the above technical solution, in _0.53 Ga _0.47 The p-type doping concentration of the As absorption layer is from 5 multiplied by 10 from top to bottom ¹⁷ ～5×10 ¹⁸ /cm ³ Reduced to 1 × 10 ¹⁷ ～5×10 ¹⁷ /cm ³ 。

In the above technical solution, the upper surface of the p-type diffusion region is circular, and the radius thereof is 10 to 2000 μm.

In the technical scheme, the thickness of the SiN antireflection film is 200nm, and the reflectivity of the SiN antireflection film to light with the wavelength of 1310 nm-1700 nm is greater than or equal to 70%.

In the above technical solution, the thickness of the semi-insulating InP substrate is 50 to 200 μm.

The utility model discloses an advantage and beneficial effect do:

the utility model discloses a single-carrier photon detector structure, the step is regional big than the diameter of p type diffusion region for form electricity and keep apart, the benefit of doing so is:

1. shan Zailiu the depth of the p-type diffusion region of the sub-detector covers the entire In _0.53 Ga _0.47 As absorption layer capable of securing In _0.53 Ga _0.47 The As absorption layer has a suitable p-type doping, in the central region of the detector _0.53 Ga _0.47 The concentration of the As absorption layer p doping is gradually reduced from top to bottom, and the doping gradient is In _0.53 Ga _0.47 The As absorption layer forms a weak electric field, which helps electrons In _0.53 Ga _0.47 Transport in the As absorber layer increases the speed of the detector.

2. In the single-carrier neutron detector of the present invention _0.53 Ga _0.47 The As absorption layer has doping gradient to help electrons In _0.53 Ga _0.47 Transport in the As absorber layer.

3. The utility model discloses a semi-insulating InP substrate, and p type diffusion zone is in the step region, both can realize that electricity is insulating, the electric capacity that reduces the detector that again can furthest to improve the switching speed and the bandwidth of detector.

4. The diameter of the step region is larger than that of the p-type diffusion region, so that the side face of the step region is provided with a semi-insulating high-resistance material (BCB or PBO material), and dark current can be further reduced.

Drawings

Fig. 1 is a schematic diagram of the overall structure of the single-carrier detector of the present invention.

Fig. 2 is a schematic flow chart of a first step of the flow detector according to the present invention.

Fig. 3 is a schematic flow chart of step two to step four of the single-carrier detector of the present invention.

Fig. 4 is a schematic flow chart of step five of the single-carrier detector of the present invention.

Fig. 5 is a schematic flow chart of step six to step seven of the single-carrier flow detector according to the present invention.

Fig. 6 is a schematic flow chart of step eight of the single-carrier detector according to the present invention.

Fig. 7 is a schematic flow chart of step nine of the single-carrier flow detector according to the present invention.

Wherein the content of the first and second substances,

1: a semi-insulating InP substrate, and a semiconductor substrate,

2: an N-type InP buffer layer is formed on the substrate,

2-1: the first N-type InP buffer layer is,

2-2: a second N-type InP buffer layer,

3: the reflective region of the N-type DBR,

4: an N-type InP drift layer is formed on the substrate,

5: an N-type InGaAsP transition layer,

6：In _0.53 Ga _0.47 an As absorption layer is arranged on the substrate,

7: intrinsic In _0.52 Al _0.48 An As electron diffusion barrier layer, a barrier layer,

8: an intrinsic type InP cap layer is formed,

9: a thin film of SiN, which is a thin film,

10: the window of the Zn diffusion is shown,

11: a p-type diffusion region is formed in the substrate,

12: in the region of the step(s),

13: a P metal electrode is arranged on the substrate,

14: n metal electrodes are arranged on the surface of the substrate,

15: a sidewall passivation layer is formed on the substrate,

16: a SiN anti-reflective film is formed on the substrate,

17: VIA holes.

Detailed Description

The technical solution of the present invention will be further described with reference to the following specific examples.

Example 1

As shown In FIG. 1, a single-carrier photon detector structure comprises a step region, a first N-type InP buffer layer 2-1 and a semi-insulating InP substrate 1, wherein the first N-type InP buffer layer 2-2, a N-type DBR reflection region 3, an N-type InP drift layer 4, an N-type InGaAsP transition layer 5 and an In transition layer 1 are arranged below the step region, and the step region 12 comprises the second N-type InP buffer layer 2-2, the N-type DBR reflection region 3, the N-type InP drift layer 4, the N-type InGaAsP transition layer 5 and the In transition layer which are arranged In sequence from bottom to top _0.53 Ga _0.47 As absorption layer 6, intrinsic In _0.52 Al _0.48 The N-type InP buffer layer I2-1 and the N-type InP buffer layer II 2-2 are integrally formed;

the upper surface of the intrinsic InP cover layer 8 is provided with a SiN film 9, and the SiN film 9 is provided with a Zn diffusion window 10 so as to expose the intrinsic InP cover layer 8 below the SiN film 9;

a p-type diffusion region 11 is provided under the exposed intrinsic-type InP cap layer 8, the depth of the p-type diffusion region 11 is from the upper surface of the intrinsic-type InP cap layer 8 to In _0.53 Ga _0.47 The lower surface of the As absorption layer 6;

a P metal electrode 13 forming ohmic contact is arranged on one side of the Zn diffusion window 10, the P metal electrode 13 is connected with a part of the SiN film 9, and an N metal electrode 14 is arranged on the upper surface of the N-type InP buffer layer I2-1;

and a side wall passivation layer 15 is arranged on the side surface of the step region 12, the upper surface of the SiN film 9 and the upper surface of the joint of the step region 12 and the N metal electrode 14, the side wall passivation layer 15 extends to the upper surface of the N metal electrode 14, antireflection films are arranged on all exposed upper surfaces, and VIA holes 17 are formed in the antireflection films above the P metal electrode 13 and the N metal electrode 14.

Further, in this embodiment, the thickness of the N-type InP buffer layer 2 is 0.5 μm and the doping concentration is 5 × 10 ¹⁷ /cm ³ The function of the method is to better match the difference of lattice constants caused by different growth conditions between epitaxial layer materials on the semi-insulating InP substrate 1 and the N-type InP buffer layer 2, and ensure the growth quality of the epitaxial layer; the N-type DBR reflecting region 3 consists of a plurality of layers of InP and InAlGaAs, the thickness of each layer of InP and InAlGaAs is 1/4 of the effective wavelength of light with the wavelength of 1550nm in the material, the light-emitting wavelength of the InAlGaAs is 1190nm, the thickness of the InAlGaAs is 93nm, the number of layers of the InP and InAlGaAs is more than or equal to 10, and the reflectivity of the N-type DBR reflecting region 3 to the light with the wavelength of 1550nm is 80 percent; the thickness of the N-type InP drift layer 4 is 1 μm, and the doping concentration is 5 × 10 ¹⁵ /cm ³ ；In _0.53 Ga _0.47 The As absorption layer 6 has a thickness of 1 μm, which is a photogenerated carrier generation layer, and has a low thickness, which reduces the diffusion time of photogenerated electrons In the layer, and at the same time, since the N-type DBR reflective layer can reflect non-absorbed light back to In _0.53 Ga _0.47 The As absorption layer carries out secondary absorption, so that the response speed of the single-carrier detector is ensured; intrinsic In _0.52 Al _0.48 The thickness of the As electron diffusion barrier layer 7 is 20nm, and the As electron diffusion barrier layer is used for preventing photo-generated electrons from diffusing upwards, so that the single carrier transport characteristic of the detector is guaranteed.

Further, in the present embodiment, the step region 12 includes the p-type diffusion region 11, and the difference in radius between the step region 12 and the p-type diffusion region 11 is 5 to 50 μm.

Further, in the present embodiment, a gap exists between the N metal electrode 14 and the step region 12, and the distance of the gap is 5 μm.

Further, in this embodiment, the material of the sidewall passivation layer 15 is BCB or PBO, and the thickness of the sidewall passivation layer 15 is 4 μm.

Further, in the present embodiment, the thickness of the SiN film 9 is 100nm.

Further, in the present embodiment _0.53 Ga _0.47 The P-type doping concentration In the As absorption layer 6 is gradually reduced from top to bottom to form P-type In with P-type doping concentration gradient _0.53 Ga _0.47 As absorption layer 6 with concentration of 2X 10 ¹⁸ /cm ³ Reduced to 1 × 10 ¹⁷ /cm ³ Wherein the upper surface of the p-type diffusion region 11 is circular and has a radius of 25 μm.

Further, in the present embodiment, the thickness of the SiN antireflection film 16 is 200nm, and the reflectance of the SiN antireflection film 16 for the light with the wavelength of 1550nm is greater than 90%.

Further, in the present embodiment, the thickness of the semi-insulating InP substrate 1 is 150 μm.

The single-carrier detector of this embodiment adopts a front incidence mode, and light enters through the SiN antireflection film 16 and is In _0.53 Ga _0.47 The As absorption layer 6 absorbs and the incompletely absorbed light is reflected back to In through the N-type DBR reflection region 3 _0.53 Ga _0.47 As absorbing layer 6, thereby performing secondary absorption.

Example 2

As shown in fig. 1-7, this embodiment describes a method for manufacturing the Shan Zailiu sub-detector, which comprises the following steps:

the method comprises the following steps: an N-type InP buffer layer 2, an N-type DBR reflecting region 3, an N-type InP drift layer 4, an N-type InGaAsP transition layer 5 (1 or more layers), in are sequentially grown on a semi-insulating InP substrate 1 by using the deposition mode of MOCVD or MBE _0.53 Ga _0.47 As absorption layer 6, intrinsic In _0.52 Al _0.48 An As electron diffusion barrier layer 7 and an intrinsic type InP cap layer 8.

Step two: a SiN thin film 9 is deposited on the intrinsic InP cap layer 8 by PECVD (Plasma Enhanced Chemical Vapor Deposition).

Step three: forming a Zn diffusion window 10 pattern array on the surface of the SiN film 9 by using photoresist, removing the SiN film 9 on the Zn diffusion window 10 pattern array by using an etching method to expose the intrinsic InP cover layer 8 below, and removing the photoresist after the etching is finished to form the Zn diffusion window 10.

Step four: performing Zn diffusion on the Zn diffusion window 10 region by MOCVD or furnace tube method to form a P-type diffusion region 11 and a non-active region surrounding the P-type diffusion region 11, wherein the Zn-diffused region comprises an intrinsic InP cover layer 8 and intrinsic In _0.52 Al _0.48 As electron diffusion barrier layer 7 and In _0.53 Ga _0.47 After the As absorption layer 6, zn diffusion, an intrinsic InP cap layer 8, in _0.52 Al _0.48 As electron diffusion barrier layer and In _0.53 Ga _0.47 The As absorption layer is converted into P type.

Step five: forming a step pattern on the upper surfaces of the SiN film 9 and the P type diffusion region 11 by using a photoresist, and forming a step region 12 and an N type contact region surrounding the step region 12 by step etching including an intrinsic type InP cap layer 8, intrinsic type In _0.52 Al _0.48 As electron diffusion barrier layer 7, in _0.53 Ga _0.47 An As absorption layer 6, an N-type InGaAsP transition layer 5 (1 or more), an N-type InP drift layer, an N-type DBR reflective region 3, and an N-type InP buffer layer 2.

Step six: forming a continuous P metal electrode 13 pattern on the upper surface of the SiN film 9 adjacent to the partial region of the Zn diffusion window 10 by using photoresist, evaporating metal on the outer surface of the P metal electrode pattern, stripping the metal, annealing to form a P metal electrode 13, wherein the contact between the P metal electrode pattern and the SiN film 9 is ohmic contact.

Step seven: an N electrode pattern is formed on the N-type contact area on one side of the photoresist step area 12, metal is evaporated by using an electron beam evaporation or magnetron sputtering method, metal stripping and annealing are carried out, an N metal electrode 14 is formed, and the N metal electrode 14 is in contact with the N-type InP buffer layer 2 to form ohmic contact.

Step eight: and coating BCB or PBO material on all exposed upper surfaces by using a glue coating method, forming a BCB or PBO pattern 15 by using a photoetching and developing method, covering the side surface of the step region 12 by using the BCB or PBO pattern 15, exposing the N metal electrode 14 and the P metal electrode 13 outside after photoetching and developing, baking and curing to complete passivation of the side surface of the step region 12, and forming a side wall passivation layer.

Step nine: the SiN antireflective film 16 is deposited on all exposed outer surfaces by PECVD deposition.

Step ten: forming a VIA hole 17 pattern right above the P metal electrode 13 and the N metal electrode 14 by using photoresist, removing the SiN antireflection film 16 in the VIA hole 17 pattern by using an etching method to expose the P metal electrode 13 and the N metal electrode 14, and removing the photoresist after the etching is finished to obtain the VIA hole 17.

Step eleven: and thinning and polishing the back surface of the semi-insulating InP substrate 1, wherein the thickness of the thinned and polished semi-insulating InP substrate is 150 mu m.

The invention has been described above by way of example, and it should be noted that any simple variants, modifications or other equivalent substitutions by a person skilled in the art without spending creative effort may fall within the scope of protection of the present invention without departing from the core of the present invention.

Claims (10)

1. The single-carrier photon detector structure is characterized by comprising a step region, an N-type InP buffer layer I and a semi-insulating InP substrate, wherein the N-type InP buffer layer I and the semi-insulating InP substrate are positioned below the step region, and the step region comprises an N-type InP buffer layer II, an N-type DBR reflecting region, an N-type InP drift layer, an N-type InGaAsP transition layer, an In transition layer and an In drift layer which are sequentially arranged from bottom to top _0.53 Ga _0.47 As absorption layer and intrinsic In _0.52 Al _0.48 The N-type InP buffer layer I and the N-type InP buffer layer II are integrally formed;

the upper surface of the intrinsic InP cover layer is provided with a SiN film, and a Zn diffusion window is arranged on the SiN film so as to expose the intrinsic InP cover layer below the SiN film;

a p-type diffusion region is arranged below the exposed intrinsic InP cover layer, and the depth of the p-type diffusion region is from the upper surface of the intrinsic InP cover layer to In _0.53 Ga _0.47 A lower surface of the As absorption layer;

a P metal electrode forming ohmic contact is arranged on one side of the Zn diffusion window, the P metal electrode extends to the upper surface of the SiN thin film adjacent to the P metal electrode, and an N metal electrode is arranged on the upper surface of the first N-type InP buffer layer;

the side in the step region, the upper surface of SiN film, the step region and the upper surface of N metal electrode junction set up the lateral wall passivation layer, the lateral wall passivation layer extends to the upper surface of N metal electrode, sets up the SiN antireflection film at all upper surfaces that expose outside, sets up the VIA hole on the SiN antireflection film of the top of P metal electrode and N metal electrode.

2. The single-carrier detector structure of claim 1, wherein the step region comprises a p-type diffusion region, and the difference between the radii of the step region and the p-type diffusion region is 5-50 μm.

3. The structure of claim 1, wherein a gap exists between the N metal electrode and the step region, and the distance of the gap is 5-50 μm.

4. The structure of claim 1, wherein the sidewall passivation layer is made of BCB or PBO material, and has a thickness of 1-20 μm.

5. The structure of claim 1, wherein the N-type InP buffer layer has a thickness of 0.5 μm and a doping concentration of 5 x 10 ¹⁷ /cm ³ ；In _0.53 Ga _0.47 The thickness of the As absorption layer is 1-4 μm; the thickness of the N-type InP drift layer is 0.1-1 μm, and the doping concentration is 5 × 10 ¹⁵ ～2×10 ¹⁷ /cm ³ (ii) a Intrinsic In _0.52 Al _0.48 The thickness of the As electron diffusion impervious layer is 10-200 nm; the thickness of the SiN film was 100nm.

6. The structure of claim 1, wherein the N-type DBR reflective region is composed of a plurality of layers of InP and inalgas, each having a thickness of 1/4 of the optically effective wavelength of the material for a light ray having a wavelength of 1550nm, the number of layers of InP and inalgas being 10 or more, and the N-type DBR reflective region having a reflectivity of 70% or more for a light ray having a wavelength of 1300-1700 nm.

7. The structure of claim 1, wherein In is _0.53 Ga _0.47 The p-type doping concentration of the As absorption layer is from 5 multiplied by 10 from top to bottom ¹⁷ ～5×10 ¹⁸ /cm ³ Reduced to 1 × 10 ¹⁷ ～5×10 ¹⁷ /cm ³ 。

8. The structure of claim 1, wherein the upper surface of the p-type diffusion region is circular and has a radius of 10-2000 μm.

9. The single-carrier photon detector structure of claim 1, wherein the SiN anti-reflection film has a thickness of 200nm, and a reflectivity of the SiN anti-reflection film for light with a wavelength of 1310nm 1700nm is greater than or equal to 70%.

10. The structure of claim 1, wherein the thickness of the semi-insulating InP substrate is 50-200 μm.

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