CN115215285B - (111) Silicon transfer process based on silicon nitride anodic bonding - Google Patents
(111) Silicon transfer process based on silicon nitride anodic bonding Download PDFInfo
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- CN115215285B CN115215285B CN202110431854.5A CN202110431854A CN115215285B CN 115215285 B CN115215285 B CN 115215285B CN 202110431854 A CN202110431854 A CN 202110431854A CN 115215285 B CN115215285 B CN 115215285B
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 87
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 86
- 239000010703 silicon Substances 0.000 title claims abstract description 86
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 81
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 81
- 238000000034 method Methods 0.000 title claims abstract description 58
- 230000008569 process Effects 0.000 title claims abstract description 38
- 238000012546 transfer Methods 0.000 title claims abstract description 27
- 238000005260 corrosion Methods 0.000 claims abstract description 75
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- 238000004519 manufacturing process Methods 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims description 77
- 239000002184 metal Substances 0.000 claims description 53
- 239000000758 substrate Substances 0.000 claims description 32
- 239000007788 liquid Substances 0.000 claims description 18
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 11
- 238000000059 patterning Methods 0.000 claims description 11
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 238000001039 wet etching Methods 0.000 claims description 9
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 8
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims 1
- 239000013078 crystal Substances 0.000 abstract description 33
- 239000010410 layer Substances 0.000 description 198
- 235000012431 wafers Nutrition 0.000 description 59
- 238000010586 diagram Methods 0.000 description 12
- 239000000463 material Substances 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000000708 deep reactive-ion etching Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
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- 238000000206 photolithography Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000000347 anisotropic wet etching Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
- B81C1/00539—Wet etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00444—Surface micromachining, i.e. structuring layers on the substrate
- B81C1/00468—Releasing structures
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
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Abstract
The invention provides a (111) silicon transfer process based on silicon nitride anodic bonding, wherein high-quality anodic bonding can be realized through a low-stress silicon nitride layer, and a bonding structure is protected from corrosion of a subsequent release process, so that a stable bonding structure is formed; by closing the release groove and the corrosion protection layer, a sensitive movable structure which has the advantages of accurate and controllable thickness, no crystal orientation limitation and complete release can be formed, so that the invention can realize the high-precision and low-cost manufacture of the MEMS device with any crystal orientation on the (111) crystal face.
Description
Technical Field
The invention belongs to the technical field of micro-nano processing, and relates to a (111) silicon transfer process based on silicon nitride anodic bonding.
Background
Monocrystalline silicon is a good anisotropic material and has wide application in micro-electromechanical system technology. According to crystal planes on the surface of the silicon wafer, common silicon wafers can be divided into (100) silicon wafers, (111) silicon wafers and the like. Among them, (100) silicon chips are widely used in CMOS integrated circuits and bipolar integrated circuits. As is well known, single crystal silicon is an anisotropic material, and the in-plane crystal orientation of a commonly used (100) silicon wafer is a [ nm0] crystal orientation, and obvious anisotropism exists among the crystal orientations. For example, the Young's modulus E of [100] crystal-oriented silicon is 1.31X10 11 Pa, the shear modulus G is 0.796X10 11 Pa, and the Young's modulus E of [110] crystal-oriented silicon is 1.7X10 11 Pa, the shear modulus G is 0.65X10 11 Pa, and the difference in mechanical properties is significant. And in terms of electrical characteristics, the mobility of the [100] crystal orientation and the [110] crystal orientation have obvious differences. And researches show that the N-type structure in the [100] crystal direction has nonlinear frequency temperature coefficient, has a point with 0 frequency temperature coefficient, and can realize the low-temperature silicon-based resonator by keeping the resonance structure at the point with 0 frequency temperature coefficient through a constant temperature control technology according to the phenomenon. However, in the N-type structure, the phenomenon only exists in the [100] crystal orientation, the temperature coefficient of the structural frequency of the N-type [110] crystal orientation on the same silicon wafer hardly changes along with the doping concentration, and the temperature coefficient of the structural frequency is as high as-29 ppm/. Degree.C near the normal temperature. Similar phenomena exist for P-type (100) silicon wafers. On a P-type (100) silicon wafer, the frequency temperature coefficient of the [110] crystal orientation changes along with the change of doping concentration, and the frequency temperature coefficient can be reduced to-5 ppm/DEG C during heavy doping. But the temperature coefficient of the frequency of the [100] crystal orientation on the same silicon chip is hardly changed along with the temperature coefficient of the frequency. (100) The anisotropic nature of silicon wafers does not have a significant adverse effect on typical integrated circuits and microelectromechanical systems (MEMS), but for in-plane multiple degree of freedom resonant structures, significant anisotropies can cause significant mismatch in resonant frequencies, frequency temperature coefficients, etc. between the degrees of freedom.
(111) Silicon wafers are currently used primarily in bipolar integrated circuits, but are not commonly used in CMOS integrated circuits. (111) Parameters such as Young modulus, frequency temperature coefficient, piezoresistance coefficient and the like of each crystal orientation in the silicon sheet have quasi-anisotropic characteristics, and are suitable for manufacturing in-plane multi-degree-of-freedom resonant structures.
Currently, MEMS structures on (111) silicon wafers are typically fabricated using (111) SOI silicon wafers or MIS processes (Microhole Inter-ETCH AND SEALING) and the like. However, the SOI silicon wafer has high cost, and is difficult to realize low-cost commercial manufacture, while the MIS process and the like realize the processing of the MEMS structure by utilizing the anisotropic wet etching characteristic of silicon, and the processing precision can be comparable to that of the SOI process and is low in cost. The main principle of the MIS process is as follows: the corrosion rate of monocrystalline silicon in alkaline corrosive liquids such as KOH, TMAH and the like is different according to the crystal orientation, a slow corrosion surface appears at the position with slow corrosion rate at the concave angle and the mask boundary, and a fast corrosion surface appears at the position with fast corrosion rate at the convex angle. As shown in fig. 1a to 1c and fig. 2, two square release grooves 1 are etched on a (111) silicon wafer, then an etching protection layer 2 is deposited on the side wall of the release groove 1, the junction between the protection layer 2 and the side wall is regarded as a mask boundary a, the bottom of the side wall is regarded as a concave angle b, the lower half part of each release groove 1 is corroded in a hexagonal shape in etching solution, as shown in fig. 1b, and after the non-release areas of the two hexagons are overlapped, a convex angle is formed, the corrosion rate is accelerated at the position, and finally, a larger hexagon is formed, as shown in fig. 1c, and the corrosion is finally stopped on each (111) surface, as shown in fig. 2. The (111) silicon wafer has the characteristic of lateral corrosion in corrosive liquid, and the common (111) processing technology is to realize the structure manufacture with uniform thickness and strictly limited crystal orientation on the (111) silicon wafer according to the characteristic. The method needs to utilize the anisotropic corrosion property of silicon, and the release window must be manufactured along a specific crystal direction, so that the manufactured structure also has definite directivity, and therefore, the method has great limitation.
Therefore, it is necessary to provide a novel (111) silicon transfer process based on silicon nitride anodic bonding.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a (111) silicon transfer process based on anodic bonding of silicon nitride, which is used to solve the above-mentioned series of manufacturing problems encountered in the prior art of fabricating MEMS structures on (111) silicon wafers.
To achieve the above and other related objects, the present invention provides a (111) silicon transfer process based on silicon nitride anodic bonding, comprising the steps of:
providing (111) a silicon wafer;
Patterning the (111) silicon wafer, and manufacturing raised anchor points on the surface of the (111) silicon wafer;
forming a silicon nitride layer, wherein the silicon nitride layer covers the anchor points;
forming a first corrosion protection layer, wherein the first corrosion protection layer covers the surfaces of the silicon nitride layer and the (111) silicon wafer;
patterning the first corrosion protection layer and the (111) silicon wafer to form a first groove, wherein the first groove comprises a structural pattern groove and a closed release groove;
forming a second corrosion protection layer, wherein the second corrosion protection layer covers the side wall and the bottom of the first groove;
removing the second corrosion protection layer at the bottom of the first groove, and etching to form a second groove based on the first groove;
Patterning the first corrosion protection layer to expose the silicon nitride layer;
providing a bonding substrate, and performing anode bonding on the bonding substrate and the silicon nitride layer;
wet etching is carried out by adopting anisotropic etching liquid so as to form a through hole based on the second groove;
and removing the first corrosion protection layer and the second corrosion protection layer.
Optionally, the silicon nitride layer is a low-stress silicon nitride layer with internal stress of tensile stress, and the stress is less than 100MPa.
Optionally, the anchor point has a thickness greater than a thickness of the silicon nitride layer; the thickness of the anchor point is smaller than 2 mu m; the thickness of the silicon nitride layer is less than 1 μm.
Optionally, the silicon nitride layer extends to the surface of the (111) silicon wafer, and the extension width is more than 2 times of the photolithographic minimum line width.
Optionally, the thickness of the first corrosion protection layer is more than 2 times that of the second corrosion protection layer; the first corrosion protection layer comprises one or a combination of a TEOS layer, an LTO layer, a SiC layer and a SiO 2 layer; the second corrosion protection layer comprises one or a combination of a TEOS layer, an LTO layer, a SiC layer and a SiO 2 layer.
Optionally, the bonding substrate comprises a glass bonding substrate.
Optionally, the anisotropic etching solution comprises a KOH etching solution or a TMAH etching solution.
Optionally, after exposing the silicon nitride layer and before performing the bonding process, the method further includes a step of forming a first metal layer in the silicon nitride layer, and a step of forming a second metal layer on the surface of the bonding substrate, where the second metal layer is disposed corresponding to the first metal layer, so as to realize electrical connection through the first metal layer and the second metal layer.
Optionally, the method further comprises the step of forming a metal layer on the surface of the (111) silicon wafer so as to electrically connect the metal leads through the metal layer.
Optionally, the method of forming the silicon nitride layer, the first corrosion protection layer and the second corrosion protection layer includes an LPCVD method.
As described above, the (111) silicon transfer process based on silicon nitride anodic bonding of the present invention has the following advantageous effects:
1) The silicon wafer (111) is subjected to lateral corrosion in the anisotropic etching liquid, and the upper surface and the lower surface of the silicon wafer (111) are not corroded, so that after the sensitive movable structure is released in the anisotropic etching liquid, the thickness of the sensitive movable structure can be well controlled, and a structure with accurate and consistent thickness and controllability is realized;
2) And forming a closed release groove with a closed pattern on the (111) silicon wafer, and after anodic bonding is completed, putting the device into an anisotropic etching solution for release, wherein the structure layer can be completely released by the closed release groove and can be separated from the (111) silicon wafer. The technology can realize the transfer of the sensitive movable structure to the bonding substrate, and the direction design of the sensitive movable structure on the (111) silicon wafer is not limited by the crystal orientation, and can be oriented to any crystal orientation.
3) A low-stress silicon nitride layer is deposited on a (111) silicon wafer as a bonding layer, so that high-quality anodic bonding can be realized, bulk silicon at a bonding surface can be fully protected from etching by anisotropic corrosive liquid, and experiments show that a device taking the silicon nitride layer as a protective layer can resist the anisotropic corrosive liquid for at least more than one week, thereby preventing a sensitive movable structure from being separated from a bonding substrate and avoiding the bonding surface from being broken so as to form a stable structure.
Therefore, the invention can realize the sensitive movable structure with accurate and controllable thickness and any crystal orientation and the transfer of the structure, and can realize the high-precision and low-cost manufacture of MEMS devices with any crystal orientation on (111) crystal faces of a silicon-based oscillator, an accelerometer, a micromechanical gyroscope and the like.
Drawings
FIGS. 1a to 1c are schematic views showing the structures of (111) silicon wafers etched in an anisotropic etching solution in the prior art.
FIG. 2 is a schematic diagram showing a cross-sectional structure of a (111) silicon wafer etched in an anisotropic etching solution in the prior art.
FIG. 3 is a schematic flow chart of a (111) silicon transfer process based on anodic bonding of silicon nitride in an embodiment of the invention.
Fig. 4 is a schematic structural diagram of the present invention after anchor points are fabricated on the surface of the (111) silicon wafer.
Fig. 5 is a schematic diagram of a structure after forming a silicon nitride layer according to an embodiment of the invention.
Fig. 6 is a schematic structural diagram of the first corrosion protection layer according to the embodiment of the invention.
Fig. 7 is a schematic structural diagram of the first trench formed in the embodiment of the invention.
Fig. 8 is a schematic top view of fig. 7.
Fig. 9 is a schematic structural view of the second corrosion protection layer according to the embodiment of the present invention.
Fig. 10 is a schematic structural diagram of the second trench formed in the embodiment of the invention.
FIG. 11 is a schematic diagram of a photoresist mask formed according to an embodiment of the invention.
FIG. 12 is a schematic diagram showing the structure of the patterned first etching resist layer after exposing the silicon nitride layer according to an embodiment of the invention.
Fig. 13 is a schematic view of a structure of a bonding substrate and a silicon nitride layer after anodic bonding according to an embodiment of the present invention.
Fig. 14 is a schematic view of a structure after forming a through hole according to an embodiment of the invention.
Fig. 15 is a schematic structural view of a sensitive movable structure formed in an embodiment of the present invention.
Fig. 16 is a schematic structural diagram of the first metal layer formed according to an embodiment of the invention.
Fig. 17 is a schematic top view of fig. 16.
Fig. 18 is a schematic structural diagram of the second metal layer formed according to an embodiment of the invention.
Fig. 19 is a schematic top view of fig. 18.
Fig. 20 is a schematic structural diagram of the bonding of the first metal layer and the second metal layer according to an embodiment of the invention.
Fig. 21 is a schematic structural diagram of the metal layer formed on the front surface according to the embodiment of the invention.
Description of element reference numerals
1. Release slot
2. Protective layer
A mask boundary
B concave angle
100 (111) Silicon wafer
100A first surface
100B side wall
100C second surface
101. Anchor point
200. Silicon nitride layer
300. First corrosion protection layer
410. First groove
410A first trench bottom
410B first trench sidewall
411. First structural pattern groove
412. A first closing release groove
420. Second groove
420A second trench bottom
420B second trench sidewall
421. Second structural pattern groove
422. A second closing release groove
500. Second corrosion protection layer
600. Photoresist mask
700. Bonding substrate
800. Through hole
910. A first metal layer
920. Second metal layer
930. Metal layer
Q rapid etching region
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
As described in detail in the embodiments of the present invention, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present. As used herein, "between … …" is meant to include both endpoints.
In the context of the present application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be changed at will, and the layout of the components may be more complex.
As shown in fig. 3, the present embodiment provides a (111) silicon transfer process based on anodic bonding of silicon nitride, which includes the following steps:
providing (111) a silicon wafer;
Patterning the (111) silicon wafer, and manufacturing raised anchor points on the surface of the (111) silicon wafer;
forming a silicon nitride layer, wherein the silicon nitride layer covers the anchor points;
forming a first corrosion protection layer, wherein the first corrosion protection layer covers the surfaces of the silicon nitride layer and the (111) silicon wafer;
patterning the first corrosion protection layer and the (111) silicon wafer to form a first groove, wherein the first groove comprises a structural pattern groove and a closed release groove;
forming a second corrosion protection layer, wherein the second corrosion protection layer covers the side wall and the bottom of the first groove;
removing the second corrosion protection layer at the bottom of the first groove, and etching to form a second groove based on the first groove;
Patterning the first corrosion protection layer to expose the silicon nitride layer;
providing a bonding substrate, and performing anode bonding on the bonding substrate and the silicon nitride layer;
wet etching is carried out by adopting anisotropic etching liquid so as to form a through hole based on the second groove;
and removing the first corrosion protection layer and the second corrosion protection layer.
Specifically, the following is a further description with reference to fig. 4 to 21.
First, referring to fig. 4, a (111) silicon wafer 100 is provided, wherein a deviation of an upper surface of the (111) silicon wafer 100 from a (111) crystal plane is preferably less than ±1°.
The (111) wafer 100 may then be etched using Deep Reactive Ion Etching (DRIE) to create raised anchor points 101 on the (111) wafer 100 such that the (111) wafer 100 has a first surface 100a, sidewalls 100b and a second surface 100c, as in fig. 4, to facilitate bonding of sensitive movable structures to the bond substrate 700 during subsequent anodic bonding by the anchor points 101 to allow only the silicon nitride layer 200 to bond to the bond substrate 700 to provide a high quality bond structure. The process of fabricating the anchor 101 is not limited thereto, and is not limited thereto.
As an example, the thickness of the anchor point 101 is less than 2 μm, i.e., the difference in height between the first surface 100a and the second surface 100c is preferably less than 2 μm, such as 1 μm, 1.5 μm, etc., and may be specifically determined according to the process conditions, and the thickness of the silicon nitride layer 200 and the thickness of the first corrosion protection layer 300 to be formed later, without being excessively limited thereto.
Next, referring to fig. 5, a silicon nitride layer 200 is formed, and the silicon nitride layer 200 covers the anchor 101.
As an example, the silicon nitride layer 200 is a low stress silicon nitride layer having a tensile stress, and the stress is less than 100MPa.
Specifically, the silicon nitride layer 200 may be formed using an LPCVD method, but is not limited thereto. The silicon nitride layer 200 may be a low stress silicon nitride layer with a stress of less than 100MPa, such as a stress of 80MPa, 50MPa, etc., and a tensile stress. The thickness of the silicon nitride layer 200 may be less than 1 μm, such as 0.5 μm, etc., wherein the thickness of the silicon nitride layer 200 formed needs to be less than the thickness of the anchor 101 in order to facilitate subsequent use of the silicon nitride layer 200 on the anchor 101 as a bonding layer. The silicon nitride layer 200 is formed to cover the anchor 101, i.e., the first surface 100a and the sidewall 100b, and extends onto the second surface 100 c.
Preferably, the extension width of the silicon nitride layer 200 on the second surface 100c is at least 2 times greater than the minimum line width of the photolithography, so that the bonding interface can be formed by performing the subsequent anodic bonding with the bonding substrate 700 through the silicon nitride layer 200 on the first surface 100 a.
Next, referring to fig. 6, a first etching protection layer 300 is formed, and the first etching protection layer 300 covers the silicon nitride layer 200 and the surface of the (111) silicon wafer 100.
As an example, the first corrosion protection layer 300 includes one or a combination of a TEOS layer, an LTO layer, a SiC layer, and a SiO 2 layer.
Specifically, the first corrosion protection layer 300 may be formed using an LPCVD method, but is not limited thereto. The material selected for the first etching protection layer 300 should be able to withstand the anisotropic etching solution in the subsequent process, and should have good etching selectivity with the silicon nitride layer 200, so that the anisotropic etching solution can be used for performing wet etching to remove the first etching protection layer 300 without damaging the silicon nitride layer 200. The first etching protection layer 300 may be made of one or a combination of a TEOS layer, an LTO layer, a SiC layer, and a SiO 2 layer, for example, when the first etching protection layer is made of TEOS, a hydrofluoric acid solution may be used to etch and remove the TEOS, and the etching rate of the silicon nitride layer 200 by the hydrofluoric acid solution is extremely low, so that the thickness of the silicon nitride layer 200 is affected by the process of removing the TEOS.
Next, referring to fig. 7, the first etching protection layer 300 and the (111) silicon wafer 100 are patterned to form a first trench 410, wherein the first trench 410 includes a first structure pattern trench 411 and a first closed release trench 412.
Specifically, the first etch protection layer 300 may be etched to the (111) silicon wafer 100 by RIE, and then the (111) silicon wafer 100 may be etched using DRIE to form the first deep trench 410. The first closing release groove 412 is a closed pattern and surrounds the first structural pattern groove 411, as shown in fig. 8, so that the transfer of the sensitive movable structure to the bonding substrate 700 is ensured by closing the release ring, i.e. the first structural pattern groove 411, on the premise of using the anodic bonding process. The direction of the first structural pattern groove 411 is not limited by the crystal orientation, and can be rotated to various angles.
Next, referring to fig. 9, a second etching protection layer 500 is formed, and the second etching protection layer 500 covers the sidewalls 410a and the bottom 410b of the first trench 410.
As an example, the second corrosion protection layer 500 includes one or a combination of a TEOS layer, an LTO layer, a SiC layer, and a SiO 2 layer.
Specifically, the second corrosion protection layer 500 may be formed by an LPCVD method or the SiO 2 layer may be formed by a thermal oxidation method, but is not limited thereto. The second corrosion protection layer 500 may be one or a combination of TEOS layer, LTO layer, siC layer and SiO 2 layer. The thickness of the second corrosion protection layer 500 is smaller than the first corrosion protection layer 300, and preferably the thickness of the first corrosion protection layer 300 is 2 times or more the thickness of the second corrosion protection layer 500. The first corrosion protection layer 300 and the second corrosion protection layer 500 may be made of the same material or different materials, which is not limited herein.
Next, referring to fig. 10, the second etching protection layer 500 at the bottom 410a of the first trench is removed and etched to form a second trench 420 based on the first trench 410.
Specifically, the RIE method may be used to etch away the second corrosion protection layer 500 at the bottom 410a of the first trench, and the etching rate of the reactive ion etching to the lateral direction is far less than the etching rate to the downward direction, so that the second corrosion protection layer 500 at the sidewall 410b of the first trench can be well preserved in this etching. Meanwhile, since the thickness of the first etching protection layer 300 is greater than that of the second etching protection layer 500, the first etching protection layer 300 on the surface of the (111) silicon wafer 100 can also maintain a certain thickness under the condition that the RIE etching time is controlled. Next, the (111) silicon wafer 100 is etched using deep reactive ions, the etching depth may include 5 μm to 10 μm, such as 5 μm, 8 μm, and 10 μm, etc., and since only the first trench bottom 410a is not protected by the second etching protection layer 500, the first trench 410 will continue etching downward to form the second trench 420 based on the first trench 410, i.e., including the second structure pattern trench 421 and the second closed release trench 422, as shown in fig. 10.
Next, referring to fig. 11 and 12, the first etching protection layer 300 is patterned to expose the silicon nitride layer 200.
Specifically, front-side lithography is performed to form a photoresist mask 600, where the photoresist mask 600 has a lithography window exposing the anchor 101, and the lithography window is required to be smaller than the silicon nitride layer 200. The photoresist may be coated by spraying, but is not limited thereto. The photoresist should completely fill the second trench 420, and preferably is hardened at a low temperature for a long time to protect the second trench sidewall 420b from being damaged during the subsequent wet etching of the first etching protection layer 300. Next, the first etching protection layer 300 may be removed to expose the silicon nitride layer 200, and the photoresist mask 600 may be removed to expose the second trench sidewalls 420b and the second trench bottom 420a, as shown in fig. 12, to form a sensitive movable structure.
Next, referring to fig. 13, a bonding substrate 700 is provided, and the bonding substrate 700 and the silicon nitride layer 200 are subjected to anodic bonding. Among them, the bonding substrate 700 is preferably a glass bonding substrate such as borosilicate glass bonding substrate, but the kind of the bonding substrate 700 is not limited thereto.
Next, referring to fig. 14, an anisotropic etching solution is used to perform a wet etching process to form a through hole 800 based on the second trench 420.
Specifically, the bonded device is put into an anisotropic etching solution for wet etching, wherein the anisotropic etching solution can comprise KOH solution or TMAH solution and the like. The anisotropic etching liquid has extremely slow etching speed to the (111) crystal face of monocrystalline silicon, which is only 1/100 of the (100) crystal face, and is negligible in the actual etching process. Since the surface of the (111) silicon wafer 100 and the bottom 420a of the second trench are both (111) crystal planes, corrosion cannot be performed in the anisotropic etching solution, and the side wall of a part of the second trench 420 is protected by the second etching protection layer 500, so that the second trench is not corroded, and only the side wall of the part not covered by the second etching protection layer 500, that is, the side wall 420b of the second trench is not (111) plane, and is not protected by the second etching protection layer 500, so that a fast etching surface is formed, the etching speed is high, and the side wall is corroded inwards to form a fast etching region Q, so that the second trench 420 is converted into a through hole 800, as shown in fig. 14. When the second structure pattern groove 421 is etched from the bottom, the exposed surface becomes a reentrant or mask boundary, and the slow surface appears at this time, and the etching is finally terminated at the (111) surface, so that based on the second closed release groove 422, the complete release of the sensitive movable structure can be finally realized under the action of the anisotropic etching solution, and the sensitive movable structure is anchored on the bonding substrate 700 through anodic bonding, so that the transfer process of the sensitive movable structure can be realized, and the thickness of the sensitive movable structure can be well controlled after the sensitive movable structure is released in the anisotropic etching solution, and the accurate and consistent and controllable thickness can be realized.
Next, referring to fig. 15, the first etching protection layer 300 and the second etching protection layer 500 are removed.
Specifically, after the release of the sensitive movable structure is completed, for example, a vapor phase etching method may be used to remove the first corrosion protection layer 300 and the second corrosion protection layer 500, and prevent the sensitive movable structure from being adsorbed on the bonding substrate 700 due to the surface tension of the liquid, where the vapor phase etching method may be, for example, vapor phase hydrofluoric acid, and the like, and is specifically selected according to the materials of the first corrosion protection layer 300 and the second corrosion protection layer 500, which is not limited herein excessively.
Further, as shown in fig. 16 to 20, in an embodiment, after exposing the silicon nitride layer 200 and before performing the bonding process, a step of forming a first metal layer 910 in the silicon nitride layer 200 and a step of forming a second metal layer 920 disposed corresponding to the first metal layer 910 on the surface of the bonding substrate 700 may be further included, so as to implement electrical connection through the first metal layer 910 and the second metal layer 920.
Specifically, as shown in fig. 12, after the silicon nitride layer 200 is front-side-etched, RIE may be used to etch the silicon nitride layer 200 to the (111) silicon wafer 100 to form a lead window, and a metal lift-Off process (METAL LIFT-Off Technology) is used to manufacture the first metal layer 910, where the thickness of the first metal layer 910 may be consistent with the thickness of the silicon nitride layer, so that the bonding surface maintains a certain flatness, and the anodic bonding process is not affected, as shown in fig. 16 and 17, and the second metal layer 920 may be manufactured on the bonding substrate 700 by using a method such as sputtering or evaporation, and then patterning is performed by front-side-etching, and then using an ion beam to etch, to leave a metal layer in a bonding region and a metal layer for wire bonding, that is, to form the second metal layer 920, as shown in fig. 18 and 19, and perform alignment bonding to ensure that the first metal layer 910 is pressed against the second metal layer 920, and the bonded device is completed as shown in fig. 20, which is not described later.
Further, referring to fig. 21, in another embodiment, the method further includes a step of forming a metal layer 930 on the surface of the (111) silicon wafer 100, so as to electrically connect metal leads through the metal layer 930.
Specifically, referring to fig. 21, a metal film may be formed on the front surface of the device by, for example, sputtering or evaporation, and after front-side photolithography, the metal film is patterned to form the metal layer 930 on the front surface of the sensitive movable structure, so as to electrically connect the subsequent metal leads through the metal layer 930. The material of the metal layer 930 may be Al, the thickness of the metal layer 930 may be 600nm, and the patterning method may use ion beam etching or metal etching solution to perform wet etching, preferably, the metal etching solution is used to perform wet etching in this embodiment, but the material, thickness and forming method of the metal layer 930 are not limited thereto and may be selected according to requirements.
In summary, the (111) silicon transfer process based on silicon nitride anodic bonding of the invention has the following beneficial effects:
1) The silicon wafer (111) is subjected to lateral corrosion in the anisotropic etching liquid, and the upper surface and the lower surface of the silicon wafer (111) are not corroded, so that after the sensitive movable structure is released in the anisotropic etching liquid, the thickness of the sensitive movable structure can be well controlled, and a structure with accurate and consistent thickness and controllability is realized;
2) And forming a closed release groove with a closed pattern on the (111) silicon wafer, and after anodic bonding is completed, putting the device into an anisotropic etching solution for release, wherein the structure layer can be completely released by the closed release groove and can be separated from the (111) silicon wafer. The technology can realize the transfer of the sensitive movable structure to the bonding substrate, and the direction design of the sensitive movable structure on the (111) silicon wafer is not limited by the crystal orientation, and can be oriented to any crystal orientation.
3) A low-stress silicon nitride layer is deposited on a (111) silicon wafer as a bonding layer, so that high-quality anodic bonding can be realized, bulk silicon at a bonding surface can be fully protected from etching by anisotropic corrosive liquid, and experiments show that a device taking the silicon nitride layer as a protective layer can resist the anisotropic corrosive liquid for at least more than one week, thereby preventing a sensitive movable structure from being separated from a bonding substrate and avoiding the bonding surface from being broken so as to form a stable structure.
Therefore, the invention can realize the sensitive movable structure with accurate and controllable thickness and any crystal orientation and the transfer of the structure, and can realize the high-precision and low-cost manufacture of MEMS devices with any crystal orientation on (111) crystal faces of a silicon-based oscillator, an accelerometer, a micromechanical gyroscope and the like.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. A silicon nitride anodic bonding-based (111) silicon transfer process comprising the steps of:
providing (111) a silicon wafer;
Patterning the (111) silicon wafer, and manufacturing raised anchor points on the surface of the (111) silicon wafer;
forming a silicon nitride layer, wherein the silicon nitride layer covers the anchor points;
forming a first corrosion protection layer, wherein the first corrosion protection layer covers the surfaces of the silicon nitride layer and the (111) silicon wafer;
patterning the first corrosion protection layer and the (111) silicon wafer to form a first groove, wherein the first groove comprises a structural pattern groove and a closed release groove;
forming a second corrosion protection layer, wherein the second corrosion protection layer covers the side wall and the bottom of the first groove;
removing the second corrosion protection layer at the bottom of the first groove, and etching to form a second groove based on the first groove;
Patterning the first corrosion protection layer to expose the silicon nitride layer;
providing a bonding substrate, and performing anode bonding on the bonding substrate and the silicon nitride layer;
wet etching is carried out by adopting anisotropic etching liquid so as to form a through hole based on the second groove;
and removing the first corrosion protection layer and the second corrosion protection layer.
2. The transfer process according to claim 1, wherein: the silicon nitride layer is a low-stress silicon nitride layer with tensile stress and stress less than 100MPa.
3. The transfer process according to claim 1, wherein: the thickness of the anchor point is larger than that of the silicon nitride layer; the thickness of the anchor point is smaller than 2 mu m; the thickness of the silicon nitride layer is less than 1 μm.
4. The transfer process according to claim 1, wherein: the silicon nitride layer extends to the surface of the (111) silicon wafer, and the extension width is larger than 2 times of the photoetching minimum line width.
5. The transfer process according to claim 1, wherein: the thickness of the first corrosion protection layer is more than 2 times of that of the second corrosion protection layer; the first corrosion protection layer comprises one or a combination of a TEOS layer, an LTO layer, a SiC layer and a SiO 2 layer; the second corrosion protection layer comprises one or a combination of a TEOS layer, an LTO layer, a SiC layer and a SiO 2 layer.
6. The transfer process according to claim 1, wherein: the bond substrate includes a glass bond substrate.
7. The transfer process according to claim 1, wherein: the anisotropic etching liquid comprises KOH etching liquid or TMAH etching liquid.
8. The transfer process according to claim 1, wherein: after exposing the silicon nitride layer and before bonding, the method further comprises the steps of forming a first metal layer in the silicon nitride layer and forming a second metal layer corresponding to the first metal layer on the surface of the bonding substrate, so that electrical connection is realized through the first metal layer and the second metal layer.
9. The transfer process according to claim 1, wherein: and forming a metal layer on the surface of the (111) silicon wafer so as to electrically connect the metal leads through the metal layer.
10. The transfer process according to claim 1, wherein: the method for forming the silicon nitride layer, the first corrosion protection layer and the second corrosion protection layer comprises an LPCVD method.
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| CN102509844A (en) * | 2011-09-22 | 2012-06-20 | 中国科学院上海微系统与信息技术研究所 | Micro-electromechanical disc resonator and manufacturing method thereof |
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