CN115167607A - Bootstrap structure and chip of high-precision band-gap reference - Google Patents
Bootstrap structure and chip of high-precision band-gap reference Download PDFInfo
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- CN115167607A CN115167607A CN202210787455.7A CN202210787455A CN115167607A CN 115167607 A CN115167607 A CN 115167607A CN 202210787455 A CN202210787455 A CN 202210787455A CN 115167607 A CN115167607 A CN 115167607A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
Abstract
The application provides a bootstrap structure and chip of high accuracy band gap benchmark, and this bootstrap structure includes: the bootstrap voltage negative feedback loop is respectively connected with the input power supply and the band-gap reference circuit and is used for generating an intermediate voltage lower than the power supply voltage and enhancing primary side feedback; the band-gap reference circuit is respectively connected with the bootstrap voltage negative feedback loop and the voltage test circuit and is used for generating band-gap reference voltage; the voltage test circuit is respectively connected with the band-gap reference circuit and the driving circuit and is used for obtaining the band-gap reference voltage with low temperature drift through testing the resistor network; the driving circuit is respectively connected with the voltage testing circuit and the digital logic circuit and is used for providing strong current driving; and the digital logic circuit is connected with the driving circuit and is used for controlling the connection mode of the output. The application provides safe working voltage for the MOS tube, enhances primary side feedback, and optimizes the drive module to reduce the charging time of band gap reference voltage test.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a bootstrap structure and a chip of a high-precision band-gap reference.
Background
The bandgap reference is used for providing a stable reference voltage for the internal circuit of the chip, and is an essential module in modern semiconductor products.
For some high precision devices, there is also a higher requirement for stability of the bandgap reference. After the tape-out is completed, when testing (Trim) is performed on important indexes of a chip, how to quickly and accurately measure the bandgap reference voltage is an urgent problem to be solved.
Disclosure of Invention
In view of the above problems in the related art, embodiments of the present application provide a bootstrap structure and a chip of a high-precision bandgap reference.
In a first aspect, the present application provides a bootstrap structure of a high-precision bandgap reference, including:
the bootstrap voltage negative feedback loop is respectively connected with the input power supply and the band-gap reference circuit and is used for generating an intermediate voltage lower than the power supply voltage and enhancing primary side feedback;
the band-gap reference circuit is respectively connected with the bootstrap voltage negative feedback loop and the voltage test circuit and is used for generating band-gap reference voltage;
the voltage test circuit is respectively connected with the band-gap reference circuit and the driving circuit and is used for obtaining the band-gap reference voltage with low temperature drift through testing the resistor network;
the driving circuit is respectively connected with the voltage testing circuit and the digital logic circuit and is used for providing strong current driving;
and the digital logic circuit is connected with the driving circuit and is used for controlling the connection mode of the output.
Optionally, the bootstrap voltage negative feedback loop includes a first PMOS transistor MP7, a second PMOS transistor MP8, a first NMOS transistor MN11, a second NMOS transistor MN12, a third NMOS transistor MN1, a first bipolar PNP transistor Q5, a third PMOS transistor MP10, and a fourth PMOS transistor MP9; the drain of the fourth PMOS transistor MP9 is connected to the source of the second PMOS transistor MP8, the drain of the second PMOS transistor MP8 is connected to the gate of the second NMOS transistor MN12, and the drain of the second NMOS transistor MN12 is connected to the gate of the fourth PMOS transistor MP9, forming a loop.
Optionally, the voltage of the intermediate voltage is determined based on the voltages of the first PMOS transistor MP7, the bipolar PNP transistor Q5, and the third NMOS transistor MN 1.
Optionally, the third PMOS transistor MP10 and the fourth PMOS transistor MP9 form a current mirror, and a sum of a current of the fourth PMOS transistor MP9 and a branch current is the same.
Optionally, the current mirrored by the current mirror outputs the bandgap reference voltage through a second bipolar PNP transistor Q4 and a variable resistor RQ.
Optionally, the driving circuit comprises a first driving sub-circuit and a second driving sub-circuit, the first driving sub-circuit is used for providing reference current driving, and the second driving sub-circuit is used for providing strong current driving.
Optionally, the bias value set by the second drive sub-circuit is higher than the bias value set by the first drive sub-circuit.
Optionally, the connection mode of the control output includes:
under the condition that the first enabling end is at low level, controlling the output to be connected to the first driving sub-circuit; or the like, or a combination thereof,
and under the condition that the first enabling end is at a high level, a control output is connected to the second driving sub-circuit.
Optionally, in case the control output is connected to said second drive sub-circuit, the second enable terminal is connected to the chip PAD interface through a test multiplexer.
In a second aspect, the present application further provides a chip, which includes a bootstrap structure of any one of the high precision bandgap references described in the first aspect.
According to the bootstrap structure and the chip of the high-precision band-gap reference, the intermediate voltage lower than the power supply voltage is obtained through the bootstrap voltage negative feedback loop, so that the MOS tube can work safely, the MOS tube is prevented from being exploded, and the primary side feedback PSR of the circuit is enhanced; in the stage of testing the ATE, an optimal band gap reference voltage curve is obtained by testing a resistor network; the reference voltage is output through the driving module, so that the stabilization time for testing the band gap reference output voltage is reduced, and the chip cost is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the present application or prior art, the drawings used in the embodiments or the description of the prior art are briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a bootstrap structure of a high-precision bandgap reference provided in an embodiment of the present application;
fig. 2 is a circuit structure diagram of a bootstrap structure of a high-precision bandgap reference provided in an embodiment of the present application.
Reference numerals:
MP7: a first PMOS tube; MP8: second PMOS tube
MP10: a third PMOS tube; MP9: a fourth PMOS tube;
MP6: a fifth PMOS tube; MP11: a sixth NMOS transistor;
MP12: a seventh PMOS tube; MN11: a first NMOS transistor;
and (3) MN12: a second NMOS transistor; MN1: a third NMOS transistor;
and MN13: a fourth NMOS transistor; MNQ: a fifth NMOS transistor;
q5: a first bipolar PNP tube; q4: a second bipolar PNP tube;
q2: a third bipolar PNP tube; q3: a fourth bipolar PNP tube;
r2: a resistance; RQ: a variable resistor.
Detailed Description
In order to better describe the technical solutions in the embodiments of the present application, the following introduces related knowledge.
(1) MOS tube
A Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), further referred to as MOS for short, is the most commonly used electronic device in modern semiconductors. The MOS transistor is divided into a P-type MOS transistor and an N-type MOS transistor.
In the case of an NMOS transistor, vgs (voltage of a gate with respect to a source) is turned on when the voltage is greater than a certain value, and is suitable for a case where the source is grounded. For a PMOS transistor, vgs will be turned on when the Vgs is smaller than a certain value, which is suitable for the case that the source is connected with VCC (power voltage of the circuit).
And the complementary MOS circuit is a CMOS circuit consisting of an NMOS tube and a PMOS tube.
(2) Bipolar Junction Transistor (BJT)
The BJT can carry out exponential amplification on current and comprises a PNP combined structure and an NPN combined structure. The application mainly relates to a PNP type triode, wherein the emitter potential is the highest, and the collector potential is the lowest.
(3) Band gap reference (Bandgap)
The power supply needs to output an accurate voltage and needs an accurate reference point, which is the reference voltage. In a conventional reference voltage circuit, a bandgap reference is a conventional and accurate reference.
The band gap reference is a voltage with an extremely small temperature coefficient obtained by adding two voltages of a positive temperature coefficient and a negative temperature coefficient. It is often used for high precision voltage references due to its excellent temperature stability. The band gap is the difference in energy from the lowest point of the conduction band to the highest point of the valence band of a semiconductor or an insulator.
In modern semiconductor products, a bandgap reference is used for providing a stable low-voltage power supply for a chip internal circuit, and belongs to an indispensable module. For some high precision periods, there is also a higher requirement for stability of the bandgap reference.
After the tape-out is completed, when testing or detecting important indexes of a chip, how to quickly and accurately measure the band gap reference is an urgent problem to be solved. The following means are generally employed in the related art:
(1) increasing the bandwidth of the circuit.
(2) And capacitance filtering is added in the circuit.
On one hand, large capacitance results in wasted area and increased chip cost. On the other hand, when the bandgap reference is tested, a lot of time is needed to wait for charging the external capacitor, which causes the time cost to rise. Therefore, how to measure the bandgap reference quickly and accurately remains the direction of research.
In view of the above problems in the related art, embodiments of the present application provide a bootstrap structure and a chip of a high-precision bandgap reference.
To make the objects, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be described clearly and completely with reference to the accompanying drawings in the present application, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic structural diagram of a bootstrap structure of a high-precision bandgap reference provided in an embodiment of the present application, fig. 2 is a circuit structural diagram of the bootstrap structure of the high-precision bandgap reference provided in the embodiment of the present application, and the bootstrap structure of the high-precision bandgap reference provided in the embodiment of the present application is described with reference to fig. 1 and fig. 2. As shown in fig. 1, the bootstrap structure at least includes:
a bootstrap voltage negative feedback loop 102, which is respectively connected with the input power 101 and the band-gap reference circuit 103, and is used for generating an intermediate voltage lower than the power voltage and enhancing primary side feedback;
the band-gap reference circuit 103 is connected with the bootstrap voltage negative feedback loop 102 and the voltage test circuit 104 respectively and is used for generating band-gap reference voltage;
the voltage test circuit 104 is respectively connected with the band-gap reference circuit 103 and the driving circuit 105 and is used for obtaining band-gap reference voltage with low temperature drift through testing a resistor network;
a driving circuit 105, connected to the voltage testing circuit 104 and the digital logic circuit 106, respectively, for providing a strong current driving;
and a digital logic circuit 106 connected to the driving circuit 105 for controlling the connection mode of the output.
Specifically, the bootstrap structure of the high-precision bandgap reference provided by the embodiment of the present application can be applied to a 130nm Bi-CMOS process, and the power supply voltage is 5V (± 10%).
The bootstrap structure of the high-precision band-gap reference comprises:
(1) and the bootstrap voltage negative feedback loop is respectively connected with the input power supply and the band-gap reference circuit and is used for generating an intermediate voltage lower than the power supply voltage and enhancing primary side feedback.
On one hand, the intermediate voltage VR lower than the power voltage is generated through bootstrap, the phenomenon that the working voltage of the MOS tube exceeds the withstand voltage value and is exploded, namely the Overstress phenomenon, is prevented, and the MOS tube works safely. On the other hand, the stability of the intermediate voltage VR is enhanced through a negative feedback loop, and the primary side feedback PSR is enhanced.
(2) And the band-gap reference circuit is respectively connected with the bootstrap voltage negative feedback loop and the voltage test circuit and is used for generating band-gap reference voltage.
(3) And the voltage test Trim circuit is respectively connected with the band gap reference circuit and the driving circuit and is used for obtaining the band gap reference voltage with low temperature drift through testing the resistor network. And in the stage of testing the ATE, obtaining an optimal band-gap reference voltage curve through a Trim resistance network.
(4) And the driving circuit is respectively connected with the voltage testing circuit and the digital logic circuit and is used for providing strong current driving. The driving (Buffer) circuit provides driving capability to the voltage. The reference voltage is output through the Buffer, and has driving capability.
(5) And the digital logic circuit is connected with the driving circuit and is used for controlling the connection mode of the output.
According to the bootstrap structure of the high-precision band-gap reference, provided by the embodiment of the application, the intermediate voltage lower than the power supply voltage is obtained through the bootstrap voltage negative feedback loop, so that the MOS tube can work safely, the MOS tube is prevented from being exploded, and the primary side feedback PSR of the circuit is enhanced; in the stage of testing the ATE, an optimal band gap reference voltage curve is obtained by testing a resistor network; the reference voltage is output through the driving module, so that the stabilization time for testing the band gap reference output voltage is reduced, and the chip cost is reduced.
Optionally, the bootstrap voltage negative feedback loop includes a first PMOS transistor MP7, a second PMOS transistor MP8, a first NMOS transistor MN11, a second NMOS transistor MN12, a third NMOS transistor MN1, a first bipolar PNP transistor Q5, a third PMOS transistor MP10, and a fourth PMOS transistor MP9; the drain of the fourth PMOS transistor MP9 is connected to the source of the second PMOS transistor MP8, the drain of the second PMOS transistor MP8 is connected to the gate of the second NMOS transistor MN12, and the drain of the second NMOS transistor MN12 is connected to the gate of the fourth PMOS transistor MP9, forming a loop.
Specifically, referring to fig. 2, in fig. 2, MP6, MP7, MP8, MP9, MP10, MP11, and MP12 respectively represent a fifth PMOS transistor, a first PMOS transistor, a second PMOS transistor, a fourth PMOS transistor, a third PMOS transistor, a sixth PMOS transistor, and a seventh PMOS transistor; MN1, MN10, MN12, MN13 and MNQ respectively represent a third NMOS transistor, a first NMOS transistor, a second NMOS transistor, a fourth NMOS transistor and a fifth NMOS transistor. vcc denotes the supply, VR the intermediate voltage and gnd the total ground. Q2, Q3, Q4, Q5 denote a third bipolar PNP tube, a fourth bipolar PNP tube, a second bipolar PNP tube, and a first bipolar PNP tube, respectively. R2 represents a resistance, RQ represents a variable resistance. en _ test and enb _ test represent two different enable terminals. vinp and vinn denote input voltages of the operational amplifier, and vout denotes an output voltage of the operational amplifier. BG _ out and BG _ test respectively represent two different pins, one is an output terminal pin and the other is a test terminal pin, which are connected to different modules.
The PMOS tube MP7, the PMOS tube MP8, the NMOS tube MN11, the NMOS tube MN12, the NMOS tube MN1, the bipolar PNP tube Q5, the PMOS tube MP10 and the PMOS tube MP9 jointly form a bootstrap voltage negative feedback loop of the bootstrap voltage negative feedback circuit. The drain of the PMOS tube MP9 is connected with the source of the PMOS tube MP8, the drain of the PMOS tube MP8 is connected with the gate of the NMOS tube MN12, and the drain of the NMOS tube MN12 is connected with the gate of the PMOS tube MP9 to form a negative feedback loop.
The stability of the intermediate voltage VR is enhanced through a negative feedback loop, and the primary side feedback PSR of the circuit is enhanced. In a 130nm Bi-CMOS process, the supply voltage is 5V. The bootstrap circuit generates an intermediate voltage VR of about 2.9V by using a 5V power supply voltage, so that the MOS transistor below the intermediate level can work safely.
Optionally, the voltage of the intermediate voltage is determined based on the voltages of the first PMOS transistor MP7, the first bipolar PNP transistor Q5, and the third NMOS transistor MN 1.
Specifically, the voltage of the intermediate voltage VR depends on the voltages of three diodes, namely a PMOS transistor MP7, a bipolar PNP transistor Q5 and an NMOS transistor MN1, and the bandgap reference device actually operates below VR.
Optionally, the third PMOS transistor MP10 and the fourth PMOS transistor MP9 form a current mirror, and a sum of a current of the fourth PMOS transistor MP9 and a branch current is the same.
Specifically, the PMOS transistor MP9 and the PMOS transistor MP10 are a pair of current mirrors, and the current value of the PMOS transistor MP9 is designed to be the same as the sum of the electric currents of the lower PMOS transistors MP6, MP7, MP8, and MP11, so that the voltage value of the intermediate voltage VR can be stable.
Optionally, the current mirrored by the current mirror outputs the bandgap reference voltage through a second bipolar PNP transistor Q4 and a variable resistor RQ.
Specifically, the current mirrored by the bandgap reference flows into the bipolar PNP transistor Q4 and the variable resistor RQ, and the bandgap reference voltage can be obtained.
Optionally, the driving circuit comprises a first driving sub-circuit and a second driving sub-circuit, the first driving sub-circuit is used for providing reference current driving, and the second driving sub-circuit is used for providing high current driving.
Optionally, the bias value set by the second drive sub-circuit is higher than the bias value set by the first drive sub-circuit.
Specifically, the driving circuit in the bootstrap structure of the high-precision bandgap reference provided by the present application is divided into two parts, namely a first driving sub-circuit (corresponding to Buffer a in fig. 2) and a second driving sub-circuit (corresponding to Buffer B in fig. 2).
The output of the Buffer A can provide reference current drive for each module in the chip, and has certain drive capability. In order to accelerate the charging of off-chip capacitors, the Buffer B is designed with larger bias, the bias value of the Buffer B is higher than that of the Buffer A, and the Buffer B has strong current driving capability. By increasing the Buffer with strong driving capability, the stabilization time in testing the band gap reference output voltage can be reduced, and the chip cost is reduced.
Optionally, the connection mode of the control output includes:
under the condition that the first enabling end is at low level, controlling the output to be connected to the first driving sub-circuit; or the like, or, alternatively,
and under the condition that the first enabling end is at a high level, a control output is connected to the second driving sub-circuit.
Optionally, the second enable terminal is connected to the chip PAD interface through a test multiplexer with the control output connected to said second drive sub-circuit.
Particularly, the digital logic module is used for controlling the connection mode of the output. Referring to fig. 2, in the case that the first enable terminal en _ test is at a low level, connected to the first driving sub-circuit (Buffer a), the second enable terminal BG _ OUT may normally provide a reference for each block inside the chip.
And under the condition that the first enable terminal en _ TEST is at a high level, the first enable terminal en _ TEST is connected to the second driving sub-circuit (Buffer B), and the second enable terminal BG _ TEST is connected to a PAD interface of the chip through a TEST Multiplexer (MUXTEST) so as to be tested by a tester.
According to the bootstrap structure of the high-precision band-gap reference, provided by the embodiment of the application, the voltage of a 5V power supply is reduced to-2.9V through a bootstrap voltage negative feedback loop, and under the voltage, an MOS (metal oxide semiconductor) tube can work safely, so that the MOS tube is prevented from being exploded, and the primary side feedback PSR (power supply rejection ratio) of a circuit is enhanced; the current mirrored by the band gap reference flows into a diode-connected PNP and a variable resistor, and then band gap reference voltage can be obtained; in the stage of testing the ATE, an optimal band gap reference voltage curve can be obtained through a Trim resistor network; the reference voltage is output through a strong Buffer, so that the high driving capability is realized, the stabilization time in the process of testing the band gap reference output voltage is shortened, and the chip cost is reduced.
Optionally, an embodiment of the present application further provides a chip, including the bootstrap structure of the high-precision bandgap reference described in any of the foregoing embodiments.
Specifically, the structure and the working principle of the bootstrap structure of the high-precision bandgap reference in the chip provided by the embodiment of the present invention may refer to the above embodiments, and the same technical effects may be achieved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (10)
1. A bootstrap structure for a high precision bandgap reference, comprising:
the bootstrap voltage negative feedback loop is respectively connected with the input power supply and the band gap reference circuit and is used for generating an intermediate voltage lower than the power supply voltage and enhancing primary side feedback;
the band-gap reference circuit is respectively connected with the bootstrap voltage negative feedback loop and the voltage test circuit and is used for generating band-gap reference voltage;
the voltage test circuit is respectively connected with the band-gap reference circuit and the driving circuit and is used for obtaining the band-gap reference voltage with low temperature drift through testing the resistor network;
the driving circuit is respectively connected with the voltage testing circuit and the digital logic circuit and is used for providing strong current driving;
and the digital logic circuit is connected with the driving circuit and is used for controlling the connection mode of the output.
2. The bootstrap structure of high accuracy band gap reference of claim 1, characterized in that, the bootstrap voltage negative feedback loop includes a first PMOS transistor (MP 7), a second PMOS transistor (MP 8), a first NMOS transistor (MN 11), a second NMOS transistor (MN 12), a third NMOS transistor (MN 1), and a first bipolar PNP transistor (Q5), a third PMOS transistor (MP 10), and a fourth PMOS transistor (MP 9); the drain of the fourth PMOS tube (MP 9) is connected with the source of the second PMOS tube (MP 8), the drain of the second PMOS tube (MP 8) is connected with the gate of the second NMOS tube (MN 12), and the drain of the second NMOS tube (MN 12) is connected with the gate of the fourth PMOS tube (MP 9) to form a loop.
3. The bootstrap structure of the high precision bandgap reference according to claim 2, wherein the voltage of the intermediate voltage is determined based on the voltages of the first PMOS transistor (MP 7), the first bipolar PNP transistor (Q5) and the third NMOS transistor (MN 1).
4. The bootstrap structure of the high precision bandgap reference according to claim 3, wherein the third PMOS transistor (MP 10) and the fourth PMOS transistor (MP 9) constitute a current mirror, and the sum of the current of the fourth PMOS transistor (MP 9) and the branch current is the same.
5. The bootstrap structure of the high precision bandgap reference according to claim 4, wherein the current mirrored by the current mirror outputs the bandgap reference voltage through a second bipolar PNP transistor (Q4) and a variable Resistor (RQ).
6. A bootstrap structure for a high precision bandgap reference as claimed in claim 1, characterized in that said driving circuit comprises a first driving sub-circuit and a second driving sub-circuit, said first driving sub-circuit is used to provide a reference current drive, said second driving sub-circuit is used to provide a strong current drive.
7. The bootstrap structure of a high precision bandgap reference as recited in claim 6, wherein the bias value set by said second driving sub-circuit is higher than the bias value set by said first driving sub-circuit.
8. The bootstrap structure of a high precision bandgap reference as recited in claim 6, wherein said control output connection means comprises:
under the condition that the first enabling end is at low level, controlling the output to be connected to the first driving sub-circuit; or the like, or, alternatively,
and under the condition that the first enabling end is at a high level, a control output is connected to the second driving sub-circuit.
9. The bootstrap structure of the high precision bandgap reference, as recited in claim 8, wherein in case of the control output connected to said second driving sub-circuit, the second enable terminal is connected to the chip PAD interface through the test multiplexer.
10. A chip comprising the bootstrap structure of a high precision bandgap reference of any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210787455.7A CN115167607A (en) | 2022-07-04 | 2022-07-04 | Bootstrap structure and chip of high-precision band-gap reference |
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| CN202210787455.7A CN115167607A (en) | 2022-07-04 | 2022-07-04 | Bootstrap structure and chip of high-precision band-gap reference |
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| US20110001555A1 (en) * | 2009-07-02 | 2011-01-06 | Infineon Technologies Ag | Test circuit for monitoring a bandgap circuit |
| CN202120153U (en) * | 2011-05-31 | 2012-01-18 | 比亚迪股份有限公司 | Band-gap reference voltage generation circuit |
| CN103135048A (en) * | 2011-12-01 | 2013-06-05 | 南亚科技股份有限公司 | Test method of driving apparatus and circuit testing interface thereof |
| CN108829169A (en) * | 2018-06-29 | 2018-11-16 | 成都锐成芯微科技股份有限公司 | A kind of band gap reference of high PSRR |
| CN111175645A (en) * | 2020-03-12 | 2020-05-19 | 杭州芯耘光电科技有限公司 | Test circuit |
| CN113377145A (en) * | 2021-08-03 | 2021-09-10 | 南京慧感电子科技有限公司 | Band gap reference trimming circuit suitable for low voltage |
-
2022
- 2022-07-04 CN CN202210787455.7A patent/CN115167607A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110001555A1 (en) * | 2009-07-02 | 2011-01-06 | Infineon Technologies Ag | Test circuit for monitoring a bandgap circuit |
| CN202120153U (en) * | 2011-05-31 | 2012-01-18 | 比亚迪股份有限公司 | Band-gap reference voltage generation circuit |
| CN103135048A (en) * | 2011-12-01 | 2013-06-05 | 南亚科技股份有限公司 | Test method of driving apparatus and circuit testing interface thereof |
| CN108829169A (en) * | 2018-06-29 | 2018-11-16 | 成都锐成芯微科技股份有限公司 | A kind of band gap reference of high PSRR |
| CN111175645A (en) * | 2020-03-12 | 2020-05-19 | 杭州芯耘光电科技有限公司 | Test circuit |
| CN113377145A (en) * | 2021-08-03 | 2021-09-10 | 南京慧感电子科技有限公司 | Band gap reference trimming circuit suitable for low voltage |
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