CN115148568A - Sample carrier and system and method for modifying sample - Google Patents

Abstract

The embodiment of the invention relates to a sample carrying platform and a system and a method for modifying a sample. The present disclosure provides a sample carrier comprising a base and a first sample support. The base has a first surface. The first sample support is arranged on the first surface of the base, and the top surface of the first sample support is provided with a groove for placing a sample. The present disclosure also includes sample modification systems and methods using the sample carrier.

Description

Sample carrier and system and method for modifying sample

Technical Field

The present invention relates to a sample stage, a system and a method for modifying a sample, and more particularly, to a system and a method for modifying a sample using a processed sample stage.

Background

In semiconductor processing, the performance of the measurement equipment directly affects the process modulation capability and yield improvement. Semiconductor factories and equipment suppliers must ensure that the results of their measurements must be within tolerances and certified to ISO and quality systems. As the dimensions and tolerances of components continue to shrink, the difficulty of the measurement task increases. As the semiconductor industry is continuously seeking various methods to meet the increasingly stringent measurement requirements, many measurement tools have been developed to meet the measurement requirements, such as measuring CD (Critical Dimension) values, thickness, surface topography (morphology), doping concentration (doping concentration), defect analysis, and the like, of semiconductor devices.

Conventionally, defect detection of semiconductor devices is performed by Transmission Electron Microscope (TEM) or Scanning Transmission Electron Microscope (STEM). Taking TEM as an example, the technique uses high energy electron beam to irradiate an ultra-thin TEM specimen, and then obtains a 2D image of the sample through magnified imaging, and the resolution of the image can reach an atomic level of 0.1 nm, so as to observe the microstructure or lattice defect of the material. Since the TEM is driven by the transmitted electron beam to the TEM specimen, the thickness of the region to be observed in the TEM specimen must reach the level of the transmission of the electron beam, for example, the thickness is about 2a or less, which also makes the application of TEM easily affected by the limitation of sample preparation. For example, whether the structural defect of the semiconductor device to be observed is actually located on the ultra-thin TEM specimen, or whether the prepared TEM specimen can present the Region of Interest (ROI) is a technical bottleneck actually reflected in the detection application using TEM.

Disclosure of Invention

An embodiment of the present invention relates to a sample carrier comprising a base and a first sample support. The base has a first surface. The first sample support is arranged on the first surface of the base, and the top surface of the first sample support is provided with a groove for placing a sample.

Another embodiment of the invention is directed to a system for modifying a sample that includes an electron beam source, a sample stage, an ion beam source, and a detector. The electron beam source is configured to generate an electron beam. The sample carrier is disposed under the electron beam source and has a sample support pillar with a groove on its top surface for placing a sample. The ion beam source is used to generate an ion beam to cut the sample placed on the sample stage. The detector is arranged under the sample carrier. Wherein the sample stage can be adjusted to change its angle relative to the electron beam source so that the electron beam generated by the electron beam source can penetrate the sample and be detected by the detector.

Yet another embodiment of the present invention is directed to a method of modifying a sample comprising the steps of: a sample support post for positioning a sample on a sample stage, the sample support post having a top surface with a channel extending to opposite edges of the top surface such that two sides of the sample are substantially free from the sample support post; and cutting the sample by using an ion beam to enable the sample to have a conical profile.

Drawings

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that the various structures are not drawn to scale in accordance with standard practice in the industry. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

Fig. 1A is a top view of a sample stage according to some embodiments of the present disclosure.

Fig. 1B is a side view of a sample stage according to some embodiments of the present disclosure.

Fig. 2A is a schematic diagram of a system configuration for modifying a sample, according to some embodiments of the present disclosure.

Fig. 2B is a top view of a sample stage according to some embodiments of the present disclosure.

Fig. 2C is a schematic diagram of a sample support and sample according to some embodiments of the present disclosure.

Fig. 3A and 3B are top views of a sample stage, according to some embodiments of the present disclosure.

Fig. 4A and 4B are top views of semiconductor devices according to some embodiments of the present disclosure.

Fig. 4C is a side view of a semiconductor device, in accordance with some embodiments of the present disclosure.

Fig. 5A is a top view of a semiconductor device according to some embodiments of the present disclosure.

Fig. 5B and 5C are sample schematic diagrams according to some embodiments of the present disclosure.

Fig. 6A and 6B are schematic diagrams of a sample support and sample, according to some embodiments of the present disclosure.

Fig. 7 is a flow chart of steps according to some embodiments of the present disclosure.

Detailed Description

The following disclosure provides many different embodiments, or examples, for implementing different components of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, such are merely examples and are not intended to be limiting. For example, a first means formed over or on a second means in the following description may include embodiments in which the first means and the second means are formed in direct contact, and may also include embodiments in which additional means may be formed between the first means and the second means, such that the first means and the second means may not be in direct contact. Additionally, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Furthermore, for ease of description, spatially relative terms such as "below …", "below …", "below", "above …", "above", "on …", and the like, may be used herein to describe the relationship of one element or component to another element(s) or component(s), as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

As used herein, terms such as "first," "second," and "third" describe various elements, components, regions, layers, and/or sections, and such elements, components, regions, layers, and/or sections should not be limited by such terms. Such terms may be used only to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Terms such as "first," "second," and "third," when used herein, do not imply a sequence or order unless clearly indicated by the context.

In some embodiments, the method for localized, localized three-dimensional structural observation of defect sites of semiconductor devices comprises providing a sample carrier configured to allow two-dimensional observation of a sample using a modified sample system, such as a STEM, and sharpening the sample to further modify the sample for analysis of the three-dimensional structure and elemental composition of the defect sites using Atom Probe Tomography (Atom Probe Tomography).

As shown in the top view of fig. 1A and the side view of fig. 1B, in some embodiments, sample stage 10 comprises a base 11 and a first sample support 12. The base 11 has a first surface 11A. The first sample support 12 is disposed on the first surface 11A of the base 11. In some embodiments, the top surface 12A of the first sample support 12 has a groove 13 for placing a sample 14.

One of the purposes of the first sample support 12 is to position the sample 14, since the size of the sample 14 is about 100nm, and the size of the base 11 can reach a spectrum of several micrometers to several millimeters, in the case of a sample 14 that is much smaller than the base 11, it is necessary to arrange the sample 14 on a specific sample support to correctly identify the position of the sample 14 on the sample stage 10, rather than directly placing the sample 14 on the first surface 11A of the base 11. Further, in some embodiments, the groove 13 of the first sample support 12 further provides for positioning of the sample 14, such as placing the sample 14 in the center of the groove 13 so that the sample 14 can be viewed through the position of the groove 13.

However, considering that when a sample is placed in a trench, which is not generally the embodiment of the present invention, the sample is substantially hidden in the trench because the trench has a depth, i.e. the sample can only be observed through a top view angle, which causes the electron beam to irradiate the sample at any angle, even if the electron beam penetrates through the sample, the electron beam is blocked by the structure of the sample support column and cannot reach the detector, which seriously affects the resolution of the sample image. The trench design of the embodiments of the present invention can avoid the above-mentioned situation that the electron beam is blocked and cannot reach the detector.

Regarding the positional relationship between the electron beam and the sample stage, for example, in the system for modifying a sample, such as STEM shown in fig. 2A, the structure of the electron beam source 21 is schematically shown above the sample stage 10, and is used for generating an electron beam to irradiate the sample. In some embodiments, the electron beam source 21 may include a high voltage system, an electron gun, a condenser lens (not shown), for example, an accelerating voltage of 100keV to 1MeV generated by the high voltage system is sent to the electron gun at the upper end of the column, so that the field emission electron gun heats the high-brightness electron beam to reach and penetrate the sample 14 through the condenser lens.

In addition to the first sample support 12 on the first surface 11A (see fig. 1B) of the sample carrier 10 located below the electron beam source 21, in some embodiments, the second surface 11B of the base 11 of the sample carrier 10 relative to the first surface 11A thereof may be connected to a clamp 31 (as indicated by the side view angle shown on the right side of fig. 2A), and the clamp 31 is used to move or rotate the sample carrier 10 to adjust the angle of the sample carrier 10 relative to the electron beam source 21, for example, to make the electron beam generated by the electron beam source 21 have an included angle smaller than or equal to 90 degrees with the first surface 11A, so as to allow the sample 14 partially exposed outside the first sample support 12 through the groove 13 to be penetrated by the electron beam generated by the electron beam source 21. In some embodiments, the sample stage 10 has only a single first sample support 12, or a plurality of first sample supports 12 are arranged in a single row, and when an electron beam irradiates the sample 14 on the first sample support 12, the arrangement direction of the first sample support 12 is substantially orthogonal to the irradiation direction of the electron beam. In other words, after the electron beam passes through the sample 14 on any one of the first sample supports 12, the electron beam is not blocked by the other first sample supports 12 in the path of travel.

Still further referring to fig. 2B and fig. 2C, they are a top view of the sample stage 10 with its tilt angle adjusted by the clamp, and a perspective view of the first sample support 12. As shown, the electron beam generated by the electron beam source 21 has a traveling path D _E It may be higher than the firstThe position of the top surface 12A of the sample support 12 is irradiated to the sample 14 without concern for problems that are obstructed by the structure of the first sample support 12; when the sample 14 is irradiated at a position lower than the top surface 12A of the first sample support 12, it is necessary to penetrate the openings of the grooves at both edges of the top surface 12A of the first sample support 12, for example, to make the traveling path D of the electron beam _E Parallel to the groove 13, such that the electron beam can directly irradiate the sample 14 through the electron beam inlet 13A and the electron beam outlet 13B, and pass through the sample carrier 10 without being blocked after penetrating the sample 14.

In some embodiments of the present disclosure, the groove 13 formed on the top surface 12A of the first sample support 12 can be further structurally divided into a plurality of grooves, for example, the first sample support 12 shown on the leftmost side of fig. 2B has a first groove 131 and a second groove 132 orthogonal to the first groove 131 on the top surface thereof, so as to form a cross-shaped recess, and the sample 14 is disposed at a position where the first groove 131 and the second groove 132 are staggered. In some embodiments, the top surface 12A of the first sample support 12 defines a plurality of grooves 13, wherein at least one of the grooves extends to two opposite edges of the top surface 12A to form the electron beam inlet 13A and the electron beam outlet 13B.

In some embodiments, the electron beam that passes through sample 14 may then pass through multiple stages of magnifying elements (not shown), such as objective lenses, intermediate mirrors, and projection lenses, to a detector 22 located under sample stage 10. The Detector 22 located under the sample stage 10 may be a Bright Field scanning transmission microscope Detector (Bright Field STEM Detector). When the electron beam generated by the electron beam source 21 passes through the sample 14, the electron beam interacts with the crystal of the sample 14 to generate various scattered electrons under the sample stage 10, wherein the electrons with smaller scattering angles enter the detector 22 to form a transmission bright field image so as to observe the two-dimensional structure of the sample 14. In some embodiments, electrons that penetrate through the specimen 14 further pass through one or more Aperture diaphragms (Aperture diaphragms). In some embodiments, the detector 22 may include a fluorescent plate, a camera, or a Charge Coupled Device (CCD).

In addition to being provided with a single first sample support 12 or a single row of first sample supports 12, as shown in fig. 3A, in some embodiments, sample stage 10 may further comprise one or more second sample supports 15. The second sample support column 15 is also provided on the first surface 11A of the base 11 of the sample stage 10, and does not have the same column as the first sample support column 12, but has a multi-row sample support column structure as a whole of the sample stage 10. Since the electron beam penetrating the sample still has to travel to the detector 22, the second sample support 15 is offset from the first sample support 12 in the traveling direction of the electron beam, so as to avoid blocking the traveling of the electron beam. In some embodiments, as shown in fig. 3A and 3B, the second sample support 15 may be arranged in a single or multiple rows, so that the sample stage has two, three or more rows of sample supports as a whole, but when the second sample support 15 is arranged, it is avoided that the second sample support overlaps with the first sample support or other second sample supports 15 in the traveling direction of the electron beam.

Conventionally, the material of the sample stage of STEM includes copper, and is formed by processing the copper through a Computer Numerical Control (CNC) process. However, in some embodiments of the present disclosure, the material of the sample stage 10 used includes silicon, considering that copper may interfere with the elemental analysis of the sample, such as generating excessive background noise during mass spectrometry to affect the determination of the sample composition. In some embodiments, the base 11 and the first and second sample support columns 12 and 15 of the sample stage 10 are made of silicon, for example, a silicon wafer is processed by laser, a structure of the sample support columns is engraved on one surface of the silicon wafer, and a groove is formed on the top surface of the sample support columns, in this embodiment, the base 11 and the first and second sample support columns 12 and 15 of the sample stage 10 may also be integrally formed. In the case of silicon wafer processing, the silicon wafer may be diced after the sample support posts are formed to obtain the desired pedestal area size.

If the sample is viewed in a two-dimensional structure using only STEM, the sample does not need to be machined to have a tapered profile. However, one of the objectives of the present disclosure is to enable the sample stage 10 and the sample 14 thereon to be observed and quantitatively determined by using an Atom Probe Tomography (APT) technique, so that in some embodiments, as shown in fig. 2A, the sample 14 is further modified by an ion beam source 23, that is, the sample 14 on the sample stage 10 is cut by an ion beam generated by the ion beam source 23, so that the sample 14 has a tapered profile. In some embodiments, the ion beam source 23 is disposed above the sample stage 10 and has an angle with the electron beam source 21, which may be about 52 degrees.

In detail, APT is a technique of atomic-scale material analysis that can provide three-dimensional images and quantitative chemical composition identification, with high sensitivity. The technique relies on the ionization of individual atoms/clusters of atoms on the sample surface and subsequent Field Evaporation (Field Evaporation). The sample is prepared in the form of a conical tip, which must generally meet several requirements in order to maintain analytical quality: (1) the sample is conical and has a vertex radius of less than 100nm; (2) The shape of the sample must be symmetrical, so as to avoid forming an elliptic cone shape; (3) the vertebral Angle (Shape Angle) of the sample cannot be too large; and (4) the conical shaft of the sample must avoid microcracking. In the sample fabrication technology, the Focused Ion Beam (FIB) is mainly used, for example, a target analysis area of a semiconductor device is first coated with a protective layer of platinum (Pt), nickel (Ni) or other materials, and then a wedge-shaped strip sample is cut, wherein the width of the sample is about 1-2 μm and the length of the sample is about 15-20 μm. Then, one end of the sample was cut and plated on a Manipulator arm (Manipulator), and the other end was cut and then the sample was taken out from the main body of the semiconductor element. The sample is then plated onto a sample carrier. The sample is then reduced to a radius of less than about 100nm by Annular Milling, and finally cleaned at a lower voltage to remove damage caused by, for example, gallium (Ga) ions.

The sample manufactured by the method can be applied to the atom probe tomography technology to scan the three-dimensional structure of the sample, so that the defect point of the semiconductor element is observed at a three-dimensional angle, and the method comprises the steps of observing the appearance of the defect point and analyzing the element component of the position of the defect point.

Thus, in some embodiments of the present disclosure, the ion beam source 23 is configured to provide a focused ion beam, for example, the ion beam source 23 may use gallium as the ion source, which allows for the advantages of gallium having a low melting point, a low vapor pressure, and good oxidation resistance. In use, the ion beam source 23 applies an electric field to form a fine tip of liquid gallium, for example, the liquid gallium is drawn into a cone (Taylor cone) with a radius of curvature smaller than a threshold radius, so that the gallium is dissociated and ejected to form a gallium ion beam. The derived gallium ion beam can be focused by an electric lens, the size of the ion beam is determined by a series of aperture changes, the ion beam is focused on the surface of a sample for the second time, and the purpose of cutting is achieved by physical collision. Generally, the ion beam formed by this method has a size of less than 10nm, and can be used as a tool for precise nanostructure processing.

Furthermore, the sample used in the present disclosure may also be used together with the ion beam source 23 to mark the defect points of the semiconductor device. In order to reduce the power consumption of semiconductor devices, improve performance, increase transistor density, and so on, the appearance of semiconductor devices has been scaled down to nanometer scale, which not only makes it difficult to directly observe defects by naked eyes, but also can only accurately determine regions with electrical anomalies by performing electrical tests through probes, such as testing anomalies in electronic components at specific coordinate positions. However, even if the electrical abnormality is detected through the probe, the location of the abnormality is known, but if the defect is observed, it is not as straightforward to search for the electrical abnormality. The conventional TEM or STEM needs to cut the sample to be thin for observation, but the cut position does not exactly correspond to the position of the defect, so that the operator still has to search the position of the defect under the microscope like a sea fishing needle in case of electrical abnormality of the semiconductor device.

In some embodiments, the marking may be done using an ion beam source 23, such as a focused ion beam to deposit a metal line on the surface of the sample. As shown in fig. 4A, the top view of the semiconductor device can be used to find that there is an electrical abnormality in the semiconductor device 40 through electrical testing, i.e. the location of the defect point 41 can be accurately determined through electrical testing, however, the sample observed in two dimensions on the STEM may be cut to other locations of the semiconductor device 40, such as the area a, the area B, the area C, etc. where the defect point 41 is not located. Therefore, in some embodiments of the present disclosure, as shown in fig. 4B, after electrical testing by focused ion beam deposition, a plurality of metal line segments are deposited directly on the periphery of the defect spot 41 as the positioning mark 42. Conventionally, a focused ion beam is used to deposit metal lines, one of the purposes of which is to re-wire the circuit or adjust the resistivity of the device, while the present disclosure uses the positioning mark line 42 as a mark for the defect spot 41 in this embodiment. In some embodiments, the material of the positioning mark 42 includes platinum (Pt), which may exhibit better contrast when observed, and thus be more easily observed, than a carbon-based material. The principle of FIB deposition is to use a metal tube to supply a trace amount of precursor (precursor) gas containing metal to the surface of the semiconductor device 40, and to use Ion beam bombardment to decompose the precursor and deposit metal, which can be classified as Ion beam-induced deposition (IBID). In some embodiments, positioning marks 42 may also be deposited using similar Electron beam-induced deposition (EBID).

As shown in fig. 4B, the top view of the semiconductor device provided with the positioning mark, in some embodiments, the positioning mark 42 may have a plurality of mark lines 42a, 42B, 42c, 42d pointing to the defect point 41. In some embodiments, the marker lines 42 (a-d) within the positioning marker 41 are arranged in a cross shape, with the center of the cross shape being where the defective dot 41 is located. In some embodiments, mark lines 42 (a-d) do not touch each other, but rather, defect spots 41 remain uncovered by mark lines 42 (a-d). For example, the pitch of the mark lines in the same direction, such as the mark lines 42a, 42c or the combination of the mark lines 42b, 42d, is less than about 30nm, so that in some embodiments, the defect points 41 are located within about 30nm x 30nm and surrounded by the positioning mark 42.

As shown in the cross-sectional view of the semiconductor device shown in fig. 4C, which is a cross-sectional view along the line FF' of fig. 4B, in some implementations, the mark line 42B (and other mark lines) may have a substantially square or rectangular cross-sectional structure. In some embodiments, the aspect ratio of the mark line is about 1:1 to about 1:3. In some embodiments, after the positioning marks 42 are fabricated by FIB, an organic colloid (not shown) may be further applied to cover the mark lines 42 (a-d) of the positioning marks 42, which serves as a protective layer for the positioning marks, so that the aspect ratio of the mark lines 42 (a-d) can be maintained without collapsing into a flat shape.

In some embodiments of the present disclosure, after the semiconductor device 40 is electrically tested to confirm the existence of the defect point 41, the positioning mark 42 may be deposited to complete the positioning of the defect point 41, and then to further perform the three-dimensional structure observation of the defect point 41 in a fixed-point manner, the semiconductor device 40 may be cut to obtain a long sample in the manner described above with respect to the preparation of the APT sample, and then plated on the sample support pillar (e.g., the first sample support pillar 12) of the sample carrier 10.

In some embodiments of the present disclosure, the sample 51 obtained after the cutting of the sample area 50 includes at least a portion of the positioning mark 42, which can be plated on the sample support of the sample stage, as shown in the top view of the semiconductor device with positioning marks of fig. 5A and the perspective view of the sample of fig. 5B. In some embodiments, after forming the alignment mark 42 on the surface of the semiconductor device 40, in addition to the organic colloid, other structures may be formed on the surface, such as a cap layer or a sacrificial layer 43 (see fig. 6 later) to protect an underlying Region of Interest (ROI), such as a structure including the defect point 41 from being damaged by gallium. In this embodiment, although the positioning mark 42 is covered, the positioning mark 42 can still realize the positioning of the defect spot 41 during the preparation of the APT sample.

As shown in fig. 5B, the side 420 of the positioning mark 42 can be observed regardless of whether the positioning mark 42 on the sample 51 is covered by other structures, so that in the process of cutting the sample into a tapered profile by reducing the radius of the sample as shown in fig. 5C, 6A and 6B, it can be continuously known that the sample 51 is still gradually close to the position of the defect point 41 in the process of cutting into a tapered profile by observing and tracking the side 420 of the positioning mark 42 from the side of the sample 51. As mentioned above, the material of the positioning mark 42 comprises platinum, which exhibits better contrast with other materials in the periphery (as shown in FIG. 6A), so that the cross section of the mark line 42 (a-d) of the positioning mark 42 can be more clearly used as a positioning mark. In addition, since one end of each of the mark lines 42 (a-d) is directed to the defect point 41 but not covering the defect point 41, it is observed that the side surface of the cone has been changed from the mark line 42 (a-d) to no mark line during the cutting of the sample 51 to have a cone-shaped profile, such as the schematic diagrams of fig. 6A and 6B, which indicates that the cut and modified sample 51 has reached or approached the defect point 41, and the sample 51 together with the sample stage 10 can be moved to perform the APT technique analysis, that is, the three-dimensional image observation and quantitative chemical composition identification of the defect point. In some embodiments, the modified sample 51 has a height of about 40nm, a bottom width of about 20 to 30nm, and a top width of about 10nm.

As described above, in some implementations of the present disclosure, as shown in fig. 7, a method for modifying a sample is disclosed, which comprises steps 601: a sample support post for positioning a sample on a sample stage, the sample support post having a top surface with a channel extending to opposite edges of the top surface such that two sides of the sample are substantially free from the sample support post; and step 602: and cutting the sample by using an ion beam to enable the sample to have a conical profile. In some embodiments, before the sample is placed on the sample carrier, the electrical property of the semiconductor device may be measured to determine the defect point and form the positioning mark on the semiconductor device before the sample is cut from the semiconductor device, and the semiconductor device may be cut to obtain the sample by using the plurality of mark lines of the positioning mark to point to the defect point. Then, in the step of cutting the sample using the ion beam, portions of the marking lines of the positioning marks are cut so that the marking lines respectively expose the cross sections thereof, and the positions of the defect points are identified using the cross sections.

In summary, the present disclosure provides a three-dimensional structure observation method for positioning and pointing defect points of a semiconductor device in some embodiments. The method can combine with a novel sample stage structure, so that a sample on the sample stage not only can be observed by an electron beam and a detector in a two-dimensional structure, but also can be machined and modified by an ion beam into a conical profile and is also used for three-dimensional observation and element analysis of APT. In order to improve the accuracy of element analysis, the sample carrying platform is made of silicon materials. In order to enable the defect point to be correctly positioned and observed in a fixed point manner, the positioning mark containing the platinum material is used, so that the position of the defect point can be confirmed through the positioning mark in the process of cutting the sample into a conical profile.

The foregoing outlines structures of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. It should also be understood by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

Description of the symbols

10: sample carrying platform

11: base seat

11A: first surface

11B: second surface

12: first sample support

12A: the top surface

13: groove

13A: electron beam entrance

13B: electron beam exit

131: first trench

132: second trench

14: sample(s)

15: second sample support

21: electron beam source

22: detector

23: ion beam source

31: clamp apparatus

40: semiconductor device with a plurality of semiconductor chips

41: defect spot

42: positioning mark

42a: marking line

42b: marking line

42c: marking line

42d: marking line

420: side surface

43: sacrificial layer

50: sample area

51: sample (I)

601: step (ii) of

602: step (ii) of

A: region(s)

B: region(s)

C: region(s)

D _E : travel path

FF': and (6) line segments.

Claims (10)

1. A sample carrier, comprising:

a base having a first surface; and

the first sample support is arranged on the first surface of the base, and the top surface of the first sample support is provided with a first groove for placing a sample.

2. The sample stage of claim 1, wherein the first trench extends to opposing edges of the top surface.

3. The sample stage of claim 1, wherein the material of the base and the first sample support posts comprises silicon.

4. The sample stage of claim 1, wherein the top surface of the first sample support post further has a second groove that is orthogonal to the first groove.

5. A system for modifying a sample, comprising:

an electron beam source for generating an electron beam;

a sample stage disposed under the electron beam source and having a sample support with a groove on a top surface thereof for placing a sample;

an ion beam source to generate an ion beam to cut the sample placed on the sample stage; and

a detector disposed under the sample stage;

wherein the sample stage can be adjusted to change its angle relative to the electron beam source such that the electron beam generated by the electron beam source can penetrate the sample and be detected by the detector.

6. The system of claim 5, further comprising a clamp connected to the sample stage for moving or rotating the sample stage.

7. A method of modifying a sample, comprising:

a sample support post for positioning a sample on a sample stage, the sample support post having a top surface with a channel extending to opposite edges of the top surface such that two sides of the sample are substantially free from the sample support post; and

and cutting the sample by using an ion beam to enable the sample to have a conical profile.

8. The method of claim 7, wherein prior to placing the sample on the sample stage, further comprising:

measuring the electrical property of the semiconductor element to judge the defect point;

forming a positioning mark on the semiconductor element, wherein the positioning mark is provided with a plurality of mark lines pointing to the defect points; and

cutting the semiconductor element to obtain the sample, wherein the sample at least comprises part of the positioning mark.

9. The method of claim 8, wherein the step of cutting the sample using an ion beam comprises cutting portions of the marking lines so that the marking lines respectively expose side surfaces thereof, and identifying the positions of the defect points using the side surfaces.

10. The method of claim 8, wherein prior to cutting the semiconductor element to obtain the sample, further comprising applying an organic colloid to cover the marking lines.

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