Disclosure of Invention
The invention provides an Internet of things power module controlled by power supply pulses, which aims to solve the problems in the prior art.
The invention provides an Internet of things power module controlled by power supply pulses, which comprises:
the system comprises a power management module, an Internet of things wireless sensor module and a low-power-consumption voltage reduction conversion system, wherein the power management module is used for distributing the operating power of each node of a wireless sensor based on pulse control so as to match the currently acquired energy;
based on the conversion efficiency of the low-power-consumption step-down conversion system for controlling the dormant state and the awakening state of each wireless sensor module of the Internet of things, the static current and the dynamic loss are reduced.
Preferably, the low power consumption step-down conversion system detects the output voltage, starts one or more switching cycles if the output voltage value is higher than the set output value, and stops switching when the output voltage value is lower than the set output value.
Preferably, the low power consumption step-down conversion system includes:
the device comprises a current reference source, a voltage reference, a feedback network, a hysteresis comparator, a driving circuit, a current sampling circuit, a current peak value comparator and a current zero-crossing comparator;
when the power supply management module is in a dormant state, the power supply management module detects whether the output voltage is smaller than a reference voltage or not based on a voltage reference, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator do not work, and the working circuit module comprises a current reference source, a voltage reference, a feedback network and a hysteresis comparator;
when in the awakening state, the drive circuit, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are all rapidly started.
Preferably, the power management module compares the reference voltage with the feedback voltage through the hysteresis comparator, when the output of the hysteresis comparator is high, the power management module controls each wireless sensor module of the internet of things to enter a wake-up state, the high-side power tube is turned on, and the inductive current rises; the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are quickly started;
when the current peak value comparator detects that the high-side power tube exceeds a peak value threshold value, the high-side power tube is closed, and the low-side power tube is opened; when the current zero-crossing comparator detects that the current of the low-side power tube is zero, the low-side power tube is closed, and one switching period is finished;
when one switching period is over, the hysteresis comparator detects whether the output is low, if the output of the hysteresis comparator is low, the power management module controls each wireless sensor module of the internet of things to enter a dormant state, and the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are closed.
Preferably, the system further comprises a low power consumption control system, wherein the low power consumption control system comprises:
the low-power PFM comparator, the sampling and holding voltage reference, the low-power oscillator and the bias current comparator;
the low-power PFM comparator is used for monitoring the output voltage and switching between a wake-up state and a sleep state; the sample-and-hold voltage reference is used for generating an output reference voltage of the low-power PFM comparator; the heavy load detection logic of the bias current comparator judges the load through a clock, and the low-power-consumption oscillator is used for providing the clock for the heavy load detection logic and providing a holding delay for a sampling holding voltage reference through a clock frequency division circuit.
Preferably, the low power consumption PFM comparator includes:
the overload detection logic circuit detects the sleep state time based on the overload detection logic circuit, when the sleep state time is detected to exceed 2 clocks, the low-power-consumption PFM comparator enters a first load mode, and when the sleep state time is detected to exceed 1 clock and be less than 2 clocks, the low-power-consumption PFM comparator enters a second load mode;
and the feedback resistor comprises a feedforward capacitor and an upper end resistor which are connected in parallel, the leakage current between the source and drain electrodes of the high-side power tube and the low-side power tube is inconsistent at high temperature, the leakage current of the high-side power tube is greater than that of the low-side power tube, and the leakage current at no-load is reduced through the feedback resistor.
Preferably, the sample-and-hold voltage reference comprises a bandgap reference circuit and a sample-and-hold circuit;
the band-gap reference output by the band-gap reference circuit is awakened once every preset time, the reference voltage on a holding capacitor on the sampling and holding circuit is refreshed, and when the band-gap reference circuit is closed, the holding capacitor maintains the reference voltage; when the timer triggers, the bandgap reference circuit starts.
Preferably, the low power consumption oscillator is formed based on a relaxation oscillator structure, two diodes connected in series are connected with one NMOS to form a reference voltage circuit, a first bias current flows through the reference voltage circuit to form a reference voltage, a second bias current charges a charging capacitor, the voltage of an upper plate of the charging capacitor is compared with the reference voltage, and self-biasing is performed on the compared output;
setting three states of the low-power-consumption oscillator, and calculating the average static current value in the three states.
Preferably, when the state is switched from the sleep state to the wake-up state, the high-side power tube of the bias current comparator is turned on, the current peak value comparator is turned on to generate a turn-off signal of the high-side power tube, and when the current flowing through the high-side power tube is greater than a set value, the comparator outputs a rising edge signal to turn off the high-side power tube; after the high-side power tube is closed, the low-side power tube is opened, under the action of inductive current, the current direction of the low-side power tube is from the source electrode to the drain electrode, the current is gradually reduced until the current is reduced to zero, and when the current is reduced to zero, the low-side power tube is closed;
the bias current comparator generates a grid bias voltage input into the geminate transistor based on a source electrode input structure adopted by an amplifier electrode of the zero-crossing current comparator; when the current of the low-side power tube is reduced to a certain value, the output of the zero-crossing current comparator is reversed, the error caused by delay is compensated by regulating and controlling the matching of the zero-crossing current comparator and the driving delay, and the low-side power tube is closed when the actual value of the current of the low-side power tube crosses zero.
Preferably, the synchronous buck converter further comprises a synchronous buck converter, wherein the synchronous buck converter comprises a power switch, a feedback and control circuit, an inductor and a capacitor element, the power switch converts electric energy, the inductor and the capacitor element filter an output signal, and the feedback and control circuit outputs a pulse width modulation signal controlled by feedback voltage to control the power switch;
the power switch is integrated on a power chip, a high-voltage NMOS tube is used as a low-side power tube switch, and a high-voltage PMOS tube or NMOS tube is used as a high-side power tube switch; the low-side power tube switch and the high-side power tube switch are complemented to form voltage conversion from direct current to the switch, and output voltage is formed through a filter consisting of an inductor and a capacitor component;
feedback control is adopted through a feedback and control circuit, a feedback error signal is detected and amplified based on an error amplifier, the output of the error amplifier is compared with a sawtooth wave to generate a PWM signal, and the PWM signal controls a power switch through a driving circuit.
Compared with the prior art, the invention has the following advantages:
the invention provides an Internet of things power module controlled by power supply pulses, which comprises: the system comprises a power management module, an Internet of things wireless sensor module and a low-power-consumption step-down conversion system, wherein the power management module is used for distributing the operating power of each node of a wireless sensor based on pulse control so as to match the currently acquired energy; based on the conversion efficiency of the low-power-consumption step-down conversion system for controlling the dormant state and the awakening state of each wireless sensor module of the Internet of things, the static current and the dynamic loss are reduced.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it should be understood that they are presented herein only to illustrate and explain the present invention and not to limit the present invention.
The embodiment of the invention provides an internet of things power module controlled by power supply pulses, and with reference to fig. 1, the power module comprises the following parts:
the system comprises a power management module, an Internet of things wireless sensor module and a low-power-consumption step-down conversion system, wherein the power management module is used for distributing the operating power of each node of a wireless sensor based on pulse control so as to match the currently acquired energy;
based on the conversion efficiency of the low-power-consumption step-down conversion system for controlling the dormant state and the awakening state of each wireless sensor module of the Internet of things, the static current and the dynamic loss are reduced.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment comprises the following steps: the system comprises a power management module, an Internet of things wireless sensor module and a low-power-consumption step-down conversion system, wherein the power management module is used for distributing the operating power of each node of a wireless sensor based on pulse control so as to match the currently acquired energy; based on the conversion efficiency of the low-power-consumption step-down conversion system for controlling the dormant state and the awakening state of each wireless sensor module of the Internet of things, the static current and the dynamic loss are reduced.
The beneficial effects of the above technical scheme are: the scheme provided by the embodiment comprises the following steps: the system comprises a power management module, an Internet of things wireless sensor module and a low-power-consumption step-down conversion system, wherein the power management module is used for distributing the operating power of each node of a wireless sensor based on pulse control so as to match the currently acquired energy; based on the conversion efficiency of the low-power-consumption step-down conversion system for controlling the dormant state and the awakening state of each wireless sensor module of the Internet of things, the static current and the dynamic loss are reduced.
In another embodiment, the low power consumption buck conversion system starts one or more switching cycles by detecting the output voltage, if the output voltage is higher than the set output value, and stops switching when the output voltage is lower than the set output value.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that the low-power-consumption step-down conversion system detects the output voltage, starts one or more switching cycles if the output voltage value is higher than the set output value, and stops switching when the output voltage value is lower than the set output value.
The beneficial effects of the above technical scheme are: by adopting the scheme provided by the embodiment, the low-power-consumption step-down conversion system detects the output voltage, starts one or more switching cycles if the output voltage value is higher than the set output value, and stops switching when the output voltage value is lower than the set output value.
In another embodiment, as shown in fig. 2, the low power down buck conversion system includes:
the device comprises a current reference source, a voltage reference, a feedback network, a hysteresis comparator, a driving circuit, a current sampling circuit, a current peak value comparator and a current zero-crossing comparator;
when the power supply management module is in a dormant state, the power supply management module detects whether the output voltage is smaller than a reference voltage or not based on a voltage reference, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator do not work, and the working circuit module comprises a current reference source, a voltage reference, a feedback network and a hysteresis comparator;
when in the awakening state, the drive circuit, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are all rapidly started.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that the low-power-consumption step-down conversion system comprises:
the device comprises a current reference source, a voltage reference, a feedback network, a hysteresis comparator, a driving circuit, a current sampling circuit, a current peak value comparator and a current zero-crossing comparator;
when the power supply management module is in a dormant state, the power supply management module detects whether the output voltage is smaller than a reference voltage or not based on a voltage reference, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator do not work, and the working circuit module comprises a current reference source, a voltage reference, a feedback network and a hysteresis comparator;
when in the awakening state, the drive circuit, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are all rapidly started.
The beneficial effects of the above technical scheme are: the low-power-consumption step-down conversion system adopting the scheme provided by the embodiment comprises:
the device comprises a current reference source, a voltage reference, a feedback network, a hysteresis comparator, a driving circuit, a current sampling circuit, a current peak value comparator and a current zero-crossing comparator;
when the power supply management module is in a dormant state, the power supply management module detects whether the output voltage is smaller than a reference voltage or not based on a voltage reference, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator do not work, and the working circuit module comprises a current reference source, a voltage reference, a feedback network and a hysteresis comparator;
when in the awakening state, the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are all rapidly started.
In another embodiment, the power management module compares the reference voltage with the feedback voltage through the hysteresis comparator, when the output of the hysteresis comparator is high, the power management module controls each wireless sensor module of the internet of things to enter a wake-up state, the high-side power tube is turned on, and the inductive current rises; the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are quickly started;
when the current peak value comparator detects that the high-side power tube exceeds the peak value threshold value, the high-side power tube is closed, and the low-side power tube is opened; when the current zero-crossing comparator detects that the current of the low-side power tube is zero, the low-side power tube is closed, and one switching period is ended;
when one switching period is finished, the hysteresis comparator detects whether the output is low, if the output of the hysteresis comparator is low, the power management module controls each Internet of things wireless sensor module to enter a dormant state, and the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are closed.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that the power management module compares the reference voltage with the feedback voltage through the hysteresis comparator, when the output of the hysteresis comparator is high, the power management module controls each wireless sensor module of the internet of things to enter a wake-up state, the high-side power tube is started, and the inductive current rises; the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are quickly started;
when the current peak value comparator detects that the high-side power tube exceeds a peak value threshold value, the high-side power tube is closed, and the low-side power tube is opened; when the current zero-crossing comparator detects that the current of the low-side power tube is zero, the low-side power tube is closed, and one switching period is finished;
when one switching period is over, the hysteresis comparator detects whether the output is low, if the output of the hysteresis comparator is low, the power management module controls each wireless sensor module of the internet of things to enter a dormant state, and the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are closed.
The beneficial effects of the above technical scheme are: by adopting the scheme provided by the embodiment, the power management module compares the reference voltage with the feedback voltage through the hysteresis comparator, when the output of the hysteresis comparator is high, the power management module controls each wireless sensor module of the internet of things to enter a wake-up state, the high-side power tube is started, and the inductive current rises; the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are quickly started;
when the current peak value comparator detects that the high-side power tube exceeds a peak value threshold value, the high-side power tube is closed, and the low-side power tube is opened; when the current zero-crossing comparator detects that the current of the low-side power tube is zero, the low-side power tube is closed, and one switching period is ended;
when one switching period is finished, the hysteresis comparator detects whether the output is low, if the output of the hysteresis comparator is low, the power management module controls each Internet of things wireless sensor module to enter a dormant state, and the current sampling circuit, the current peak value comparator and the current zero-crossing comparator are closed.
In another embodiment, a low power consumption control system is further included, the low power consumption control system comprising:
the low-power PFM comparator, the sampling and holding voltage reference, the low-power oscillator and the bias current comparator;
the low-power PFM comparator is used for monitoring the output voltage and switching between a wake-up state and a sleep state; the sample-and-hold voltage reference is used for generating an output reference voltage of the low-power PFM comparator; the heavy load detection logic of the bias current comparator judges the load through a clock, and the low-power-consumption oscillator is used for providing the clock for the heavy load detection logic and providing a holding delay for a sampling holding voltage reference through a clock frequency division circuit.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment further comprises a low-power consumption control system, wherein the low-power consumption control system comprises:
the low-power PFM comparator, the sampling and holding voltage reference, the low-power oscillator and the bias current comparator;
the low-power PFM comparator is used for monitoring the output voltage and switching between a wake-up state and a sleep state; the sample-and-hold voltage reference is used for generating an output reference voltage of the low-power PFM comparator; the heavy load detection logic of the bias current comparator judges the load through a clock, and the low-power-consumption oscillator is used for providing the clock for the heavy load detection logic and providing a holding delay for a sampling holding voltage reference through a clock frequency division circuit.
The beneficial effects of the above technical scheme are: the scheme provided by the embodiment further comprises a low-power consumption control system, wherein the low-power consumption control system comprises:
the low-power PFM comparator, the sampling and holding voltage reference, the low-power oscillator and the bias current comparator;
the low-power PFM comparator is used for monitoring the output voltage and switching between a wake-up state and a sleep state; the sample-and-hold voltage reference is used for generating an output reference voltage of the low-power-consumption PFM comparator; the heavy load detection logic of the bias current comparator judges the load through a clock, and the low-power-consumption oscillator is used for providing the clock for the heavy load detection logic and providing a holding delay for a sampling holding voltage reference through a clock frequency division circuit.
In another embodiment, the low power PFM comparator comprises:
the overload detection logic circuit detects the sleep state time based on the overload detection logic circuit, when the sleep state time is detected to exceed 2 clocks, the low-power-consumption PFM comparator enters a first load mode, and when the sleep state time is detected to exceed 1 clock and be less than 2 clocks, the low-power-consumption PFM comparator enters a second load mode;
and the feedback resistor comprises a feedforward capacitor and an upper end resistor which are connected in parallel, the leakage current between the source and drain electrodes of the high-side power tube and the low-side power tube is inconsistent at high temperature, the leakage current of the high-side power tube is greater than that of the low-side power tube, and the leakage current at no-load is reduced through the feedback resistor.
The working principle of the technical scheme is as follows: the scheme adopted by this embodiment is that the low power consumption PFM comparator includes:
the overload detection logic circuit detects the sleep state time based on the overload detection logic circuit, when the sleep state time is detected to exceed 2 clocks, the low-power-consumption PFM comparator enters a first load mode, and when the sleep state time is detected to exceed 1 clock and be less than 2 clocks, the low-power-consumption PFM comparator enters a second load mode;
and the feedback resistor comprises a feedforward capacitor and an upper end resistor which are connected in parallel, the leakage current between the source and drain electrodes of the high-side power tube and the low-side power tube is inconsistent at high temperature, the leakage current of the high-side power tube is greater than that of the low-side power tube, and the leakage current at no-load is reduced through the feedback resistor.
The beneficial effects of the above technical scheme are: the low-power-consumption PFM comparator adopting the scheme provided by the embodiment comprises:
the overload detection logic circuit detects the sleep state time based on the overload detection logic circuit, when the sleep state time is detected to exceed 2 clocks, the low-power-consumption PFM comparator enters a first load mode, and when the sleep state time is detected to exceed 1 clock and be less than 2 clocks, the low-power-consumption PFM comparator enters a second load mode;
and the feedback resistor comprises a feedforward capacitor and an upper end resistor which are connected in parallel, the leakage current between the source and drain electrodes of the high-side power tube and the low-side power tube is inconsistent at high temperature, the leakage current of the high-side power tube is greater than that of the low-side power tube, and the leakage current at no-load is reduced through the feedback resistor.
In another embodiment, the sample-and-hold voltage reference comprises a bandgap reference circuit and a sample-and-hold circuit;
the band-gap reference output by the band-gap reference circuit is awakened once every preset time, the reference voltage on a holding capacitor on the sampling and holding circuit is refreshed, and when the band-gap reference circuit is closed, the holding capacitor maintains the reference voltage; when the timer triggers, the bandgap reference circuit starts.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that the sampling and holding voltage reference comprises a band gap reference circuit and a sampling and holding circuit;
the band-gap reference output by the band-gap reference circuit is awakened once every preset time, the reference voltage on a holding capacitor on the sampling and holding circuit is refreshed, and when the band-gap reference circuit is closed, the holding capacitor maintains the reference voltage; when the timer triggers, the bandgap reference circuit starts.
The beneficial effects of the above technical scheme are: the sample-hold voltage reference provided by the embodiment comprises a band-gap reference circuit and a sample-hold circuit;
the band-gap reference output by the band-gap reference circuit is awakened once every preset time, the reference voltage on a holding capacitor on the sampling and holding circuit is refreshed, and when the band-gap reference circuit is closed, the holding capacitor maintains the reference voltage; when the timer triggers, the bandgap reference circuit starts.
In another embodiment, the low-power consumption oscillator is formed based on a relaxation oscillator structure, two diodes connected in series are connected with one NMOS tube to form a reference voltage circuit, a first bias current flows through the reference voltage circuit to form a reference voltage, a second bias current charges a charging capacitor, the voltage of an upper plate of the charging capacitor is compared with the reference voltage, and self-bias is carried out on the compared output;
setting three states of the low-power-consumption oscillator, and calculating the average static current value in the three states.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that the low-power consumption oscillator is formed based on a relaxation oscillator structure, two diodes connected in series are connected with one NMOS (N-channel metal oxide semiconductor) tube to form a reference voltage circuit, a first bias current flows through the reference voltage circuit to form a reference voltage, a second bias current charges a charging capacitor, the voltage of an upper plate of the charging capacitor is compared with the reference voltage, and self-bias is carried out on the compared output;
setting three states of the low-power-consumption oscillator, and calculating the average static current value in the three states.
The beneficial effects of the above technical scheme are: the low-power-consumption oscillator is formed based on a relaxation oscillator structure by adopting the scheme provided by the embodiment, two diodes connected in series are connected with one NMOS (N-channel metal oxide semiconductor) tube to form a reference voltage circuit, a first bias current flows through the reference voltage circuit to form a reference voltage, a second bias current charges a charging capacitor, the voltage of an upper plate of the charging capacitor is compared with the reference voltage, and self-bias is carried out on the compared output;
setting three states of the low-power-consumption oscillator, and calculating average static current values in the three states.
In another embodiment, when the high-side power tube is switched from the sleep state to the wake-up state, the high-side power tube of the bias current comparator is turned on, the current peak value comparator is turned on to generate a turn-off signal of the high-side power tube, and when the current flowing through the high-side power tube is greater than a set value, the comparator outputs a rising edge signal to turn off the high-side power tube; after the high-side power tube is closed, the low-side power tube is opened, under the action of inductive current, the current direction of the low-side power tube is from the source electrode to the drain electrode, the current is gradually reduced until the current is reduced to zero, and when the current is reduced to zero, the low-side power tube is closed;
the bias current comparator generates a grid bias voltage input to the geminate transistor based on a source electrode input structure adopted by an amplifying electrode of the zero-crossing current comparator; when the current of the low-side power tube is reduced to a certain value, the output of the zero-crossing current comparator is reversed, the error caused by delay is compensated by regulating and controlling the matching of the zero-crossing current comparator and the driving delay, and the low-side power tube is closed when the actual value of the current of the low-side power tube crosses zero.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment is that when the high-side power tube of the bias current comparator is switched to the awakening state from the dormant state, the high-side power tube of the bias current comparator is started, the current peak value comparator is started to generate a closing signal of the high-side power tube, and when the current flowing through the high-side power tube is larger than a set value, the comparator outputs a rising edge signal to close the high-side power tube; after the high-side power tube is closed, the low-side power tube is opened, under the action of inductive current, the current direction of the low-side power tube is from the source electrode to the drain electrode, the current is gradually reduced until the current is reduced to zero, and when the current is reduced to zero, the low-side power tube is closed;
the bias current comparator generates a grid bias voltage input into the geminate transistor based on a source electrode input structure adopted by an amplifier electrode of the zero-crossing current comparator; when the current of the low-side power tube is reduced to a certain value, the output of the zero-crossing current comparator is reversed, the error caused by delay is compensated by regulating and controlling the matching of the zero-crossing current comparator and the driving delay, and the low-side power tube is closed when the actual value of the current of the low-side power tube crosses zero.
The beneficial effects of the above technical scheme are: when the scheme provided by the embodiment is adopted and is switched from the sleep state to the wake-up state, the high-side power tube of the bias current comparator is started, the current peak value comparator is started to generate a closing signal of the high-side power tube, and when the current flowing through the high-side power tube is larger than a set value, the comparator outputs a rising edge signal to close the high-side power tube; after the high-side power tube is closed, the low-side power tube is opened, under the action of inductive current, the current direction of the low-side power tube is from the source electrode to the drain electrode, the current is gradually reduced until the current is reduced to zero, and when the current is reduced to zero, the low-side power tube is closed;
the bias current comparator generates a grid bias voltage input to the geminate transistor based on a source electrode input structure adopted by an amplifying electrode of the zero-crossing current comparator; when the current of the low-side power tube is reduced to a certain value, the output of the zero-crossing current comparator is reversed, the error caused by delay is compensated by regulating and controlling the matching of the zero-crossing current comparator and the driving delay, and the low-side power tube is closed when the actual value of the current of the low-side power tube crosses zero.
In another embodiment, as shown in fig. 3, the apparatus further includes a synchronous buck converter, where the synchronous buck converter includes a power switch, a feedback and control circuit, and inductance and capacitance components, the power switch converts electric energy, the inductance and capacitance components filter an output signal, and the feedback and control circuit outputs a pulse width modulation signal controlled by a feedback voltage to control the power switch;
the power switch is integrated on a power chip, a high-voltage NMOS tube is used as a low-side power tube switch, and a high-voltage PMOS tube or NMOS tube is used as a high-side power tube switch; the low-side power tube switch and the high-side power tube switch are complemented to form voltage conversion from direct current to the switch, and output voltage is formed through a filter consisting of an inductor and a capacitor component;
feedback control is adopted through a feedback and control circuit, a feedback error signal is detected and amplified based on an error amplifier, the output of the error amplifier is compared with a sawtooth wave to generate a PWM signal, and the PWM signal controls a power switch through a driving circuit.
The working principle of the technical scheme is as follows: the scheme adopted by the embodiment further comprises a synchronous buck converter, wherein the synchronous buck converter comprises a power switch, a feedback and control circuit, an inductor and a capacitor element, the power switch converts electric energy, the inductor and the capacitor element filter an output signal, and the feedback and control circuit outputs a pulse width modulation signal controlled by feedback voltage to control the power switch;
the power switch is integrated on a power chip, a high-voltage NMOS tube is used as a low-side power tube switch, and a high-voltage PMOS tube or NMOS tube is used as a high-side power tube switch; the low-side power tube switch and the high-side power tube switch are complemented to form voltage conversion from direct current to the switch, and output voltage is formed through a filter consisting of an inductor and a capacitor component;
feedback control is adopted through a feedback and control circuit, a feedback error signal is detected and amplified based on an error amplifier, the output of the error amplifier is compared with a sawtooth wave to generate a PWM signal, and the PWM signal controls a power switch through a driving circuit.
The beneficial effects of the above technical scheme are: the scheme provided by the embodiment is adopted, and the synchronous buck converter comprises a power switch, a feedback and control circuit, an inductor and a capacitor element, wherein the power switch is used for converting electric energy, the inductor and the capacitor element are used for filtering an output signal, and the feedback and control circuit outputs a pulse width modulation signal controlled by feedback voltage to control the power switch;
the power switch is integrated on a power chip, a high-voltage NMOS tube is used as a low-side power tube switch, and a high-voltage PMOS tube or NMOS tube is used as a high-side power tube switch; the low-side power tube switch and the high-side power tube switch are complemented to form direct current to switch voltage conversion, and output voltage is formed through a filter consisting of an inductor and a capacitor component;
feedback control is adopted through a feedback and control circuit, a feedback error signal is detected and amplified based on an error amplifier, the output of the error amplifier is compared with a sawtooth wave to generate a PWM signal, and the PWM signal controls a power switch through a driving circuit.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.