CN115020589A - Multifunctional silicon-based photoelectric nerve synapse device and preparation method thereof - Google Patents

Multifunctional silicon-based photoelectric nerve synapse device and preparation method thereof Download PDF

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CN115020589A
CN115020589A CN202210385701.6A CN202210385701A CN115020589A CN 115020589 A CN115020589 A CN 115020589A CN 202210385701 A CN202210385701 A CN 202210385701A CN 115020589 A CN115020589 A CN 115020589A
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皮孝东
黄世杰
杨德仁
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Zhejiang University ZJU
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Abstract

The invention discloses a multifunctional silicon-based photoelectric nerve synapse device, which comprises an oxide upper silicon layer, wherein the oxide upper silicon layer consists of an oxide layer and a silicon substrate, and the oxide layer is positioned on the silicon substrate; the photoelectric response layer is positioned on the oxide layer and is a semiconductor perovskite thin film; and the top electrode is positioned on the photoelectric response layer and is made of an inert metal material. The silicon-based photoelectric nerve synapse device can write electric signals under the conditions of lower energy consumption and low crosstalk, and a plurality of optical modulation and control functions are completed. The invention also provides a preparation method of the multifunctional silicon-based photoelectric nerve synapse device. The preparation method has the advantages of low cost, high fault tolerance, simple and convenient operation and the like.

Description

Multifunctional silicon-based photoelectric nerve synapse device and preparation method thereof
Technical Field
The invention belongs to the field of neuromorphic chips, and particularly relates to a multifunctional silicon-based photoelectric nerve synapse device and a preparation method thereof.
Background
With the rise of the fields of internet of things, big data and the like, the demand of people on low-energy consumption and high-performance computing is increasing day by day, however, the traditional von neumann architecture-based computing is separated in computing, so that the data transmission speed is slow and the energy consumption is high during computing, and the demand of the human society is difficult to meet. The neuromorphic computing has an information processing mode different from the von Neumann architecture-based computing, has the characteristics of storage and computation integration and the like, and is expected to greatly improve computing performance and reduce energy consumption. Neuromorphic calculations primarily mimic the way the human brain processes information. In the human brain, neurons perform functions such as learning and memory by changing synaptic weights between synapses. The development of artificial synapses (i.e., neurosynaptic devices) that mimic neurosynaptic events is critical in order to achieve neuromorphic calculations.
The photoelectric nerve synapse device is oriented to an important hardware foundation of nerve morphology calculation. The literature, Optoelectronic synthetic Devices for neural Computing, Y Wang, L Yin, W Huang et al, Advanced Intelligent Systems,2021,3(1), discloses that Optoelectronic neurosynaptic Devices have the advantages of low power consumption, high fault tolerance, high connectivity, distributed parallel processing, etc., compared to conventional CMOS transistors.
Although optoelectronic neurosynaptic devices have developed rapidly in recent years, there are still some technical difficulties. Devices of the two-terminal type structure are the most suitable devices for mimicking neurosynaptic function.
Chinese patent No. CN107579155B discloses a memristor including "metal/a-Si/metal" surface plasmon waveguide and "upper electrode/double-resistive layer/lower electrode" embedded therein; the surface plasma waveguide is provided with a vertical three-layer structure of 'a second metal layer/a dielectric layer/a first metal layer' from top to bottom; the memristor is provided with a vertical four-layer structure of 'an upper electrode/a second resistance-change layer/a first resistance-change layer/a lower electrode' from top to bottom, and the first resistance-change layer and the second resistance-change layer of the memristor are used as optical signal propagation channels and are horizontally connected with a dielectric layer of the surface plasma waveguide; the neurosynaptic device reads the resistance value through an optical signal, but the change of the resistance value is still achieved by applying voltage, and the problem that writing cannot be carried out through the optical signal is not solved, and the problem that writing of an electric signal causes high energy consumption and high crosstalk is not solved.
Chinese patent No. CN111312899B discloses a photoelectric neurosynaptic device with zero energy consumption and a method for manufacturing the same, wherein the neurosynaptic device includes a top electrode, a hole transport layer, a photoelectric response layer, an electron transport layer, and a bottom electrode. The photoelectric nerve synapse device is limited by ohmic contact of metal and semiconductor, and can not well regulate and control a contact barrier through voltage, so that only a few nerve synapse functions can be simulated. In addition, the photoelectric nerve synapses have the defects of more layers, complex process and poor integration level, which are also important problems.
Disclosure of Invention
The invention provides a multifunctional silicon-based photoelectric nerve synapse device which can write optical signals under the conditions of lower energy consumption and low crosstalk and can complete a plurality of optical modulation and control functions.
A multifunctional silicon-based optoelectronic neurosynaptic device, comprising:
a bottom electrode layer, which is a Silicon-On-oxide (SOI) layer On a Silicon substrate having an oxide layer;
the photoelectric response layer is positioned on the bottom electrode layer and is a semiconductor perovskite thin film;
and the top electrode is positioned on the photoelectric response layer and is made of an inert metal material.
The photoelectric response layer with the perovskite is directly contacted with the silicon layer on the oxide, under the illumination condition, the defects of the contact interface and the potential well formed by the electric field in the heterojunction can capture and temporarily store electric charges, and after the illumination is stopped, the electric charges are gradually released from the interface to generate attenuation current under the thermal desorption effect, so that various nerve synapse functions can be simulated.
The thickness of the photoelectric response layer is 200-300 nm.
The high light with too high thickness can be absorbed or reflected in the metal layer and cannot be incident to the photoelectric response layer or cannot penetrate through the photoelectric response layer, and the photoelectric response layer cannot effectively absorb the light with too low thickness, so that the energy consumption for regulating and controlling various nerve synapse functions is high.
The thickness of the SOI is 200-500 nm.
The thickness of the top electrode is 50-100 nm.
The inert metal material is gold, platinum or palladium.
The working principle of the multifunctional silicon-based photoelectric nerve synapse device provided by the invention is as follows:
the silicon-based photoelectric nerve synapse device disclosed by the invention has a photovoltaic effect due to the existence of built-in electric fields of the Schottky junction and the semiconductor heterojunction, can work under the condition of no bias voltage, and realizes zero electric power consumption; the Schottky barrier and the barrier of the semiconductor heterojunction are regulated and controlled by electric bias voltage, and the motion direction of photogenerated carriers and the capturing and desorbing behaviors on an interface can be changed. When light enters, the resistance value of the photoresponsive layer can be changed, and the problem that the light cannot be written is solved. By changing the electrical polarity applied to the device, the response of the device to optical signals can realize the effect of enhancement and inhibition, various neurosynaptic functions can be simulated, and the problem that the neurosynaptic behavior of the device cannot be effectively controlled by an electric field at two ends, so that the function is single is solved, wherein the problems include double-pulse facilitation/inhibition (PPF/PPD), Stimulation Duration Dependence Plasticity (SDDP), stimulation frequency dependence plasticity (SNDP), stimulation frequency dependence plasticity (SRDP) and the like.
The invention also provides a preparation method of the multifunctional silicon-based photoelectric nerve synapse device, which comprises the following steps:
(1) ultrasonically cleaning and drying the SOI, and spin-coating an adhesion promoter on the dried SOI to obtain the SOI coated with the adhesion promoter, wherein the spin-coating speed is 2000-4000 rpm;
(2) spin-coating photoresist on the SOI coated with the adhesion promoter, drying to obtain the SOI of the spin-coating photoresist, and sequentially carrying out exposure, development and ICP etching on the surface of the SOI of the spin-coating photoresist by using a mask to obtain an imaged SOI;
(3) MAPbI is added 3 The precursor solution is coated on the patterned SOI surface in a spin mode, so that a photoelectric response layer is formed on the patterned SOI surface, and a pattern is deposited on the surface of the photoelectric response layer by utilizing a mask plate and adopting a vacuum thermal evaporation technologyThe formed metal film can be used to obtain multifunctional silicon-based photoelectric nerve synapse device.
In the step (1):
the ultrasonic cleaning time is 20-40 min.
The drying parameters are as follows: the drying temperature is 80-120 deg.C, and the drying time is 1-5 min.
And after the adhesion promoter is spin-coated on the dried SOI, annealing is carried out at the temperature of 80-120 ℃, and then drying is carried out for 2-5 min.
In the step (2):
the spin coating process comprises spin coating and spin coating;
wherein, the glue homogenizing process comprises the following steps: the rotation speed of the spin coating stage is 300-;
the spin coating process comprises the following steps: the rotation speed of the whirl coating stage is 4000-6000 rpm, the whirl coating time is 35-50 s, the drying temperature is 80-120 ℃, and the drying time is 2-5 min.
The exposure dose is 30-80mJ/cm 2 。
The type of the developing solution used in the developing process is AR-300-26, the developing solution is diluted by deionized water before developing, the volume ratio of the developing solution to the deionized water is 1:5-1:10, and the developing time is 40-60 s.
The ICP etching process comprises the following steps: the gas species is C 4 F 8 、SF 6 And He, the gas flow rate is 10-50 sccm and 100-200 sccm, and the etching time is 30-80 s.
In the step (3):
the MAPbi 3 The preparation method of the precursor solution comprises the following steps:
mixing lead iodide (PbI) 2 ) And Methyl Amine Iodide (MAI) in Dimethylformamide (DMF) to form a mixed solution, wherein PbI 2 The dosage of 400-600 mg, the dosage of MAI 100-200 mg and the volume of DMF 600-800 mL, then adding dimethyl sulfoxide (DMSO) into the mixed solution, the dosage of the dimethyl sulfoxide (DMSO) is 50-100 mu L, and adopting a magnetic stirring mode to fully react to form uniform MAPbI 3 And (3) precursor solution.
The spin coating process comprises spin coating, spin coating and annealing;
wherein, the glue homogenizing process comprises the following steps: the rotation speed of the spin coating stage is 300-;
the whirl coating process comprises the following steps: the rotating speed of the spin coating stage is 4000-;
the annealing process comprises the following steps: the annealing temperature is 60-120 ℃, and the annealing time is 5-30 min.
The electrode line width of the top electrode after patterning is 10-30 mu m, the electrode line width of the bottom electrode after patterning is 1-10 mu m, the number of electrode lines of the top electrode after patterning and the number of electrode lines of the bottom electrode after patterning are both 5-10, the electrode lines of the top electrode after patterning and the electrode lines of the bottom electrode after patterning are kept perpendicular to each other, and 25-100 effective areas of the electrode lines and the electrode lines of the bottom electrode after patterning are formed in a crossed mode and are 10-300 mu m 2 The neuromorphic receptor neurosynaptic device of (1).
The rotating speed of the adhesion promoter is a key factor for controlling the thickness of the adhesion promoter, the regulation and control of the thickness of the adhesion promoter are important for improving the affinity of a substrate to photoresist and improving the integrity of a photoetching pattern, a dielectric layer can be formed when the thickness of the adhesion promoter is too thick, and a good adhesion promoting effect cannot be achieved when the thickness of the adhesion promoter is too thin. This adhesion promoter is chosen rather than the commonly used HDMS (hexamethyldisilane) adhesion promoter because of its non-toxic, fast and mass-production characteristics. The exposure dose and the type of gas selected for etching, the process of removing photoresist during the etching duration can affect the final interface of the SOI, if the exposure dose is too low, the development selectivity can be reduced, if the etching duration is too long, the oxide layer can be partially etched, the surface is rough, the contact with the photoelectric response layer is affected, and therefore the required nerve synapse function can not be achieved. The concentration and the rotating speed of the solution determine the thickness of the photoelectric response layer, and the thickness of the photoelectric response layer can reach the ideal absorption proportion of light in the photoelectric response layer and the SOI layer at the optimal value so as to simulate the function of the nerve synapse.
Compared with the prior art, the invention has the following excellent effects:
(1) according to the invention, through the Schottky junction formed by the metal top electrode and the photoelectric response layer and the semiconductor heterojunction formed by the photoelectric response layer and the SOI layer, the semiconductor heterojunction can work under various electrical polarity conditions, and zero electrical power consumption is realized. Under different electrical polarity modulation, the transmission and capture performance of the junction area to the current carrier is changed, and the change trend of the generated photocurrent along with the light stimulation condition is different, so that various nerve synapse functions can be simulated, the problem that the electrical polarity of a two-end type photoelectric nerve synapse device is single in light regulation and control function is solved, and the technical bias that the two-end device cannot effectively regulate and control the light response change trend of the nerve synapse device through electric bias voltage is overcome.
(2) The integration of devices is realized by utilizing photoetching and etching processes, and the photoelectric response layer is prepared by utilizing a low-temperature solution method, so that the method has the advantages of low cost, high fault tolerance, simplicity and convenience in operation and the like.
Drawings
FIG. 1 is a block diagram of a multifunctional silicon-based optoelectronic neurosynaptic device according to an exemplary embodiment;
FIG. 2 is a flow chart illustrating the patterning of a silicon-on-oxide layer according to one embodiment;
FIG. 3 is a top electrode image array diagram provided in accordance with an embodiment;
FIG. 4 is a diagram of the dual pulse facilitation index at different voltages for a multi-functional silicon-based optoelectronic neurosynaptic device according to an exemplary embodiment;
FIG. 5 is a graph of the plasticity of the stimulation duration dependence of the multifunctional silicon-based photoelectric neurosynaptic device provided by the embodiment under different voltages;
FIG. 6 is a diagram illustrating the plasticity dependence of the stimulation times of the multifunctional silicon-based optoelectronic neurosynaptic device provided by the exemplary embodiment at different voltages;
FIG. 7 is a diagram of the stimulation frequency dependence plasticity of the multifunctional silicon-based photoelectric neurosynaptic device provided by the embodiment under different voltages.
Detailed Description
Referring to fig. 1, the technical solution of the present invention is described in further detail with reference to several preferred embodiments and accompanying drawings, and the present invention provides a multifunctional silicon-based optoelectronic neurosynaptic device, including:
the top electrode (1) is positioned on the photoelectric response layer and is made of an inert metal Au;
the photoelectric response layer (2) is positioned on the SOI and is a semiconductor perovskite thin film;
and a bottom electrode layer (3) which is an SOI that is used as a bottom electrode on a silicon substrate having an oxide layer.
The photoelectric response layer is prepared by adopting a precursor solution spin coating and low-temperature annealing deposition process; the top electrode is an Au thin film which has good conductivity and can form a Schottky junction with the photoelectric response layer, has a certain passing rate for light with specific wavelength and is deposited in a vacuum thermal evaporation mode. The invention stimulates a multifunctional silicon-based photoelectric nerve synapse device by light through a top electrode, and applies positive and negative voltages to the multifunctional silicon-based photoelectric nerve synapse device by utilizing a semiconductor parameter analyzer to verify double-pulse facilitation/inhibition (PPF/PPD), Stimulation Duration Dependent Plasticity (SDDP), stimulation frequency dependent plasticity (SNDP) and stimulation frequency dependent plasticity (SRDP) of the multifunctional silicon-based photoelectric nerve synapse device.
The invention provides a preparation method of a multifunctional silicon-based photoelectric nerve synapse device, which comprises the following steps:
(1) the imaged SOI was prepared as shown in FIG. 2, with the following specific steps:
ultrasonically cleaning the SOI for 20min, and drying the cleaned SOI on a hot plate at 105 ℃ for 2 min; spin-coating AR-300-80 type adhesion promoter on the dried SOI, drying and forming a film, wherein the spin-coating rotation speed is 4000rpm, the annealing temperature is 105 ℃, and the drying time is 2 min;
spin-coating AR-P5350 type photoresist on the attached SOI, drying and forming a film, wherein the spin-coating is divided into a spin-coating stage and a spin-coating stage, and the spin-coating process comprises the following steps: the rotating speed of the spin coating stage is 500rpm, and the spin coating time is 5 s; the spin coating process comprises the following steps: the rotating speed of the whirl coating stage is 4000rpm, the whirl coating time is 40s, the drying temperature is 105 ℃, and the drying time is 4 min;
after drying, ultraviolet exposure is carried out on the photoresist by using a MA/BA6 Gen4 model double-sided alignment photoetching machine through a self-designed chromium-plated quartz photoetching mask plate with a linear pattern, the width of a pin part of the pattern is 1mm, the linear width is 10 mu m, the line number is 8, and the exposure dose is 55mJ/cm 2 . And developing with an AR-300-26 type developing solution, and cleaning the surface with deionized water after the development is finished so as to control the development effect. The used developing solution of the type is diluted by deionized water, the ratio of the developing solution to the deionized water is 1:7, and the developing time is 45 s. The SOI was then subjected to ICP etching using a gas of 30sccm C 4 F 8 30sccm SF 6 Or He at 120sccm for an etch time of 60s to obtain a patterned SOI.
(2) Preparing a photoelectric response layer: lead iodide (PbI) 2 ) And Methyl Amine Iodide (MAI) in Dimethylformamide (DMF) to form a mixed solution, wherein PbI 2 In an amount of 461mg, MAI in an amount of 159mg, and DMF in a volume of 1mL, then adding dimethyl sulfoxide (DMSO) in an amount of 100 μ L to the mixed solution, and performing a sufficient reaction by magnetic stirring to form uniform MAPbI 3 And (3) precursor solution. The precursor solution is spin-coated on the prepared patterned SOI sheet, and before spin-coating, the SOI sheet is subjected to ultraviolet ozone cleaning, so that the ion cleanliness of the surface is enhanced, the adhesion and uniformity of the film can be improved, and the photoelectric response can be enhanced;
the spin coating scheme specifically comprises the following steps: the KW-4B type spin coating instrument is utilized to set spin coating parameters into two steps, wherein the spin coating step is carried out at the rotating speed of 300-500rpm for 5s, and the spin coating step is carried out at the rotating speed of 4000rpm for 35 s. And in the spin-coating process, dripping an anti-solvent chlorobenzene in an optimal time window which is the 9 th time in the spin-coating process, and after the spin-coating is finished, carrying out annealing crystallization treatment on the obtained liquid film at the annealing temperature of 80 ℃ for 10 min.
(3) Preparing a metal top electrode layer:
vacuum heating on photoresponsive layer by self-designed metal hard maskDepositing a metal film by evaporation technology, wherein the width of the electrode is 30 μm, the number of lines is 8, the pattern direction of the top electrode is vertical to that of the bottom electrode, and 64 effective areas with the size of 300 μm are formed in a crossed manner 2 The neurosynaptic device realizes the integration of the multifunctional silicon-based photoelectric neurosynaptic device by using the method, and the obtained array is shown in figure 3.
The performance of the multifunctional silicon-based photoelectric nerve synapse device provided by the invention is as follows:
as shown in FIG. 4, the multifunctional silicon-based optoelectronic neurosynaptic device exhibits different PPF/PPD properties when operated at different voltages. The double pulse facilitation index (PPF index) is defined as the ratio of the current A2 generated by two consecutive light stimuli, the latter one and the former one A1. The specific method for realizing simulation of PPF/PPD by the device is as follows: when the semiconductor parameter analyzer is not biased, it can be considered as an ammeter. The device can generate remarkable optical response in the wavelength range between near ultraviolet light and near infrared light, the wavelength of the optical stimulation signal adopted in the embodiment is 532nm, and the optical power is 10 muW/cm 2 The pulse width is 200ms, and the interval time between two adjacent optical pulse signals is Δ t.
Under the 0V working condition, the shorter the interval time of two adjacent optical pulse signals is, the more the photocurrent induced by the second pulse signal is reduced than that induced by the first pulse signal. At the 20ms interval, the current of the second pulse is 95% of the first pulse, which can drop significantly. Under positive bias, the wavelength of the used optical laser signal is 532nm, and the optical power is 10 muW/cm 2 The pulse width is 200ms, and due to the regulation and control of the voltage on the contact potential barrier, the response intensity change of the device to the adjacent two light stimulation signals shows an opposite trend, and as the interval time is shortened, the photocurrent formed by the second light stimulation signal is obviously larger than that formed by the first light stimulation signal. Under the working voltage of-0.8V, the wavelength of the used optical laser signal is 532nm, and the optical power is 10 muW/cm 2 The pulse width is 1000ms, and the photocurrent generated by the second light stimulation increases first and then decreases as the interval time increases. The simultaneous implementation of PPF and PPD on one device isThe weight training of the constructed neural network provides a basis.
As shown in fig. 5, the multifunctional silicon-based optoelectronic neurosynaptic device exhibits different SDDP properties at different operating voltages. The specific method is that the device is applied with light stimulation of different time lengths, and the generated photocurrent is measured. When the semiconductor parameter analyzer is not biased, it can be considered as an ammeter. The device is subjected to 532nm wavelength and 10 mu W/cm in a self-driven working mode 2 The photocurrent generated by different illumination time is reduced along with the extension of illumination time, the photocurrent is 80pA at 100ms, the photocurrent is reduced to 40pA at 5s, under the positive bias voltage of 1.1v, the generated photo-generated current is gradually increased along with the extension of the illumination time, the magnitude of the photo-generated current is increased from 2nA at 100ms to 4nA at 5s, and the magnitude of the photo-generated current is reduced from-0.4 nA at 100ms to-0.3 nA along with the increase of the illumination time under the negative bias voltage of 0.8. The SDDP property, an important function of the neurosynaptic, is one of the features that the neuromorphic visual receptor is distinguished from the general photodetector.
Different SDDP properties are exhibited at different operating voltages. The specific method is that the device is applied with light stimulation of different time lengths, and the generated photocurrent is measured. When the semiconductor parameter analyzer is not biased, it can be considered as an ammeter. The device is subjected to 532nm wavelength and 10 mu W/cm in a self-driven working mode 2 The photocurrent generated by different illumination time is reduced along with the extension of illumination time, the photocurrent is 80pA at 100ms, and is reduced to 40pA at 5s, while under the positive bias, the generated photo-generated current is gradually increased along with the extension of the illumination time, the photo-generated current is increased from 2nA at 100ms to 4nA at 5s, and under the negative bias, the photo-generated current is reduced from-0.4 nA at 100ms to-0.3 nA along with the increase of the illumination time. The SDDP property, an important function of the neurosynaptic, is one of the features that the neuromorphic visual receptor is distinguished from the general photodetector.
As shown in fig. 6, the multifunctional silicon-based optoelectronic neurosynaptic device exhibits different SNDP properties at different operating voltages. The specific method is that the device is subjected to 532nm wavelength and 10mw/cm in a self-driven working mode 2 ，100mWhen the pulse light stimulation signal with the pulse width of 200ms is used, the generated photogenerated current gradually decreases along with the increase of the stimulation times. The photocurrent obtained at the 100 th pulse has been reduced to nearly 0, with a correspondingly weak light. Under positive working voltage, at 532nm wavelength, 10mw/cm 2 Under the pulsed light stimulation with the pulse width of 100ms and the period of 200ms, the photocurrent generated by the device gradually increases, and by the 100 th time, the generated photocurrent is 2.3 times of that generated by the first stimulation. Under the negative working voltage, at the wavelength of 532nm, 10mw/cm 2 Under the pulsed light stimulation with 1000ms pulse width and 1100ms period, the photocurrent generated by the device is gradually reduced, and the 10 th time light stimulation is only 0.6 times of the photocurrent generated by the first pulse. The SNDP plays an important role in realizing addition operation.
As shown in fig. 7, a multifunctional silicon-based optoelectronic neurosynaptic device, the device exhibits different SRDP properties at different operating voltages. The specific method is that different frequencies are used for applying certain times of light stimulation to the device, and the ratio of the generated photocurrent to the photocurrent generated when the device is stimulated once is measured. The device is subjected to 10 times of 532nm wavelength with different frequencies and 10mw/cm in a self-driven working mode 2 In a pulsed optical stimulation signal with a pulse width of 200ms, the generated photo-generated current gradually decreases as the stimulation frequency increases. The device is subjected to 532nm wavelength with 10 times of different frequencies under positive bias, and the wavelength is 10mw/cm 2 In a pulsed light stimulation signal with a pulse width of 100ms, the generated photo-generated current gradually increases as the stimulation frequency increases. The device is under negative bias voltage and is subjected to 532nm wavelength of 10 times of different frequencies, 10mw/cm 2 In the case of a pulsed optical stimulation signal with a pulse width of 1000ms, the generated photo-generated current gradually decreases as the stimulation frequency increases. The SRDP can filter and screen signals with different frequencies, and has important application in the fields of feature extraction and image recognition.

Claims (10)

1. A multifunctional silicon-based optoelectronic neurosynaptic device, comprising:
a bottom electrode layer, said bottom electrode layer being silicon on oxide;
the photoelectric response layer is positioned on the bottom electrode layer and is a semiconductor perovskite thin film;
and the top electrode is positioned on the photoelectric response layer and is made of an inert metal material.
2. The multifunctional silicon-based photoelectric synapse device of claim 1, wherein the photoelectric response layer has a thickness of 200-300 nm.
3. The multifunctional silicon-based optoelectronic neurosynaptic device of claim 1, wherein the inert metal material is gold, platinum or palladium.
4. The method of any one of claims 1-3, comprising:
(1) ultrasonically cleaning and drying the silicon on the oxide, and spin-coating an adhesion promoter on the dried silicon on the oxide to obtain the silicon on the oxide coated with the adhesion promoter, wherein the spin-coating speed is 2000-4000 rpm;
(2) spin-coating photoresist on the oxide upper silicon coated with the adhesion agent, drying to obtain the oxide upper silicon of the spin-coating photoresist, and sequentially performing exposure, development and inductively coupled plasma etching on the oxide upper silicon surface of the spin-coating photoresist by using a mask plate to obtain the oxide upper silicon with imaging;
(3) MAPbI is added 3 And the precursor solution is spin-coated on the upper silicon surface of the oxide with the imaging function, so that a photoelectric response layer is formed on the upper silicon surface of the oxide with the imaging function, and a patterned metal film is deposited on the surface of the photoelectric response layer by utilizing a mask plate and adopting a vacuum thermal evaporation technology to obtain the multifunctional silicon-based photoelectric nerve synapse device.
5. The method for preparing the multifunctional silicon-based photoelectric nerve synapse device of claim 4, wherein in step (1), the silicon-on-baked oxide is spin-coated with the adhesion promoter, then annealed at 80-120 ℃, and then baked for 2-5 min.
6. The method for preparing the multifunctional silicon-based photoelectric nerve synapse device of claim 4, wherein in the step (2), the spin coating process comprises spin coating and spin coating;
wherein, the glue homogenizing process comprises the following steps: the rotation speed of the spin-coating stage is 300-500rpm, and the spin-coating time is 5-10 s;
the spin coating process comprises the following steps: the rotation speed of the whirl coating stage is 4000-6000 rpm, the whirl coating time is 35-50 s, the drying temperature is 80-120 ℃, and the drying time is 2-5 min.
7. The method for preparing the multifunctional silicon-based photoelectric nerve synapse device of claim 4, wherein in step (2), the type of the developing solution used in the developing process is AR-300-26, the developing solution is diluted with deionized water before developing, the volume ratio of the developing solution to the deionized water is 1:5-1:10, and the developing time is 40-60 s.
8. The method for preparing the multifunctional silicon-based photoelectric nerve synapse device of claim 4, wherein in the step (2), the inductively coupled plasma etching process comprises: the gas species is C 4 F 8 、SF 6 Or He, the gas flow rate is 10-50 sccm and 100-200 sccm, and the etching time is 30-80 s.
9. The method of claim 4, wherein in step (3), the MAPbI is added 3 The preparation method of the precursor solution comprises the following steps:
dissolving lead iodide and methyl amine iodide in dimethylformamide to form a mixed solution, wherein the dosage of the lead iodide is 400-600 mg, the dosage of the methyl amine iodide is 100-200 mg, and the volume of the dimethylformamide is 600-800 mL, and then adding dimethyl sulfoxide into the mixed solution, wherein the dimethyl sulfoxide is added into the mixed solutionThe dosage of dimethyl sulfoxide is 50-100 μ L, and the uniform MAPbI is formed by fully reacting in a magnetic stirring manner 3 And (3) precursor solution.
10. The method for preparing the multifunctional silicon-based photoelectric synapse device of claim 4, wherein the top electrode patterned electrode line width is 10-30 μm, the bottom electrode patterned electrode line width is 1-10 μm, the top electrode patterned electrode line number and the bottom electrode patterned electrode line number are both 5-10, the top electrode patterned electrode line and the bottom electrode patterned electrode line are perpendicular to each other, and 25-100 effective areas are formed by crossing each other and are 10-300 μm 2 The neuromorphic receptor neurosynaptic device of (1).
CN202210385701.6A 2022-04-13 2022-04-13 Multifunctional silicon-based photoelectric nerve synapse device and preparation method thereof Pending CN115020589A (en)

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