CN115007503B - Cell sorting method, device, equipment and storage medium - Google Patents
Cell sorting method, device, equipment and storage medium Download PDFInfo
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- CN115007503B CN115007503B CN202210851251.5A CN202210851251A CN115007503B CN 115007503 B CN115007503 B CN 115007503B CN 202210851251 A CN202210851251 A CN 202210851251A CN 115007503 B CN115007503 B CN 115007503B
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/34—Sorting according to other particular properties
- B07C5/344—Sorting according to other particular properties according to electric or electromagnetic properties
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a method, a device, equipment and a storage medium for sorting electric cores. The cell sorting method comprises the following steps: acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data; determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage; acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended; determining a first open-circuit voltage difference according to the first open-circuit voltage and the second open-circuit voltage, and determining a second open-circuit voltage difference according to the second open-circuit voltage and the third open-circuit voltage; and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open circuit voltage difference and the second open circuit voltage difference.
Description
Technical Field
The embodiment of the invention relates to a battery testing technology, in particular to a battery cell sorting method, a device, equipment and a storage medium.
Background
In the production process of the battery pack, the battery module is formed by adopting the battery cells with higher consistency so as to ensure the normal use of the battery pack, and the battery cells with consistency are screened out mainly through a battery cell sorting process at present.
The cell sorting can be classified into static sorting and dynamic sorting, wherein the static sorting is a primary sorting method in the lithium battery industry, and in the static sorting, the K value, capacity, internal resistance, open circuit voltage and the like of the cell need to be measured, and the cell is sorted according to the numerical value of the parameters. Static sorting suffers from the following drawbacks: the parameter acquisition difficulty is high, and a plurality of procedures are needed, so that the whole sorting process period is long; the characteristics of parameters in the working process of the battery cannot be reflected, and the future characteristics of the battery cells cannot be accurately summarized.
Disclosure of Invention
The invention provides a method, a device, equipment and a storage medium for sorting electric cores, which aim to simplify the process flow of sorting electric cores.
In a first aspect, an embodiment of the present invention provides a method for sorting electrical cores, including:
acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data;
determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage;
acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended;
determining a first open circuit voltage difference according to the first open circuit voltage and the second open circuit voltage, and determining a second open circuit voltage difference according to the second open circuit voltage and the third open circuit voltage;
and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference.
Optionally, the range of the first voltage inflection point is 1.8V-2.2V;
the range of the second voltage inflection point is 2.8V-3.2V;
the formation termination voltage ranges from 3.6V to 4.0V.
Optionally, the first discharging stage includes discharging the battery cell from the formation termination voltage to a set SOC value.
Optionally, the second discharging stage includes the cell standing for a first period of time under a first temperature condition.
Optionally, the third discharge phase includes the cell standing for a second period of time at a second temperature.
Optionally, performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open circuit voltage difference, and the second open circuit voltage difference includes:
and performing primary sorting according to the formation termination voltage, performing secondary sorting according to the first voltage rising rate and the second voltage rising rate, and performing tertiary sorting according to the first open-circuit voltage difference and the second open-circuit voltage difference.
Optionally, the set SOC value is 2% -7% SOC.
In a second aspect, an embodiment of the present invention further provides a cell sorting apparatus, including a cell sorting unit, where the cell sorting unit is configured to:
acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data;
determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage;
acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended;
determining a first open circuit voltage difference according to the first open circuit voltage and the second open circuit voltage, and determining a second open circuit voltage difference according to the second open circuit voltage and the third open circuit voltage;
and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference.
In a third aspect, an embodiment of the present invention further provides an electronic device, including at least one processor, and a memory communicatively connected to the at least one processor;
the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor, so that the at least one processor can execute the cell sorting method according to the embodiment of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a computer readable storage medium, where the computer readable storage medium stores computer instructions, where the computer instructions are configured to cause a processor to execute the method for sorting cells according to the embodiment of the present invention.
Compared with the prior art, the invention has the beneficial effects that: the invention provides a battery cell sorting method, in the method, formation termination voltage, first voltage rising rate and second voltage rising rate are obtained when a battery cell is formed, first open-circuit voltage difference and second open-circuit voltage difference are obtained when the battery cell is discharged, battery cell sorting is carried out according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference, the acquisition difficulty of data adopted during battery cell sorting is low, the acquisition efficiency is high, and the process flow of battery cell sorting can be reduced.
Drawings
FIG. 1 is a flow chart of a method of cell sorting in an embodiment;
fig. 2 is a schematic diagram of the electronic device structure in the embodiment.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
Fig. 1 is a flow chart of a cell sorting method in an embodiment, referring to fig. 1, the cell sorting method includes:
s101, acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data.
In this embodiment, the cell sorting method is applicable to the formed cells, that is, the cells should be formed first before sorting the cells.
In this embodiment, the formation voltage record data is the cell voltage change data recorded in the cell formation process.
In this embodiment, the voltage change rates of the cells before and after the first voltage inflection point are different, and the voltage change rates of the cells before and after the second voltage inflection point are different.
In this embodiment, the manner of determining the first voltage inflection point and the second voltage inflection point is not specifically limited, for example, for a formation voltage curve, the curve change rate in the discrete interval may be solved based on the definition of the derivative, so as to determine the voltage inflection point.
In this embodiment, the open circuit voltage of the cell is represented by the formation termination voltage at the end of the formation.
In this embodiment, the first voltage inflection point, the second voltage inflection point, and the formation termination voltage sequentially appear on the time axis, and the first voltage inflection point, the second voltage inflection point, and the formation termination voltage sequentially increase in value.
Illustratively, in one possible embodiment, the first voltage inflection point ranges from 1.8V to 2.2V, the second voltage inflection point ranges from 2.8V to 3.2V, and the formation termination voltage ranges from 3.6V to 4.0V.
S102, determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage.
Illustratively, in this embodiment, the first voltage rise rate is determined by:
in the above, K 1 At a first voltage rising rate, V 1 For the first voltage inflection point V 2 For the second voltage inflection point, t 1 Is the duration between the first voltage inflection point and the second voltage inflection point.
Illustratively, in this embodiment, the second voltage generation rate is determined by:
in the above, K 2 At a first voltage rising rate, V 2 As a point of inflection of the second voltage,V 3 to be converted into the end voltage, t 2 Is the duration between the second voltage inflection point and the formation termination voltage.
S103, acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended.
In this embodiment, the first open-circuit voltage, the second open-circuit voltage, and the third open-circuit voltage are respectively recorded open-circuit voltages of the battery cells under the designated node when the battery cells are discharged;
specifically, in this embodiment, the first open-circuit voltage is the open-circuit voltage of the cell after the end of the first discharge phase, the second open-circuit voltage is the open-circuit voltage of the cell after the end of the second discharge phase, and the third open-circuit voltage is the open-circuit voltage of the cell after the end of the third discharge phase.
In this embodiment, the target discharge voltage or the environmental parameter of the battery cell is different from each other in the first discharge phase, the second discharge phase, and the third discharge phase.
In this embodiment, the first discharge stage, the second discharge stage, and the third discharge stage may be the arrangement and combination of the battery cells from the formation termination voltage to the set SOC value, the high-temperature stationary battery cells, and the low-temperature stationary battery cells.
For example, in one possible embodiment, the first discharge phase may be set to: discharging the battery (electric core) from the formation termination voltage to a set SOC value; setting the second discharging stage as standing the battery for a first period of time under a first temperature condition; the third discharge stage is set to rest the battery at the second temperature for a second period of time.
In this embodiment, the set SOC value may be set to 2% to 7% SOC, for example, 5% SOC may be selected.
In the scheme, the first temperature condition is set to be high temperature (60-80 ℃), and the first time period is 10 hours; the second temperature condition is set to be low temperature (-40 to minus 20 ℃), and the second time period is 10 hours.
S104, determining a first open circuit voltage difference according to the first open circuit voltage and the second open circuit voltage, and determining a second open circuit voltage difference according to the second open circuit voltage and the third open circuit voltage.
In this embodiment, the first open-circuit voltage difference is determined according to the following formula:
ΔOCV 1 ＝COV 2 -OCV 1
in the above, ΔOCV 1 For a first open circuit voltage difference, OCV 1 For a first open circuit voltage, COV 2 Is the second open circuit voltage.
Illustratively, in this embodiment, the second open-circuit voltage difference is determined according to the following formula:
ΔOCV 2 ＝COV 3 -OCV 2
in the above, ΔOCV 2 For the second open circuit voltage difference, OCV 2 For a second open circuit voltage, COV 3 Is the third open circuit voltage.
S105, performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open circuit voltage difference and the second open circuit voltage difference.
In this embodiment, the cells may be sorted according to the values of the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open circuit voltage difference, and the second open circuit voltage difference.
For example, the first sorting may be performed according to the formation termination voltage, the second sorting may be performed according to the first open-circuit voltage difference, the third sorting may be performed according to the second open-circuit voltage difference, the fourth sorting may be performed according to the first voltage rising rate, and the fifth sorting may be performed according to the second voltage rising rate;
after the fifth sorting, the sorting result of the cells can be finally determined.
By way of example, in one possible embodiment, cell sorting may be performed according to the following strategy:
performing primary sorting according to the formation termination voltage, performing secondary sorting according to the first open-circuit voltage difference and the second open-circuit voltage difference, and performing tertiary sorting according to the first voltage rising rate and the second voltage rising rate;
after the third sorting, the sorting result of the battery cells can be finally determined.
In this scheme, the primary sorting is performed according to the value of the formation termination voltage, the secondary sorting is performed according to the sum of the first voltage rising rate and the second voltage rising rate, and the tertiary sorting is performed according to the sum of the first open circuit voltage difference and the second open circuit voltage difference.
In the scheme, the electric cores are sequentially sorted based on formation termination voltage, then the first voltage rising rate and the second voltage rising rate are used as the basis for reflecting the charge and discharge efficiency and the SEI film forming quality of the electric cores, the electric cores are secondarily sorted based on the first voltage rising rate and the second voltage rising rate, finally the first open circuit voltage difference and the second open circuit voltage difference are used as the basis for reflecting the chemical self-discharge and the physical self-discharge conditions of the electric cores, the electric cores are sorted for three times based on the first open circuit voltage difference and the second open circuit voltage difference, and the electric cores can be guaranteed to have good consistency in all dimensions based on the layer-by-layer sorting mode, so that the sorting effect of the electric cores is guaranteed.
The embodiment provides a cell sorting method, in which a formation termination voltage, a first voltage rising rate and a second voltage rising rate are obtained when a cell is formed, a first open-circuit voltage difference and a second open-circuit voltage difference are obtained when the cell is discharged, cell sorting is performed according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference, the difficulty in obtaining data adopted during cell sorting is low, the obtaining efficiency is high, and the process flow of cell sorting can be reduced.
Table 1 is a table of cell data in examples, the data in table 1 being obtained by cells satisfying the following conditions:
when the battery cell is discharged, setting the first discharging stage to discharge the battery (battery cell) from the formation termination voltage to 5% SOC;
setting the second discharging stage to stand the battery at a high temperature for 10 hours; the third discharge stage was set to allow the battery to stand at low temperature for 10 hours.
TABLE 1
Illustratively, when the cells are sorted according to the data in table 1, the cells are sorted once according to the value of the formation termination voltage, sorted twice according to the sum of the first voltage rising rate and the second voltage rising rate, and sorted three times according to the sum of the first open circuit voltage difference and the second open circuit voltage difference.
Specifically, referring to table 1, based on the formation termination voltage, the cells are divided into two steps, namely, the cell with the formation termination voltage smaller than 3.204 is marked as M1, and the remaining cells are marked as M2;
for the battery cell M1, dividing the battery cell M1 into two gears according to the sum of the first voltage rising rate and the second voltage rising rate, namely marking the battery cells with the sum less than 0.562 as N1, and marking the rest battery cells as N2;
for the battery cell M2, dividing the battery cell M2 into two gears according to the sum of the first voltage rising rate and the second voltage rising rate, namely, marking the battery cell with the sum less than 0.561 as N3, and marking the rest battery cells as N4;
aiming at the battery cell N1, dividing the battery cell N1 into two steps according to the sum of the first open-circuit voltage difference and the second open-circuit voltage difference, namely marking the battery cell with the sum being larger than 4.621 as P1, and marking the rest battery cells as P2;
aiming at the battery cell N2, dividing the battery cell N2 into two steps according to the sum of the first open-circuit voltage difference and the second open-circuit voltage difference, namely marking the battery cell with the sum being larger than 4.495 as P3, and marking the rest battery cells as P4;
aiming at the battery cell N3, the battery cell N3 is divided into two steps according to the sum of the first open-circuit voltage difference and the second open-circuit voltage difference, namely, the battery cell with the sum being larger than 4.532 is marked as P5, and the other battery cells are marked as P6;
for the cell N4, the cell N4 is divided into two steps according to the sum of the first open circuit voltage difference and the second open circuit voltage difference, namely, the cell with the sum smaller than 4.755 is marked as P7, and the other cells are marked as P8.
For example, after sorting, the battery cells are finally divided into 8 gears, namely P1-P8, and the battery cells with the same gears can be regarded as having the same charge and discharge performance, namely high consistency.
For example, in one embodiment, the acquired data may also be pre-processed (including formation to termination voltage, first voltage rise rate, second voltage rise rate, first open circuit voltage, second open circuit voltage, third open circuit voltage) prior to sorting the cells, and one or more sets of data containing anomalous data (e.g., significantly oversized or undersized scatter data) may be removed, followed by subsequent cell sorting operations.
Example two
The embodiment provides a battery cell sorting device, including battery cell sorting unit, battery cell sorting unit is used for:
acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data;
determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage;
acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended;
determining a first open-circuit voltage difference according to the first open-circuit voltage and the second open-circuit voltage, and determining a second open-circuit voltage difference according to the second open-circuit voltage and the third open-circuit voltage;
and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open circuit voltage difference and the second open circuit voltage difference.
In this embodiment, the cell sorting unit may be specifically configured to implement any one of the cell sorting methods described in the first embodiment, and the implementation process and the beneficial effects thereof are the same as those of the corresponding content described in the first embodiment, which are not described herein.
Example III
Fig. 2 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 2, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the cell sorting method.
In some embodiments, the cell sorting method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the cell sorting method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the cell sorting method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (10)
1. A method of sorting cells comprising:
acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data;
determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage;
acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended;
determining a first open circuit voltage difference according to the first open circuit voltage and the second open circuit voltage, and determining a second open circuit voltage difference according to the second open circuit voltage and the third open circuit voltage;
and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference.
2. The cell sorting method of claim 1, wherein the first voltage inflection point ranges from 1.8V to 2.2V;
the range of the second voltage inflection point is 2.8V-3.2V;
the formation termination voltage ranges from 3.6V to 4.0V.
3. The method of claim 1, wherein the first discharge phase comprises discharging the cells from the formation termination voltage to a set SOC value.
4. The cell sorting method of claim 1, wherein the second discharge phase comprises the cell resting at a first temperature for a first period of time.
5. The cell sorting method of claim 1, wherein the third discharge stage comprises the cells resting at a second temperature for a second period of time.
6. The method of claim 1, wherein performing cell sorting based on the formation termination voltage, the first voltage rise rate, the second voltage rise rate, the first open circuit voltage difference, and the second open circuit voltage difference comprises:
and performing primary sorting according to the formation termination voltage, performing secondary sorting according to the first voltage rising rate and the second voltage rising rate, and performing tertiary sorting according to the first open-circuit voltage difference and the second open-circuit voltage difference.
7. The method of claim 3, wherein the set SOC value is 2% to 7% SOC.
8. The battery cell sorting device is characterized by comprising a battery cell sorting unit, wherein the battery cell sorting unit is used for:
acquiring formation voltage record data, and determining a first voltage inflection point, a second voltage inflection point and formation termination voltage in the formation voltage record data;
determining a first voltage rising rate between the first voltage inflection point and the second voltage inflection point, and determining a second voltage rising rate between the second voltage inflection point and the formation termination voltage;
acquiring a first open-circuit voltage after the first discharge phase is ended, acquiring a second open-circuit voltage after the second discharge phase is ended, and acquiring a third open-circuit voltage after the third discharge phase is ended;
determining a first open circuit voltage difference according to the first open circuit voltage and the second open circuit voltage, and determining a second open circuit voltage difference according to the second open circuit voltage and the third open circuit voltage;
and performing cell sorting according to the formation termination voltage, the first voltage rising rate, the second voltage rising rate, the first open-circuit voltage difference and the second open-circuit voltage difference.
9. An electronic device comprising at least one processor, and a memory communicatively coupled to the at least one processor;
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the cell sorting method of any one of claims 1-7.
10. A computer readable storage medium, characterized in that the computer readable storage medium stores computer instructions for causing a processor to implement the cell sorting method of any one of claims 1-7 when executed.
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