CN114979293A - Box for semi protocol conversion - Google Patents
Box for semi protocol conversion Download PDFInfo
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- CN114979293A CN114979293A CN202210433133.2A CN202210433133A CN114979293A CN 114979293 A CN114979293 A CN 114979293A CN 202210433133 A CN202210433133 A CN 202210433133A CN 114979293 A CN114979293 A CN 114979293A
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- interface
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- module
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 47
- 238000012545 processing Methods 0.000 claims abstract description 27
- 230000005540 biological transmission Effects 0.000 claims description 5
- 238000004806 packaging method and process Methods 0.000 claims description 5
- 238000004891 communication Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
Abstract
The invention discloses a box for semi protocol conversion, which comprises a processor module, an interface data processing module, a protocol conversion module, a memory module and a programmable logic device, wherein the input end of the processor module is electrically connected with an input interface, the output end of the processor module is electrically connected with the interface data processing module, the interface data processing module is electrically connected with the protocol conversion module, the memory module is used for storing a system program, the programmable logic device is used for autonomous programming, and the box for semi protocol conversion realizes the connection and use of new and old equipment through the equipment, provides great convenience for customers, and adopts an ARM chip as a core processor, so that the operation capacity is larger, and the expansion performance is better.
Description
Technical Field
The invention belongs to the technical field of teaching aids for moral and social courses, and particularly relates to a box for semi protocol conversion.
Background
The SEMI automation protocol standard is uniformly established by SEMI (international association for semiconductor industry), and is a technical protocol set that is continuously developed between suppliers and customers in the industry.
In the semiconductor wafer manufacturing process, the EAP system uses SEMI protocol to communicate with the equipment, but SEMI protocol is an old protocol, and new equipment is difficult to communicate with equipment using SEMI protocol, so a box for SEMI protocol conversion is designed.
Disclosure of Invention
It is an object of the present invention to provide a box for semi protocol conversion to solve the problems set forth in the background art described above.
In order to achieve the purpose, the invention provides the following technical scheme: a cartridge for semi protocol conversion, comprising:
the processor module is used for establishing data connection between the input interface and the output interface, realizing the receiving and sending of the data of the output interface through the read-write control of the input interface control chip and electrically connecting the input interface;
an interface data processing module for level conversion and data format processing of the input interface, electrically connected with the processor module,
and the protocol conversion module is used for converting the input interface stream and the output interface stream, one end of the protocol conversion module is electrically connected with the interface data processing module, and the other end of the protocol conversion module is electrically connected with the output interface.
Preferably, the processor module is an AMD7 based microprocessor.
Preferably, the power supply module comprises an external input power supply and a stabilized voltage power supply, wherein the external input power supply is a power converter converting 220vac into 9-12vdc, the stabilized voltage power supply is used for supplying power to internal components, and the input voltage of 9-12vdc is converted into +5V voltage through a three-terminal regulator.
Preferably, the processor module comprises a data sending processing module and a data receiving processing module, and the data sending processing module is used for receiving signals in a time slot in the pcm and sending the signals from the data port according to a specified rate; and the data receiving and processing module is used for converting the received data and writing the converted data into a specified pcm under the control of a timing signal.
Preferably, the system further comprises a memory module for storing the system program.
Preferably, the protocol conversion module includes a microcontroller and a network card interface chip, wherein the microcontroller controls the network card interface chip to perform network communication.
Preferably, the interface data processing module includes a microcontroller and a level conversion chip, wherein the microcontroller controls the transceiving of interface data, receives and receives interface source data, writes in the interface source data after packaging, and performs packing transmission, and the level conversion chip is used for level conversion.
Preferably, a programmable logic device is also included for autonomous programming.
Preferably, the output interface adopts an RS232 interface of 5V-powered multi-protocol interface chips LTC1344, LTC1543 and LTC1544, and the adopted interface connector includes DB 25.
Preferably, the input interface adopts an E1 interface of an MT9075BP chip, and the adopted interface connector comprises RJ 45.
The invention has the technical effects and advantages that: this a box for semi protocol conversion realizes the connection of new and old equipment through this equipment and uses, provides great facility for the customer, and adopts the ARM chip as core processor, and the computing power is bigger, and the extended capability is better.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
FIG. 2 is a schematic diagram of data transmission according to the present invention;
fig. 3 is a diagram illustrating data reception according to the present invention.
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The present invention provides a box for semi protocol conversion as shown in fig. 1, comprising: the processor module comprises an input end and an input interface which are electrically connected, an output end of the processor module is electrically connected with the interface data processing module, the interface data processing module is electrically connected with the protocol conversion module, the processor module further comprises a memory module and a programmable logic device, the memory module is used for storing a system program, and the programmable logic device is used for self-programming, saves a chip manufacturer to manufacture a special integrated circuit chip and is very practical.
The processor module is an AMD 7-based microprocessor and is used for establishing data connection between an input interface and an output interface and realizing the receiving and sending of data of the output interface by the read-write control of an input interface control chip, the output interface adopts RS232 interfaces of multi-protocol interface chips LTC1344, LTC1543 and LTC1544 powered by 5V, and the adopted interface connector comprises DB 25; the input interface adopts an E1 interface of an MT9075BP chip, and the adopted interface connector comprises RJ 45.
The interface data processing module comprises a microcontroller and a level conversion chip, wherein the microcontroller controls the transceiving of interface data, receives and receives interface source data, writes in the interface source data after packaging for packaging and transmission, the level conversion chip is used for level conversion and data format processing of an input interface,
the protocol conversion module comprises a microcontroller and a network card interface chip, wherein the microcontroller controls the network card interface chip to carry out network communication and is used for converting input interface stream and output interface stream.
The power supply module comprises an external input power supply and a stabilized voltage power supply, the external input power supply is a power supply converter for converting 220vac into 9-12vdc, the stabilized voltage power supply is used for supplying power to internal components, and the input voltage of 9-12vdc is converted into +5V voltage through a three-terminal regulator.
As shown in fig. 2 and 3, the processor module includes a data sending processing module and a data receiving processing module, and the data sending processing module is configured to receive a signal in a time slot in the pcm and send the signal from the data port at a specified rate; and the data receiving and processing module is used for converting the received data and writing the converted data into a specified pcm under the control of a timing signal.
Data transmission: under the control of a timing signal, performing serial-parallel conversion and data latch on a signal in a specified PCM time slot, and then writing the signal into a buffer; the method comprises the steps that 2M signals are used as sampling clocks, serial data of a specified PCM time slot are converted into parallel data, data are latched, and the latched data are written into a buffer under the control of a write data enable signal; and reading the data in the buffer, latching the data at the rate required by the user, performing parallel-serial conversion, and sending the data to a data port.
Data reception: under the control of timing signal, the data is serial-to-parallel converted, data latched and buffered, the data interface receiving clock is used as sampling clock, serial data from user data port is converted into parallel data for data latching, the latched data is written into buffer under the control of write data enable signal, the data in buffer is read out, and the data is latched, parallel-to-serial converted and inserted into the appointed PCM time slot.
This a box for SEMI protocol conversion is in the in-process that uses, directly links to each other current wafer manufacturing equipment based on SEMI protocol with input interface, converts interfaces such as current commonly used RJ45 into through inside protocol conversion module, realizes the connection of new and old equipment and uses, provides great convenience for the customer, and adopts the ARM chip as core processor, and the computing power is bigger, and the extended capability is better.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A cartridge for semi protocol conversion, comprising:
the processor module is used for establishing data connection between the input interface and the output interface, realizing the receiving and sending of the data of the output interface through the read-write control of the input interface control chip and electrically connecting the input interface;
an interface data processing module for level conversion and data format processing of the input interface, electrically connected with the processor module,
and the protocol conversion module is used for converting the input interface stream and the output interface stream, one end of the protocol conversion module is electrically connected with the interface data processing module, and the other end of the protocol conversion module is electrically connected with the output interface.
2. A box for semi protocol conversion according to claim 1, characterized in that: the processor module is an AMD7 based microprocessor.
3. A box for semi protocol conversion according to claim 1, characterized in that: the power supply module comprises an external input power supply and a stabilized voltage power supply, the external input power supply is a power supply converter for converting 220vac into 9-12vdc, the stabilized voltage power supply is used for supplying power to internal components, and the input voltage of 9-12vdc is converted into +5V voltage through a three-terminal regulator.
4. A box for semi protocol conversion, according to claim 1, wherein: the processor module comprises a data sending processing module and a data receiving processing module, wherein the data sending processing module is used for receiving signals in a time slot in the pcm and sending the signals out from the data port according to a specified rate; the data receiving and processing module is used for converting the received data and writing the data into a designated pcm under the control of a timing signal.
5. A box for semi protocol conversion, according to claim 1, wherein: a memory module is also included for storing the system program.
6. A box for semi protocol conversion according to claim 1, characterized in that: the protocol conversion module comprises a microcontroller and a network card interface chip, wherein the microcontroller controls the network card interface chip to carry out network communication.
7. A box for semi protocol conversion according to claim 1, characterized in that: the interface data processing module comprises a microcontroller and a level conversion chip, wherein the microcontroller controls the transceiving of interface data, receives and receives interface source data, writes in the interface source data after packaging and performs packaging transmission, and the level conversion chip is used for level conversion.
8. A box for semi protocol conversion according to claim 1, characterized in that: a programmable logic device is also included for autonomous programming.
9. A box for semi protocol conversion according to claim 1, characterized in that: the output interface adopts RS232 interfaces of multi-protocol interface chips LTC1344, LTC1543 and LTC1544 powered by 5V, and the adopted interface connector comprises DB 25.
10. A box for semi protocol conversion, according to claim 1, wherein: the input interface adopts an E1 interface of an MT9075BP chip, and the adopted interface connector comprises RJ 45.
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CN202210433133.2A CN114979293A (en) | 2022-04-24 | 2022-04-24 | Box for semi protocol conversion |
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CN202210433133.2A CN114979293A (en) | 2022-04-24 | 2022-04-24 | Box for semi protocol conversion |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002003612A2 (en) * | 2000-06-30 | 2002-01-10 | Mariner Networks, Inc. | Technique for assigning schedule resources to multiple ports in correct proportions |
CN202035013U (en) * | 2011-05-19 | 2011-11-09 | 厦门福信光电集成有限公司 | Multiple E1-Ethernet protocol converter based on GFP |
CN102647434A (en) * | 2012-05-23 | 2012-08-22 | 黑龙江大学 | Embedded IFSF (International Forecourt Standards Forum) protocol conversion module |
WO2015109744A1 (en) * | 2014-01-22 | 2015-07-30 | 京东方科技集团股份有限公司 | Interface conversion circuit, display panel drive method and display device |
WO2018188070A1 (en) * | 2017-04-14 | 2018-10-18 | 深圳配天智能技术研究院有限公司 | Conversion apparatus and control system |
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2022
- 2022-04-24 CN CN202210433133.2A patent/CN114979293A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002003612A2 (en) * | 2000-06-30 | 2002-01-10 | Mariner Networks, Inc. | Technique for assigning schedule resources to multiple ports in correct proportions |
CN202035013U (en) * | 2011-05-19 | 2011-11-09 | 厦门福信光电集成有限公司 | Multiple E1-Ethernet protocol converter based on GFP |
CN102647434A (en) * | 2012-05-23 | 2012-08-22 | 黑龙江大学 | Embedded IFSF (International Forecourt Standards Forum) protocol conversion module |
WO2015109744A1 (en) * | 2014-01-22 | 2015-07-30 | 京东方科技集团股份有限公司 | Interface conversion circuit, display panel drive method and display device |
WO2018188070A1 (en) * | 2017-04-14 | 2018-10-18 | 深圳配天智能技术研究院有限公司 | Conversion apparatus and control system |
Non-Patent Citations (1)
Title |
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詹平红, 魏宗寿: "基于G.703建议的E1数字接口转换研究", 《现代电子技术》 * |
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