CN114968148A - Multi-screen display system and control method thereof - Google Patents

Abstract

The application relates to a multi-screen display system and a control method thereof. The processor outputs a data enable signal, image data, and a valid data time. The image data includes vertical image data and horizontal image data. The valid data time includes 1 st to nth vertical valid data times and 1 st to nth horizontal valid data times corresponding to the data enable signal. The n display devices respectively receive a data enable signal, image data, and a valid data time from the processor. The 1 st display device captures image data according to the 1 st vertical valid data time and the 1 st horizontal valid data time. The nth display device captures image data according to the nth vertical effective data time and the nth horizontal effective data time.

Description

Multi-screen display system and control method thereof

Technical Field

The present disclosure relates to display systems, and particularly to a multi-screen display system and a control method thereof.

Background

With the rapid development of science and technology, there are more and more devices with multiple display interfaces, such as a foldable mobile phone with a dual screen, a stereoscopic display device with multiple display surfaces, and the like, which are produced in the spring of rain. That is, the single-screen product cannot meet the use requirement of the consumer, and therefore, the product with multi-screen display function is a development trend in the future.

Generally, each screen for displaying picturesIt is necessary to match a set of microprocessors and send a set of timing control signals through the microprocessors to control the screen image. Please refer to fig. 1 and fig. 2, which are a schematic diagram and another schematic diagram of a control method in the prior art. As shown, when there are two display devices, the two display devices receive image data sent from different microprocessors respectively. In this case, the two display devices capture image data according to different valid data times. For example, the first display device receives the vertical synchronization signal VS1 from the first microprocessor according to the 1 st vertical valid data time t _VD1 Vertical image data VD _ MCU1(TX) is captured. On the other hand, the second display device receives the vertical synchronization signal VS2 from the second microprocessor and according to the 2 nd vertical valid data time t _VD2 Vertical image data VD _ MCU2(TX) is captured. Similar to the capturing of the vertical image data, the first display device receives the horizontal synchronization signal HS1 from the first processor and determines the 1 st horizontal valid data time t _HD1 Capturing horizontal image data HD _ MCU1(TX), and the second display device receiving horizontal synchronization signal HS2 from the second processor according to the 2 nd horizontal valid data time t _HD2 Horizontal image data HD _ MCU2(TX) is captured. That is, each display device requires a corresponding microprocessor to provide signals to capture image data.

However, the simultaneous installation of multiple microprocessors in a product not only increases the cost, but also wastes space, making the product difficult to be slim and compact. Therefore, how to reduce the number of microprocessors in a product with multi-screen display function becomes an issue to be solved for the product with multi-screen display function.

Disclosure of Invention

The embodiment of the application provides a multi-screen display system and a control method thereof, and solves the problem of the number of microprocessors in a product with a multi-screen display function at present.

In order to solve the technical problem, the present application is implemented as follows:

in a first aspect, a multi-screen display system is provided, which includes a processor and n display devices, wherein n is a positive integer greater than or equal to 2. The processor outputs a data enable signal, image data, and a valid data time. The image data includes vertical image data and horizontal image data. The valid data time includes 1 st to nth vertical valid data times and 1 st to nth horizontal valid data times corresponding to the data enable signal. The n display devices respectively receive a data enable signal, image data, and a valid data time from the processor. The 1 st display device of the n display devices captures vertical image data according to the 1 st vertical effective data time, and captures horizontal image data according to the 1 st horizontal effective data time. The nth display device of the n display devices captures vertical image data according to the nth vertical effective data time and captures horizontal image data according to the nth horizontal effective data time.

In a second aspect, a control method for a multi-screen display system is provided, where n is a positive integer greater than or equal to 2, and the multi-screen display system includes: outputting, by a processor, a data enable signal, image data, and a valid data time, wherein the image data includes vertical image data and horizontal image data, and the valid data time includes a 1 st vertical valid data time to an nth vertical valid data time, and a 1 st horizontal valid data time to an nth horizontal valid data time corresponding to the data enable signal; the 1 st display device of the n display devices receives the data enable signal, the image data and the valid data time from the processor; the 1 st display device captures vertical image data according to the 1 st vertical effective data time; the 1 st display device captures horizontal image data according to the 1 st horizontal effective data time; the nth display device of the n display devices receives the data enable signal, the image data and the valid data time from the processor; the nth display device captures vertical image data according to the nth vertical effective data time; and the nth display device captures the horizontal image data according to the nth horizontal effective data time.

In the embodiment of the application, the multi-screen display system and the control method thereof send the effective data time including the 1 st vertical effective data time to the nth vertical effective data time and the 1 st horizontal effective data time to the nth horizontal effective data time through the processor, so that each of the n display devices respectively captures the corresponding vertical image data and horizontal image data through the effective data time corresponding to the data enable signal, thereby realizing the technical efficacy of controlling the plurality of display devices by one processor.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

FIG. 1 is a schematic diagram of a prior art control scheme;

FIG. 2 is another schematic diagram of a prior art control scheme;

FIG. 3 is a block diagram of a multi-screen display system according to a first embodiment of the present application;

FIG. 4 is a schematic view of image data of a first embodiment of the present application;

FIG. 5 is a schematic diagram of the segmentation of image data according to the first embodiment of the present application;

FIG. 6 is a schematic control scheme of the first embodiment of the present application;

FIG. 7 is a schematic illustration of image data of a second embodiment of the present application;

FIG. 8 is a schematic illustration of the segmentation of image data according to a second embodiment of the present application;

FIG. 9 is a schematic control scheme of the second embodiment of the present application;

FIG. 10 is a block diagram of a multi-screen display system according to a third embodiment of the present application;

FIG. 11 is a schematic diagram of image data of a third embodiment of the present application;

FIG. 12 is a schematic diagram of the segmentation of image data according to the third embodiment of the present application; and

fig. 13 is a schematic diagram of a control method of the third embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present application and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

It should be noted that in this application. The order of steps is not fixed or essential, and some steps may be performed concurrently, omitted, or augmented, so as to describe the features of the steps in the present application in a broader and easier manner, and not to limit the order and number of steps in the present application.

The application provides a multi-screen display system, which comprises a processor and n display devices, wherein n is a positive integer larger than or equal to 2. The processor outputs a data enable signal, image data, and a valid data time. The image data includes vertical image data and horizontal image data. The valid data time includes 1 st to nth vertical valid data times and 1 st to nth horizontal valid data times corresponding to the data enable signal. The n display devices respectively receive a data enable signal, image data, and a valid data time from the processor. The 1 st display device of the n display devices captures vertical image data according to the 1 st vertical effective data time and captures horizontal image data according to the 1 st horizontal effective data time. The nth display device of the n display devices captures vertical image data according to the nth vertical effective data time and captures horizontal image data according to the nth horizontal effective data time.

As mentioned above, the n display devices share the same processor, and capture the corresponding portions of the image data according to the valid data time sent from the processor. Therefore, the effect of controlling a plurality of display devices by one processor can be realized. For the details of capturing image data, reference may be made to the following two ways, and the first embodiment to the third embodiment are also provided as references in the present application to make the technical features of the present application more obvious.

In a first manner, the valid data time further includes the 1 st vertical valid data time interval to the nth vertical valid data time interval. The 1 st display device includes a 1 st driving circuit, and the nth display device includes an nth driving circuit. The 1 st driving circuit controls the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval. The nth driving circuit controls the nth display device to access the vertical image data according to the nth vertical effective data time interval. Further, in order to avoid capturing the repeated or partially repeated vertical image data on different displays, the nth vertical valid data time interval may be greater than or equal to the sum of the 1 st vertical valid data time interval and the 1 st to (n-1) th vertical valid data times.

In this case, the valid data time may further include 1 st to nth horizontally valid data time intervals, and the 1 st to nth horizontally valid data time intervals are equal to each other. The 1 st driving circuit controls the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval. The nth driving circuit controls the nth display device to access the horizontal image data according to the nth horizontal effective data time interval. Further, the 1 st horizontal effective data time to the nth horizontal effective data time are equal to each other. In other words, the 1 st display and the nth display capture the same horizontal valid data.

More specifically, the control method of the first mode may be implemented using the following steps.

Step 100: the data enable signal, the image data, and the valid data time are output by the processor. The image data includes vertical image data and horizontal image data. The valid data time includes 1 st to nth vertical valid data time intervals, 1 st to nth horizontal valid data time intervals, and 1 st to nth horizontal valid data time intervals corresponding to the data enable signal. Wherein the 1 st through nth horizontal active data time intervals are equal to each other, and the 1 st through nth horizontal active data times are equal to each other.

Step 102: the 1 st display device of the n display devices receives the data enable signal, the image data, and the valid data time from the processor.

Step 104: the 1 st display device is controlled by the 1 st driving circuit to start accessing the vertical image data according to the 1 st vertical effective data time interval.

Step 106: the 1 st display device captures vertical image data according to the 1 st vertical effective data time.

Step 108: and controlling the 1 st display device to access the horizontal image data through the 1 st driving circuit according to the 1 st horizontal effective data time interval.

Step 110: the 1 st display device captures horizontal image data according to the 1 st horizontal effective data time.

Step 112: the nth display device of the n display devices receives the data enable signal, the image data, and the valid data time from the processor.

Step 114: and controlling the nth display device to start accessing the vertical image data through the nth driving circuit according to the nth vertical effective data time interval.

Step 116: the nth display device captures vertical image data according to the nth vertical effective data time.

Step 118: and controlling the nth display device to access the horizontal image data through the nth driving circuit according to the nth horizontal effective data time interval.

Step 120: the nth display device captures horizontal image data according to the nth horizontal effective data time.

In a second manner, the valid data time further includes a 1 st horizontal valid data time interval to an nth horizontal valid data time interval. The 1 st display device includes a 1 st driving circuit, and the nth display device includes an nth driving circuit. The 1 st driving circuit controls the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval. The nth driving circuit controls the nth display device to access the horizontal image data according to the nth horizontal effective data time interval. Further, to avoid capturing repeated or partially repeated horizontal image data on different displays, the nth horizontal valid data time interval may be greater than or equal to the sum of the 1 st horizontal valid data time interval and the 1 st horizontal valid data time to the (n-1) th horizontal valid data time.

In this case, the valid data time may further include 1 st to nth vertical valid data time intervals, and the 1 st to nth vertical valid data time intervals are equal to each other. The 1 st driving circuit controls the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval. The nth driving circuit controls the nth display device to access the vertical image data according to the nth vertical effective data time interval. Further, the 1 st to nth vertical effective data times are equal to each other. In other words, the 1 st display and the nth display capture the same vertical valid data.

More specifically, the control method of the first mode may be implemented using the following steps.

Step 200: the data enable signal, the image data, and the valid data time are output by the processor. The image data includes horizontal image data and vertical image data. The valid data time includes a 1 st horizontal valid data time interval to an nth horizontal valid data time interval, a 1 st horizontal valid data time to an nth horizontal valid data time, a 1 st vertical data time interval to an nth vertical valid data time interval, and a 1 st vertical valid data time to an nth vertical valid data time corresponding to the data enable signal. Wherein the 1 st to nth vertical valid data time intervals are equal to each other, and the 1 st to nth vertical valid data times are equal to each other.

Step 202: the 1 st display device of the n display devices receives the data enable signal, the image data, and the valid data time from the processor.

Step 204: the 1 st display device is controlled by the 1 st driving circuit to start accessing the horizontal image data according to the 1 st horizontal effective data time interval.

Step 206: the 1 st display device captures horizontal image data according to the 1 st horizontal effective data time.

Step 208: and controlling the 1 st display device to access the vertical image data according to the 1 st vertical data time interval through the 1 st driving circuit.

Step 210: the 1 st display device captures vertical image data according to the 1 st vertical effective data time.

Step 212: the nth display device of the n display devices receives the data enable signal, the image data, and the valid data time from the processor.

Step 214: and controlling the nth display device to start accessing the horizontal image data through the nth driving circuit according to the nth horizontal effective data time interval.

Step 216: the nth display device captures horizontal image data according to the nth horizontal effective data time.

Step 218: and controlling the nth display device to access the vertical image data through the nth driving circuit according to the nth vertical data time interval.

Step 220: the nth display device captures vertical image data according to the nth vertical effective data time.

In view of the above, the following describes the first to third embodiments, which respectively achieve the effect of controlling multiple display devices by a single processor through the above two methods.

Please refer to fig. 3 to 6, which are a block diagram, an image data segmentation diagram, and a control method diagram of a multi-screen display system according to a first embodiment of the present disclosure. As shown, the multi-screen display system 1 includes a processor 10, a 1 st display device 11, and a 2 nd display device 12. In other words, in the present embodiment, the number of displays is 2, that is, n is 2. The processor 10 outputs a data start signal DE, image data D and a valid data time t.

In the present embodiment, the data size of the image data D output by the processor 10 is M × N. Specifically, the image data D is composed of horizontal image data HD _ mcu (tx) and vertical image data VD _ mcu (tx) corresponding to the data start signal DE. The size of the horizontal image data HD _ mcu (tx) is M, and the size of the vertical image data VD _ mcu (tx) is N. In order for the 1 st display device 11 and the 2 nd display device 12 to display different screens, the image data D is further divided into image data of size M x N1 and image data of size M x N2, where the image data of size M x N1 corresponds to the 1 st display device 11 and the image data of size M x N2 corresponds to the 2 nd display device 12. That is, among the image data D, the horizontal image data HD _ LCD1(RX) of the 1 st display device 11 and the horizontal image data HD _ LCD2(RX) of the 2 nd display device 12 are the same in size (both M), but the vertical image data VD _ LCD1(RX) of the 1 st display device 11 and the vertical image data VD _ LCD2(RX) of the 2 nd display device 12 are different in size (N1, N2, respectively), so that the 1 st display device 11 and the 2 nd display device 12 display different screens with different image data. The valid data time t comprises a 1 st vertical valid data time interval t _VD1 _ _delay 2 nd vertical valid data time interval t _{VD2_delay} 1 st vertical effective data time t _VD1 2 nd vertical effective data time t _VD2 1 st horizontal valid data time interval t _{HD1_delay} 2 nd horizontal valid data time interval t _{HD2_delay} 1 st horizontal valid data time t _HD1 And a 2 nd horizontal valid data time t _HD2 。

In addition, in fig. 6, for easy understanding, the data enable signal DE may be divided into a data enable signal DE _ mcu (tx) issued by the processor 10, a data enable signal DE _ LCD1(RX) corresponding to the 1 st display device 11, and a data enable signal DE _ LCD2(RX) corresponding to the 2 nd display device 12. Among them, the 1 st display device 11 displays an image by a high level of the data enable signal DE _ LCD1(RX), and the 2 nd display device 12 displays an image by a high level of the data enable signal DE _ LCD2 (RX).

The 1 st display device 11 includes the 1 st driving circuit 111, and the 1 st display device 11 receives the data enable signal DE, the image data D, and the valid data time t from the processor 10. The 1 st driving circuit 111 according to the 1 st vertical valid data time t _VD1 Capturing vertical image data VD _ MCU (TX) in the image data D and according to the 1 st horizontal effective data time t _HD1 Horizontal image data HD _ mcu (tx) in the captured image data D. Here, since the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 and the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 are included in the vertical image data VD _ mcu (tx), the 1 st driving circuit 111 needs to be driven according to the 1 st vertical active data time t _VD1 The vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx) is captured, and the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 in the vertical image data VD _ mcu (tx) cannot be captured. On the other hand, the 1 st drive circuit 111 needs to be operated in accordance with the 1 st horizontal effective data time t _HD1 The horizontal image data HD _ LCD1(RX) corresponding to the 1 st display device 11 in the horizontal image data HD _ mcu (tx) is captured. In the present embodiment, since the horizontal image data HD _ LCD1(RX) of the 1 st display device 11 is the same size as the horizontal image data HD _ LCD2(RX) of the 2 nd display device 12, the 1 st horizontal active data time t _HD1 And a 2 nd horizontal valid data time t _HD2 Are the same. In other words, the horizontal image data HD _ mcu (tx) is equal to the horizontal image data HD _ LCD1(RX) and the horizontal image data HD _ LCD2 (RX).

More specifically, for the 1 st display device 11, a vertical synchronization signal VS (or a frame) can be divided into two intervals, which are the 1 st vertical valid data interval t _VD1 _ _delay And the 1 st lobeDirect effective data time t _VD1 . First, the 1 st driving circuit 111 follows the 1 st vertical valid data interval t _VD1 _ _delay Controls the 1 st display device 11 to start accessing the vertical image data VD _ MCU (TX), and the 1 st vertical valid data time interval t in this embodiment _VD1 _ _delay Is 0. Then, the 1 st display device 11 follows the 1 st vertical valid data time t _VD1 Capturing vertical image data VD _ MCU (TX) and obtaining the 1 st vertical effective data time t _VD1 After that, the capturing of the vertical image data VD _ mcu (tx) is stopped. In this way, the 1 st display device 11 only accesses the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx), and does not access the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 in the vertical image data VD _ mcu (tx).

On the other hand, a Horizontal synchronization signal HS (or Horizontal line) may be divided into two intervals, which are respectively the 1 st Horizontal valid data time interval t _{HD1_delay} And 1 st level valid data time t _HD1 . First, the 1 st driving circuit 111 follows the 1 st horizontal valid data interval t _{HD1_delay} Controls the 1 st display device 11 to start accessing the horizontal image data HD _ mcu (tx). Then, the 1 st display device 11 is based on the 1 st horizontal valid data time t _HD1 Capturing horizontal image data HD _ MCU (TX) and in the 1 st horizontal effective data time t _HD1 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In the present embodiment, the 1 st display device 11 accesses the complete horizontal image data HD _ mcu (tx).

The 2 nd display device 12 includes the 2 nd driving circuit 121, and the 2 nd display device 12 receives the data enable signal DE, the image data D, and the valid data time t from the processor 10. The 2 nd driving circuit 121 according to the 2 nd vertical valid data time t _VD2 Capturing the vertical image data VD _ MCU (TX) in the image data D and according to the 2 nd horizontal effective data time t _HD2 Horizontal image data HD _ mcu (tx) in the captured image data D. Since the vertical image data VD _ mcu (tx) includes both the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 and the vertical image data VD _ LCD1(RX) corresponding to the 2 nd display device 12The vertical image data VD _ LCD2(RX), therefore, the 2 nd driving circuit 121 needs to be according to the 2 nd vertical valid data time t _VD2 The vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 in the vertical image data VD _ mcu (tx) is captured, and the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx) cannot be captured. On the other hand, the 2 nd driving circuit 121 needs to have the 2 nd horizontal valid data time t _HD2 The horizontal image data HD _ LCD2(RX) corresponding to the 2 nd display device 12 in the horizontal image data HD _ mcu (tx) is captured. In the present embodiment, the horizontal image data HD _ mcu (tx) is equal to the horizontal image data HD _ LCD1(RX) and the horizontal image data HD _ LCD2 (RX).

More specifically, for the 2 nd display device 12, one vertical synchronization signal VS (or one frame) can be divided into two sections, which are respectively the 2 nd vertical valid data time interval t _VD2 Delay, and 2 nd vertical valid data time t _VD2 . First, the 2 nd driving circuit 121 follows the 2 nd vertical valid data time interval t _VD2 Delay controls the 2 nd display device 12 to start accessing the vertical image data VD _ MCU (TX), and the 2 nd vertical valid data time interval t _VD2 Delay is equal to the 1 st vertical valid data time interval t _VD1 _ _delay And 1 st vertical valid data time t _VD1 And (3) is (a). Then, the 2 nd display device 12 follows the 2 nd vertical valid data time t _VD2 Capturing vertical image data VD _ MCU (TX) and performing vertical effective data time t in the 2 nd time _VD2 And stopping capturing the vertical image data VD _ MCU (TX) after the end. In this way, the 2 nd display device 12 only accesses the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 in the vertical image data VD _ mcu (tx), but does not access the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx).

On the other hand, a horizontal synchronization signal HS (or a horizontal line) can also be divided into two intervals, which are respectively the 2 nd horizontal valid data time interval t _{HD2_delay} And a 2 nd horizontal valid data time t _HD2 . First, the 2 nd driving circuit 121 follows the 2 nd horizontal effective data time interval t _{HD2_delay} ControllingThe 2 nd display device 12 starts accessing the horizontal image data HD _ mcu (tx). Then, the 2 nd display device 12 is based on the 2 nd horizontal valid data time t _HD2 Capturing horizontal image data HD _ MCU (TX) and in the 2 nd horizontal effective data time t _HD2 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In the present embodiment, the 2 nd display device 12 accesses the complete horizontal image data HD _ mcu (tx).

Please refer to fig. 3 and fig. 7 to 9. Fig. 7 to 9 are schematic diagrams of image data, a segmentation schematic diagram of the image data, and a control manner schematic diagram of a multi-screen display system according to a second embodiment of the present application, respectively. As shown, the multi-screen display system 1 includes a processor 10, a 1 st display device 11, and a 2 nd display device 12. In the first and second embodiments, the same reference numerals denote similar or identical elements, and thus are not described again. In the present embodiment, the data size of the image data D output by the processor 10 is M × N. The image data D is further divided into image data of size M1 x N and image data of size M2 x N, where the image data of size M1 x N corresponds to the 1 st display device 11 and the image data of size M2 x N corresponds to the 2 nd display device 12. That is, among the image data D, the horizontal image data HD _ LCD1(RX) of the 1 st display device 11 and the horizontal image data HD _ LCD2(RX) of the 2 nd display device 12 are different in size (M1, M2, respectively), and the vertical image data VD _ LCD1(RX) of the 1 st display device 11 and the vertical image data VD _ LCD2(RX) of the 2 nd display device 12 are the same in size (both N), so that the 1 st display device 11 and the 2 nd display device 12 have different image data to display different pictures.

The 1 st driving circuit 111 according to the 1 st vertical valid data time interval t _{VD1_delay} The 1 st display device 11 is controlled to start accessing the vertical image data VD _ mcu (tx). Then, the 1 st display device 11 follows the 1 st vertical valid data time t _VD1 Capturing vertical image data VD _ MCU (TX) and obtaining the 1 st vertical effective data time t _VD1 And stopping capturing the vertical image data VD _ MCU (TX) after the end. In the present embodiment, the 1 st display device 11 accesses the complete vertical image data VD _ mcu (tx).

On the other hand, the 1 st driving circuit 111 depends on the 1 st horizontal effective data time interval t _{HD1_delay} Controls the 1 st display device 11 to start accessing the horizontal image data HD _ MCU (TX), and the 1 st horizontal effective data time interval t in this embodiment _{HD1_delay} Is 0. Then, the 1 st display device 11 follows the 1 st vertical valid data time t _VD1 Capturing horizontal image data HD _ MCU (TX) and in the 1 st horizontal effective data time t _HD1 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In this way, the 1 st display device 11 only accesses the horizontal image data HD _ LCD1(RX) corresponding to the 1 st display device 11 among the horizontal image data HD _ mcu (tx), and does not access the horizontal image data HD _ LCD2(RX) corresponding to the 2 nd display device 12 among the horizontal image data HD _ mcu (tx).

The 2 nd driving circuit 121 according to the 2 nd vertical valid data time interval t _{VD2_delay} Controls the 2 nd display device 12 to start accessing the vertical image data VD _ mcu (tx). Then, the 2 nd display device 12 displays the corresponding data according to the 2 nd vertical valid data time t _VD2 Capturing vertical image data VD _ MCU (TX) and performing vertical effective data time t in the 2 nd time _VD2 And stopping capturing the vertical image data VD _ MCU (TX) after the end. In the present embodiment, the 2 nd display device 12 accesses the complete vertical image data VD _ mcu (tx).

On the other hand, the 2 nd driving circuit 121 depends on the 2 nd horizontal effective data time interval t _{HD2_delay} Controls the 2 nd display device 12 to start accessing the horizontal image data HD _ MCU (TX), and the 2 nd horizontal effective data time interval t in this embodiment _{HD2_delay} For a 1 st horizontal valid data time interval t _{HD1_delay} And 1 st level valid data time t _HD1 The sum of (1). Then, the 2 nd display device 12 is based on the 2 nd horizontal valid data time t _HD2 Capturing horizontal image data HD _ MCU (TX) and in the 2 nd horizontal effective data time t _HD2 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In this way, the 2 nd display device 12 only accesses the horizontal image data HD _ LCD2(RX) corresponding to the 2 nd display device 12 from among the horizontal image data HD _ mcu (tx), and does not access the horizontal image data HD _ LCD1(RX) corresponding to the 1 st display device 11 from among the horizontal image data HD _ mcu (tx).

Please refer to fig. 10 to fig. 13. Fig. 10 to 13 are a block diagram, a schematic diagram of image data segmentation, and a schematic diagram of a control method of a multi-screen display system according to a third embodiment of the present application. As shown, the multi-screen display system 2 includes a processor 10, a 1 st display device 11, a 2 nd display device 12, and a 3 rd display device 13. In this embodiment, the number of displays is 3, i.e., n is 3. In the first embodiment and the third embodiment, the same reference numerals denote similar or identical elements, and thus, the description thereof is omitted. In the present embodiment, the data size of the image data D output by the processor 10 is M × N. The image data D is further divided into image data of size M x N1, image data of size M x N2, and image data of size M x N3, wherein the image data of size M x N1 corresponds to the 1 st display device 11, the image data of size M x N2 corresponds to the 2 nd display device 12, and the image data of size M x N3 corresponds to the 3 rd display device 13. That is, among this image data D, the sizes of the vertical image data VD _ LCD1(RX) of the 1 st display device 11, the vertical image data VD _ LCD2(RX) of the 2 nd display device 12, and the vertical image data VD _ LCD3(RX) of the 3 rd display device 13 are different from each other (N1, N2, and N3, respectively), and the sizes of the horizontal image data HD _ LCD1(RX) of the 1 st display device 11, the horizontal image data HD _ LCD2(RX) of the 2 nd display device 12, and the horizontal image data HD _ LCD1(RX) of the 3 rd display device 13 are the same (M, respectively), so that the 1 st display device 11, the 2 nd display device 12, and the 3 rd display device 13 have different image data to display different pictures.

First, the 1 st driving circuit 111 follows the 1 st vertical valid data interval t _VD1 _ _delay Controls the 1 st display device 11 to start accessing the vertical image data VD _ MCU (TX), and the 1 st vertical valid data time interval t in this embodiment _VD1 _ _delay Is 0. Then, the 1 st display device 11 follows the 1 st vertical valid data time t _VD1 Capturing vertical image data VD _ MCU (TX) and obtaining the 1 st vertical effective data time t _VD1 After that, the capturing of the vertical image data VD _ mcu (tx) is stopped. Thus, the 1 st display device 11 only accesses the tabsThe vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx) is not accessed, and the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 and the vertical image data VD _ LCD3(RX) corresponding to the 3 rd display device 13 in the vertical image data VD _ mcu (tx) are not accessed.

On the other hand, the 1 st driving circuit 111 follows the 1 st horizontal valid data time interval t _{HD1_delay} Controls the 1 st display device 11 to start accessing the horizontal image data HD _ mcu (tx). Then, the 1 st display device 11 is based on the 1 st horizontal valid data time t _HD1 Capturing horizontal image data HD _ MCU (TX) and in the 1 st horizontal effective data time t _HD1 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In the present embodiment, the 1 st display device 11 accesses the complete horizontal image data HD _ mcu (tx).

The 2 nd driving circuit 121 according to the 2 nd vertical valid data time interval t _VD2 Delay controls the 2 nd display device 12 to start accessing the vertical image data VD _ MCU (TX), and the 2 nd vertical valid data time interval t _VD2 Delay is equal to the 1 st vertical valid data time interval t _VD1 _ _delay And 1 st vertical valid data time t _VD1 And (3) is (a). Then, the 2 nd display device 12 follows the 2 nd vertical valid data time t _VD2 Capturing vertical image data VD _ MCU (TX) and performing vertical effective data time t in the 2 nd time _VD2 And stopping capturing the vertical image data VD _ MCU (TX) after the end. In this way, the 2 nd display device 12 only accesses the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12 from the vertical image data VD _ mcu (tx), and does not access the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 and the vertical image data VD _ LCD3(RX) corresponding to the 3 rd display device 13 from the vertical image data VD _ mcu (tx).

On the other hand, the 2 nd driving circuit 121 depends on the 2 nd horizontal effective data time interval t _{HD2_delay} Controls the 2 nd display device 12 to start accessing the horizontal image data HD _ mcu (tx). Then, the 2 nd display device 12 is based on the 1 st horizontal valid data time t _HD2 Capturing horizontal image data HD _ MCU (TX) and in the 2 nd horizontal effective data time t _HD2 Stopping capturing the horizontal image after finishingData HD _ mcu (tx). In the present embodiment, the 2 nd display device 12 accesses the complete horizontal image data HD _ mcu (tx).

The 3 rd driving circuit 131 according to the 3 rd vertical valid data time interval t _{VD3_delay} Controls the 3 rd display device 13 to start accessing the vertical image data VD _ MCU (TX), and controls the 3 rd vertical effective data time interval t _{VD3_delay} Equal to the 1 st vertical valid data time interval t _VD1 _ _delay 1 st vertical effective data time t _VD1 And 2 nd vertical valid data time t _VD2 The sum of (1). Then, the 3 rd display device 13 follows the 3 rd vertical valid data time t _VD3 Capturing vertical image data VD _ MCU (TX) and in the 3 rd vertical effective data time t _VD3 After that, the capturing of the vertical image data VD _ mcu (tx) is stopped. In this way, the 3 rd display device 13 only accesses the vertical image data VD _ LCD3(RX) corresponding to the 3 rd display device 13 in the vertical image data VD _ mcu (tx), but does not access the vertical image data VD _ LCD1(RX) corresponding to the 1 st display device 11 in the vertical image data VD _ mcu (tx).

On the other hand, the 3 rd driving circuit 131 according to the 3 rd horizontal valid data time interval t _{HD3_delay} The 3 rd display device 13 is controlled to start accessing the horizontal image data HD _ mcu (tx). Then, the 3 rd display device 13 is based on the 3 rd horizontal valid data time t _HD3 Capturing horizontal image data HD _ MCU (TX) and in 3 rd horizontal effective data time t _HD3 After that, the capturing of the horizontal image data HD _ mcu (tx) is stopped. In the present embodiment, the 1 st display device 11 accesses the complete horizontal image data HD _ mcu (tx) and the vertical image data VD _ LCD2(RX) corresponding to the 2 nd display device 12.

It should be noted that in the three embodiments of the present application, the display apparatus may control the display effect through the data enable signal DE, but the present application is not limited thereto. In the above three embodiments or other embodiments, the processor 10 may further output the pixel clock signal DCLK, the vertical synchronization signal VS and the horizontal synchronization signal HS to correspond to display devices with different operation modes.

In summary, the multi-screen display system and the control method thereof transmit the valid data time including the 1 st vertical valid data time to the nth vertical valid data time, the 1 st horizontal valid data time and the nth horizontal data valid time through the processor, so that each of the n display devices respectively captures the corresponding vertical image data and the corresponding horizontal image data through the valid data time corresponding to the data enable signal, thereby achieving the technical effect of controlling the plurality of display devices by one processor.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (15)

1. A multi-screen display system, comprising:

a processor outputting a data enable signal, image data and a valid data time, the image data including vertical image data and horizontal image data, the valid data time including a 1 st vertical valid data time to an nth vertical valid data time and a 1 st horizontal valid data time to an nth horizontal valid data time corresponding to the data enable signal, wherein n is a positive integer greater than or equal to 2; and

n display devices respectively receiving the data enable signal, the image data and the valid data time from the processor;

the 1 st display device in the n display devices captures the vertical image data according to the 1 st vertical effective data time, and captures the horizontal image data according to the 1 st horizontal effective data time; and the nth display device of the n display devices captures the vertical image data according to the nth vertical effective data time and captures the horizontal image data according to the nth horizontal effective data time.

2. A multi-display system as recited in claim 1, wherein:

the valid data time further includes a 1 st vertical valid data time interval through an nth vertical valid data time interval;

the 1 st display device comprises a 1 st driving circuit, and the nth display device comprises an nth driving circuit;

the 1 st driving circuit controls the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval; and

the nth driving circuit controls the nth display device to access the vertical image data according to the nth vertical effective data time interval.

3. A multi-display system as recited in claim 2, wherein:

the valid data time further includes a 1 st horizontal valid data time interval to an nth horizontal valid data time interval, and the 1 st horizontal valid data time interval to the nth horizontal valid data time interval are equal to each other;

the 1 st driving circuit controls the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval; and

the nth driving circuit controls the nth display device to access the horizontal image data according to the nth horizontal effective data time interval.

4. A multi-display system as recited in claim 1, wherein:

the valid data time further includes a 1 st horizontal valid data time interval to an nth horizontal valid data time interval;

the 1 st display device comprises a 1 st driving circuit, and the nth display device comprises an nth driving circuit;

the 1 st drive circuit controls the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval; and

the nth driving circuit controls the nth display device to access the horizontal image data according to the nth horizontal effective data time interval.

5. A multi-display system as recited in claim 4, wherein:

the valid data time further includes a 1 st vertical valid data time interval to an nth vertical valid data time interval, and the 1 st vertical valid data time interval to the nth vertical valid data time interval are equal to each other;

the 1 st driving circuit controls the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval; and

the nth driving circuit controls the nth display device to access the vertical image data according to the nth vertical effective data time interval.

6. A multi-screen display system as recited in claim 1, wherein the processor is further configured to output a vertical synchronization signal and a horizontal synchronization signal.

7. A control method of a multi-screen display system is used for the multi-screen display system comprising a processor and n display devices, wherein n is a positive integer greater than or equal to 2, and the control method of the multi-screen display system comprises the following steps:

outputting, by a processor, a data enable signal, image data, and a valid data time, wherein the image data includes vertical image data and horizontal image data, the valid data time includes a 1 st vertical valid data time to an nth vertical valid data time, and a 1 st horizontal valid data time to an nth horizontal valid data time corresponding to the data enable signal;

receiving the data enable signal, the image data, and the valid data time from the processor through a 1 st display device of the n display devices;

capturing the vertical image data through the 1 st display device according to the 1 st vertical effective data time;

capturing the horizontal image data according to the 1 st horizontal effective data time through the 1 st display device;

receiving, by an nth display device of the n display devices, the data enable signal, the image data, and the valid data time from the processor;

capturing the vertical image data through the nth display device according to the nth vertical effective data time; and

and capturing the horizontal image data through the nth display device according to the nth horizontal effective data time.

8. A control method for a multi-screen display system as recited in claim 7, wherein the valid data time further includes a 1 st vertical valid data time interval through an nth vertical valid data time interval; the 1 st display device comprises a 1 st driving circuit, the nth display device comprises an nth driving circuit, and the control method of the multi-screen display system further comprises:

controlling the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval through the 1 st driving circuit; and

controlling the nth display device to access the vertical image data according to the nth vertical effective data time interval through the nth driving circuit.

9. A control method for a multi-screen display system as recited in claim 8, wherein the nth vertical valid data time interval is greater than or equal to the 1 st vertical valid data time interval plus the 1 st to n-1 st vertical valid data times.

10. A multi-screen display system control method as recited in claim 8, wherein the valid data time further includes a 1 st through an nth horizontally valid data time interval, the 1 st through nth horizontally valid data time intervals being equal to each other, and the multi-screen display system control method further comprises:

controlling the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval through the 1 st driving circuit; and

controlling the nth display device to access the horizontal image data according to the nth horizontal effective data time interval through the nth driving circuit.

11. A control method for a multi-display system as recited in claim 10, wherein the 1 st horizontal active data time through the nth horizontal active data time are equal to each other.

12. A control method for a multi-screen display system as recited in claim 7, wherein the valid data time further includes a 1 st horizontal valid data time interval through an nth horizontal valid data time interval; the 1 st display device comprises a 1 st driving circuit, the nth display device comprises an nth driving circuit, and the control method of the multi-screen display system further comprises:

controlling the 1 st display device to access the horizontal image data according to the 1 st horizontal effective data time interval through the 1 st driving circuit; and

controlling the nth display device to access the horizontal image data according to the nth horizontal effective data time interval through the nth driving circuit.

13. A multi-display system control method as recited in claim 12, wherein the nth horizontally active data time interval is greater than or equal to the sum of the 1 st horizontally active data time interval and the 1 st horizontally active data time through the nth-1 st horizontally active data time.

14. A multi-screen display system control method as recited in claim 12, wherein the valid data time further includes a 1 st vertical valid data time interval through an nth vertical valid data time interval, the 1 st vertical valid data time interval through the nth vertical valid data time interval being equal to each other, and the multi-screen display system control method further comprises:

controlling the 1 st display device to access the vertical image data according to the 1 st vertical effective data time interval through the 1 st driving circuit; and

controlling the nth display device to access the vertical image data according to the nth vertical effective data time interval through the nth driving circuit.

15. A control method for a multi-display system as recited in claim 14, wherein the 1 st through nth vertical valid data times are equal to each other.

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