CN114924436B - Array substrate and liquid crystal display panel - Google Patents

Array substrate and liquid crystal display panel Download PDF

Info

Publication number
CN114924436B
CN114924436B CN202210541186.6A CN202210541186A CN114924436B CN 114924436 B CN114924436 B CN 114924436B CN 202210541186 A CN202210541186 A CN 202210541186A CN 114924436 B CN114924436 B CN 114924436B
Authority
CN
China
Prior art keywords
layer
inorganic
array substrate
substrate
opening area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210541186.6A
Other languages
Chinese (zh)
Other versions
CN114924436A (en
Inventor
罗成志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to CN202210541186.6A priority Critical patent/CN114924436B/en
Publication of CN114924436A publication Critical patent/CN114924436A/en
Application granted granted Critical
Publication of CN114924436B publication Critical patent/CN114924436B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00Optical elements other than lenses
    • G02B5/08Mirrors
    • G02B5/0816Multilayer mirrors, i.e. having two or more reflecting layers
    • G02B5/0825Multilayer mirrors, i.e. having two or more reflecting layers the reflecting layers comprising dielectric materials only
    • G02B5/0833Multilayer mirrors, i.e. having two or more reflecting layers the reflecting layers comprising dielectric materials only comprising inorganic materials only
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553Reflecting elements
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

The invention provides an array substrate and a liquid crystal display panel, wherein the part of the array substrate corresponding to a display area comprises an opening area in array arrangement and a non-opening area outside the opening area; the reflectivity of the part of the array substrate corresponding to the non-opening area is larger than that of the part of the array substrate corresponding to the opening area. According to the embodiment of the invention, the structures of the part of the array substrate corresponding to the opening area and the part of the array substrate corresponding to the non-opening area are designed, so that the reflectivity of the part of the array substrate corresponding to the opening area is reduced, the transmissivity of the part of the array substrate corresponding to the non-opening area is increased, and the reflectivity of the part of the array substrate corresponding to the non-opening area is increased, so that light emitted from the backlight to the non-opening area is reflected to the opening area and emitted, and the light transmissivity of the array substrate is improved, and the light efficiency of the liquid crystal display panel is further improved.

Description

Array substrate and liquid crystal display panel
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and a liquid crystal display panel.
Background
With the development of display technology, flat panel display devices such as thin film transistor liquid crystal displays (Thin Film Transistor LiquidCrystal Display, TFT-LCD) have been widely used in various consumer electronic products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, as they have advantages of high image quality, power saving, thin body, and wide application range.
In recent years, in TFT-LCD panels, development of a project for low power consumption, high brightness, and improved light utilization is being advanced. The improvement of luminous efficacy, the improvement of the brightness of the TFT-LCD and the reduction of power consumption are all difficulties in overcoming the problems of panel factories in the world. The light efficiency of a TFT-LCD panel refers to the ratio of the light intensity of the backlight source passing through the front and rear of the TFT-LCD panel. In general, the light efficiency of the TFT-LCD is only 3% -10%, that is, more than 90% of the light is unavailable. For the array substrate of the TFT-LCD, the structure of the multilayer film has a great influence on the light efficiency, and when the refractive indexes of the adjacent film layers are different, reflection occurs at the interface, so that the transmittance is reduced.
Therefore, there is a need to provide a solution to the above-mentioned problems.
Disclosure of Invention
The invention provides an array substrate and a liquid crystal display panel, which can solve the technical problems that the light transmittance of the existing array substrate is low and the light efficiency of the liquid crystal display panel is affected.
In order to solve the problems, the technical scheme provided by the invention is as follows:
the embodiment of the invention provides an array substrate, wherein the part of the array substrate corresponding to a display area comprises an opening area in array arrangement and a non-opening area outside the opening area;
the reflectivity of the part of the array substrate corresponding to the non-opening area is larger than that of the part of the array substrate corresponding to the opening area.
Optionally, in some embodiments of the present invention, the array substrate includes a substrate and an inorganic stack layer located on the substrate, and a portion of the inorganic stack layer corresponding to the non-opening area is provided with a reflection enhancing structure, where the reflection enhancing structure is used to increase the reflectivity of light.
Optionally, in some embodiments of the present invention, a portion of the inorganic stack corresponding to the opening region is a silicon oxide material.
Alternatively, in some embodiments of the present invention, the reflection enhancing structure includes a stack of first and second inorganic layers alternately arranged, and the first inorganic layer has a refractive index greater than that of the second inorganic layer.
Alternatively, in some embodiments of the present invention, the first inorganic layer and the second inorganic layer are both silicon oxynitride materials, and the content of nitrogen atoms in the first inorganic layer is greater than the content of nitrogen atoms in the second inorganic layer.
Alternatively, in some embodiments of the present invention, the content of oxygen atoms in the first inorganic layer is 0% -15%, and the content of nitrogen atoms in the second inorganic layer is 0% -15%.
Optionally, in some embodiments of the present invention, the inorganic stack includes a buffer layer, a gate insulating layer, and an interlayer insulating layer that are stacked, the buffer layer being located on a side of the inorganic stack facing the substrate;
the non-opening region of the array substrate further includes a thin film transistor in the inorganic stack, the thin film transistor including an active layer on a side of the buffer layer facing the gate insulating layer;
the reflection enhancing structure comprises a first reflection enhancing structure positioned in the buffer layer, and the orthographic projection of the active layer on the substrate falls into the orthographic projection range of the first reflection enhancing structure on the substrate.
Optionally, in some embodiments of the present invention, the reflection enhancing structure further includes a second reflection enhancing structure located in the interlayer insulating layer, an orthographic projection of the second reflection enhancing structure on the substrate covers an orthographic projection of the active layer on the substrate, and the second reflection enhancing structure includes the first inorganic layer and the second inorganic layer stacked alternately from a side close to the gate insulating layer to a side far from the gate insulating layer, and at least the first inorganic layer in contact with the gate insulating layer is a silicon nitride material.
Optionally, in some embodiments of the present invention, the array substrate further includes a passivation layer, where the passivation layer is disposed on a side of the inorganic stack facing away from the substrate; wherein the passivation layer is a silicon oxide material.
The embodiment of the invention also provides a liquid crystal display panel which comprises the array substrate, the opposite substrate and a liquid crystal layer positioned between the array substrate and the opposite substrate.
The beneficial effects of the invention are as follows: according to the array substrate and the liquid crystal display panel, the structures of the part of the array substrate corresponding to the opening area and the part of the array substrate corresponding to the non-opening area are designed, and the inorganic layers of the array substrate corresponding to the opening area are all made of silicon oxide materials, so that the reflectivity of the part of the array substrate corresponding to the opening area is reduced, and the transmittance of the part of the array substrate corresponding to the opening area is increased; and arranging a reflection enhancing structure in the inorganic layer of the array substrate corresponding to the non-opening area, so that the reflectivity of the part of the array substrate corresponding to the non-opening area is increased, and light rays emitted to the non-opening area by the backlight are reflected to the opening area to be emitted, thereby improving the light transmittance of the array substrate and further improving the light efficiency of the liquid crystal display panel.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a top view of an array substrate according to an embodiment of the present invention;
FIG. 2 is a partial cross-sectional view of an array substrate according to an embodiment of the present invention;
fig. 3A to 3E are schematic views of a manufacturing process of an array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention. Furthermore, it should be understood that the detailed description is presented herein for purposes of illustration and description only, and is not intended to limit the invention. In the present invention, unless otherwise indicated, terms of orientation such as "upper" and "lower" are used to generally refer to the upper and lower positions of the device in actual use or operation, and specifically the orientation of the drawing figures; while "inner" and "outer" are for the outline of the device.
Referring to fig. 1-2, an embodiment of the invention provides an array substrate, which can be applied to a liquid crystal display panel, but is not limited thereto. The array substrate comprises a part corresponding to a display area AA and a part corresponding to a non-display area NA, wherein the display area AA is an area of the display panel for displaying pictures, and the non-display area NA is a frame area of the periphery of the display picture area of the display panel. The portion of the array substrate corresponding to the display area AA includes an opening area A1 arranged in an array manner and a non-opening area A2 located outside the opening area A1. It should be noted that, one of the opening areas A1 corresponds to one sub-pixel, and the sub-pixel displays through the corresponding opening area A1.
The reflectivity of the portion of the array substrate corresponding to the non-opening area A2 is greater than the reflectivity of the portion of the array substrate corresponding to the opening area A1.
When the array substrate is applied to a liquid crystal display panel, a backlight module (not labeled) is disposed on the back surface of the liquid crystal display panel for providing a light source for the liquid crystal display panel, and a reflective film is typically disposed in the backlight module. When light emitted by the backlight module is emitted to the array substrate in the liquid crystal display panel, the reflectivity of the portion, corresponding to the non-opening area A2, of the array substrate is larger than the reflectivity of the portion, corresponding to the opening area A1, of the array substrate, so that at least a part of reflected light after being reflected by the light emitted by the backlight module to the non-opening area A2 is emitted to the backlight module, and then the light is reflected by the backlight module and emitted to the liquid crystal display panel through the opening area A1. Compared with the array substrate with the traditional structure, the array substrate has higher transmittance to backlight and can improve the utilization rate of the liquid crystal display panel to the backlight.
It is understood that when the array substrate is applied to a liquid crystal display panel, a surface of the liquid crystal display panel facing the backlight module is a light incident surface (i.e., the substrate side), and a surface facing away from the backlight module is a light emitting surface (i.e., the display surface). The reflectivity of the portion of the array substrate corresponding to the non-opening area A2 being greater than the reflectivity of the portion of the array substrate corresponding to the opening area A1 means that when light enters the array substrate from the light incident surface, the reflectivity of the light in the non-opening area A2 of the array substrate is greater than the reflectivity in the opening area A1.
Specifically, referring to fig. 2, the array substrate includes a substrate 1 and an inorganic stack layer 2 disposed on the substrate 1. The inorganic lamination layer 2 comprises at least two inorganic film layers which are arranged in a lamination mode, a reflection enhancing structure 3 is arranged at the part, corresponding to the non-opening area A2, of the inorganic lamination layer 2, and the reflection enhancing structure 3 is used for increasing the reflectivity of light rays.
Wherein the reflection enhancing structure 3 may be an inorganic film layer, an organic film layer or a metal layer having a reflection function, and the reflection enhancing structure 3 may be a single-layer or multi-layer structure. The reflection enhancing structure 3 may be located on the surface or inside any one of the inorganic film layers of the inorganic stack 2, which is not limited herein.
In one embodiment, to avoid affecting the display contrast of the liquid crystal display panel, a non-reflective light shielding film layer may be disposed on a side of the reflection enhancing structure 3 facing away from the substrate 1. Therefore, under the condition that the aperture ratio of the sub-pixel is not affected, the reflection enhancing structure 3 can reflect light rays emitted from the backlight module to the reflection enhancing structure 3, but external light emitted from the light emitting surface of the liquid crystal display panel to the reflection enhancing structure 3 is not reflected by the reflection enhancing structure 3, so that the influence on the display contrast of the liquid crystal display panel is avoided.
Further, in the embodiment of the present invention, in order to make the most use of the backlight emitted to the non-opening area A2, the reflection enhancing structure 3 may be located in the whole non-opening area A2, and this design does not affect the aperture ratio of the sub-pixels.
In the embodiment of the present invention, the inorganic stack 2 includes, but is not limited to, a buffer layer 21, a gate insulating layer 22, and an interlayer insulating layer 23, which are stacked, wherein the buffer layer 21 is located on a side of the inorganic stack 2 facing the substrate 1.
Typically, in the conventional structure, the buffer layer 21, the gate insulating layer 22, and the interlayer insulating layer 23 are made of silicon nitride (SiN y ) And silicon oxide (SiO) x ) A double-layer or multi-layer structure, and the buffer layer 21, the gate insulating layer 22 and the interlayer insulating layer 23 are all integrally formed on the substrate due to nitridationThe refractive indexes of the silicon layer and the silicon oxide layer are different, so that light is reflected at the interface of the silicon nitride layer and the silicon oxide layer, so that light loss is large when the light passes through the interface of the silicon nitride layer and the silicon oxide layer, and the light transmittance of the part of the array substrate corresponding to the opening area A1 is reduced.
In order to solve this disadvantage, the portion of the inorganic stack 2 corresponding to at least the opening area A1 is formed of a silicon oxide material. On the one hand, the inorganic lamination 2 at least adopts a single inorganic material (silicon oxide) at the part corresponding to the opening area A1, so that the light loss of the light at interfaces of materials with different refractive indexes can be avoided, and the light transmittance of the light at the opening area A1 of the array substrate is improved; on the other hand, since the refractive index of silicon nitride is larger than that of silicon oxide, the higher the refractive index, the lower the light transmittance, and the light transmittance of the opening area A1 can be increased by setting at least the portion of the inorganic stack 2 corresponding to the opening area A1 to be a silicon oxide material. Therefore, the embodiment of the invention can improve the light transmittance of the array substrate corresponding to the opening area A1 by adopting the design.
Specifically, the buffer layer 21, the gate insulating layer 22, and the interlayer insulating layer 23 are all made of silicon oxide material at least at the portions corresponding to the opening area A1.
With continued reference to fig. 2, the reflection enhancing structure 3 is taken as an inorganic layer for illustration. The reflection enhancing structure 3 includes first inorganic layers 301 and second inorganic layers 302 alternately stacked, and the refractive index of the first inorganic layers 301 is larger than that of the second inorganic layers 302. The number of inorganic layers in one reflection enhancing structure 3 is 4-10, but not limited to this. As described in the foregoing, since the refractive indices of the first inorganic layer 301 and the second inorganic layer 302 are different, light is reflected at the interface between the first inorganic layer 301 and the second inorganic layer 302, as indicated by the arrow in fig. 2, and the larger the refractive index difference between the first inorganic layer 301 and the second inorganic layer 302, the higher the reflectance.
In one embodiment, the refractive index of the first inorganic layer 301 ranges from 1.6 to 1.9, and the refractive index of the second inorganic layer 302 ranges from 1.5 to 1.7. Although the refractive index ranges of the first inorganic layer 301 and the second inorganic layer 302 partially overlap, when the refractive index of the first inorganic layer 301 takes a certain value in the above-mentioned value range, the refractive index of the corresponding second inorganic layer 302 takes a value smaller than the refractive index of the first inorganic layer 301.
Further, in the present embodiment, the first inorganic layer 301 and the second inorganic layer 302 are both silicon oxynitride (SiO) x N y ) A material, wherein the refractive index of the silicon oxynitride material is determined by the ratio of nitrogen atoms (N) and oxygen atoms (O). When the content of nitrogen atoms in the first inorganic layer 301 is greater than the content of nitrogen atoms in the second inorganic layer 302, the refractive index of the first inorganic layer 301 is greater than the refractive index of the second inorganic layer 302.
Illustratively, the first inorganic layer 301 has an oxygen atom content of 0% -15%, such as an oxygen atom content of 0%, 5%, 10%, or 13%; the first inorganic layer 301 has a nitrogen atom content of 15% to 30%, for example, a nitrogen atom content of 16%, 20%, 25% or 30%. The second inorganic layer 302 has an oxygen atom content of 15% to 30%, for example, an oxygen atom content of 16%, 20%, 25% or 30%; the content of nitrogen atoms in the second inorganic layer 302 is 0% to 15%, for example, the content of nitrogen atoms is 0%, 5%, 10% or 13%.
It can be understood that when the content of oxygen atoms in the first inorganic layer 301 is 0%, the first inorganic layer 301 is a silicon nitride material; also, when the content of nitrogen atoms in the second inorganic layer 302 is 0%, the second inorganic layer 302 is a silicon oxide material.
The non-opening area A2 of the array substrate further includes a thin film transistor in the inorganic stack 2, the thin film transistor including an active layer 41, a gate electrode 42, a source electrode 43, and a drain electrode 44. The thin film transistor of the present invention may be a bottom gate structure, or may be a top gate structure; the thin film transistor may be a low temperature polysilicon thin film transistor, or may be an oxide semiconductor thin film transistor.
In this embodiment, only the thin film transistor is used as a top gate structure, and the active layer is a low-temperature polysilicon layer. The active layer 41 of the thin film transistor is located at a side of the buffer layer 21 facing the gate insulating layer 22, and the active layer 41 includes a channel region 411 and ion doped regions 412 located at both sides of the channel region 411. Wherein the reflection enhancing structure 3 comprises a first reflection enhancing structure 31 in the buffer layer 21. Specifically, the front projection of the first reflection enhancing structure 31 on the substrate 1 covers the non-opening area A2 and does not overlap the opening area A1. The front projection of the active layer 41 on the substrate 1 falls within the range of the front projection of the first reflection enhancing structure 31 on the substrate 1.
The buffer layer 21 may be formed only in the opening area A1, and the first reflection enhancing structure 31 may be disposed at a hollowed-out portion between two adjacent buffer layers 21, that is, the buffer layers 21 and the first reflection enhancing structure 31 are disposed on the same layer. Alternatively, the buffer layer 21 is disposed on the entire surface of the substrate 1 and covers the first reflection enhancing structure 31. Alternatively, the buffer layer 21 is provided with a groove corresponding to the non-opening area A2, and the first reflection enhancing structure 31 is disposed in the groove.
In the conventional structure, the buffer layer of the array substrate adopts a double-layer or multi-layer structure formed by silicon nitride and silicon oxide, wherein the silicon nitride is used for isolating sodium (Na) and potassium (K) ions in the substrate (such as a glass substrate) so as to avoid influencing the active layer.
In this embodiment, since the first reflection enhancing structure 31 under the active layer 41 is made of silicon oxynitride material, and contains nitrogen atoms and silicon atoms, it is capable of isolating sodium and potassium ions in the substrate, and avoiding diffusion of sodium and potassium ions in the substrate into the active layer 41 to affect the electrical performance of the thin film transistor. Therefore, the buffer layer 21 may be made of only silicon oxide material, so as to increase the light transmittance of the opening area A1.
In addition, the array substrate further comprises a light shielding layer 5, the light shielding layer 5 is located on one side of the active layer 41, which is close to the substrate 1, and the orthographic projection of the active layer 41 on the substrate 1 falls within the orthographic projection range of the light shielding layer 5 on the substrate 1. The light shielding layer 5 is used for shielding the light incident to the channel region from the side of the substrate 1, so as to avoid damaging the active layer 41. Wherein, when the light shielding layer 5 is made of a non-conductive material, it can be in direct contact with the active layer 41; when the light shielding layer 5 is made of a conductive material, the light shielding layer 5 is separated from the active layer 41 by the buffer layer 21 or the first reflection enhancing structure 31.
In the present embodiment, the first reflection enhancing structure 31 includes the first inorganic layer 301 and the second inorganic layer 302 alternately disposed from bottom to top, or the first reflection enhancing structure 31 includes the second inorganic layer 302 and the first inorganic layer 301 alternately disposed from bottom to top. That is, the inorganic layers in the first reflection enhancing structure 31 may be alternately in the order from the high refractive index to the low refractive index, or may be alternately in the order from the low refractive index to the high refractive index.
In this embodiment, the gate insulating layer 22 is entirely disposed on the active layer 41 and the buffer layer 21, and the gate insulating layer 22 is made of a silicon oxide material. The gate electrode 42 of the thin film transistor is disposed on a side of the gate insulating layer 22 facing the interlayer insulating layer 23, and the gate electrode 42 is disposed corresponding to the channel region 411 of the active layer 41.
In the conventional structure, an interlayer Insulating Layer (ILD) of an array substrate adopts a double-layer or multi-layer structure composed of silicon nitride and silicon oxide, wherein the silicon nitride serves to supplement hydrogen (H) to an active layer of a low temperature polysilicon thin film transistor (LTPS).
Further, in the embodiment of the present invention, the reflection enhancing structure 3 may further include a second reflection enhancing structure 32 located in the interlayer insulating layer 23, in addition to the first reflection enhancing structure 31. Specifically, the orthographic projection of the second reflection enhancing structure 32 on the substrate 1 covers the non-opening area A2 and does not overlap the opening area A1. The orthographic projection of the second reflection enhancing structure 32 on the substrate 1 covers the orthographic projection of the active layer 41 on the substrate 1.
The interlayer insulating layer 23 may be formed only in the opening area A1, and the second reflection enhancing structure 32 may be disposed at a hollow portion between two adjacent interlayer insulating layers 23, that is, the interlayer insulating layer 23 and the second reflection enhancing structure 32 are disposed in the same layer. Alternatively, the interlayer insulating layer 23 is provided over the entire surface thereof and covers the second reflection enhancing structure 32. Alternatively, the interlayer insulating layer 23 is provided with a groove corresponding to the non-opening area A2, and the second reflection enhancing structure 32 is disposed in the groove.
The second reflection enhancing structure 32 includes the first inorganic layer 301 and the second inorganic layer 302 stacked alternately from a side close to the gate insulating layer 22 to a side far from the gate insulating layer 22, wherein the refractive index of the first inorganic layer 301 is greater than the refractive index of the second inorganic layer 302. Wherein at least the first inorganic layer 301 of the second reflection enhancing structure 32 contacting the gate insulating layer 22 is made of a silicon nitride material. The silicon nitride material of the first inorganic layer 301 can supplement hydrogen to the active layer of the low-temperature polysilicon thin film transistor, so that the interlayer insulating layer 23 can use only silicon oxide material to improve the light transmittance of the opening area A1. In addition, the second reflection enhancing structure 32 may further enhance the utilization of the light emitted toward the non-opening area A2.
When the interlayer insulating layer 23 covers the second reflection enhancing structure 32, the source electrode 43 and the drain electrode 44 of the thin film transistor are disposed on a side of the interlayer insulating layer 23 facing away from the substrate 1, and the source electrode 43 and the drain electrode 44 are disposed at the same layer and a distance. The source electrode 43 and the drain electrode 44 penetrate the interlayer insulating layer 23, the second reflection enhancing structure 32, and the gate insulating layer 22 to be electrically connected to the ion doped region 412 of the active layer 41.
The array substrate provided by the embodiment of the invention further comprises a flat layer 6, a bottom electrode 7, a passivation layer 8 and a top electrode 9. The planarization layer 6 is disposed on a side of the interlayer insulating layer 23, the source electrode 43 and the drain electrode 44 facing away from the substrate 1, the bottom electrode 7 is disposed at intervals on a side of the planarization layer 6 facing away from the substrate 1, the passivation layer 8 is disposed on a side of the bottom electrode 7 facing away from the substrate 1, and the top electrode 9 is disposed at intervals on a side of the passivation layer 8 facing away from the substrate 1. Wherein the top electrode 9 is electrically connected to the drain electrode 44 through a via penetrating the passivation layer 8 and the planarization layer 6. The bottom electrode 7 and the top electrode 9 are used to form an electric field that drives the liquid crystal to deflect.
In the conventional structure, the passivation layer of the array substrate is composed of silicon nitride. In the embodiment of the present invention, the passivation layer 8 is a silicon oxide material or a silicon oxynitride material. Compared with the silicon nitride material, the passivation layer 8 of the embodiment of the invention can improve the light transmittance of the opening area A1.
Wherein the bottom electrode 7 and the top electrode 9 are made of transparent conductive materials, and light transmittance is not affected.
Referring to fig. 3A to 3E, the array substrate provided by the embodiment of the invention may be prepared by the following method:
step 1, as shown in fig. 3A, a substrate 1 is provided, a first stacked film layer formed by a first inorganic layer 301 with a high refractive index and a second inorganic layer 302 with a low refractive index is deposited on the substrate 1, and then the first stacked film layer is exposed and etched to remove a portion of the first stacked film layer corresponding to the opening area A1, so as to form a first reflection enhancing structure 31 corresponding to the non-opening area A2.
Wherein the thickness range of each first inorganic layer 301 and each second inorganic layer 302 is 30nm-200nm, and the number of the first laminated film layers is 4-10.
In step 2, as shown in fig. 3B, a light shielding layer 5 is formed on the surface of the first reflection enhancing structure 31 facing away from the substrate 1, then a buffer layer 21 is formed on the light shielding layer 5, and an active layer 41, a gate insulating layer 22 and a gate electrode 42 are sequentially formed on the buffer layer 21.
Wherein the buffer layer 21 and the gate insulating layer 22 are both made of silicon oxide material. The first reflection enhancing structure 31 under the active layer 41 is made of silicon oxynitride material, contains nitrogen atoms and silicon atoms, and can isolate sodium and potassium ions in the substrate, so that the diffusion of sodium and potassium ions in the substrate into the active layer 41 can be avoided, and the electrical performance of the thin film transistor is prevented from being affected.
Step 3, as shown in fig. 3C, a second stacked film layer formed by a first inorganic layer 301 with a high refractive index and a second inorganic layer 302 with a low refractive index is deposited on the gate electrode 42 and the gate insulating layer 22, and then the second stacked film layer is exposed and etched to remove a portion of the second stacked film layer corresponding to the opening area A1, so as to form a second reflection enhancing structure 32 corresponding to the non-opening area A2.
Wherein the thickness range of each first inorganic layer 301 and each second inorganic layer 302 is 30nm-200nm, and the number of the second laminated film layers is 4-10.
Step 4, as shown in fig. 3D, an entire interlayer insulating layer 23 is formed on the second reflection enhancing structure 32, contact holes penetrating through the interlayer insulating layer 23, the second reflection enhancing structure 32 and the gate insulating layer 22 are formed, a source electrode 43 and a drain electrode 44 are formed on the interlayer insulating layer 23, and the source electrode 43 and the drain electrode 44 are electrically connected to the active layer 41 through the contact holes, respectively.
Wherein the interlayer insulating layer 23 is a silicon oxide material.
In step 5, as shown in fig. 3E, a planarization layer 6, a bottom electrode 7, a passivation layer 8, and a top electrode 9 are sequentially formed on the interlayer insulating layer 23.
Wherein the passivation layer 8 is a silicon oxide material or a silicon oxynitride material. And the top electrode 9 is electrically connected to the drain electrode 44 through a via penetrating the passivation layer 8 and the planarization layer 6.
According to the array substrate provided by the embodiment of the invention, the inorganic film layers corresponding to the opening area A1 are all made of silicon oxide materials, so that the reflectivity of the opening area A1 can be reduced to the greatest extent, and the light transmittance is improved. In addition, the reflection enhancing structure 3 is provided corresponding to the non-opening region A2, so that the reflectivity of the non-opening region A2 can be improved to the greatest extent, and the utilization rate of light emitted to the non-opening region A2 can be improved. According to the invention, the light efficiency of the array substrate is greatly improved by designing the film layers of the opening area A1 and the non-opening area A2 of the array substrate.
Referring to fig. 2 and 4, the embodiment of the invention further provides a liquid crystal display panel, which includes the array substrate 100 and the opposite substrate 200 as described above, and the liquid crystal layer 300 between the array substrate 100 and the opposite substrate 200, and further includes a backlight module 400 disposed on the back of the array substrate 100.
The backlight module 400 is configured to provide a light source for the liquid crystal display panel, and a reflective film (not labeled) is disposed in the backlight module 400, and the reflective film can be configured to reflect light emitted by the light source in the backlight module 400. The opposite substrate 200 may be a color filter substrate, and includes a first substrate 2001 and a color filter layer 2002 positioned on a side of the first substrate 2001 facing the array substrate 100. The array substrate 100 includes a substrate 1 and a functional device layer 1001 disposed on the substrate 1, wherein the functional device layer 1001 includes, but is not limited to, an inorganic stack 2, an antireflective structure 3, a light shielding layer 5, a thin film transistor, a planarization layer 6, a bottom electrode 7, a passivation layer 8, and a top electrode 9, and the structure of the array substrate 100 is specifically shown in fig. 2 and described above and will not be repeated here.
When the light emitted from the backlight module 400 is directed to the array substrate 100 in the lcd panel, since the reflectivity of the portion of the array substrate 100 corresponding to the non-opening area A2 is greater than the reflectivity of the portion of the array substrate 100 corresponding to the opening area A1, at least a portion of the reflected light of the light emitted from the backlight module 400 to the non-opening area A2 is directed to the backlight module 400 after being reflected, and then is emitted from the lcd panel through the opening area A1 after being reflected by the backlight module 400, as indicated by the arrow in fig. 4. Compared with the array substrate with the traditional structure, the array substrate has higher transmittance to backlight and can improve the utilization rate of the liquid crystal display panel to the backlight.
The foregoing has outlined rather broadly the more detailed description of embodiments of the invention, wherein the principles and embodiments of the invention are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present invention, the present description should not be construed as limiting the present invention.

Claims (3)

1. The array substrate is characterized in that the part of the array substrate corresponding to the display area comprises an opening area in array arrangement and a non-opening area outside the opening area;
the reflectivity of the part of the array substrate corresponding to the non-opening area is larger than that of the part of the array substrate corresponding to the opening area:
the array substrate comprises a substrate and an inorganic lamination layer positioned on the substrate, wherein a reflection enhancing structure is arranged at a part of the inorganic lamination layer corresponding to the non-opening area, the reflection enhancing structure comprises a first inorganic layer and a second inorganic layer which are alternately arranged in a lamination manner, and the refractive index of the first inorganic layer is larger than that of the second inorganic layer; the first inorganic layer and the second inorganic layer are both silicon oxynitride materials, and the content of nitrogen atoms in the first inorganic layer is greater than that in the second inorganic layer;
the non-opening area of the array substrate further comprises a thin film transistor positioned on the inorganic lamination, the thin film transistor comprises an active layer, and the orthographic projection of the active layer on the substrate falls into the orthographic projection range of the reflection enhancing structure on the substrate;
the inorganic lamination comprises a buffer layer, a gate insulating layer and an interlayer insulating layer which are arranged in a laminated mode, and the buffer layer is positioned on one side, facing the substrate, of the inorganic lamination;
the active layer is positioned on one side of the buffer layer facing the gate insulating layer;
the reflection enhancing structure comprises a first reflection enhancing structure positioned in the buffer layer, and the orthographic projection of the active layer on the substrate falls into the orthographic projection range of the first reflection enhancing structure on the substrate;
the buffer layer, the gate insulating layer and the interlayer insulating layer are made of silicon oxide materials at least at the parts corresponding to the opening areas, and the array substrate further comprises a passivation layer which is arranged on one side of the inorganic lamination layer, which is opposite to the substrate; wherein the passivation layer is a silicon oxide material;
the reflection enhancing structure further comprises a second reflection enhancing structure located in the interlayer insulating layer, the orthographic projection of the second reflection enhancing structure on the substrate covers the orthographic projection of the active layer on the substrate, the second reflection enhancing structure comprises a first inorganic layer and a second inorganic layer which are alternately stacked from one side close to the gate insulating layer to one side far away from the gate insulating layer, and the first inorganic layer in contact with the gate insulating layer is made of silicon nitride material.
2. The array substrate of claim 1, wherein the first inorganic layer has an oxygen atom content of 0% to 15% and the second inorganic layer has a nitrogen atom content of 0% to 15%.
3. A liquid crystal display panel comprising the array substrate and the counter substrate according to any one of claims 1 to 2, and a liquid crystal layer between the array substrate and the counter substrate.
CN202210541186.6A 2022-05-17 2022-05-17 Array substrate and liquid crystal display panel Active CN114924436B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210541186.6A CN114924436B (en) 2022-05-17 2022-05-17 Array substrate and liquid crystal display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210541186.6A CN114924436B (en) 2022-05-17 2022-05-17 Array substrate and liquid crystal display panel

Publications (2)

Publication Number Publication Date
CN114924436A CN114924436A (en) 2022-08-19
CN114924436B true CN114924436B (en) 2023-12-12

Family

ID=82808079

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210541186.6A Active CN114924436B (en) 2022-05-17 2022-05-17 Array substrate and liquid crystal display panel

Country Status (1)

Country Link
CN (1) CN114924436B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115356878A (en) * 2022-09-06 2022-11-18 厦门天马微电子有限公司 Display panel and display device

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005157323A (en) * 2003-10-28 2005-06-16 Semiconductor Energy Lab Co Ltd Display device, method for manufacturing same, and television receiver
CN102315230A (en) * 2010-07-01 2012-01-11 三星移动显示器株式会社 Array substrate and manufacturing approach thereof and display device
CN106920801A (en) * 2015-12-24 2017-07-04 群创光电股份有限公司 Display device
CN107422537A (en) * 2017-09-14 2017-12-01 深圳市洲明科技股份有限公司 Lcd display
CN107565038A (en) * 2017-08-29 2018-01-09 上海天马微电子有限公司 Display panel and display device
CN109031821A (en) * 2018-07-05 2018-12-18 Oppo广东移动通信有限公司 Thin-film transistor array base-plate, display screen and electronic equipment
CN110082977A (en) * 2019-05-15 2019-08-02 深圳市华星光电技术有限公司 A kind of tft array substrate and display panel
CN211856955U (en) * 2020-04-16 2020-11-03 普发玻璃(深圳)有限公司 Superhard wear-resisting antireflection film structure
CN113451385A (en) * 2021-08-30 2021-09-28 北京京东方技术开发有限公司 Display substrate and display device
CN114047649A (en) * 2021-11-15 2022-02-15 武汉华星光电技术有限公司 Liquid crystal display panel and on-vehicle liquid crystal display device
CN114200713A (en) * 2021-12-31 2022-03-18 重庆惠科金渝光电科技有限公司 Display panel and display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4419119B2 (en) * 2003-12-03 2010-02-24 日本電気株式会社 Electro-optical device and projection display device

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005157323A (en) * 2003-10-28 2005-06-16 Semiconductor Energy Lab Co Ltd Display device, method for manufacturing same, and television receiver
CN102315230A (en) * 2010-07-01 2012-01-11 三星移动显示器株式会社 Array substrate and manufacturing approach thereof and display device
CN106920801A (en) * 2015-12-24 2017-07-04 群创光电股份有限公司 Display device
CN106920515A (en) * 2015-12-24 2017-07-04 群创光电股份有限公司 The drive circuit and its display panel of active matrix organic light-emitting diode
CN107565038A (en) * 2017-08-29 2018-01-09 上海天马微电子有限公司 Display panel and display device
CN107422537A (en) * 2017-09-14 2017-12-01 深圳市洲明科技股份有限公司 Lcd display
CN109031821A (en) * 2018-07-05 2018-12-18 Oppo广东移动通信有限公司 Thin-film transistor array base-plate, display screen and electronic equipment
CN110082977A (en) * 2019-05-15 2019-08-02 深圳市华星光电技术有限公司 A kind of tft array substrate and display panel
CN211856955U (en) * 2020-04-16 2020-11-03 普发玻璃(深圳)有限公司 Superhard wear-resisting antireflection film structure
CN113451385A (en) * 2021-08-30 2021-09-28 北京京东方技术开发有限公司 Display substrate and display device
CN114047649A (en) * 2021-11-15 2022-02-15 武汉华星光电技术有限公司 Liquid crystal display panel and on-vehicle liquid crystal display device
CN114200713A (en) * 2021-12-31 2022-03-18 重庆惠科金渝光电科技有限公司 Display panel and display device

Also Published As

Publication number Publication date
CN114924436A (en) 2022-08-19

Similar Documents

Publication Publication Date Title
CN110082977B (en) TFT array substrate and display panel
CN107632453B (en) Display panel, manufacturing method thereof and display device
EP2991121B1 (en) Array substrate, method for manufacturing array substrate and display device
TW200807079A (en) Liquid crystal display panel
CN113359344B (en) Array substrate, liquid crystal display panel and liquid crystal display device
CN108681143A (en) Display panel, manufacturing method thereof and display device
TWI451179B (en) Pixel structure and manufacturing method thereof
JP4271000B2 (en) Transflective liquid crystal display device with different cell gaps
CN114924436B (en) Array substrate and liquid crystal display panel
JP4021053B2 (en) Semiconductor device
JP4137233B2 (en) Semiconductor device
US8570466B2 (en) Transflective liquid crystal display device having a thin film transistor and manufacturing method thereof
JP2007108737A (en) Array substrate for display panel, method for manufacturing substrate, display panel having substrate, and liquid crystal display apparatus having panel
TWI242680B (en) Liquid crystal display device
US7551249B2 (en) Transflective pixel structure and fabricating method thereof
US10847076B2 (en) Wiring substrate, display device including the wiring substrate, and method of fabricating the wiring substrate
CN103744240A (en) Array substrate and liquid crystal display panel using the same
JP2000162590A (en) Liquid crystal display device
US20240204003A1 (en) Display panel and display device
US20240194697A1 (en) Display panel and display device
WO2022178836A1 (en) Array substrate and manufacturing method therefor, display panel and display device
JP4419414B2 (en) Transflective liquid crystal display device
KR101071260B1 (en) Transflective liquid crystal display
KR101713946B1 (en) Liquid crystal display device
WO2023221198A1 (en) Array substrate, preparation method for array substrate, and display panel and display apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant