CN114924436A - Array substrate and liquid crystal display panel - Google Patents

Array substrate and liquid crystal display panel Download PDF

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Publication number
CN114924436A
CN114924436A CN202210541186.6A CN202210541186A CN114924436A CN 114924436 A CN114924436 A CN 114924436A CN 202210541186 A CN202210541186 A CN 202210541186A CN 114924436 A CN114924436 A CN 114924436A
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layer
array substrate
inorganic
substrate
opening area
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CN114924436B (en
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罗成志
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00Optical elements other than lenses
    • G02B5/08Mirrors
    • G02B5/0816Multilayer mirrors, i.e. having two or more reflecting layers
    • G02B5/0825Multilayer mirrors, i.e. having two or more reflecting layers the reflecting layers comprising dielectric materials only
    • G02B5/0833Multilayer mirrors, i.e. having two or more reflecting layers the reflecting layers comprising dielectric materials only comprising inorganic materials only
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553Reflecting elements
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Inorganic Chemistry (AREA)
  • Liquid Crystal (AREA)

Abstract

The invention provides an array substrate and a liquid crystal display panel, wherein the part of the array substrate corresponding to a display area comprises opening areas arranged in an array manner and non-opening areas positioned outside the opening areas; the reflectivity of the part of the array substrate corresponding to the non-opening area is larger than that of the part of the array substrate corresponding to the opening area. According to the embodiment of the invention, the structures of the part of the array substrate corresponding to the opening area and the part corresponding to the non-opening area are designed, so that the reflectivity of the part of the array substrate corresponding to the opening area is reduced, the transmittance is increased, the reflectivity of the part of the array substrate corresponding to the non-opening area is increased, light emitted by backlight to the non-opening area is reflected to the opening area to be emitted, the light transmittance of the array substrate is improved, and the light efficiency of the liquid crystal display panel is improved.

Description

Array substrate and liquid crystal display panel
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and a liquid crystal display panel.
Background
With the development of Display technology, flat panel Display devices such as Thin Film Transistor liquid crystal displays (TFT-LCDs) have advantages of high image quality, power saving, Thin body, and wide application range, and thus are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, and become the mainstream of Display devices.
In recent years, in TFT-LCD panels, development of items for low power consumption, high luminance, and improvement of light utilization efficiency is being advanced. The improvement of the luminous efficiency, the improvement of the brightness of the TFT-LCD and the reduction of the power loss are the problems that all panel factories in the world overcome. The luminous efficiency of the TFT-LCD panel refers to the ratio of the light intensity of the backlight before and after the backlight transmits through the TFT-LCD panel. In general, the light efficiency of the TFT-LCD is only 3% -10%, that is, more than 90% of the light can not be utilized. For the array substrate of the TFT-LCD, the multilayer film structure has a large influence on the light effect, and when the refractive indexes of adjacent film layers are different, reflection occurs at the interface, which causes the transmittance to decrease.
Therefore, a technical solution is needed to solve the above problems.
Disclosure of Invention
The invention provides an array substrate and a liquid crystal display panel, which can solve the technical problems that the light transmittance of the existing array substrate is low and the light efficiency of the liquid crystal display panel is influenced.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the embodiment of the invention provides an array substrate, wherein the part of the array substrate corresponding to a display area comprises opening areas arranged in an array manner and non-opening areas positioned outside the opening areas;
the reflectivity of the part of the array substrate corresponding to the non-opening area is greater than that of the part of the array substrate corresponding to the opening area.
Optionally, in some embodiments of the present invention, the array substrate includes a substrate and an inorganic stack layer on the substrate, where a portion of the inorganic stack layer corresponding to the non-opening region is provided with an enhanced structure, and the enhanced structure is used to increase the reflectivity of light.
Optionally, in some embodiments of the present invention, a portion of the inorganic stack corresponding to the opening region is a silicon oxide material.
Optionally, in some embodiments of the present invention, the reflection-increasing structure includes a stack of first inorganic layers and second inorganic layers alternately arranged, and a refractive index of the first inorganic layers is greater than a refractive index of the second inorganic layers.
Optionally, in some embodiments of the present invention, the first inorganic layer and the second inorganic layer are both silicon oxynitride materials, and a content of nitrogen atoms in the first inorganic layer is greater than a content of nitrogen atoms in the second inorganic layer.
Optionally, in some embodiments of the present invention, the content of oxygen atoms in the first inorganic layer is 0% to 15%, and the content of nitrogen atoms in the second inorganic layer is 0% to 15%.
Optionally, in some embodiments of the present invention, the inorganic stack includes a buffer layer, a gate insulating layer, and an interlayer insulating layer, which are stacked, where the buffer layer is located on a side of the inorganic stack facing the substrate;
the non-opening area of the array substrate further comprises a thin film transistor positioned in the inorganic laminated layer, the thin film transistor comprises an active layer, and the active layer is positioned on one side, facing the grid insulation layer, of the buffer layer;
wherein the reflection increasing structure comprises a first reflection increasing structure positioned in the buffer layer, and the orthographic projection of the active layer on the substrate falls within the range of the orthographic projection of the first reflection increasing structure on the substrate.
Optionally, in some embodiments of the present invention, the incremental inversion structure further includes a second incremental inversion structure located in the interlayer insulating layer, an orthogonal projection of the second incremental inversion structure on the substrate covers an orthogonal projection of the active layer on the substrate, and the second incremental inversion structure includes the first inorganic layer and the second inorganic layer that are stacked and arranged alternately from a side close to the gate insulating layer to a side far from the gate insulating layer, and at least the first inorganic layer in contact with the gate insulating layer is a silicon nitride material.
Optionally, in some embodiments of the present invention, the array substrate further includes a passivation layer disposed on a side of the inorganic stack facing away from the substrate; wherein, the passivation layer is a silicon oxide material.
The embodiment of the invention also provides a liquid crystal display panel, which comprises the array substrate and the opposite substrate, and a liquid crystal layer positioned between the array substrate and the opposite substrate.
The invention has the beneficial effects that: according to the array substrate and the liquid crystal display panel provided by the invention, the structures of the part of the array substrate corresponding to the opening area and the part corresponding to the non-opening area are designed, and the inorganic layers of the array substrate corresponding to the opening area are all set to be silicon oxide materials, so that the reflectivity of the part of the array substrate corresponding to the opening area is reduced, and the transmittance is increased; and arranging a reflection increasing structure in the inorganic layer of the array substrate corresponding to the non-opening area, so that the reflectivity of the part of the array substrate corresponding to the non-opening area is increased, and light rays emitted by the backlight to the non-opening area are reflected to the opening area to be emitted, thereby improving the light transmittance of the array substrate and further improving the light efficiency of the liquid crystal display panel.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a top view of an array substrate according to an embodiment of the present invention;
fig. 2 is a partial cross-sectional view of an array substrate according to an embodiment of the present invention;
FIGS. 3A-3E are schematic views illustrating a manufacturing process of an array substrate according to an embodiment of the invention;
fig. 4 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Furthermore, it should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, and are not intended to limit the present invention. In the present invention, unless otherwise specified, the use of directional terms such as "upper" and "lower" generally means upper and lower in the actual use or operation of the device, particularly in the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
Referring to fig. 1-2, an embodiment of the invention provides an array substrate, which can be applied to a liquid crystal display panel, but is not limited thereto. The array substrate comprises a part corresponding to a display area AA and a part corresponding to a non-display area NA, wherein the display area AA is an area of the display panel used for displaying pictures, and the non-display area NA is a frame area on the periphery of the display picture area of the display panel. The part of the array substrate corresponding to the display area AA comprises an opening area a1 arranged in an array manner and a non-opening area a2 located outside the opening area a 1. It should be noted that one opening area A1 corresponds to one sub-pixel, and the sub-pixel is displayed by the corresponding opening area A1.
Wherein the reflectivity of the array substrate corresponding to the non-opening area A2 is greater than that of the array substrate corresponding to the opening area A1.
When the array substrate is applied to a liquid crystal display panel, a backlight module (not labeled) is disposed on a back surface of the liquid crystal display panel to provide a light source for the liquid crystal display panel, and a reflective film is disposed in the backlight module. When light emitted by the backlight module is emitted to the array substrate in the liquid crystal display panel, because the reflectivity of the part of the array substrate corresponding to the non-opening area A2 is greater than that of the part of the array substrate corresponding to the opening area A1, at least a part of reflected light of the light emitted by the backlight module to the non-opening area A2 is emitted to the backlight module after being reflected, and then the light is emitted out of the liquid crystal display panel through the opening area A1 after being reflected by the backlight module. Compared with the array substrate with the traditional structure, the array substrate has higher transmittance to the backlight, and can improve the utilization rate of the liquid crystal display panel to the backlight.
It can be understood that when the array substrate is applied to a liquid crystal display panel, one surface of the liquid crystal display panel facing the backlight module is a light incident surface (i.e., the substrate side), and one surface of the liquid crystal display panel facing away from the backlight module is a light emitting surface (i.e., the display surface). The fact that the reflectivity of the portion of the array substrate corresponding to the non-opening area A2 is greater than the reflectivity of the portion of the array substrate corresponding to the opening area A1 means that when light enters the array substrate from the light incident surface, the reflectivity of the light at the non-opening area A2 of the array substrate is greater than the reflectivity at the opening area A1.
Specifically, referring to fig. 2, the array substrate includes a substrate 1 and an inorganic stack 2 disposed on the substrate 1. The inorganic laminated layer 2 comprises at least two inorganic film layers which are arranged in a laminated mode, the part, corresponding to the non-opening area A2, of the inorganic laminated layer 2 is provided with the reflection increasing structure 3, and the reflection increasing structure 3 is used for increasing the reflectivity of light rays.
Wherein, the reflection-increasing structure 3 may be an inorganic film layer, an organic film layer or a metal layer having a reflection function, and the reflection-increasing structure 3 may be a single-layer or multi-layer structure. The reflection-increasing structure 3 may be located on the surface of or inside any inorganic film layer in the inorganic stack 2, and is not limited herein.
In an embodiment, in order to avoid affecting the display contrast of the liquid crystal display panel, a non-reflective light-shielding film layer may be disposed on a side of the reflection increasing structure 3 facing away from the substrate 1. Therefore, under the condition that the aperture ratio of the sub-pixels is not affected, the reflection increasing structure 3 can reflect the light rays emitted to the reflection increasing structure 3 by the backlight module, but the external light emitted to the reflection increasing structure 3 from the light-emitting surface of the liquid crystal display panel cannot be reflected by the reflection increasing structure 3, so that the influence on the display contrast of the liquid crystal display panel is avoided.
Further, in the embodiment of the present invention, in order to utilize the backlight to the non-opening area a2 to the maximum, the reflection-increasing structure 3 can be located in the whole non-opening area a2, and this design does not affect the aperture ratio of the sub-pixel.
In the embodiment of the present invention, the inorganic stack 2 includes, but is not limited to, a buffer layer 21, a gate insulating layer 22, and an interlayer insulating layer 23, which are stacked, wherein the buffer layer 21 is located on a side of the inorganic stack 2 facing the substrate 1.
Generally, in the conventional structure, the buffer layer 21, the gate insulating layer 22, and the interlayer insulating layer 23 are all made of silicon nitride (SiN) y ) And silicon oxide (SiO) x ) The buffer layer 21, the gate insulating layer 22 and the interlayer insulating layer 23 are all fabricated on the substrate in a whole layer, and due to the difference in refractive index between the silicon nitride layer and the silicon oxide layer, light is reflected at the interface between the silicon nitride layer and the silicon oxide layer, so that light loss is large when light passes through the interface between the silicon nitride layer and the silicon oxide layer, and thus light transmittance of a portion of the array substrate corresponding to the opening area a1 is reduced.
In order to solve this problem, in the embodiment of the present invention, at least a portion of the inorganic stacked layer 2 corresponding to the opening area a1 is provided with a silicon oxide material. On one hand, the inorganic stacked layer 2 at least adopts a single inorganic material (silicon oxide) corresponding to the opening area a1, so that light loss at the interface of materials with different refractive indexes can be avoided, and the transmittance of light at the opening area a1 of the array substrate can be improved; on the other hand, since the refractive index of silicon nitride is larger than that of silicon oxide, the light transmittance is lower as the refractive index is higher, and the light transmittance of the opening area a1 can be increased by setting at least a portion of the inorganic stack 2 corresponding to the opening area a1 to be a silicon oxide material. Therefore, the light transmittance of the array substrate corresponding to the opening area a1 can be improved by adopting the design in the embodiment of the invention.
Specifically, at least portions of the buffer layer 21, the gate insulating layer 22, and the interlayer insulating layer 23 corresponding to the opening region a1 are all silicon oxide materials.
Please refer to fig. 2, which illustrates the enhancement structure 3 as an inorganic layer. The reflection increasing structure 3 includes a stack of first inorganic layers 301 and second inorganic layers 302 alternately arranged, and a refractive index of the first inorganic layers 301 is larger than a refractive index of the second inorganic layers 302. The number of the inorganic layers in one of the reflection increasing structures 3 is 4-10, but not limited thereto. As described above, since the refractive indices of the first inorganic layer 301 and the second inorganic layer 302 are different, light is reflected at the interface between the first inorganic layer 301 and the second inorganic layer 302, as indicated by arrows in fig. 2, and the larger the difference between the refractive indices of the first inorganic layer 301 and the second inorganic layer 302 is, the higher the reflectivity is.
In one embodiment, the refractive index of the first inorganic layer 301 is in a range of 1.6 to 1.9, and the refractive index of the second inorganic layer 302 is in a range of 1.5 to 1.7. Although the numerical ranges of the refractive indices of the first inorganic layer 301 and the second inorganic layer 302 partially overlap, when the refractive index of the first inorganic layer 301 takes a certain value within the numerical range, the refractive index of the second inorganic layer 302 is smaller than the refractive index of the first inorganic layer 301.
Further, in the present embodiment, the first inorganic layer 301 and the second inorganic layer 302 are both silicon oxynitride (SiO) x N y ) The material, wherein the refractive index of the silicon oxynitride material is determined by the ratio of nitrogen atoms (N) to oxygen atoms (O). When the content of nitrogen atoms in the first inorganic layer 301 is greater than the content of nitrogen atoms in the second inorganic layer 302, the refractive index of the first inorganic layer 301 is greater than the refractive index of the second inorganic layer 302.
Illustratively, the content of oxygen atoms in the first inorganic layer 301 is 0% to 15%, e.g., the content of oxygen atoms is 0%, 5%, 10%, or 13%; the content of nitrogen atoms in the first inorganic layer 301 is 15% to 30%, for example, the content of nitrogen atoms is 16%, 20%, 25%, or 30%. The second inorganic layer 302 has an oxygen atom content of 15% to 30%, for example an oxygen atom content of 16%, 20%, 25% or 30%; the content of nitrogen atoms in the second inorganic layer 302 is 0% to 15%, for example the content of nitrogen atoms is 0%, 5%, 10% or 13%.
It is understood that when the content of the oxygen atoms in the first inorganic layer 301 is 0%, the first inorganic layer 301 is a silicon nitride material; likewise, when the content of nitrogen atoms in the second inorganic layer 302 is 0%, the second inorganic layer 302 is a silicon oxide material.
The non-opening area a2 of the array substrate further includes a thin film transistor in the inorganic stack 2, the thin film transistor including an active layer 41, a gate electrode 42, a source electrode 43, and a drain electrode 44. The thin film transistor can be of a bottom gate structure or a top gate structure; the thin film transistor may be a low temperature polysilicon thin film transistor, or may be an oxide semiconductor thin film transistor.
In this embodiment, the thin film transistor is only used as a top gate structure, and the active layer is a low temperature polysilicon layer. The active layer 41 of the thin film transistor is located on one side of the buffer layer 21 facing the gate insulating layer 22, and the active layer 41 includes a channel region 411 and ion-doped regions 412 located on both sides of the channel region 411. Wherein the reflection increasing structure 3 comprises a first reflection increasing structure 31 in the buffer layer 21. Specifically, the orthographic projection of the first reflection-adding structure 31 on the substrate 1 covers the non-opening area a2 and does not overlap with the opening area a 1. The orthographic projection of the active layer 41 on the substrate 1 falls within the range of the orthographic projection of the first reflection-increasing structure 31 on the substrate 1.
The buffer layer 21 may be formed only in the opening area a1, and the first reflection-increasing structure 31 may be disposed at a hollow portion between two adjacent buffer layers 21, that is, the buffer layer 21 and the first reflection-increasing structure 31 are disposed in the same layer. Alternatively, the entire surface of the buffer layer 21 is disposed on the substrate 1 and covers the first reflection increasing structure 31. Or, the buffer layer 21 is provided with a groove corresponding to the non-opening area a2, and the first reflection increasing structure 31 is disposed in the groove.
In a conventional structure, a buffer layer of an array substrate is a double-layer or multi-layer structure composed of silicon nitride and silicon oxide, wherein the silicon nitride is used for isolating sodium (Na) and potassium (K) ions in a substrate (such as a glass substrate) and avoiding affecting an active layer.
In this embodiment, since the first inversion enhancing structure 31 under the active layer 41 is a silicon oxynitride material containing nitrogen atoms and silicon atoms, it can isolate sodium and potassium ions in the substrate, and prevent the sodium and potassium ions in the substrate from diffusing into the active layer 41 to affect the electrical performance of the thin film transistor. Therefore, the buffer layer 21 can only adopt silicon oxide material, and the light transmittance of the opening area a1 is improved.
In addition, the array substrate further comprises a light shielding layer 5, the light shielding layer 5 is positioned on one side of the active layer 41 close to the substrate 1, and the orthographic projection of the active layer 41 on the substrate 1 falls within the range of the orthographic projection of the light shielding layer 5 on the substrate 1. The light shielding layer 5 is used for shielding light incident from one side of the substrate 1 to the channel region and avoiding damage to the active layer 41. When the light shielding layer 5 is made of a non-conductive material, it may be in direct contact with the active layer 41; when the light-shielding layer 5 is made of a conductive material, the light-shielding layer 5 is separated from the active layer 41 by the buffer layer 21 or the first inversion structure 31.
In this embodiment, the first reflection increasing structure 31 includes the first inorganic layer 301 and the second inorganic layer 302 alternately arranged from bottom to top, or the first reflection increasing structure 31 includes the second inorganic layer 302 and the first inorganic layer 301 alternately arranged from bottom to top. That is, the inorganic layers in the first reflection increasing structure 31 may alternate from a high refractive index to a low refractive index, or from a low refractive index to a high refractive index.
In this embodiment, the gate insulating layer 22 is entirely disposed on the active layer 41 and the buffer layer 21, and the gate insulating layer 22 is a silicon oxide material. The gate electrode 42 of the thin film transistor is disposed on a side of the gate insulating layer 22 facing the interlayer insulating layer 23, and the gate electrode 42 is disposed corresponding to the channel region 411 of the active layer 41.
In a conventional structure, an interlayer Insulating Layer (ILD) of an array substrate has a double or multi-layered structure of silicon nitride and silicon oxide, wherein the silicon nitride serves to supplement hydrogen (H) to an active layer of a low temperature polysilicon thin film transistor (LTPS).
Further, in the embodiment of the present invention, the reflection increasing structure 3 may further include a second reflection increasing structure 32 located in the interlayer insulating layer 23, in addition to the first reflection increasing structure 31. Specifically, the orthographic projection of the second reflection increasing structure 32 on the substrate 1 covers the non-opening area a2, and does not overlap with the opening area a 1. The orthographic projection of the second reflection-increasing structure 32 on the substrate 1 covers the orthographic projection of the active layer 41 on the substrate 1.
The interlayer insulating layer 23 may be formed only in the opening area a1, and the second reflection-increasing structure 32 may be disposed at a hollow portion between two adjacent interlayer insulating layers 23, that is, the interlayer insulating layer 23 and the second reflection-increasing structure 32 are disposed at the same layer. Alternatively, the interlayer insulating layer 23 is provided over the entire surface and covers the second reflection increasing structure 32. Or, the interlayer insulating layer 23 is provided with a groove corresponding to the non-opening area a2, and the second reflection increasing structure 32 is disposed in the groove.
The second inversion structure 32 includes the first inorganic layer 301 and the second inorganic layer 302 alternately stacked from a side close to the gate insulating layer 22 to a side away from the gate insulating layer 22, wherein a refractive index of the first inorganic layer 301 is larger than a refractive index of the second inorganic layer 302. At least the first inorganic layer 301 in the second enhancement structure 32, which is in contact with the gate insulating layer 22, is a silicon nitride material. The silicon nitride material of the first inorganic layer 301 can supplement hydrogen for the active layer of the low temperature polysilicon thin film transistor, and therefore, the interlayer insulating layer 23 may only adopt a silicon oxide material, so as to improve the light transmittance of the opening area a 1. In addition, the addition of the second reflection increasing structure 32 can further enhance the utilization rate of the light rays emitted to the non-opening area a 2.
When the interlayer insulating layer 23 covers the second increasing/reversing structure 32, the source 43 and the drain 44 of the thin film transistor are disposed on a side of the interlayer insulating layer 23 opposite to the substrate 1, and the source 43 and the drain 44 are disposed on the same layer and at an interval. The source electrode 43 and the drain electrode 44 are electrically connected to the ion-doped region 412 of the active layer 41 through the interlayer insulating layer 23, the second inversion structure 32, and the gate insulating layer 22.
The array substrate provided by the embodiment of the invention further comprises a flat layer 6, a bottom electrode 7, a passivation layer 8 and a top electrode 9. The planarization layer 6 is disposed on a side of the interlayer insulating layer 23, the source electrode 43 and the drain electrode 44 facing away from the substrate 1, the bottom electrodes 7 are disposed at intervals on a side of the planarization layer 6 facing away from the substrate 1, the passivation layer 8 is disposed on a side of the bottom electrodes 7 facing away from the substrate 1, and the top electrodes 9 are disposed at intervals on a side of the passivation layer 8 facing away from the substrate 1. Wherein the top electrode 9 is electrically connected to the drain electrode 44 through a via hole penetrating the passivation layer 8 and the planarization layer 6. The bottom electrode 7 and the top electrode 9 are used for forming an electric field for driving liquid crystal to deflect.
In the conventional structure, the passivation layer of the array substrate is made of silicon nitride. In the embodiment of the present invention, the passivation layer 8 is a silicon oxide material or a silicon oxynitride material. Compared to a silicon nitride material, the passivation layer 8 of the embodiment of the invention can improve the light transmittance of the opening area a 1.
The bottom electrode 7 and the top electrode 9 are made of transparent conductive materials, and light transmittance is not affected.
Referring to fig. 3A to 3E, an array substrate according to an embodiment of the present invention can be prepared by the following steps:
step 1, as shown in fig. 3A, providing a substrate 1, depositing a first stacked film layer composed of a first inorganic layer 301 with a high refractive index and a second inorganic layer 302 with a low refractive index on the substrate 1, then exposing and etching the first stacked film layer, and removing a portion of the first stacked film layer corresponding to an opening area a1 to form a first increased-reflection structure 31 corresponding to a non-opening area a 2.
The thickness range of each of the first inorganic layer 301 and the second inorganic layer 302 is 30nm-200nm, and the number of the first laminated film layers is 4-10.
Step 2, as shown in fig. 3B, forming a light-shielding layer 5 on a surface of the first increasing-inverting structure 31 opposite to the substrate 1, then fabricating an entire buffer layer 21 on the light-shielding layer 5, and sequentially forming an active layer 41, a gate insulating layer 22, and a gate electrode 42 on the buffer layer 21.
Wherein, the buffer layer 21 and the gate insulating layer 22 are both silicon oxide materials. The first reflection increasing structure 31 below the active layer 41 is a silicon oxynitride material, contains nitrogen atoms and silicon atoms, can isolate sodium ions and potassium ions in the substrate, and can prevent the sodium ions and the potassium ions in the substrate from diffusing into the active layer 41 to affect the electrical performance of the thin film transistor.
Step 3, as shown in fig. 3C, depositing a second stacked film layer composed of the first inorganic layer 301 with a high refractive index and the second inorganic layer 302 with a low refractive index on the gate electrode 42 and the gate insulating layer 22, and then exposing and etching the second stacked film layer to remove a portion of the second stacked film layer corresponding to the opening area a1, thereby forming the second increased-inversion structure 32 corresponding to the non-opening area a 2.
The thickness range of each first inorganic layer 301 and each second inorganic layer 302 is 30nm-200nm, and the number of the second laminated film layers is 4-10.
Step 4, as shown in fig. 3D, a complete interlayer insulating layer 23 is formed on the second reflection-increasing structure 32, contact holes penetrating the interlayer insulating layer 23, the second reflection-increasing structure 32 and the gate insulating layer 22 are formed, a source electrode 43 and a drain electrode 44 are formed on the interlayer insulating layer 23, and the source electrode 43 and the drain electrode 44 are electrically connected to the active layer 41 through the contact holes, respectively.
The interlayer insulating layer 23 is a silicon oxide material.
Step 5, as shown in fig. 3E, a planarization layer 6, a bottom electrode 7, a passivation layer 8 and a top electrode 9 are sequentially formed on the interlayer insulating layer 23.
The passivation layer 8 is a silicon oxide material or a silicon oxynitride material. And the top electrode 9 is electrically connected to the drain electrode 44 through a via hole penetrating the passivation layer 8 and the planarization layer 6.
According to the array substrate provided by the embodiment of the invention, the inorganic film layers corresponding to the opening area A1 are all silicon oxide materials, so that the reflectivity of the opening area A1 can be reduced to the greatest extent, and the light transmittance is improved. Further, the reflection increasing structure 3 is provided corresponding to the non-opening area a2, and the reflectance of the non-opening area a2 can be increased to the maximum, thereby increasing the utilization rate of light emitted to the non-opening area a 2. According to the invention, through the film layer design of the opening area A1 and the non-opening area A2 of the array substrate, the light efficiency of the array substrate is greatly improved.
Referring to fig. 2 and 4, the liquid crystal display panel includes the array substrate 100 and the opposite substrate 200, and the liquid crystal layer 300 located between the array substrate 100 and the opposite substrate 200, and further includes a backlight module 400 disposed on the back of the array substrate 100.
The backlight module 400 is used for providing a light source for the liquid crystal display panel, and a reflective film (not labeled) is disposed in the backlight module 400 and can be used for reflecting light emitted by the light source in the backlight module 400. The opposite substrate 200 may be a color filter substrate, and includes a first substrate 2001 and a color filter layer 2002 on a side of the first substrate 2001 facing the array substrate 100. The array substrate 100 includes a substrate 1 and a functional device layer 1001 located on the substrate 1, where the functional device layer 1001 includes, but is not limited to, an inorganic stack 2, an inversion structure 3, a light shielding layer 5, a thin film transistor, a planarization layer 6, a bottom electrode 7, a passivation layer 8, and a top electrode 9, and the structure of the array substrate 100 is specifically described with reference to fig. 2 and the above description, and is not repeated here.
When the light emitted from the backlight module 400 is directed to the array substrate 100 in the lcd panel, since the reflectivity of the portion of the array substrate 100 corresponding to the non-opening area a2 is greater than the reflectivity of the portion of the array substrate 100 corresponding to the opening area a1, at least a portion of the reflected light of the light emitted from the backlight module 400 toward the non-opening area a2 is reflected toward the backlight module 400, and then the reflected light is reflected by the backlight module 400 and emitted out of the lcd panel through the opening area a1, as shown by the arrows in fig. 4. Compared with the array substrate with the traditional structure, the array substrate has higher transmittance to the backlight, and can improve the utilization rate of the liquid crystal display panel to the backlight.
The above embodiments of the present invention are described in detail, and the principle and the implementation of the present invention are explained by applying specific embodiments, and the above description of the embodiments is only used to help understanding the method of the present invention and the core idea thereof; meanwhile, for those skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as limiting the present invention.

Claims (10)

1. The array substrate is characterized in that the part of the array substrate corresponding to a display area comprises opening areas arranged in an array manner and non-opening areas positioned outside the opening areas;
the reflectivity of the part of the array substrate corresponding to the non-opening area is greater than that of the part of the array substrate corresponding to the opening area.
2. The array substrate of claim 1, wherein the array substrate comprises a substrate and an inorganic stack layer on the substrate, and a portion of the inorganic stack layer corresponding to the non-opening area is provided with an enhanced structure for increasing the reflectivity of light.
3. The array substrate of claim 2, wherein a portion of the inorganic stack corresponding to the opening region is a silicon oxide material.
4. The array substrate of claim 2, wherein the reflection-increasing structure comprises a stack of first inorganic layers and second inorganic layers alternately arranged, and the refractive index of the first inorganic layers is greater than the refractive index of the second inorganic layers.
5. The array substrate of claim 4, wherein the first inorganic layer and the second inorganic layer are silicon oxynitride materials, and the content of nitrogen atoms in the first inorganic layer is greater than the content of nitrogen atoms in the second inorganic layer.
6. The array substrate of claim 5, wherein the first inorganic layer comprises 0-15% of oxygen atoms and the second inorganic layer comprises 0-15% of nitrogen atoms.
7. The array substrate of claim 5, wherein the inorganic stack comprises a buffer layer, a gate insulating layer and an interlayer insulating layer, the buffer layer is disposed on a side of the inorganic stack facing the substrate;
the non-opening area of the array substrate further comprises a thin film transistor positioned in the inorganic laminated layer, the thin film transistor comprises an active layer, and the active layer is positioned on one side, facing the grid insulation layer, of the buffer layer;
wherein the reflection increasing structure comprises a first reflection increasing structure positioned in the buffer layer, and the orthographic projection of the active layer on the substrate falls within the range of the orthographic projection of the first reflection increasing structure on the substrate.
8. The array substrate of claim 7, wherein the enhanced inversion structure further comprises a second enhanced inversion structure in the interlayer insulating layer, an orthographic projection of the second enhanced inversion structure on the substrate covers an orthographic projection of the active layer on the substrate, the second enhanced inversion structure comprises a first inorganic layer and a second inorganic layer alternately stacked from a side close to the gate insulating layer to a side far from the gate insulating layer, and at least the first inorganic layer in contact with the gate insulating layer is a silicon nitride material.
9. The array substrate of claim 8, further comprising a passivation layer disposed on a side of the inorganic stack facing away from the substrate; wherein, the passivation layer is a silicon oxide material.
10. A liquid crystal display panel comprising the array substrate and the opposite substrate according to any one of claims 1 to 9, and a liquid crystal layer between the array substrate and the opposite substrate.
CN202210541186.6A 2022-05-17 2022-05-17 Array substrate and liquid crystal display panel Active CN114924436B (en)

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