CN114914197A - DAF segmentation confirmation method - Google Patents

DAF segmentation confirmation method Download PDF

Info

Publication number
CN114914197A
CN114914197A CN202210099933.5A CN202210099933A CN114914197A CN 114914197 A CN114914197 A CN 114914197A CN 202210099933 A CN202210099933 A CN 202210099933A CN 114914197 A CN114914197 A CN 114914197A
Authority
CN
China
Prior art keywords
wafer
daf
dicing tape
division
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210099933.5A
Other languages
Chinese (zh)
Inventor
中村胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of CN114914197A publication Critical patent/CN114914197A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386Separation by peeling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Laser Beam Processing (AREA)
  • Die Bonding (AREA)

Abstract

The invention provides a DAF division checking method, which can easily check whether the DAF arranged on the back of a wafer is divided properly according to each chip. The method at least comprises the following steps: a supporting step of arranging one surface (18a) of the DAF on the back surface (10b) of the wafer on which the division starting points (110) are formed along the planned division line (14), positioning the wafer in the opening of an annular frame (F) having an opening (Fa) for accommodating the wafer, adhering a dicing tape (T2) to the other surface (18b) of the DAF, and supporting the DAF and the wafer on the frame via the dicing tape; a DAF dividing step of expanding a dicing tape between the wafer and the frame to divide the DAF corresponding to the chip; a contraction step of heating the dicing tape between the wafer and the frame to relax and contract; a dicing tape peeling step of peeling the dicing tape from the DAF; and a DAF division checking step of checking whether the DAF is divided corresponding to each chip.

Description

DAF segmentation confirmation method
Technical Field
The present invention relates to a DAF division checking method for checking whether or not a DAF disposed on a back surface of a wafer is divided appropriately for each chip.
Background
A wafer having a plurality of devices such as ICs and LSIs formed on a front surface thereof defined by planned dividing lines is ground to a desired thickness on a back surface thereof by a grinding apparatus, and thereafter, is divided into individual device chips by a dicing apparatus or a laser processing apparatus and used in electronic devices such as mobile phones and personal computers.
In addition, the following techniques are proposed: after forming half-cut grooves that do not reach the back side of the wafer along the planned dividing lines from the front side of the wafer, the back side of the wafer is ground by attaching a protective tape to the front side of the wafer so that the bottoms of the half-cut grooves are exposed at the back side, thereby dividing the wafer into individual device chips (see, for example, patent document 1).
Further, the following techniques are proposed: the method for manufacturing a semiconductor device includes the steps of positioning a light-condensing point of a laser beam having a wavelength that is transparent to a wafer inside a planned dividing line from the front surface or the back surface of the wafer, irradiating the wafer with the light-condensing point positioned inside the planned dividing line, forming a modified layer inside the wafer along the planned dividing line, then bonding a protective tape to the front surface of the wafer, and grinding the back surface of the wafer to form the wafer to a desired thickness, and dividing the wafer into device chips by an external force applied during the grinding (see, for example, patent document 2).
Patent document 1: japanese patent laid-open publication No. 2004-193241
Patent document 2: japanese patent laid-open publication No. 2014-007333
DAF (Die Attach Film) used when mounting and laminating the device chips on a substrate or the like is disposed on the back surface side of the device chips divided by the techniques described in patent documents 1 and 2. When the DAF is disposed on the device chip, the DAF is disposed on the entire back surface of the wafer, the dicing tape is disposed so as to overlap the DAF, the outer periphery of the dicing tape is supported by an annular frame having an opening for accommodating the wafer, and the DAF is divided into pieces corresponding to the respective device chips by expanding the dicing tape.
In addition, when the DAF dividing step of dividing the DAF into the device chips is performed, the DAF may not be divided well corresponding to the device chips depending on the expanding speed, expanding amount, size of the device chip, and the like when the dicing tape is expanded, and therefore, conventionally, after the DAF dividing step is performed, the dividing condition of the DAF is checked from the dividing groove side of the planned dividing line formed on the front surface of the wafer with a microscope, and the expanding speed, expanding amount, and the like when the dicing tape is expanded are adjusted as necessary. However, it is not easy to check the divided state of the DAF disposed on the back surface side of the wafer from the divided groove side formed on the front surface of the wafer, and it takes time to check the divided state of the DAF, which causes a problem of poor productivity.
Disclosure of Invention
The present invention has been made in view of the above circumstances, and a main technical object thereof is to provide a DAF division checking method capable of easily checking whether or not DAF disposed on the back surface of a wafer is appropriately divided for each chip.
In order to solve the above-described main technical problem, the present invention provides a DAF division checking method for checking whether or not a DAF disposed on a back surface of a wafer is divided appropriately for each chip, the DAF division checking method including at least the steps of: a supporting step of arranging one surface of the DAF on a back surface of a wafer divided into a plurality of chips along the planned dividing lines or a wafer having division starting points formed along the planned dividing lines, positioning the wafer in the opening of an annular frame having an opening for accommodating the wafer, attaching a dicing tape to the other surface of the DAF, and supporting the DAF and the wafer on the frame via the dicing tape; a DAF dividing step of expanding the dicing tape positioned between the wafer and the frame to expand the interval between the adjacent chips and dividing the DAF corresponding to the chip; a contraction step of heating the dicing tape between the wafer and the frame to relax and contract; a dicing tape peeling step of peeling the dicing tape from the DAF by disposing a support member on the front surface of the wafer; and a DAF division checking step of checking whether the DAF is divided corresponding to each chip.
When it is confirmed in the DAF division confirming step that the DAF is not divided in correspondence with each chip, the spreading speed and the spreading amount when the dicing tape is spread in the DAF division step are adjusted.
The DAF segmentation confirmation method of the invention at least comprises the following steps: a supporting step of arranging one surface of the DAF on a back surface of a wafer divided into a plurality of chips along the planned dividing lines or a wafer having division starting points formed along the planned dividing lines, positioning the wafer in the opening of an annular frame having an opening for accommodating the wafer, attaching a dicing tape to the other surface of the DAF, and supporting the DAF and the wafer on the frame via the dicing tape; a DAF dividing step of expanding a dicing tape positioned between the wafer and the frame to expand an interval between adjacent chips and dividing the DAF corresponding to the chip; a contraction step of heating the dicing tape between the wafer and the frame to relax and contract; a dicing tape peeling step of peeling the dicing tape from the DAF by disposing a support member on the front surface of the wafer; and a DAF division checking step of checking whether the DAF is divided in correspondence with each chip, and enabling the wafer and the DAF to be supported by the support member with the DAF side facing upward.
Drawings
Fig. 1 is a perspective view showing a state where a cut groove or a division start point is formed in a wafer to be processed in the present embodiment.
Fig. 2 is a perspective view showing a state in which a wafer having a cutting groove or a division start point formed thereon is placed on a chuck table of a grinding apparatus.
Fig. 3 (a) is a perspective view showing a state in which the wafer is divided into individual chips by the grinding device, and fig. 3 (b) is a perspective view of the wafer divided into individual chips.
Fig. 4 is a perspective view showing an embodiment of the supporting process.
Fig. 5 is a perspective view of the partitioning device.
Fig. 6 is a partially enlarged cross-sectional view showing an embodiment of the DAF dividing process performed by the dividing apparatus shown in fig. 5.
Fig. 7 is a perspective view showing an embodiment of the shrinking process.
Fig. 8 is a perspective view showing an embodiment of the DAF division checking process.
Fig. 9 (a) is a perspective view showing another embodiment of the dicing tape peeling step, and fig. 9 (b) is a perspective view showing another embodiment of the DAF division checking step.
Description of the reference symbols
10: a wafer; 10 a: a front side; 10 b: a back side; 12: a device; 12': a device chip; 14: dividing a predetermined line; 18: DAF; 20: a cutting device; 22: a cutting tool; 30: a grinding device; 31: a chuck table; 32: a holding surface; 34: a frame body; 36: a grinding unit; 362: rotating the main shaft; 364: a grinding wheel mounting seat; 366: grinding the grinding wheel; 368: grinding the grinding tool; 40: a laser processing device; 41: a laser beam irradiation unit; 42: a condenser; 50: a dividing device; 51: a frame holding unit; 52: a dividing unit; 53: an expansion drum; 100: cutting a groove; 110: dividing a starting point; t1: a BG band; t2: scribing a tape; t3: a support member; t4: a support member.
Detailed Description
Hereinafter, an embodiment of the DAF division checking method of the present invention will be described in detail with reference to the drawings.
In the DAF division checking method according to the present embodiment, a wafer divided into a plurality of chips along the lines to divide or a wafer having division start points formed along the lines to divide is prepared. First, a procedure for preparing a wafer divided into a plurality of chips along a line to divide will be described with reference to fig. 1 to 3. Fig. 1 shows a wafer 10 before processing as a workpiece according to the present embodiment in an upper part thereof. The wafer 10 has a plurality of devices 12 formed on a front surface 10a defined by the lines to divide 14.
In order to divide the wafer 10 before processing into the device chips along the lines to divide 14, for example, as shown on the left side of fig. 1, the wafer 10 before processing is carried to a cutting apparatus 20 (only a part of which is shown) having a cutting blade 22. The cutting device 20 includes (both not shown): a holding unit that holds the wafer 10; a moving unit that moves the holding unit; and an imaging unit that images the wafer 10 held by the holding unit, and the cutting tool 22 is rotated by driving a motor, not shown. The wafer 10 is held by the holding unit, the moving unit is operated to position the holding unit directly below the imaging unit, and the wafer 10 is imaged by the imaging unit to perform alignment. The lines 14 are aligned in the X direction in the drawing based on the positional information of the lines 14 detected by this alignment. Next, the cutting tool 22 is positioned so as to be along the predetermined planned dividing line 14 on the front surface 10a side of the wafer 10, and the holding unit and the cutting tool 22 are relatively moved in the X direction by the moving unit to perform machining feed, thereby forming the cutting groove 100 along the planned dividing line 14. As shown in the drawing, the cut groove 100 is a half-cut groove having a depth not reaching the back surface 10b of the wafer 10. The depth of the cutting groove 100 is set to the following depth: in the case where the rear surface 10b side is ground to a finished thickness in a wafer dividing process described later, the cut groove 100 is exposed from the rear surface 10 b. By operating the cutting tool 22 and the moving means described above, the holding means holding the wafer 10 and the cutting tool 22 are appropriately moved relative to each other in the X direction, the Y direction perpendicular to the X direction, and the rotational direction, and as shown in the lower left side of fig. 1, the cutting grooves 100 are formed along all the lines to divide 14 on the wafer 10.
Next, as shown in the left side of fig. 2, a BG (back grind) tape T1 is stuck to the front surface 10a of the wafer 10. After the wafer 10 and the BG tape T1 are integrated, the wafer is conveyed to the grinding apparatus 30 shown in the lower part of fig. 2, and is placed on the chuck table 31 including the holding surface 32 and the frame 34 surrounding the holding surface 32 such that the BG tape T1 side faces downward and the back surface 10b side of the wafer 10 faces upward. The holding surface 32 of the chuck table 31 is made of a member having air permeability, and is connected to a suction unit, not shown, for sucking and holding the wafer 10 placed on the chuck table 31 by the action of the suction unit.
As shown in fig. 3 (a), the grinding device 30 has a grinding unit 36. The grinding unit 36 is a unit for grinding the back surface 10b of the wafer 10 sucked and held on the chuck table 31 to thin the wafer 10, and the grinding unit 36 includes: a rotation main shaft 362 rotated by a rotation driving mechanism not shown; a grinding wheel mount 364 mounted on a lower end of the rotary spindle 362; a grinding wheel 366 mounted on a lower surface of the wheel mounting seat 364; and a plurality of grinding tools 368 annularly arranged on the lower surface of the grinding wheel 366.
After the wafer 10 is suction-held on the chuck table 31, the rotation spindle 362 of the grinding unit 36 is rotated at, for example, 6000rpm in the direction indicated by the arrow R1 in (a) of fig. 3, and the chuck table 31 is rotated at, for example, 300rpm in the direction indicated by the arrow R2. Then, while supplying the grinding water to the back surface 10b of the wafer 10 by a grinding water supply means, not shown, a grinding feed means, not shown, is operated to lower the grinding means 36 in the direction indicated by the arrow R3 in the figure, bring the grinding whetstone 368 into contact with the back surface 10b of the wafer 10, and feed the grinding whetstone 366 at a speed of, for example, 1 μm/sec. In this case, the back surface 10b side can be ground by a predetermined amount until the thickness of the wafer 10 becomes the finished thickness by grinding while measuring the thickness of the wafer 10 with a contact-type measuring instrument, not shown. Since the cut groove 100 having a depth corresponding to the finish thickness is formed in the front surface 10a of the wafer 10 along the planned dividing line 14 as described above, the cut groove 100 is exposed on the rear surface 10b side of the wafer 10 as shown in fig. 3 (b) by grinding the rear surface 10b side by the predetermined amount, and the wafer 10 is divided into the device chips 12' (wafer dividing step). After the wafer 10 is divided into the device chips 12', the grinding unit 36 is stopped and retracted upward.
The present invention is not limited to the method of forming the cut grooves 100 on the front surface 10a side of the wafer 10 and grinding the back surface 10b side to divide the wafer 10 into the respective device chips 12' as described above, and may be configured to perform a division starting point forming step of forming division starting points along the lines to divide 14 of the wafer 10 by laser processing, for example, and perform the wafer dividing step by applying an external force to the division starting points. Hereinafter, an embodiment in which the wafer dividing step is performed by performing the division start point forming step will be described with reference to fig. 1 to 3.
After preparing the wafer 10 before processing shown in the upper part of fig. 1, the wafer 10 is transported to the laser processing apparatus 40 shown in the right side of fig. 1. The laser processing apparatus 40 includes (both not shown): a holding unit that holds the wafer 10; a moving unit that moves the holding unit in an X direction, a Y direction, and a rotational direction in the figure; an imaging unit that images the wafer 10; and a laser beam irradiation unit 41 that irradiates a laser beam LB having a wavelength that is transparent to the wafer 10.
The wafer 10 conveyed to the laser processing apparatus 40 is sucked and held by the holding unit so that the back surface 10b side faces upward. Although not shown, it is preferable to attach a protective tape to the front surface 10a of the wafer 10 in order to protect the devices 12 when the wafer 10 is held by the holding unit. The wafer 10 held by the holding unit is positioned directly below the imaging unit, and an alignment process is performed. The imaging means irradiates infrared rays, captures reflected infrared rays, converts the infrared rays into an electric signal, and outputs the electric signal to a control means, not shown. By performing this alignment step, the positions of the lines to divide 14 formed on the front surface 10a are detected from the back surface 10b side of the wafer 10, and the wafer 10 is rotated by the movement unit so that the lines to divide 14 in the predetermined direction are aligned with the X direction.
Next, the moving means is operated to position the processing start position of the lines to divide 14 directly below the condenser 42 of the laser beam irradiation means 41, position the condensing point of the laser beam LB inside the lines to divide 14 of the wafer 10, and perform processing feed of the wafer 10 in the X direction. As a result, as shown in fig. 1, the start points 110 of the modified layer are formed inside the wafer 10 along the predetermined lines to divide 14. In the present embodiment, as shown in the drawing, the division starting points 110 each composed of 3 modified layers are formed by irradiating the planned division line 14 with the laser beam LB while changing the depth of the converging point in 3 steps. After the division start points 110 are formed along the predetermined lines to divide 14 in this manner, the wafer 10 is indexed in the Y direction at intervals of the lines to divide 14, and the unprocessed lines to divide 14 adjacent in the Y direction are positioned directly below the condenser 41. Then, the converging point of the laser beam LB is positioned inside the planned dividing line 14 of the wafer 10 and irradiated as described above, and the wafer 10 is processed and fed in the X direction to form the division starting points 110. In this way, the wafer 10 is processed and fed in the X direction and the Y direction, and the division start points 110 are formed along all the lines to divide 14 in the X direction. Next, the wafer 10 is rotated by 90 degrees together with the chuck table 31, and the unprocessed lines to divide 14 in the direction perpendicular to the lines to divide 14 in which the division starting points 110 have been formed are aligned in the X direction. Then, the converging points of the laser beams LB are positioned and irradiated on the remaining lines to be divided 14 in the same manner as described above, and as shown in the lower right side of fig. 1, the division start points 110 are formed along all the lines to be divided 14 of the wafer 10 (division start point forming step). When forming the modified layer along the lines to divide 14 of the wafer 10, the laser beam LB is not necessarily irradiated from the back surface 10b side of the wafer 10, but may be irradiated from the front surface 10a side of the wafer 10 in a case where no test electrode or the like is present on the lines to divide 14.
As described above, after the division starting points 110 are formed inside the wafer 10 along all the lines to divide 14, as shown on the right side of fig. 2, the BG tape T1 is attached to the front surface 10a of the wafer 10 on which the division starting points 110 are formed, the wafer 10 is conveyed to the grinding apparatus 30, and the BG tape T1 side is placed downward and sucked and held on the chuck table 31 of the grinding apparatus 30. Then, the back surface 10b side of the wafer 10 is ground by the grinding unit 36 shown in fig. 3 in the same procedure as in the above-described wafer dividing step. The wafer 10 is thinned to a desired finish thickness by grinding processing performed by the grinding unit 36 from the back surface 10b side of the wafer 10, and thereby external force is applied to the division starting points 110 to break the wafer 10 along the division starting points 110, and the wafer is divided into the respective device chips 12'. In addition, the present invention is not limited to the above-described embodiment in which the modified layer is formed inside the lines to divide 14 of the wafer 10 by laser processing to form the division starting points 110, and the laser processing grooves as the division starting points may be formed by irradiating laser light having an absorptive wavelength from the front surface 10a side of the wafer 10 to perform ablation processing along the lines to divide 14.
Next, as shown in fig. 4, a supporting step of supporting the wafer 10 on a frame is performed. In the supporting step, first, as shown in the lower side of fig. 4, a circular piece-shaped DAF18 (having the same size as the wafer 10), a dicing tape T2, and an annular frame F having an opening Fa capable of accommodating the wafer 10 are prepared. The wafer 10 in which the wafer 10 has been divided into the device chips 12 'by the above-described wafer dividing step is shown in the upper left of fig. 4, and the supporting step, the DAF dividing step, the shrinking step, and the dicing tape peeling step, which will be described below, are described as a case where the wafer 10 divided into the device chips 12' is supported by the frame F.
After the wafer 10 divided into the device chips 12' is prepared, one surface 18a (upper surface in the figure) of the DAF18 is disposed on the back surface 10b of the wafer 10. The back surface 10b side of the wafer 10 is positioned in the opening Fa of the frame F, the dicing tape T2 is stuck to the other surface 18b of the DAF18, and the DAF18 and the wafer 10 are supported by the frame F via the dicing tape T2, thereby completing the supporting step. After the supporting step, the BG tape T1 attached to the front surface 10a side of the wafer 10 is peeled off.
After the support step, the DAF division step is performed as follows: the dicing tape T2 between the wafer 10 held by the frame F and the frame F is expanded to expand the intervals between the adjacent device chips 12 ', and the DAF18 is divided in correspondence with the device chips 12'. A dividing apparatus 50 suitable for carrying out the DAF dividing step of the present embodiment will be described with reference to fig. 5. The dividing device 50 includes: a frame holding unit 51 that holds a frame F that supports the wafer 10 by the dicing tape T2 and the DAF 18; and a dividing unit 52 that spreads the dicing tape T2 attached to the frame F held by the frame holding unit 51 and divides the DAF18 disposed on the wafer 10 in correspondence with each device chip 12'.
The frame holding unit 51 has: a frame holding member 51a formed in a ring shape so as to hold the ring-shaped frame F; and a plurality of clamps 51b (4 in the illustrated embodiment) as fixing means, which are arranged at equal intervals on the outer periphery of the frame holding member 51 a. The frame holding member 51a is formed flat on the upper surface thereof, and the frame F is placed thereon. The frame F placed on the upper surface of the frame holding member 51a is fixed to the upper surface of the frame holding member 51a by the jig 51 b.
An expansion drum 53 is disposed inside the frame holding member 51a, and the lower end of the expansion drum 53 is fixed to a disk-shaped base 54. The expanding drum 53 is formed to be smaller than the inner diameter of the opening Fa of the frame F and larger than the outer diameter of the wafer 10 supported by the dicing tape T2 via the DAF18 in a plan view. The dividing unit 52 in the illustrated embodiment has: a plurality of (e.g., 4) cylinders 52a disposed around the expansion drum 53 and fixed to the base 54; and a piston rod 52b extending upward from the cylinder 52a, and having an upper end coupled to a lower surface of the frame holding member 51 a. Control air is supplied to the air cylinder 52a through a communication passage, not shown, and the piston rod 52b is moved forward and backward in the vertical direction by the action of the air cylinder 52a, so that the frame holding member 51a is moved forward and backward in the vertical direction.
The dividing apparatus 50 of the present embodiment has a configuration substantially as described above, and the DAF dividing step of the present embodiment will be described more specifically with reference to fig. 6 in addition to fig. 5.
In the DAF dividing step of the present embodiment, as shown in fig. 5, the front surface 10a side of the wafer 10 divided into the device chips 12' is directed upward, and the frame F is placed on the upper surface of the frame holding member 51a of the dividing apparatus 50 and fixed by the jig 51 b. At this time, as shown in fig. 6, the upper end of the expansion drum 53 is located at a reference position (indicated by a solid line) at substantially the same height as the upper surface of the frame holding member 51 a. Next, the air cylinders 52a of the plurality of divided units 52 connected to the frame holding member 51a are operated, the piston rods 52b are retracted into the air cylinders 52a, and the frame holding member 51a is lowered in the direction indicated by the arrow R4. Thereby, the frame F also descends together with the frame holding member 51a, the dicing tape T2 supported by the frame F is expanded by a predetermined amount (indicated by a two-dot chain line) by the expanding drum 53 that ascends relatively to the frame holding member 51a, and a radial tensile force acts on the dicing tape T2. As a result, as shown in fig. 6, the distance between the adjacent device chips 12 'in the wafer 10 is expanded, and the DAF18 is divided in correspondence with the device chips 12', thereby completing the DAF dividing step. In fig. 6, for convenience of explanation, the vertical position of the wafer 10 is changed before and after the DAF18 is divided, but in the actual DAF dividing step, the vertical position of the wafer 10 is not changed, and the vertical position of the frame holding member 51a is changed. Further, the pressure of the control air supplied to the air cylinder 52a can be adjusted by an air supply source, not shown, so that the expanding speed when expanding the dicing tape T2 can be adjusted to a desired expanding speed. Further, the extension amount of the piston rod 52b can also be adjusted, and thus the extension amount of the dicing tape T2 can also be adjusted to a desired amount.
After the DAF dividing step is performed, the frame F supporting the wafer 10 is carried out of the dividing apparatus 50. At this time, the dicing tape T2 supporting the wafer 10 is in a relaxed state by performing the DAF dividing step described above. Thus, as shown in fig. 7, the heating unit 60 is positioned in the vicinity of the dicing tape T2 exposed between the wafer 10 and the frame F. The heating unit 60 includes, for example, a heater and a blowing unit, and is a unit that jets warm air from the front end to the outside. After the heating unit 60 is positioned as shown in fig. 7, warm air is ejected from the heating unit 60, and the frame F is rotated in the direction indicated by the arrow R5, thereby heating the entire region of the dicing tape T2 supporting the wafer 10. Thereby, the dicing tape T2 positioned between the wafer 10 and the frame F is relaxed and contracted (contracted), and is returned to a state substantially similar to the state before the DAF dividing step described above, and the contraction step is completed.
As described above, after the shrinking step is performed, as shown in fig. 7, the support member T3 formed to have the same size as the wafer 10 is disposed on the front surface 10a side of the wafer 10. The support member T3 is appropriately selected from a glass plate, a resin plate such as PET, a resin tape, and the like. When the support member T3 is disposed on the front surface 10a of the wafer 10, an adhesive is applied to the support surface on the support member T3 side. After the support member T3 is disposed on the front surface 10a of the wafer 10 in this manner, the dicing tape T2 is peeled off from the DAF18 disposed on the back surface 10b side of the wafer 10, and the dicing tape peeling step is completed.
In the above-described supporting step, DAF dividing step, shrinking step, and dicing tape peeling step, the case where the wafer 10 divided into the device chips 12' is supported by the frame F in the supporting step has been described, but the present invention is not limited thereto. For example, in the supporting step, as shown in the upper right of fig. 4, the back surface 10b of the wafer 10, which is not divided into the device chips 12' but is formed with the division start points 110 along the lines to divide 14, may be arranged on the one surface 18a of the DAF18, and the DAF18 and the wafer 10 may be supported by the frame F via the dicing tape T2. In this case, by performing the DAF dividing step described above, the wafer 10 is divided into the device chips 12 ', and the DAF18 is divided in correspondence with the device chips 12'. Therefore, in this case, the DAF dividing step can be performed without the wafer dividing step, and after the DAF dividing step is performed, the shrinking step and the dicing tape peeling step can be performed in the same manner as described above.
After the dicing tape peeling step is performed as described above, the wafer 10 sandwiched between the DAF18 and the support member T3 is turned over as indicated by an arrow R6 in fig. 8 so that the surface on which the DAF18 is disposed faces upward, and whether or not the DAF18 is properly divided in correspondence with the device chip 12' is checked from the DAF18 side. In addition, although the mode of confirmation by visual observation is shown in fig. 8, the mode of confirmation by visual observation is not necessarily limited to the mode of confirmation by visual observation, and it may be confirmed whether or not the DAF18 is appropriately divided in correspondence with the device chip 12' by positioning the wafer 10 directly below an imaging unit, not shown, and confirming an image captured by the imaging unit or further performing arithmetic processing on captured image data. The DAF division confirmation process is completed in this way.
Here, according to the execution conditions of the DAF division step described above, in the DAF division confirmation step, as shown in fig. 8, it is confirmed that the DAF18 is not completely divided in correspondence with each device chip 12', that is, the DAF division step is not appropriately executed. In such a case, the expanding speed and the expanding amount when expanding the dicing tape T2 in the DAF dividing step described above are considered to be inappropriate. Therefore, in view of the result of the DAF18 division confirmed in the DAF division confirmation step, the speed and amount of expansion when the dicing tape T2 is expanded by the dividing device 50 are appropriately adjusted. More specifically, the adjustment is performed so as to increase the pressure of the control air to be supplied to the air cylinder 52a of the division unit 52 or to extend the extension amount of the piston rod 52 b.
According to the above-described embodiment, in the DAF division checking step, the wafer 10 and the DAF18 can be supported by the support member T3 so that the DAF18 side faces upward, and therefore, it is possible to easily and reliably check from the DAF18 side whether or not the DAF18 is appropriately divided in correspondence with the device chip 12', and thus, the adjustment of the dividing unit in the DAF division step can also be appropriately performed.
In the above-described embodiment, as shown in fig. 7, the dicing tape peeling step is performed in which the support member T3 formed in the same size as the wafer 10 is disposed on the front surface 10a side of the wafer 10, and then the dicing tape T2 is peeled from the DAF18 disposed on the back surface 10b side of the wafer 10, but the present invention is not limited thereto. For example, as shown in fig. 9 (a), a support member T4 formed of a resin tape larger than the opening Fa of the frame F and smaller than the outer shape of the frame F may be disposed on the front surface 10a side of the wafer 10 on which the DAF dividing step is completed. More specifically, the support member T4 shown in fig. 9 (a) is prepared, and the roller 70 is moved in the direction indicated by the arrow R8 while the roller 70 is rotated in the direction indicated by the arrow R7, whereby the support member T4 is pressed against the front surface 10a of the wafer 10 and the frame F. Then, as shown in fig. 9 (b), the frame F is turned upside down so that the dicing tape T2 side faces upward, and the dicing tape T2 is pulled in the direction indicated by the arrow R9 and peeled off. Thus, the wafer 10 is supported by the support member T4, and the DAF18 disposed on the front surface 10a of the wafer 10 is exposed, so that the DAF division checking step can be performed as described above, and it can be checked from the DAF18 side whether or not the DAF18 is appropriately divided in correspondence with the device chip 12'.
In the above-described embodiment, the wafer 10 on which the plurality of devices 12 are formed on the front surface 10a by dividing the lines to divide 14 is prepared when the DAF division checking method of the present embodiment is performed, but the present invention is not limited to this. The present invention also includes, for example, the following cases: the above-described supporting step, DAF dividing step, shrinking step, and DAF division confirming step are performed using a so-called dummy wafer having no device 12 formed on the front surface, and preparing, as a workpiece, a dummy wafer divided into a plurality of chips along the planned dividing lines in the case where a plurality of devices 12 are supposed to be formed on the front surface, or a dummy wafer having division start points formed along the planned dividing lines. In this way, by implementing the DAF division checking method of the present invention using dummy wafers, the expanding speed and the expanding amount when expanding the dicing tape in the DAF division step are appropriately adjusted, thereby making it possible to avoid a failure in the DAF division step using the regular wafer 10 and to minimize economic loss.

Claims (2)

1. A DAF division checking method for checking whether a DAF arranged on the back surface of a wafer is divided properly for each chip,
the DAF division checking method at least comprises the following steps:
a supporting step of arranging one surface of the DAF on a back surface of a wafer divided into a plurality of chips along the planned dividing lines or a wafer having division starting points formed along the planned dividing lines, positioning the wafer in the opening of an annular frame having an opening for accommodating the wafer, attaching a dicing tape to the other surface of the DAF, and supporting the DAF and the wafer on the frame via the dicing tape;
a DAF dividing step of expanding the dicing tape positioned between the wafer and the frame to expand the interval between the adjacent chips and dividing the DAF corresponding to the chip;
a contraction step of heating the dicing tape between the wafer and the frame to relax and contract;
a dicing tape peeling step of peeling the dicing tape from the DAF by disposing a support member on the front surface of the wafer; and
a DAF division checking step of checking whether the DAF is divided corresponding to each chip.
2. The DAF segmentation validation method according to claim 1, wherein,
when it is confirmed in the DAF division confirming step that the DAF is not divided in correspondence with each chip, the spreading speed and the spreading amount when the dicing tape is spread in the DAF division step are adjusted.
CN202210099933.5A 2021-02-09 2022-01-27 DAF segmentation confirmation method Pending CN114914197A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021-018874 2021-02-09
JP2021018874A JP2022121897A (en) 2021-02-09 2021-02-09 Daf division confirmation method

Publications (1)

Publication Number Publication Date
CN114914197A true CN114914197A (en) 2022-08-16

Family

ID=82763207

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210099933.5A Pending CN114914197A (en) 2021-02-09 2022-01-27 DAF segmentation confirmation method

Country Status (4)

Country Link
JP (1) JP2022121897A (en)
KR (1) KR20220115054A (en)
CN (1) CN114914197A (en)
TW (1) TW202232591A (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4471565B2 (en) 2002-12-10 2010-06-02 株式会社ディスコ Semiconductor wafer dividing method
JP2014007333A (en) 2012-06-26 2014-01-16 Disco Abrasive Syst Ltd Method for processing wafer

Also Published As

Publication number Publication date
JP2022121897A (en) 2022-08-22
KR20220115054A (en) 2022-08-17
TW202232591A (en) 2022-08-16

Similar Documents

Publication Publication Date Title
US7915140B2 (en) Fabrication method for device having die attach film on the back side thereof
CN106997867B (en) Method for processing wafer
TWI438834B (en) Method of dividing an adhesive film bonded to a wafer
US9093519B2 (en) Wafer processing method
KR20090049534A (en) Method for manufacturing semiconductor device
CN110491783B (en) Wafer processing method
JP2010103245A (en) Method of manufacturing laminated device
CN107452609B (en) Wafer processing method
KR20150140215A (en) Wafer machining method
KR20130137534A (en) Method for machining wafer
CN115579283A (en) Processing method
JP2015015359A (en) Method for processing wafer
JP2008263070A (en) Method of manufacturing device
TW201630119A (en) Wafer processing method
CN110783250A (en) Method for processing wafer
KR20170029385A (en) Wafer machining method
CN111192852B (en) Method for processing laminated body
CN110211926B (en) Method for processing object to be processed
CN107808847B (en) Chip spacing maintaining method
CN114914197A (en) DAF segmentation confirmation method
KR102561376B1 (en) Wafer processing method and supporting tool used in wafer processing
KR20150104041A (en) Processing method
KR20220126635A (en) Method of manufacturing wafer, method of manufacturing chip, method for alignment of wafer and laser beam
CN115570461A (en) Method for processing laminated wafer
JP2023038724A (en) Wafer transfer method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination